Display device

Abstract

A display device is provided. The display device includes a display panel including a display area and a non-display area, the display area including a first area and a second area adjacent to the first area. The first region comprises first pixels, the second region comprises second pixels, the first pixels comprise first-first pixels, first-second pixels and first-third pixels, and the second pixels comprise second-first pixels, second-second pixels and second-third pixels; each of the first-first to first-third pixels has an elliptical shape with a first eccentricity rate value, and each of the second-first to second-third pixels has an elliptical shape with a second eccentricity rate value.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to Korean Patent Application No. 10-2023-0089149, filed on Jul. 10, 2023, the contents of which are hereby incorporated by reference herein in their entirety. Technical Field

[0003] The present disclosure relates to a display device, and more particularly, to a display device including a pixel having an elliptical shape. Background Art

[0004] The electronic device includes various electronic components such as a display panel, an electronic module, and the like. The electronic module includes a camera, an infrared sensor, or a proximity sensor. The electronic module is disposed below the display panel. A portion of the display panel has a transmittance higher than that of other portions of the display panel. The electronic module receives an external input through the portion of the display panel having a higher transmittance or provides an output through the portion of the display panel. Summary of the invention

[0005] The present disclosure provides a display device having improved reflective characteristics by changing the eccentricity of a pixel having an elliptical shape for each region.

[0006] The present disclosure provides a display device having improved reflective characteristics by changing the eccentricity of a pixel having an elliptical shape for each color of the pixel.

[0007] The present invention is conceived to relate to a display device, which includes a display panel and an anti-reflection layer disposed on the display panel, wherein the display panel includes a display area including a first area and a second area adjacent to the first area, and a non-display area adjacent to the display area. The first area includes a plurality of first pixels, the second area includes a plurality of second pixels, the first pixel includes a first-first pixel emitting a first color light, a first-second pixel emitting a second color light, and a first-third pixel emitting a third color light, the second pixel includes a second-first pixel emitting a first color light, a second-second pixel emitting a second color light, and a second-third pixel emitting a third color light, each of the first-first pixel, the first-second pixel, and the first-third pixel has an elliptical shape with a major axis, a minor axis, and a first eccentricity value, and each of the second-first pixel, the second-second pixel, and the second-third pixel has an elliptical shape with a major axis, a minor axis, and a second eccentricity value lower than the first eccentricity value. The second angle is closer to zero than the first angle, wherein the first angle is an angle between a direction in which the major axis of the first-first pixel extends and a direction in which the major axis of the first-second pixel closest to the first-first pixel extends. The second angle is an angle between a direction in which the major axis of the second-first pixel extends and a direction in which the major axis of the second-second pixel closest to the second-first pixel extends.

[0008] When viewed in a plane, the first-first pixel may have a size that is larger than each of the size of the first-second pixel and the size of the first-third pixel, and when viewed in a plane, the second-first pixel may have a size that is larger than each of the size of the second-second pixel and the size of the second-third pixel.

[0009] The first color light may be blue light, the second color light may be green light, and the third color light may be red light.

[0010] The first pixel may include a first pixel row and a second pixel row, the first pixel row may include first-first pixels and first-third pixels arranged in the first direction, and the second pixel row may include first-second pixels arranged in the first direction.

[0011] The second pixel row may include a first pixel row and a second pixel row, the first pixel row may include second-first pixels and second-third pixels arranged in the first direction, and the second pixel row may include second-second pixels arranged in the first direction.

[0012] The first angle may be equal to or greater than about 40 degrees and equal to or less than about 50 degrees.

[0013] The second angle may be approximately zero (0) degrees.

[0014] When viewed in a plane, the first-first pixel and the second-first pixel may have substantially the same size.

[0015] The anti-reflection layer may include a color filter disposed on the display panel and overlapping the first and second pixels, a light blocking pattern disposed on the display panel and preventing external light from being reflected, and a planarization layer covering the color filter and the light blocking pattern and providing a planar upper surface.

[0016] The minimum distance between two adjacent pixels among the first-first pixel, the first-second pixel, and the first-third pixel of each of the multiple first pixels may be substantially equal to the minimum distance between two adjacent pixels among the second-first pixel, the second-second pixel, and the second-third pixel of each of the multiple second pixels.

[0017] A minimum distance between two pixels adjacent to each other among the first-first pixel, the first-second pixel, and the first-third pixel of each of the plurality of first pixels may be equal to or greater than about 18 micrometers.

[0018] The first eccentricity value is equal to or greater than approximately 0.8 and less than approximately 1.

[0019] The second eccentricity value is equal to or less than about 0.6.

[0020] An average value of the first eccentricity value and the second eccentricity value may be equal to or greater than about 0.6.

[0021] The present invention is conceived to relate to a display device, the display device comprising a display panel and an anti-reflection layer disposed on the display panel, the display panel comprising a display area including a plurality of pixels and a non-display area adjacent to the display area. The plurality of pixels comprises a first pixel emitting a first color light and having an elliptical shape with a first eccentricity value, a second pixel emitting a second color light and having an elliptical shape with a second eccentricity value, and a third pixel emitting a third color light and having an elliptical shape with a third eccentricity value, and when the angle between the direction in which the major axis of the first pixel extends and the direction in which the major axis of the second pixel closest to the first pixel extends increases, the first eccentricity value increases.

[0022] The first eccentricity value, the second eccentricity value, and the third eccentricity value may be substantially the same.

[0023] The first eccentricity value may be different from at least one of the second eccentricity value and the third eccentricity value.

[0024] The first eccentricity value may be greater than each of the second eccentricity value and the third eccentricity value, and the second eccentricity value is substantially the same as the third eccentricity value.

[0025] When viewed in a plane, the first pixel may have a size greater than each of a size of the second pixel and a size of the third pixel.

[0026] An average value of the first eccentricity value, the second eccentricity value, and the third eccentricity value may be equal to or greater than about 0.6.

[0027] According to the above, the minimum separation distance between adjacent pixels can be achieved by changing the eccentricity of the pixel according to the size of the angle between the extension directions of the long axes of the adjacent pixels. Accordingly, the minimum separation distance between adjacent pixels is ensured, and the reflection characteristics are improved by increasing the eccentricity value of the pixel.

[0028] According to the above, the reflection color is improved by changing the eccentricity value of the pixel having the elliptical shape according to the color of the pixel. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] The above and other advantages of the present disclosure will become apparent by referring to the following detailed description when considered in conjunction with the accompanying drawings, in which:

[0030] Figure 1A and Figure 1B is a perspective view of an electronic device according to an embodiment of the present disclosure;

[0031] Figure 2 is an exploded perspective view of an electronic device according to an embodiment of the present disclosure;

[0032] Figure 3 is a plan view of a display panel according to an embodiment of the present disclosure;

[0033] Figure 4 is a cross-sectional view of a display module according to an embodiment of the present disclosure;

[0034] Figure 5 is a plan view of a structure of a pixel according to an embodiment of the present disclosure;

[0035] FIG. 6A to FIG. 6D is a plan view of a structure of a pixel according to an embodiment of the present disclosure;

[0036] Figure 7 is a graph showing the relationship between the angle of the major axis and the eccentricity according to an embodiment of the present disclosure;

[0037] FIG. 8A to FIG. 8D is a view of the reflectance properties according to the eccentricity of the pixel;

[0038] Fig.9A and Fig. 9B is a view of the reflectance properties according to the eccentricity of the pixel; and

[0039] FIG. 10A to FIG. 10E is a plan view of the structure of a pixel according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0040] In the present disclosure, it should be understood that when an element (or region, layer or portion) is referred to as being "on," "connected to" or "coupled to" another element or layer, it can be directly on, connected to or coupled to the other element or layer, or intervening elements or layers may be present.

[0041] Throughout the specification, the same reference numerals refer to the same elements. In the accompanying drawings, the thickness, proportion and size of the components are exaggerated for the effective description of the technical content. As used herein, the term "and / or" may include any and all combinations of one or more of the related listed items.

[0042] It should be understood that although the terms first, second, etc. can be used in this article to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element. Therefore, without departing from the teaching of the present disclosure, the first element discussed below may be referred to as the second element. Unless otherwise clearly indicated in the context, the singular forms "a", "an", and "the" as used herein are also intended to include plural forms.

[0043] Spatially relative terms (such as "beneath," "below," "lower," "above," "upper" and the like) may be used herein for convenience of description to describe the relationship of one element or feature to other elements or features as shown in the figures.

[0044] It should also be understood that the terms “include” and / or “including” when used in this specification specify the presence of stated features, integers, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or clusters thereof.

[0045] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as those commonly understood by those of ordinary skill in the art to which the present disclosure belongs. It should also be understood that, unless explicitly defined as such herein, terms (such as those defined in commonly used dictionaries) should be interpreted as having a meaning consistent with their meaning in the context of the relevant technology and will not be interpreted in an idealized or overly formal sense.

[0046] Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings.

[0047] Figure 1A and Figure 1B is a perspective view of an electronic device ED according to an embodiment of the present disclosure. Figure 1A The electronic device ED is shown in its unfolded state, and Figure 1B The folded state of the electronic device ED is shown.

[0048] Reference Figure 1A and Figure 1B , the electronic device ED may include a display surface DS defined by a first direction DR1 and a second direction DR2 intersecting the first direction DR1. The electronic device ED may provide an image IM to a user through the display surface DS.

[0049] The display surface DS may include a display area DA and a non-display area NDA around the display area DA. The display area DA may display an image IM, and the non-display area NDA may not display the image IM. The non-display area NDA may surround the display area DA. However, the present disclosure is not limited to such an arrangement of the display area DA and the non-display area NDA, and the shape of the display area DA and the shape and position of the non-display area NDA may be changed.

[0050] Hereinafter, a direction substantially perpendicular to a plane defined by the first direction DR1 and the second direction DR2 may be referred to as a third direction DR3. In the present disclosure, the expression "when viewed in a plane" may mean a state viewed in the third direction DR3.

[0051] A sensing area ED-SA may be defined in the display area DA of the electronic device ED. Figure 1A One sensing area ED-SA is shown as a representative example; however, the number or location of the sensing areas ED-SA should not be limited to Figure 1A The sensing area ED-SA may be a part of the display area DA. Accordingly, the electronic device ED may display an image through the sensing area ED-SA.

[0052] The electronic device ED may include an electronic module disposed in an area overlapping with the sensing area ED-SA. The electronic module may receive an external input provided from the outside through the sensing area ED-SA, or may output a signal through the sensing area ED-SA. For example, the electronic module may be a camera module, a sensor that measures a distance (such as a proximity sensor), a sensor that recognizes a part of the user's body (e.g., a fingerprint, an iris, or a face), or a small lamp that outputs light. However, the electronic module is not particularly limited to these possibilities. In the following, the camera module will be described as an electronic module overlapping with the sensing area ED-SA.

[0053] The electronic device ED may include a folding area FA and a plurality of non-folding areas NFA1 and NFA2. The non-folding areas NFA1 and NFA2 may include a first non-folding area NFA1 and a second non-folding area NFA2. The folding area FA may be disposed between the first non-folding area NFA1 and the second non-folding area NFA2 in a second direction DR2. The folding area FA may be referred to as a foldable area, and the first non-folding area NFA1 and the second non-folding area NFA2 may be referred to as a first non-foldable area and a second non-foldable area, respectively.

[0054] like Figure 1B As shown in , the folding area FA can be folded relative to a folding axis FX substantially parallel to the first direction DR1. When the electronic device ED is in a folded state, the folding area FA can have a predetermined curvature and a radius of curvature. The electronic device ED can be folded inward (inwardly folded) so that the first non-folding area NFA1 faces the second non-folding area NFA2, and the display surface DS is not displayed on the outside of the folded device.

[0055] According to an embodiment, the electronic device ED may be folded outward (outwardly folded) so that the display surface DS is displayed on the outside in the folded state. According to an embodiment, the electronic device ED may be provided so that an inward folding operation or an outward folding operation is repeated with an unfolding operation. According to an embodiment, the electronic device ED may be provided so as to perform any one of an unfolding operation, an inward folding operation, and an outward folding operation.

[0056] Figure 1A and Figure 1B A foldable electronic device ED is shown as a representative example. However, the present disclosure should not be limited to the foldable electronic device ED. For example, the present disclosure may be applied to a rigid electronic device, for example, an electronic device that does not include a folding area FA.

[0057] Figure 2 is an exploded perspective view of an electronic device ED according to an embodiment of the present disclosure.

[0058] Reference Figure 2 The electronic device ED may include a display device DD, a first electronic module EM1, a second electronic module EM2, a power module PM, and housings EDC1 and EDC2. Although not shown in the drawings, the electronic device ED may further include a mechanical structure for controlling a folding operation of the display device DD.

[0059] The display device DD may include a window module WM and a display module DM. The window module WM may provide a front surface of the electronic device ED. The display module DM may include at least a display panel DP. The display module DM may generate an image and may sense an external input.

[0060] Although the display module DM is shown as Figure 2The display module DM may have a stack structure in which a plurality of components including the display panel DP are stacked one on top of another. A detailed description of the stack structure of the display module DM will be described below.

[0061] The display panel DP may include display areas DA (refer to Figure 1A ) and non-display area NDA (refer to Figure 1A ) corresponds to a display area DP-DA and a non-display area DP-NDA. In the present disclosure, the expression “an area / portion corresponds to another area / portion” means “an area / portion overlaps another area / portion”; however, “area and portion” should not be limited to having the same size as each other.

[0062] The display area DP-DA may include a first area A1 and a second area A2. The first area A1 may be aligned with the sensing area ED-SA (refer to FIG. Figure 1A ) overlap or correspond. In this embodiment, the first area A1 is shown as a circular shape, but the shape of the first area A1 should not be limited to Figure 2 The first area A1 may have various shapes, such as a polygonal shape, an elliptical shape, a figure having at least one bent edge, or an irregular shape. The first area A1 may be referred to as a component area, and the second area A2 may be referred to as a main display area or a normal display area.

[0063] The first area A1 may have a higher transmittance than that of the second area A2. In addition, the first area A1 may have a lower resolution than that of the second area A2. The first area A1 may overlap with a camera module CMM described below.

[0064] The display module DM may include a driving chip DIC disposed in the non-display area DP-NDA. The display module DM may further include a flexible circuit film FCB coupled with the display panel DP in the non-display area DP-NDA.

[0065] The driving chip DIC may include driving elements, such as a data driving circuit, to drive the pixels of the display panel DP. Figure 2 A structure in which a driving chip DIC is mounted on a display panel DP is shown. However, the present disclosure should not be limited by the example. In some embodiments, the driving chip DIC may be mounted on a flexible circuit film FCB.

[0066] The power module PM may supply power required for the overall operation of the electronic device ED and may include a well-known battery module.

[0067] The first electronic module EM1 and the second electronic module EM2 may include various functional modules of the driving electronic device ED. Each of the first electronic module EM1 and the second electronic module EM2 may be directly mounted on a motherboard electrically connected to the display panel DP, or may be electrically connected to the motherboard via a connector (not shown) after being mounted on a separate substrate.

[0068] The first electronic module EM1 and the second electronic module EM2 may include various components for controlling the overall operation of the electronic device ED. For example, the first electronic module EM1 may include a control module, a wireless communication module, an image input module, an audio input module, a memory, and an external interface. The second electronic module EM2 may include an audio output module, a light emitting module, a light receiving module, and a camera module.

[0069] The housings EDC1 and EDC2 may accommodate the display module DM, the first and second electronic modules EM1 and EM2, and the power module PM. The housings EDC1 and EDC2 may protect components accommodated therein, such as the display module DM, the first and second electronic modules EM1 and EM2, and the power module PM. Figure 2 Two housings EDC1 and EDC2 separated from each other are shown as a representative example. However, the present disclosure should not be limited by the embodiments. Although not shown in the figures, the electronic device ED may also include a hinge structure to connect the two housings EDC1 and EDC2. The housings EDC1 and EDC2 may be connected to the window module WM.

[0070] Figure 3 is a plan view of a display panel DP according to an embodiment of the present disclosure.

[0071] Reference Figure 3 , the display panel DP may include a display area DP-DA and a non-display area DP-NDA around the display area DP-DA. The display area DP-DA and the non-display area DP-NDA may be distinguished by the presence or absence of a pixel PX. The pixel PX may be disposed in the display area DP-DA. A scan driver SDV, a data driver, and an emission driver EDV may be disposed in the non-display area DP-NDA. The data driver may be a circuit provided in a driver chip DIC.

[0072] The display area DP-DA may include a first area A1 and a second area A2. The first area A1 and the second area A2 may be distinguished from each other by an arrangement interval of the pixels PX, a size of the pixels PX, or the like.

[0073] The display panel DP may include a first panel area AR1, a bending area BA, and a second panel area AR2 defined in the second direction DR2. The second panel area AR2 and the bending area BA may be areas of the non-display area DP-NDA. The bending area BA may be defined between the first panel area AR1 and the second panel area AR2.

[0074] The first panel area AR1 may be Figure 1A The first panel area AR1 may include a first non-folding area NFA10, a second non-folding area NFA20, and a folding area FA0. The first non-folding area NFA10, the second non-folding area NFA20, and the folding area FA0 may be respectively Figure 1A and Figure 1B The first non-folding area NFA1, the second non-folding area NFA2 and the folding area FA correspond to each other.

[0075] The bending area BA may be an area that is bent when the electronic device ED is assembled. Since the display panel DP includes the bending area BA, an electronic device having a narrow bezel may be easily implemented.

[0076] Each of the width (or length) of the bending area BA in the first direction DR1 and the width (or length) of the second panel area AR2 in the first direction DR1 may be smaller than the width (or length) of the first panel area AR1 in the first direction DR1. A region having a relatively short length in the bending axis direction may be relatively easily bent.

[0077] The display panel DP may include a plurality of pixels PX, a plurality of scan lines SL1 to SLm, a plurality of data lines DL1 to DLn, a plurality of emission control lines ECL1 to ECLm, a first control line CSL1 and a second control line CSL2, a driving voltage line PL, and a plurality of pads PD. In the present embodiment, each of "m" and "n" is a natural number. The pixels PX may be connected to the scan lines SL1 to SLm, the data lines DL1 to DLn, and the emission control lines ECL1 to ECLm.

[0078] The scan lines SL1 to SLm may extend in a first direction DR1 and may be electrically connected to a scan driver SDV. The data lines DL1 to DLn may extend in a second direction DR2 and may be electrically connected to a driving chip DIC via a bending area BA. The emission control lines ECL1 to ECLm may extend in a direction opposite to the first direction DR1 and may be electrically connected to an emission driver EDV.

[0079] The driving voltage line PL may include a portion extending in the first direction DR1 and a portion extending in the second direction DR2. The portion extending in the first direction DR1 and the portion extending in the second direction DR2 may be disposed at different layers from each other. The driving voltage line PL may extend to the second panel area AR2 via the bending area BA. The driving voltage line PL may provide a first voltage to the pixel PX.

[0080] The first control line CSL1 may be connected to the scan driver SDV and may extend to the lower end of the second panel area AR2 via the bending area BA. The second control line CSL2 may be connected to the emission driver EDV and may extend to the lower end of the second panel area AR2 via the bending area BA.

[0081] When viewed in a plane, the pad PD may be disposed adjacent to the lower end of the second panel area AR2. The driving chip DIC, the driving voltage line PL, the first control line CSL1, and the second control line CSL2 may be electrically connected to the pad PD. The flexible circuit film FCB may be electrically connected to the pad PD through an anisotropic conductive adhesive layer.

[0082] Figure 4 is a cross-sectional view of a display module DM according to an embodiment of the present disclosure.

[0083] Reference Figure 4 , the display module DM may include a display panel DP, a sensor layer 200 and an anti-reflection layer 300. The display panel DP may include a substrate 110, a circuit layer 120, a light emitting element layer 130 and an encapsulation layer 140.

[0084] The display panel DP may have a configuration that substantially generates an image. The display panel DP may be a light-emitting display layer. For example, the display panel DP may be an organic light-emitting display layer, an inorganic light-emitting display layer, an organic-inorganic light-emitting display layer, a quantum dot display layer, a micro LED display layer, or a nano LED display layer.

[0085] The substrate 110 may include a plurality of layers 111, 112, 113, and 114. For example, the substrate 110 may include a first subbase layer 111, a first intermediate barrier layer 112, a second intermediate barrier layer 113, and a second subbase layer 114. The first subbase layer 111, the first intermediate barrier layer 112, the second intermediate barrier layer 113, and the second subbase layer 114 may be sequentially stacked in the third direction DR3.

[0086] Each of the first sub-base layer 111 and the second sub-base layer 114 may include at least one of a polyimide-based resin, an acrylic-based resin, a methacrylic-based resin, a polyisoprene-based resin, a vinyl resin, an epoxy-based resin, a urethane-based resin, a cellulose-based resin, a siloxane-based resin, a polyamide-based resin, and a perylene-based resin. Meanwhile, in the present disclosure, the term "A-based resin" means a functional group including "A". A barrier layer BR may be provided on the substrate 110. The barrier layer BR may include a first sub-barrier layer BR1 provided on the substrate 110 and a second sub-barrier layer BR2 provided on the first sub-barrier layer BR1.

[0087] Each of the first intermediate barrier layer 112 and the second intermediate barrier layer 113 and each of the first sub-barrier layer BR1 and the second sub-barrier layer BR2 may include an inorganic material. Each of the first intermediate barrier layer 112 and the second intermediate barrier layer 113 and each of the first sub-barrier layer BR1 and the second sub-barrier layer BR2 may include at least one of silicon oxide, silicon nitride, silicon oxynitride and amorphous silicon. For example, each of the first sub-base layer 111 and the second sub-base layer 114 may include polyimide having a refractive index of about 1.9. Each of the first intermediate barrier layer 112 and the first sub-barrier layer BR1 may include silicon oxynitride (SiON) having a refractive index of about 1.72. Each of the second intermediate barrier layer 113 and the second sub-barrier layer BR2 may include silicon oxide (SiO x ).

[0088] That is, the refractive index of the first intermediate barrier layer 112 may have a value between the refractive index of the first sub-base layer 111 and the refractive index of the second intermediate barrier layer 113. The refractive index of the first sub-barrier layer BR1 may have a value between the refractive index of the second sub-base layer 114 and the refractive index of the second sub-barrier layer BR2. As the difference in refractive index between layers in contact with each other decreases, reflection of light at the interface between layers in contact with each other may decrease.

[0089] The first sub-base layer 111 may be thicker than the second sub-base layer 114. However, the thickness of each of the first sub-base layer 111 and the second sub-base layer 114 should not be limited by the example embodiments. The first intermediate barrier layer 112 may be thinner than the second intermediate barrier layer 113, and the first sub-barrier layer BR1 may be thinner than the second sub-barrier layer BR2. However, the thickness of each of the first intermediate barrier layer 112 and the second intermediate barrier layer 113 and the first sub-barrier layer BR1 and the second sub-barrier layer BR2 should not be limited by the examples in the present disclosure.

[0090] A light blocking layer BML may be disposed on the barrier layer BR. The light blocking layer BML may include a first light blocking layer BMLa and a second light blocking layer BMLb. The light blocking layer BML may include molybdenum (Mo), an alloy including molybdenum (Mo), silver (Ag), an alloy including silver (Ag), aluminum (Al), an alloy including aluminum (Al), aluminum nitride (AlN), tungsten (W), tungsten nitride (WN), copper (Cu), titanium (Ti), P+ doped amorphous silicon, MoTaO x or the like; however, this is not an exhaustive list, and the present disclosure should not be limited by these examples. The light blocking layer BML may be referred to as a back surface metal layer or a back surface layer.

[0091] At least one lower insulating layer BMB may be disposed between the light blocking layer BML and the barrier layer BR. The lower insulating layer BMB may include an inorganic material. For example, the lower insulating layer BMB may include at least one of silicon oxide, silicon nitride, silicon oxynitride, and amorphous silicon.

[0092] A buffer layer BF may be disposed on the lower insulating layer BMB and the barrier layer BR. The buffer layer BF may prevent metal atoms or impurities from diffusing from the substrate 110 to the first semiconductor pattern. In addition, the buffer layer BF may control a heat supply rate during a crystallization process of forming the first semiconductor pattern so that the first semiconductor pattern may be uniformly formed.

[0093] The buffer layer BF may include a first sub-buffer layer BF1 and a second sub-buffer layer BF2 disposed on the first sub-buffer layer BF1. Each of the first sub-buffer layer BF1 and the second sub-buffer layer BF2 may include at least one of silicon oxide, silicon nitride, and silicon oxynitride. For example, the first sub-buffer layer BF1 may include silicon nitride, and the second sub-buffer layer BF2 may include silicon oxide.

[0094] A plurality of pixels PX (refer to Figure 3 ) may include a light emitting element LD and a pixel circuit PC. The pixel circuit PC may include a silicon thin film transistor S-TFT and an oxide thin film transistor O-TFT.

[0095] The first light blocking layer BMLa may be disposed under the silicon thin film transistor S-TFT, and the second light blocking layer BMLb may be disposed under the oxide thin film transistor O-TFT. Each of the first light blocking layer BMLa and the second light blocking layer BMLb may be disposed to overlap the pixel circuit PC to protect the pixel circuit PC.

[0096] The first light blocking layer BMLa and the second light blocking layer BMLb may prevent a potential caused by a polarization phenomenon of the first sub base layer 111 or the second sub base layer 114 from exerting an influence on the pixel circuit PC. According to an embodiment, the second light blocking layer BMLb may be omitted.

[0097] Despite Figure 4Although not shown in the figure, in some embodiments, the first light blocking layer BMLa may be disposed below the lower insulating layer BMB. At the same time, the first light blocking layer BMLa may be disposed in the second sub-blocking layer BR2. For example, a portion in the thickness direction of the second sub-blocking layer BR2 is formed, and the first light blocking layer BMLa is formed thereon. Then, another portion in the thickness direction of the second sub-blocking layer BR2 may be formed to cover the first light blocking layer BMLa. However, this is only an example, and the first light blocking layer BMLa may be disposed at various positions.

[0098] The second light blocking layer BMLb may be disposed between the second insulating layer 20 and the third insulating layer 30. The second light blocking layer BMLb may be disposed at the same layer as the second electrode CE2 of the storage capacitor Cst. The second light blocking layer BMLb may be connected to the contact electrode BL2-C to receive a constant voltage or signal. The contact electrode BL2-C may be disposed at the same layer as the gate electrode GT2 of the oxide thin film transistor O-TFT. The first light blocking layer BMLa and the second light blocking layer BMLb may include materials that are the same as or different from each other. However, this is only an example. According to an embodiment, the contact electrode BL2-C may be disposed at the same layer as the first connection electrode CNE1 or the second connection electrode CNE2 described below. However, it should not be particularly limited.

[0099] The first semiconductor pattern may be disposed on the buffer layer BF. The first semiconductor pattern may include a silicon semiconductor. For example, the silicon semiconductor may include amorphous silicon or polycrystalline silicon. For example, the first semiconductor pattern may include low temperature polycrystalline silicon.

[0100] The first semiconductor pattern may have different electrical properties depending on whether it is doped or whether it is doped with an N-type dopant or a P-type dopant. The first semiconductor pattern may include a first region having a relatively high conductivity and a second region having a relatively low conductivity. The first region may be doped with an N-type dopant or a P-type dopant. A P-type transistor may include a doped region doped with a P-type dopant, and an N-type transistor may include a doped region doped with an N-type dopant. The second region may be a non-doped region or a region doped with a concentration lower than that of the first region.

[0101] The first region may have a higher conductivity than that of the second region and may be substantially used as an electrode or a signal line. The second region may substantially correspond to an active region (or channel) of a transistor. In other words, a portion of the first semiconductor pattern may be an active region of a transistor, another portion of the first semiconductor pattern may be a source or drain of the transistor, and another portion of the first semiconductor pattern may be a connection electrode or a connection signal line.

[0102] The source region SE1, the active region AC1, and the drain region DE1 of the silicon thin film transistor S-TFT may be formed of the first semiconductor pattern. The source region SE1 and the drain region DE1 may extend from the active region AC1 in opposite directions to each other in a cross section.

[0103] The circuit layer 120 may include a plurality of inorganic insulating layers disposed on the light blocking layer BML. According to an embodiment, some of the first insulating layer 10, the second insulating layer 20, the third insulating layer 30, the fourth insulating layer 40, and the fifth insulating layer 50 sequentially stacked on the buffer layer BF may be inorganic insulating layers. For example, all of the first insulating layer 10 to the fifth insulating layer 50 may be inorganic insulating layers.

[0104] The first insulating layer 10 may be disposed on the buffer layer BF. The first insulating layer 10 may overlap with a plurality of pixels in common and may cover the first semiconductor pattern. The first insulating layer 10 may be an inorganic layer and / or an organic layer and may have a single-layer or multi-layer structure. The first insulating layer 10 may include at least one of aluminum oxide, titanium oxide, silicon oxide, silicon nitride, silicon oxynitride, zirconium oxide, and hafnium oxide. In the present embodiment, the first insulating layer 10 may have a single-layer structure of a silicon oxide layer. Not only the first insulating layer 10, but also other insulating layers of the circuit layer 120 described below may have a single-layer or multi-layer structure.

[0105] The gate GT1 of the silicon thin film transistor S-TFT may be disposed on the first insulating layer 10. The gate GT1 may be a part of the metal pattern. The gate GT1 may overlap with the active region AC1. The gate GT1 may be used as a mask in the process of doping the first semiconductor pattern. The gate GT1 may include titanium (Ti), silver (Ag), an alloy containing silver (Ag), molybdenum (Mo), an alloy containing molybdenum (Mo), aluminum (Al), an alloy containing aluminum (Al), aluminum nitride (AlN), tungsten (W), tungsten nitride (WN), copper (Cu), indium tin oxide (ITO), indium zinc oxide (IZO) or the like, however, it should not be particularly limited.

[0106] The second insulating layer 20 may be disposed on the first insulating layer 10 and may cover the gate GT1. The second insulating layer 20 may be an inorganic layer and may have a single layer or a multilayer structure. The second insulating layer 20 may include at least one of silicon oxide, silicon nitride, and silicon oxynitride. According to the present embodiment, the second insulating layer 20 may have a multilayer structure of a silicon oxide layer and a silicon nitride layer.

[0107] The third insulating layer 30 may be disposed on the second insulating layer 20. The third insulating layer 30 may be an inorganic layer and may have a single layer or a multi-layer structure. For example, the third insulating layer 30 may have a multi-layer structure of a silicon oxide layer and a silicon nitride layer. The second electrode CE2 of the storage capacitor Cst may be disposed between the second insulating layer 20 and the third insulating layer 30. In addition, the first electrode CE1 of the storage capacitor Cst may be disposed between the first insulating layer 10 and the second insulating layer 20. In an embodiment, as Figure 4 As shown in , the gate electrode GT1 may serve as a first electrode CE1 of the storage capacitor Cst.

[0108] The second semiconductor pattern may be disposed on the third insulating layer 30. The second semiconductor pattern may include an oxide semiconductor. The oxide semiconductor may include a plurality of regions that can be distinguished from each other based on whether the metal oxide is reduced. The region in which the metal oxide is reduced (hereinafter, referred to as the reduction region) has a conductivity greater than the conductivity of the region in which the metal oxide is not reduced (hereinafter, referred to as the non-reduction region). The reduction region may be used as a source / drain or a signal line of a transistor. The non-reduction region may substantially correspond to an active region (or semiconductor region or channel) of a transistor. In other words, a portion of the second semiconductor pattern may be an active region of a transistor, another portion of the second semiconductor pattern may be a source region / drain region of a transistor, and another portion of the second semiconductor pattern may be a signal transmission region.

[0109] The source region SE2, the active region AC2, and the drain region DE2 of the oxide thin film transistor O-TFT may be formed of the second semiconductor pattern. The source region SE2 and the drain region DE2 may extend from the active region AC2 in opposite directions to each other in a cross section.

[0110] The fourth insulating layer 40 may be disposed on the third insulating layer 30. The fourth insulating layer 40 may overlap with a plurality of pixels in common and may cover the second semiconductor pattern. The fourth insulating layer 40 may be an inorganic layer and may have a single layer or multilayer structure. The fourth insulating layer 40 may include at least one of aluminum oxide, titanium oxide, silicon oxide, silicon nitride, silicon oxynitride, zirconium oxide, and hafnium oxide.

[0111] The gate GT2 of the oxide thin film transistor O-TFT may be disposed on the fourth insulating layer 40. The gate GT2 may be a portion of the metal pattern. The gate GT2 may overlap the active region AC2. The gate GT2 may be used as a mask in the process of doping the second semiconductor pattern.

[0112] The fifth insulating layer 50 may be disposed on the fourth insulating layer 40 and may cover the gate electrode GT2. The fifth insulating layer 50 may be an inorganic layer and / or an organic layer, and may have a single layer or multi-layer structure.

[0113] The first connection electrode CNE1 may be disposed on the fifth insulating layer 50. The first connection electrode CNE1 may be connected to the drain region DE1 of the silicon thin film transistor S-TFT via a contact hole defined through the first insulating layer 10 to the fifth insulating layer 50. Figure 4 Although not shown, the display panel DP may further include a connection electrode formed in a region corresponding to the first connection electrode CNE1 and connected to the drain region DE2 or the source region SE2 of the oxide thin film transistor O-TFT, however, the present disclosure should not be limited by the example.

[0114] The circuit layer 120 may include a plurality of organic insulating layers disposed on the inorganic insulating layer. For example, at least one of the sixth insulating layer 60, the seventh insulating layer 70, and the eighth insulating layer 80 may be an organic insulating layer.

[0115] The sixth insulating layer 60 may be disposed on the fifth insulating layer 50. The sixth insulating layer 60 may include an organic material. For example, the sixth insulating layer 60 may include a polyimide-based resin. The second connection electrode CNE2 may be disposed on the sixth insulating layer 60. The second connection electrode CNE2 may be connected to the first connection electrode CNE1 through a contact hole defined through the sixth insulating layer 60.

[0116] The seventh insulating layer 70 may be disposed on the sixth insulating layer 60 and may cover the second connection electrode CNE2 . The eighth insulating layer 80 may be disposed on the seventh insulating layer 70 .

[0117] Each of the sixth insulating layer 60, the seventh insulating layer 70, and the eighth insulating layer 80 may be an organic layer. In the following description, the sixth insulating layer 60, the seventh insulating layer 70, and the eighth insulating layer 80 may be referred to as a first organic insulating layer, a second organic insulating layer, and a third organic insulating layer, respectively. For example, each of the sixth insulating layer 60, the seventh insulating layer 70, and the eighth insulating layer 80 may include a general polymer such as benzocyclobutene (BCB), polyimide, hexamethyldisiloxane (HMDSO), polymethylmethacrylate (PMMA), or polystyrene (PS), a polymer derivative having a phenolic group, an acrylic polymer, an imide polymer, an aryl ether polymer, an amide polymer, a fluorine polymer, a p-xylene polymer, a vinyl alcohol polymer, or a blend thereof.

[0118] The light emitting element layer 130 including the light emitting element LD may be disposed on the circuit layer 120. The light emitting element LD may include a pixel electrode AE, a first functional layer HFL, a light emitting layer EL, a second functional layer EFL, and a common electrode CE. The first functional layer HFL, the second functional layer EFL, and the common electrode CE may be connected to the pixel PX (refer to Figure 3 ) and may be made publicly available.

[0119] The pixel electrode AE ​​may be disposed on the eighth insulating layer 80. The pixel electrode AE ​​may be a semi-transmissive electrode, a transmissive electrode, or a reflective electrode. According to an embodiment, the pixel electrode AE ​​may include a reflective layer formed of Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, or a compound thereof and a transparent or semi-transparent electrode layer formed on the reflective layer. The transparent or semi-transparent electrode layer may include an electrode selected from indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), zinc oxide (ZnO), indium oxide (In 2 O 3 ) and aluminum-doped zinc oxide (AZO). For example, the pixel electrode AE ​​may have a stacked structure of ITO / Ag / ITO.

[0120] In the present embodiment, the pixel electrode AE ​​is connected to the silicon thin film transistor S-TFT via the first connection electrode CNE1 and the second connection electrode CNE2. However, the present disclosure should not be limited by the example embodiments. According to the embodiment, the pixel electrode AE ​​may be connected to the oxide thin film transistor O-TFT and should not be particularly limited.

[0121] A pixel defining layer PDL may be provided on the eighth insulating layer 80. The pixel defining layer PDL may have a light absorbing property, for example, the pixel defining layer PDL may have a black color. The pixel defining layer PDL may include a black colorant. The black colorant may include a black dye or a black pigment. The black colorant may include, for example, carbon black, a metal material such as chromium, or an oxide thereof.

[0122] The pixel defining layer PDL may be provided with an opening PDL-OP defined to penetrate through the pixel defining layer PDL to a portion of the pixel electrode AE. The pixel defining layer PDL may cover an edge of the pixel electrode AE.

[0123] The first functional layer HFL may be disposed on the pixel electrode AE ​​and the pixel defining layer PDL. The first functional layer HFL may include a hole transport layer, may include a hole injection layer, or may include both the hole transport layer and the hole injection layer.

[0124] The light emitting layer EL may be disposed on the first functional layer HFL and may be disposed in a region corresponding to the opening PDL-OP of the pixel defining layer PDL. The light emitting layer EL may include an organic material, an inorganic material, or an organic-inorganic material that emits light having a predetermined color. The light emitting layer EL may be disposed in the display region DP-DA.

[0125] The second functional layer EFL may be disposed on the first functional layer HFL and may cover the light emitting layer EL. The second functional layer EFL may include an electron transport layer, may include an electron injection layer, or may include both the electron transport layer and the electron injection layer.

[0126] The common electrode CE may be disposed on the second functional layer EFL. The light emitting element layer 130 may further include a capping layer SPC disposed on the common electrode CE. The capping layer SPC may include an inorganic material (such as LiF) and / or an organic material.

[0127] The encapsulation layer 140 may be disposed on the light emitting element layer 130. The encapsulation layer 140 may include an inorganic layer 141, an organic layer 142, and an inorganic layer 143, which are sequentially stacked. However, the layers included in the encapsulation layer 140 should not be limited by example embodiments.

[0128] The inorganic layers 141 and 143 may protect the light emitting element layer 130 from moisture and oxygen, and the organic layer 142 may protect the light emitting element layer 130 from foreign matter such as dust particles. The inorganic layers 141 and 143 may include a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer. The organic layer 142 may include an acrylic-based organic layer. However, the organic layer should not be limited by the example embodiments.

[0129] The sensor layer 200 may be disposed on the encapsulation layer 140. The sensor layer 200 may sense an external input applied from the outside. For example, the external input may be a user input. The user input may include various external inputs such as a part of the user's body, light, heat, a pen, or pressure.

[0130] The sensor layer 200 may be referred to as a sensor, an input sensing layer, or an input sensing panel. The sensor layer 200 may include a sensor base layer 210 , a first sensor conductive layer 220 , a sensor insulating layer 230 , a second sensor conductive layer 240 , and a sensor cover layer 250 .

[0131] The sensor base layer 210 may be directly disposed on the encapsulation layer 140. The sensor base layer 210 may be an inorganic layer including at least one of silicon nitride, silicon oxynitride, and silicon oxide. According to an embodiment, the sensor base layer 210 may be an organic layer including epoxy resin, acrylic resin, or imide-based resin. The sensor base layer 210 may have a single-layer structure or a multi-layer structure of layers stacked in the third direction DR3.

[0132] Each of the first sensor conductive layer 220 and the second sensor conductive layer 240 may have a single layer structure or a multi-layer structure of layers stacked in the third direction DR3 .

[0133] The conductive layer having a single-layer structure may include a metal layer or a transparent conductive layer. The metal layer may include molybdenum, silver, titanium, copper, aluminum, or an alloy thereof. The transparent conductive layer may include a transparent conductive oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium zinc tin oxide (ITZO), or the like. In addition, the transparent conductive layer may include a conductive polymer (such as PEDOT), a metal nanowire, graphene, or the like.

[0134] The conductive layer having a multi-layer structure may include a metal layer. The metal layer may have a three-layer structure of titanium / aluminum / titanium. The conductive layer having a multi-layer structure may include at least one metal layer and at least one transparent conductive layer.

[0135] The sensor insulating layer 230 may be disposed between the first sensor conductive layer 220 and the second sensor conductive layer 240. The sensor insulating layer 230 may include an inorganic layer. The inorganic layer may include at least one of aluminum oxide, titanium oxide, silicon oxide, silicon nitride, silicon oxynitride, zirconium oxide, and hafnium oxide.

[0136] According to an embodiment, the sensor insulating layer 230 may include an organic layer. The organic layer may include at least one of acrylic resin, methacrylic resin, polyisoprene resin, vinyl resin, epoxy resin, urethane resin, cellulose resin, siloxane resin, polyimide resin, polyamide resin, and perylene resin.

[0137] The sensor cover layer 250 may be disposed on the sensor insulating layer 230 and may cover the second sensor conductive layer 240. The sensor cover layer 250 may include an inorganic material. For example, the sensor cover layer 250 may include silicon nitride. However, this is not a limitation of the present disclosure.

[0138] The anti-reflection layer 300 may be disposed on the sensor layer 200. The anti-reflection layer 300 may include a light blocking pattern 310, a plurality of color filters 320, and a planarization layer 330.

[0139] The light blocking pattern 310 may be disposed on the sensor layer 200 and may overlap with the second sensor conductive layer 240. The sensor cover layer 250 may be disposed between the light blocking pattern 310 and the second sensor conductive layer 240. The light blocking pattern 310 may prevent external light from being reflected by the second sensor conductive layer 240. The material used for the light blocking pattern 310 should not be particularly limited as long as the material absorbs light. The light blocking pattern 310 may have a black color and may have a black colorant. The black colorant may include a black dye or a black pigment. The black colorant may include, for example, carbon black, a metal material such as chromium, or an oxide thereof.

[0140] The light blocking pattern 310 may be provided with a plurality of separation openings 310-OP defined therethrough. The plurality of separation openings 310-OP may overlap with the plurality of light emitting layers EL, respectively.

[0141] A plurality of color filters 320 may be disposed on the display panel DP and may be disposed to correspond to the plurality of partition openings 310-OP, respectively. The color filters 320 may be disposed in correspondence with the first pixel PX1 to the fourth pixel PX4 (refer to Figure 5 The color filter 320 may transmit light provided from the light emitting layer EL overlapping with the color filter 320.

[0142] The planarization layer 330 may cover the light blocking pattern 310 and the color filter 320. The planarization layer 330 may include an organic material and may provide a flat surface on an upper surface thereof. According to an embodiment, the planarization layer 330 may be omitted.

[0143] Figure 5 is a plan view of the structure of a pixel according to an embodiment of the present disclosure. In more detail, Figure 5 yes Figure 3 An enlarged plan view of area AA.

[0144] Reference Figure 5 , display panel DP (refer to Figure 3 ) may include a first area AA1, a second area AA2, a third area AA3, and a fourth area AA4. The first area AA1 may include a plurality of first pixels PX1. The second area AA2 may include a plurality of second pixels PX2. The third area AA3 may include a plurality of third pixels PX3. The fourth area AA4 may include a plurality of fourth pixels PX4.

[0145] Each of the first to fourth pixels PX1 to PX4 may include a plurality of pixels each having an elliptical shape with a major axis and a minor axis. In this case, the first to fourth pixels PX1 to PX4 may have the same eccentricity or different eccentricities. This will refer to FIG. 6A to FIG. 6D Describe in detail.

[0146] The first area AA1 may include a first pixel PX1. The first pixel PX1 may include a first-first pixel PX1-B that emits a first color light, a first-second pixel PX1-G that emits a second color light, and a first-third pixel PX1-R that emits a third color light. In the present embodiment, the first color light may be blue light, the second color light may be green light, and the third color light may be red light. However, the colors of the first color light, the second color light, and the third color light should not be limited by the examples in the present disclosure. For example, the first color light, the second color light, and the third color light may be red light, green light, and blue light, respectively.

[0147] The first pixel PX1 may include a first pixel row PXR1 and a second pixel row PXR2. The first pixel row PXR1 may include a first-first pixel PX1-B and a first-third pixel PX1-R arranged in the first direction DR1. In the first pixel row PXR1, the first-first pixel PX1-B and the first-third pixel PX1-R may be arranged alternately with each other. The second pixel row PXR2 may include a first-second pixel PX1-G arranged in the first direction DR1. In this case, the first-second pixel PX1-G may be disposed between the first-first pixel PX1-B and the first-third pixel PX1-R in the first direction DR1.

[0148] Each of the first pixel row PXR1 and the second pixel row PXR2 may be provided in plurality, and the first pixel row PXR1 may be arranged alternately with the second pixel row PXR2 in the second direction DR2. Four first-second pixels PX1-G may surround one first-first pixel PX1-B. The arrangement structure of the pixels in the first area AA1 may be the same as the arrangement structure of the pixels in the second area AA2 to the fourth area AA4. That is, each of the second pixels PX2 to the fourth pixels PX4 respectively disposed in the second area AA2 to the fourth area AA4 may be arranged in the same arrangement structure as the arrangement structure of the first pixel PX1 disposed in the first area AA1. The pixels arranged in each of the first area AA1 to the fourth area AA4 may have the same arrangement structure, and only the shapes of the pixels and the directions in which the pixels extend may be different from each other.

[0149] The second area AA2 may include second pixels PX2. The second pixels PX2 may include a second-first pixel PX2-B emitting a first color light, a second-second pixel PX2-G emitting a second color light, and a second-third pixel PX2-R emitting a third color light. The second pixels PX2 may have the same arrangement structure as that of the first pixels PX1 in the first area AA1.

[0150] The third area AA3 may include third pixels PX3. The third pixels PX3 may include a third-first pixel PX3-B emitting first color light, a third-second pixel PX3-G emitting second color light, and a third-third pixel PX3-R emitting third color light. The third pixels PX3 may have the same arrangement structure as that of the first pixels PX1 in the first area AA1.

[0151] The fourth area AA4 may include a fourth pixel PX4. The fourth pixel PX4 may include a fourth-first pixel PX4-B emitting a first color light, a fourth-second pixel PX4-G emitting a second color light, and a fourth-third pixel PX4-R emitting a third color light. The fourth pixel PX4 may have the same arrangement structure as that of the first pixel PX1 in the first area AA1.

[0152] The aperture ratios of pixels emitting light of the same color in the first to fourth areas AA1 to AA4 may be the same. That is, when viewed in a plane, the first-first pixel PX1-B, the second-first pixel PX2-B, the third-first pixel PX3-B, and the fourth-first pixel PX4-B emitting the first color light may have substantially the same size. When viewed in a plane, the first-second pixel PX1-G, the second-second pixel PX2-G, the third-second pixel PX3-G, and the fourth-second pixel PX4-G emitting the second color light may have substantially the same size. When viewed in a plane, the first-third pixel PX1-R, the second-third pixel PX2-R, the third-third pixel PX3-R, and the fourth-third pixel PX4-R emitting the third color light may have substantially the same size.

[0153] At the same time, in the present disclosure, the expression "the components are substantially aligned with each other" or the expression "the components have substantially the same size" not only means a situation where the position of one component in a plane completely coincides with the position of another component in a plane or the components have physically the same size, but also means a situation where the components are aligned with each other or the components have the same size within the manufacturing tolerance that usually occurs in the manufacturing process despite the same design.

[0154] Fig. 6A is a plan view of the structure of a pixel according to an embodiment of the present disclosure. In more detail, Fig. 6A yes Figure 5 An enlarged plan view of area AA1-a.

[0155] Reference Fig. 6A , the first-first pixel PX1-B may have an elliptical shape with a major axis LAX1-B and a minor axis SAX1-B. Fig. 6AAs shown in , the length of the major axis LAX1-B is represented as LA1-B and the length of the minor axis SAX1-B is represented as SA1-B. The first-second pixel PX1-G may have an elliptical shape with a major axis LAX1-G and a minor axis SAX1-G. The first-third pixel PX1-R may have an elliptical shape with a major axis LAX1-R and a minor axis SAX1-R. Each of the first-first pixel PX1-B, the first-second pixel PX1-G, and the first-third pixel PX1-R may have a first eccentricity value. The first eccentricity value may be equal to or greater than about 0.8 and less than about 1. Reference will be made to Fig. 6A and Figure 6B To describe the first eccentricity.

[0156] In the present disclosure, the eccentricity K of the ellipse can be defined as In this case, Rmax represents the radius in the major axis direction of the elliptical shape, and Rmin represents the radius in the minor axis direction of the elliptical shape. The eccentricity may have a value from 0 to 1. As the eccentricity approaches 0, the elliptical shape may become more and more like a circle, and as the eccentricity approaches 1, the length difference between the major axis and the minor axis of the elliptical shape may increase. As the eccentricity of the elliptical shape approaches 1, the length of the major axis becomes longer.

[0157] When viewed in a plane, the first-first pixel PX1-B may have a size larger than each of a size of the first-second pixel PX1-G and a size of the first-third pixel PX1-R. When viewed in a plane, the size of the first-third pixel PX1-R may be larger than a size of the first-second pixel PX1-G.

[0158] The direction in which the long axis LAX1-B of the first-first pixel PX1-B extends may be the first direction DR1. The angles θLG1 and θLG2 between the extending direction of the long axis LAX1-G of the first-second pixel PX1-G and the horizontal line HL extending in the first direction DR1 may be about 40 degrees or more and about 50 degrees or less, or may be about 130 degrees or more and about 140 degrees or less. The angles θLG1 and θLG2 between the extending direction of the long axis LAX1-G of the first-second pixel PX1-G and the horizontal line HL extending in the first direction DR1 may be about 45 degrees or about 135 degrees.

[0159] The angle between the extension direction of the long axis LAX1-B of the first-first pixel PX1-B and the extension direction of the long axis LAX1-G of the first-second pixel PX1-G closest to the first-first pixel PX1-B (hereinafter, referred to as the first long axis angle) may be about 40 degrees or more and about 50 degrees or less. For example, the first long axis angle may be about 45 degrees.

[0160] The minimum distance (hereinafter, referred to as the first pixel minimum separation distance) ML1 between two pixels adjacent to each other among the first-first pixel PX1-B, the first-second pixel PX1-G, and the first-third pixel PX1-R of each of the plurality of first pixels PX1 may be about 18 μm. In the case where the first pixel minimum separation distance ML1 is less than about 18 μm and the mask is not aligned during the deposition process of each pixel, a portion of the first-first pixel PX1-B, a portion of the first-second pixel PX1-G, and a portion of the first-third pixel PX1-R may overlap with each other. In the case where the first pixel minimum separation distance ML1 is about 18 μm or more, the first-first pixel PX1-B, the first-second pixel PX1-G, and the first-third pixel PX1-R may be prevented from overlapping with each other.

[0161] If the first long axes of adjacent pixels are aligned parallel (or perpendicular, depending on the position) to each other, the first pixel minimum separation distance ML1 may be reduced. Figure 6B The long axes LAX2-B and LAX2-G are depicted (ref. Figure 6B ) are aligned parallel or perpendicular to each other. Focusing on the second-second pixel PX2-G on the upper right of the second-first pixel PX2-B near the central area of ​​the area AA2-a, the long axes LAX2-B and LAX2-G are parallel. Focusing on the second-second pixel PX2-G on the lower right of the second-first pixel PX2-B near the central area of ​​the area AA2-a, the long axes LAX2-B and LAX2-G are perpendicular. In this arrangement, the second pixel minimum separation distance ML2 (refer to Figure 6B ) may be short, perhaps less than the desired 18 μm. Figure 6B In the case of , the second pixel minimum separation distance ML2 can be achieved by adjusting the eccentricity of the ellipse downward so that the major axes LAX2-B and LAX2-G (refer to Figure 6B ) can be reduced. In this way, the second pixel minimum separation distance ML2 (refer to Figure 6B )and Fig. 6A The first pixel minimum separation distance ML1 is substantially the same.

[0162] That is, in the case where the angle between the extension direction of the long axis LAX1-B of the first-first pixel PX1-B and the extension direction of the long axis LAX1-G of the first-second pixel PX1-G closest to the first-first pixel PX1-B increases, the first pixel minimum separation distance ML1 is less likely to decrease. Accordingly, the first eccentricity can be increased to shorten the first pixel minimum separation distance ML1. In the case where the angle between the extension direction of the long axis LAX2-B of the second-first pixel PX2-B and the extension direction of the long axis LAX2-G of the second-second pixel PX2-G closest to the second-first pixel PX2-B decreases (that is, they become closer to parallel), similar to the second pixel PX2 (refer to Figure 6B ), the first pixel minimum separation distance ML1 in the first pixel PX1 is more likely to be reduced. Accordingly, the first eccentricity may be reduced. The above description may be equally applied to the second eccentricity of the second pixel PX2.

[0163] Figure 6B is a plan view of the structure of a pixel according to an embodiment of the present disclosure. In more detail, Figure 6B yes Figure 5 An enlarged plan view of area AA2-a.

[0164] Reference Figure 6B , the second-first pixel PX2-B may have an elliptical shape with a major axis LAX2-B and a minor axis SAX2-B. Figure 6B As shown in , the length of the major axis LAX2-B is represented as LA2-B and the length of the minor axis SAX2-B is represented as SA2-B. The second-second pixel PX2-G may have an elliptical shape with a major axis LAX2-G and a minor axis SAX2-G. The second-third pixel PX2-R may have an elliptical shape with a major axis LAX2-R and a minor axis SAX2-R. Each of the second-first pixel PX2-B, the second-second pixel PX2-G, and the second-third pixel PX2-R may have a second eccentricity value. The value of the second eccentricity may be less than Fig. 6A The second eccentricity may be equal to or less than about 0.6.

[0165] When viewed in a plane, the second-first pixel PX2-B may have a size larger than each of the size of the second-second pixel PX2-G and the size of the second-third pixel PX2-R. When viewed in a plane, the size of the second-third pixel PX2-R may be larger than the size of the second-second pixel PX2-G.

[0166] The angle θLB between the extension direction of the long axis LAX2-B of the second-first pixel PX2-B and the horizontal line HL may be about 40 degrees or more and about 50 degrees or less. For example, the angle θLB between the extension direction of the long axis LAX2-B of the second-first pixel PX2-B and the horizontal line HL may be about 45 degrees. The angles θLG1 and θLG2 between the extension direction of the long axis LAX2-G of the second-second pixel PX2-G and the horizontal line HL may be about 40 degrees or more and about 50 degrees or less, or may be about 130 degrees or more and about 140 degrees or less. For example, the angles θLG1 and θLG2 between the extension direction of the long axis LAX2-G of the second-second pixel PX2-G and the horizontal line HL may be about 45 degrees or about 135 degrees.

[0167] The angle between the extension direction of the long axis LAX2-B of the second-first pixel PX2-B and the extension direction of the long axis LAX2-G of the second-second pixel PX2-G closest to the second-first pixel PX2-B (hereinafter referred to as the second long axis angle) may be approximately 0 degrees.

[0168] A minimum distance (hereinafter, referred to as a second pixel minimum separation distance) ML2 between two adjacent pixels among the second-first pixel PX2-B, the second-second pixel PX2-G, and the second-third pixel PX2-R of each of the plurality of second pixels PX2 may be equal to or greater than about 18 μm.

[0169] Reference Fig. 6A and Figure 6B , the first major axis angle of the first area AA1 may be about 45 degrees, and the second major axis angle of the second area AA2 may be about 0 degrees. The second major axis angle may be closer to 0 degrees than the first major axis angle. In this case, the second eccentricity may be adjusted to have a lower value than the first eccentricity. Figure 6B , the long axis LAX2-B of the second-first pixel PX2-B is parallel to the long axis LAX2-G of the second-second pixel PX2-G adjacent to the second-first pixel PX2-B. Therefore, one end of the long axis LAX2-B of the second-first pixel PX2-B and one end of the long axis LAX2-G of the second-second pixel PX2-G may become closer to each other.

[0170] If the second pixel PX2 is Figure 6B Arranged as shown in Fig. 6A In order to maintain the predetermined second pixel minimum separation distance ML2, the eccentricity of each of the plurality of second pixels PX2 may be reduced to reduce the length of the major axes LAX2-B, LAX2-G and LAX2-R.

[0171] An average value of the first eccentricity and the second eccentricity may be equal to or greater than about 0.6. An average value of the first eccentricity and the second eccentricity may be about 0.65.

[0172] Figure 6C is a plan view of the structure of a pixel according to an embodiment of the present disclosure. In more detail, Figure 6C yes Figure 5 An enlarged plan view of area AA3-a.

[0173] Reference Figure 6C , the third-first pixel PX3-B may have an elliptical shape with a major axis LAX3-B and a minor axis SAX3-B. Figure 6C As shown in , the length of the major axis LAX3-B is expressed as LA3-B and the length of the minor axis SAX3-B is expressed as SA3-B. The third-second pixel PX3-G may have an elliptical shape with a major axis LAX3-G and a minor axis SAX3-G. The third-third pixel PX3-R may have an elliptical shape with a major axis LAX3-R and a minor axis SAX3-R. Each of the third-first pixel PX3-B, the third-second pixel PX3-G and the third-third pixel PX3-R may have a third eccentricity value. The value of the third eccentricity may be equal to or greater than about 0.8 and less than about 1. In the case of the third pixel PX3, the major axes LAX3-B, LAX3-G and LAX3-R may not be aligned with each other in a parallel relationship. Due to this arrangement, similar to the first pixel PX1 (refer to Fig. 6A ), the minimum pixel separation distance in the third pixel PX3 may be long. Therefore, the eccentricity value may be increased to shorten the distance.

[0174] When viewed in a plane, the third-first pixel PX3-B may have a size larger than each of a size of the third-second pixel PX3-G and a size of the third-third pixel PX3-R. When viewed in a plane, the size of the third-third pixel PX3-R may be larger than a size of the third-second pixel PX3-G.

[0175] The angle θLB between the extension direction of the long axis LAX3-B of the third-first pixel PX3-B and the horizontal line HL may be about 80 degrees or more and about 100 degrees or less. For example, the angle θLB between the extension direction of the long axis LAX3-B of the third-first pixel PX3-B and the horizontal line HL may be about 90 degrees. The angles θLG1 and θLG2 between the extension direction of the long axis LAX3-G of the third-second pixel PX3-G and the horizontal line HL may be about 40 degrees or more and about 50 degrees or less, or may be about 130 degrees or more and about 140 degrees or less. For example, the angles θLG1 and θLG2 between the extension direction of the long axis LAX3-G of the third-second pixel PX3-G and the horizontal line HL may be about 45 degrees or about 135 degrees.

[0176] The angle between the extension direction of the long axis LAX3-B of the third-first pixel PX3-B and the extension direction of the long axis LAX3-G of the third-second pixel PX3-G adjacent to the third-first pixel PX3-B (hereinafter, referred to as the third long axis angle) may be about 40 degrees or more and about 50 degrees or less. The third long axis angle may be about 45 degrees.

[0177] A minimum distance (hereinafter, referred to as a third pixel minimum separation distance) ML3 between two adjacent pixels among the third-first pixel PX3-B, the third-second pixel PX3-G, and the third-third pixel PX3-R of each of the plurality of third pixels PX3 may be about 18 μm.

[0178] Fig.6D is a plan view of the structure of a pixel according to an embodiment of the present disclosure. In more detail, Fig.6D yes Figure 5 An enlarged plan view of area AA4-a.

[0179] Reference Fig.6D , the fourth-first pixel PX4-B may have an elliptical shape with a major axis LAX4-B and a minor axis SAX4-B. Fig.6D As shown in , the length of the major axis LAX4-B is expressed as LA4-B and the length of the minor axis SAX4-B is expressed as SA4-B. The fourth-second pixel PX4-G may have an elliptical shape with a major axis LAX4-G and a minor axis SAX4-G. The fourth-third pixel PX4-R may have an elliptical shape with a major axis LAX4-R and a minor axis SAX4-R. Each of the fourth-first pixel PX4-B, the fourth-second pixel PX4-G and the fourth-third pixel PX4-R may have a fourth eccentricity value. The value of the fourth eccentricity may be equal to or less than about 0.6. In the case of the fourth pixel PX4, the major axes LAX4-B and LAX4-G may be parallel (or vertical, depending on which fourth-second pixel PX4-G). Due to this parallel alignment of the major axes LAX4-B and LAX4-G, similar to the second pixel PX2 (reference Figure 6B ), the pixel minimum separation distance ML4 in the fourth pixel PX4 may be short. Therefore, the fourth eccentricity value may be reduced to increase the distance.

[0180] When viewed in a plane, the fourth-first pixel PX4-B may have a size larger than each of the size of the fourth-second pixel PX4-G and the size of the fourth-third pixel PX4-R. The size of the fourth-third pixel PX4-R may be larger than the size of the fourth-second pixel PX4-G.

[0181] The angle θLB between the extension direction of the long axis LAX4-B of the fourth-first pixel PX4-B and the horizontal line HL may be about 130 degrees or more and about 140 degrees or less. For example, the angle θLB between the extension direction of the long axis LAX4-B of the fourth-first pixel PX4-B and the horizontal line HL may be about 135 degrees. The angles θLG1 and θLG2 between the extension direction of the long axis LAX4-G of the fourth-second pixel PX4-G and the horizontal line HL may be about 40 degrees or more and about 50 degrees or less, or may be about 130 degrees or more and about 140 degrees or less. For example, the angles θLG1 and θLG2 between the extension direction of the long axis LAX4-G of the fourth-second pixel PX4-G and the horizontal line HL may be about 45 degrees or about 135 degrees.

[0182] An angle between an extension direction of the long axis LAX4-B of the fourth-first pixel PX4-B and an extension direction of the long axis LAX4-G of the fourth-second pixel PX4-G closest to the fourth-first pixel PX4-B (hereinafter, referred to as a fourth long axis angle) may be about 0 degrees. The fourth long axis angle may be about 0 degrees.

[0183] A minimum distance (hereinafter, referred to as a fourth pixel minimum separation distance) ML4 between two adjacent pixels among the fourth-first pixel PX4-B, the fourth-second pixel PX4-G, and the fourth-third pixel PX4-R of each of the plurality of fourth pixels PX4 may be equal to or greater than about 18 μm.

[0184] Reference FIG. 6A to FIG. 6D , the first pixel minimum separation distance ML1, the second pixel minimum separation distance ML2, the third pixel minimum separation distance ML3, and the fourth pixel minimum separation distance ML4 may be substantially the same as each other. By changing the eccentricity according to the extension direction of the long axis in each of the first area AA1, the second area AA2, the third area AA3, and the fourth area AA4, the first pixel minimum separation distance ML1, the second pixel minimum separation distance ML2, the third pixel minimum separation distance ML3, and the fourth pixel minimum separation distance ML4 may be kept substantially the same.

[0185] In addition, by changing the shape and arrangement angle of the pixels arranged in each of the first area AA1, the second area AA2, the third area AA3, and the fourth area AA4, the display areas DP-DA (refer to Figure 3 ) of the pixel PX (refer to Figure 3 ). Multiple images caused by reflection of external light may be displayed on the pixel PX (refer to Figure 3 ) is arranged irregularly than in the pixel PX (reference Figure 3 ) is much less when it is arranged regularly. Fig.9A and Fig. 9B Describe this.

[0186] An average value of the first to fourth eccentricities may be equal to or greater than about 0.6. An average value of the first to fourth eccentricities may be about 0.65.

[0187] Figure 7 is a graph showing the relationship between the angle of the major axis and the eccentricity according to an embodiment of the present disclosure. Figure 7 The major axis angle can indicate FIG. 6A to FIG. 6D : angles between the long axes LAX1-B, LAX2-B, LAX3-B and LAX4-B of the respective pixels PX1-B, PX2-B, PX3-B and PX4-B emitting the first color light and the horizontal line HL.

[0188] Reference FIG. 6A to FIG. 6D and Figure 7 , the eccentricity value of the pixel can change with the change of the major axis angle. The arrangement of the pixels when the major axis angle is zero (0) degrees can be the same as Fig. 6A The arrangement of the first pixels PX1 of the first area AA1 shown in FIG. 4 is substantially the same. The arrangement of the pixels when the major axis angle is 45 degrees may be the same as Figure 6B The arrangement of the second pixels PX2 of the second area AA2 shown in FIG. 1 is substantially the same. The arrangement of the pixels when the major axis angle is 90 degrees may be the same as Figure 6C The arrangement of the third pixel PX3 of the third area AA3 shown in FIG. 1 is substantially the same. The arrangement of the pixels when the major axis angle is 135 degrees can be the same as Fig.6D The arrangement of the fourth pixels PX4 of the fourth area AA4 shown in FIG. 2 is substantially the same.

[0189] As the major axis angle approaches about 45 degrees or about 135 degrees, the major axes LAX1-B, LAX2-B, LAX3-B and LAX4-B of the pixels PX1-B, PX2-B, PX3-B and PX4-B emitting the first color light and the major axes of the pixels adjacent to the pixels PX1-B, PX2-B, PX3-B and PX4-B emitting the first color light may extend parallel to each other. By this parallel axis arrangement, as described above, the minimum separation distance between pixels may be short. In order to extend the minimum separation distance, the eccentricity value may be adjusted downward to effectively reduce the length of the major axis. When the major axis angle is about 45 degrees or about 135 degrees, the eccentricity value may be equal to or less than about 0.6.

[0190] When the major axis angle is close to zero (0) degree or 90 degrees, the major axes LAX1-B, LAX2-B, LAX3-B and LAX4-B of the corresponding pixels PX1-B, PX2-B, PX3-B and PX4-B emitting the first color light and the major axes of the pixels adjacent to the pixels PX1-B, PX2-B, PX3-B and PX4-B emitting the first color light may not extend in parallel directions. In this case, as described above, the minimum separation distance between pixels may be long. Therefore, by adjusting the eccentricity value to be higher without being lower than the minimum separation distance, the length of the major axis can be made longer. When the major axis angle is zero (0) degree or 90 degrees, the eccentricity value may be equal to or greater than about 0.8 and less than about 1. The average eccentricity value AEC of the overall pixel may be about 0.65.

[0191] FIG. 8A to FIG. 8D is a view of the reflectance characteristics according to the eccentricity of the pixel. In more detail, Fig. 8A is a diagram showing that when a pixel has a circular shape with an eccentricity value of about 0, the pixel is viewed from the display panel DP (refer to Figure 2 )View of the image of reflected external light. Figure 8B 1 is a diagram showing that when a pixel has an elliptical shape with an eccentricity value of about 0.5, the pixel is viewed from the display panel DP (refer to Figure 2 )View of the image of reflected external light.

[0192] Figure 8C 1 is a diagram showing that when a pixel has an elliptical shape with an eccentricity value of about 0.7, the pixel is viewed from the display panel DP (refer to Figure 2 )View of the image of reflected external light. Fig.8D 1 is a diagram showing that when a pixel has an elliptical shape with an eccentricity value of about 0.8, the pixel is viewed from the display panel DP (refer to Figure 2 )View of the image of reflected external light.

[0193] Reference FIG. 8A to FIG. 8D As the eccentricity value of the pixel increases, the pixel Figure 2 ) may become unclear. Accordingly, the possibility of a user observing the reflected image may be reduced, and thus the reflective characteristics of the display device may be improved. That is, as the average eccentricity value of the pixel increases, the reflective characteristics may be improved.

[0194] Fig.9A and Fig. 9B is a view of the reflectance characteristics according to the eccentricity of the pixel. In more detail, Fig.9A The display panel DP includes pixels with fixed eccentricity and orientation (refer to Figure 2 ) of a dual-image CAE. Fig. 9B are pixels that include eccentricity and orientation changes (such as those arranged in Figure 5 The first area AA1, the second area AA2, the third area AA3 and the fourth area AA4 (refer to Figure 5 ) in the display panel DP (refer to Figure 2 ) of a dual-image CAE.

[0195] Fig.9A Depicts the colors observed through pixels in a regular arrangement. Fig. 9B Depicts the colors observed through irregularly arranged pixels. Fig.9A and Fig. 9B , the color distinction of dual-image CAE can be achieved when the pixels are arranged irregularly (refer to Fig. 9B ) than in pixels arranged regularly (refer to Fig.9A ) becomes blurred. Accordingly, the possibility of the user observing the dual-image CAE can be reduced, and thus, the characteristics of the dual-image CAE can be improved.

[0196] Reference FIG. 8A to FIG. 8D , Fig.9A and Fig. 9B , as the average eccentricity value of the pixel increases, the reflection characteristic can be improved. In addition, the irregular pixel arrangement improves the characteristics of the dual image CAE. According to the present disclosure, by Figure 4 ) area by changing the eccentricity and direction of the pixels to irregularly arrange the pixels, and therefore, the characteristics of the dual image CAE can be improved. In addition, according to the present disclosure, since the average eccentricity is increased by changing the eccentricity according to the extension direction of the long axis, the reflection characteristics can be improved.

[0197] Fig. 10A is a plan view of the structure of a pixel according to an embodiment of the present disclosure. Fig. 10B is a plan view of the structure of a pixel according to an embodiment of the present disclosure. In more detail, Fig. 10A is the first area AA1 according to an embodiment of the present disclosure (see Figure 5 ) is an enlarged plan view of a portion of the ). Fig. 10B is the second area AA2 (see Figure 5 ) is an enlarged plan view of a portion of ). Hereinafter, the description of the configuration that is the same as the above configuration will be omitted.

[0198] Reference Fig. 10A, the first-first pixel PX1-B may have an elliptical shape with a first-first eccentricity value. The first-second pixel PX1-G may have an elliptical shape with a first-second eccentricity value. The first-third pixel PX1-R may have an elliptical shape with a first-third eccentricity value. The value of the first-first eccentricity may be different from at least one of the value of the first-second eccentricity and the value of the first-third eccentricity. The average value of the first-first eccentricity, the first-second eccentricity, and the first-third eccentricity may be equal to or greater than about 0.6. The value of the first-first eccentricity may be greater than each of the value of the first-second eccentricity and the value of the first-third eccentricity. The value of the first-second eccentricity may be substantially the same as the value of the first-third eccentricity. For example, the value of the first-first eccentricity may be about 0.8, and each of the value of the first-second eccentricity and the value of the first-third eccentricity may be about 0.6. However, the first-first eccentricity, the first-second eccentricity, and the first-third eccentricity may have values ​​different from each other. As described above, the display panel (refer to Figure 4 )’s reflection color.

[0199] For example, in the case where the reflection color of the first color is Figure 2 ) is relatively high in the reflected image of the external light reflected by the first color, the reflected color of the first color can be reduced by increasing the first-first eccentricity value. In addition, the reflected colors of the second color and the third color can be increased by reducing the first-second eccentricity value and the first-third eccentricity value. Accordingly, the color distinction between the first color to the third color of the reflected image of the external light can become unclear, the visibility of the user with respect to the reflected image can be reduced, and therefore, the reflection characteristics can be improved.

[0200] Furthermore, pixels may be irregularly arranged by applying different eccentricity values ​​according to the colors of the pixels, and thus, the characteristics of dual image CAE may be improved.

[0201] Reference Fig. 10B , the major axis LAX2-B of the second-first pixel PX2-B may be aligned in parallel with the major axis LAX2-G of the second-second pixel PX2-G. In this case, when the eccentricity value of the second-first pixel PX2-B is as Fig. 10A When the setting is high, the second pixel minimum separation distance ML2 can be reduced. Fig. 10B The eccentricity value of the second-first pixel PX2-B in the second area AA2 may be adjusted downward to be lower than Fig. 10A The eccentricity value of the first-first pixel PX1-B in the first area AA1.

[0202] The second-first pixel PX2-B, the second-second pixel PX2-G, and the second-third pixel PX2-R may have an elliptical shape with the same second eccentricity value. As described above, when different eccentricities are applied to the first pixel PX1 (refer to Fig. 10A ) and a fixed eccentricity is applied to the second pixel PX2, the pixels may be irregularly arranged as a whole. Accordingly, the characteristics of the dual image CAE may be improved.

[0203] Fig. 10C and Fig. 10D is a plan view of the structure of a pixel according to an embodiment of the present disclosure. In more detail, Fig. 10C and Fig. 10D is the first area AA1 according to an embodiment of the present disclosure (see Figure 5 ) is an enlarged plan view of a portion of the ).

[0204] Reference Fig. 10C , the first-first pixel PX1-B may have an elliptical shape with a first-first eccentricity value. The first-second pixel PX1-G may have an elliptical shape with a first-second eccentricity value. The first-third pixel PX1-R may have an elliptical shape with a first-third eccentricity value. The first-third eccentricity value may be different from at least one of the first-first eccentricity value and the first-second eccentricity value. For example, the first-third eccentricity value may be about 0.8, and the first-first eccentricity value and the first-second eccentricity value may be about 0.6.

[0205] The reflected color of the second color is reflected from the display panel DP (refer to Figure 2 ) is relatively high in the reflected image of the external light reflected, the reflected color of the second color can be reduced by increasing the value of the first-second eccentricity. In addition, the reflected colors of the first color and the third color can be increased by reducing the value of the first-first eccentricity and the value of the first-third eccentricity. Accordingly, the color distinction between the first color to the third color of the reflected image of the external light can become unclear, the possibility of the user observing the reflected image can be reduced, and therefore, the reflection characteristics can be improved.

[0206] Reference Fig. 10D , the first-first pixel PX1-B may have an elliptical shape with a first-first eccentricity value. The first-second pixel PX1-G may have an elliptical shape with a first-second eccentricity value. The first-third pixel PX1-R may have an elliptical shape with a first-third eccentricity value. The value of the first-second eccentricity may be different from at least one of the value of the first-first eccentricity and the value of the first-third eccentricity. For example, the first-second eccentricity value may be about 0.8, and the first-first eccentricity value and the first-third eccentricity value may be about 0.6.

[0207] The reflected color of the third color is reflected from the display panel DP (refer to Figure 2 ) is relatively high in the reflected image of the external light reflected, the reflected color of the third color can be reduced by increasing the first-third eccentricity value. In addition, the reflected colors of the first color and the second color can be increased by reducing the first-first eccentricity value and the first-second eccentricity value. Accordingly, the color distinction between the first color to the third color of the reflected image of the external light can become unclear, the possibility of the user viewing the reflected image can be reduced, and therefore, the reflection characteristics can be improved.

[0208] Fig. 10E is a plan view of the structure of a pixel according to an embodiment of the present disclosure. In more detail, Fig. 10E is the first area AA1 according to an embodiment of the present disclosure (see Figure 5 ) is an enlarged plan view of a portion of the ).

[0209] Reference Fig. 10E , the first-first pixel PX1-B may have an elliptical shape with a first-first eccentricity value. The first-second pixel PX1-G and the first-third pixel PX1-R may have a circular shape. Fig. 10E A structure in which only the first-first pixel PX1 -B has an elliptical shape is shown, however, according to an embodiment, only the first-second pixel PX1 -G or only the first-third pixel PX1 -R may have an elliptical shape.

[0210] The reflected color of the first color is reflected from the display panel DP (refer to Figure 2 ) is relatively high in the reflected image of the external light reflected by the first-first pixel, the reflected color of the first color can be reduced by setting only the first-first pixel to have an elliptical shape with a first-first eccentricity value. Since the first-second pixel and the first-third pixel have an eccentricity value of zero (0), the reflected colors of the second color and the third color can be increased.

[0211] Although the embodiments of the present disclosure have been described, it should be understood that the present disclosure should not be limited to these embodiments, but can be variously changed and modified by those skilled in the art within the spirit and scope of the present disclosure as claimed in the appended claims. Therefore, the disclosed subject matter should not be limited to any single embodiment described herein, and the scope of the inventive concept should be determined according to the appended claims.

Claims

1. A display device, comprising: A display panel, the display panel comprising a display area and a non-display area adjacent to the display area, the display area comprising a first area and a second area adjacent to the first area; and an anti-reflection layer, the anti-reflection layer being disposed on the display panel, wherein the first area includes a plurality of first pixels, the second area includes a plurality of second pixels, the first pixels include a first-first pixel emitting a first color light, a first-second pixel emitting a second color light, and a first-third pixel emitting a third color light, the second pixels include a second-first pixel emitting the first color light, a second-second pixel emitting the second color light, and a second-third pixel emitting the third color light, each of the first-first pixel, the first-second pixel, and the first-third pixel has an elliptical shape with a major axis, a minor axis, and a first eccentricity value, each of the second-first pixel, the second-second pixel, and the second-third pixel has an elliptical shape with a major axis, a minor axis, and a second eccentricity value lower than the first eccentricity value, and the second angle is closer to zero than the first angle, Wherein, the first angle is the angle between the direction in which the long axis of the first-first pixel extends and the direction in which the long axis of the first-second pixel closest to the first-first pixel extends, and the second angle is the angle between the direction in which the long axis of the second-first pixel extends and the direction in which the long axis of the second-second pixel closest to the second-first pixel extends.

2. The display device according to claim 1, wherein: When viewed in a plane, the first-first pixel has a size that is larger than each of the sizes of the first-second pixel and the first-third pixel, and when viewed in the plane, the second-first pixel has a size that is larger than each of the sizes of the second-second pixel and the second-third pixel.

3. The display device according to claim 1, wherein: The first color light is blue light, the second color light is green light, and the third color light is red light.

4. The display device according to claim 1, wherein: The first pixel row includes a first pixel row and a second pixel row, the first pixel row includes the first-first pixels and the first-third pixels arranged in a first direction, and the second pixel row includes the first-second pixels arranged in the first direction.

5. The display device according to claim 1, wherein: The second pixel row includes a first pixel row including the second-first pixels and the second-third pixels arranged in a first direction, and a second pixel row including the second-second pixels arranged in the first direction.

6. The display device according to claim 1, wherein: The first angle is equal to or greater than 40 degrees and equal to or less than 50 degrees.

7. The display device according to claim 1, wherein: The second angle is zero degrees.

8. The display device according to claim 1, wherein: When viewed in a plane, the first-first pixel and the second-first pixel have the same size.

9. The display device according to claim 1, wherein: The anti-reflection layer comprises: a color filter disposed on the display panel and overlapping the first pixel and the second pixel; a light-blocking pattern that is disposed on the display panel and prevents external light from being reflected; and A planarization layer covers the color filter and the light blocking pattern and provides a flat upper surface.

10. The display device according to claim 1, wherein: The minimum distance between two adjacent pixels among the first-first pixel, the first-second pixel and the first-third pixel of each of the multiple first pixels is equal to the minimum distance between two adjacent pixels among the second-first pixel, the second-second pixel and the second-third pixel of each of the multiple second pixels.

11. The display device according to claim 1, wherein: A minimum distance between two adjacent pixels among the first-first pixel, the first-second pixel, and the first-third pixel of each of the plurality of first pixels is equal to or greater than 18 micrometers.

12. The display device according to claim 1, wherein: The first eccentricity value is equal to or greater than 0.8 and less than 1.

13. The display device according to claim 1, wherein: The second eccentricity value is equal to or less than 0.

6.

14. The display device according to claim 1, wherein: An average value of the first eccentricity value and the second eccentricity value is equal to or greater than 0.

6.

15. A display device, comprising: A display panel, the display panel comprising a display area including a plurality of pixels and a non-display area adjacent to the display area; as well as an anti-reflection layer, the anti-reflection layer being disposed on the display panel, wherein the plurality of pixels include a first pixel that emits a first color light and has an elliptical shape with a first eccentricity value, a second pixel that emits a second color light and has an elliptical shape with a second eccentricity value, and a third pixel that emits a third color light and has an elliptical shape with a third eccentricity value, and the first eccentricity value increases as an angle between a direction in which a long axis of the first pixel extends and a direction in which a long axis of the second pixel closest to the first pixel extends increases.

16. The display device according to claim 15, wherein: The first eccentricity value, the second eccentricity value and the third eccentricity value are the same.

17. The display device according to claim 15, wherein: The first eccentricity value is different from at least one of the second eccentricity value and the third eccentricity value.

18. The display device according to claim 15, wherein: The first eccentricity value is greater than each of the second eccentricity value and the third eccentricity value, and the second eccentricity value is the same as the third eccentricity value.

19. The display device according to claim 15, wherein: When viewed in a plane, the first pixel has a size larger than each of a size of the second pixel and a size of the third pixel.

20. The display device according to claim 15, wherein: An average value of the first eccentricity value, the second eccentricity value, and the third eccentricity value is equal to or greater than 0.6.

Images