Detection device and detection method thereof

By detecting the voltage change of the USB Type-C configuration channel to determine the electrical connection, and isolating the supply voltage in the standby state, it solves the power loss problem caused by the USB Type-C electrical connection and achieves both low power consumption and correct electrical connection. Effect.

CN119336147APending Publication Date: 2025-01-21NUVOTON
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Patent Information

Application Number
CN202410146044.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2023-07-21
Filing Date
2024-02-01
Publication Date
2025-01-21

AI Technical Summary

Technical Problem

In standby state, the electrical connection between the USB Type-C cable and the CC1 and CC2 pins result in a large power loss, affecting the green energy target.

Method used

By detecting the voltage change of the first configuration channel or the second configuration channel of USB Type-C, it is determined whether the external device is correctly electrically connected, and when not in operation, it is completely electrically isolated from the supply voltage through multiple switches to reduce power consumption.

Benefits of technology

It achieves the reduction of circuit power consumption in standby mode, achieves the purpose of power saving, and ensures correct electrical connection judgment at the same time.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention provides a detection device and a detection method thereof, the detection device is suitable for an electronic device, and the detection device comprises a voltage division register, a controller, a detection circuit and a trigger circuit. The voltage division register stores a voltage division code. The controller generates a control signal according to the state signal. The detection circuit generates a reference voltage according to the voltage division code, and judges the relation between the voltage value of any one of the first pin and the second pin and the reference voltage according to the control signal so as to generate a detection signal. When the logic level of the detection signal changes, the trigger circuit generates a wake-up signal to wake up the central processing unit.
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Description

Technical Field

[0001] The present invention relates to a detection device and a detection method thereof, and more particularly to a detection device and a detection method thereof for detecting whether a configuration channel of a USB Type-C is correctly electrically connected to an external device. Background Art

[0002] One of the benefits of USB Type-C is that it provides higher power supply capabilities. Traditional USB cables only allow 2.5W of power, but USB Type-C cables allow up to 15W of maximum power. If the Power Deliver (PD) protocol is used, it can provide up to 100W of maximum power. This also allows large devices such as monitors, laptops and other high-power devices to be powered through the USB connection interface.

[0003] Electronic devices that comply with USB Type-C can understand the orientation of the cable and the socket by measuring the status of the CC1 and CC2 pins on each terminal, and can also determine whether the electronic device is properly electrically connected to an external device by the electrical status of the CC1 and CC2 pins.

[0004] However, in the standby state, although the power consumption of the circuit electrically connected to the CC1 and CC2 pins is not large, in the era of green energy, the power loss accumulated over a long period of time is also very considerable. Therefore, it is necessary to reduce the power consumption of the circuit electrically connected to the CC1 and CC2 pins in the standby state, thereby achieving the purpose of power saving. Summary of the invention

[0005] The present invention proposes a detection device and a detection method for detecting whether a USB Type-C device is correctly electrically connected, by determining whether the voltage of a first configuration channel or a second configuration channel of the USB Type-C changes and exceeds a threshold value to determine whether an external device is correctly electrically connected to an electronic device. In addition, the detection device and the detection method are executed once within a period of time, and the detection device is completely electrically isolated from the supply voltage by multiple switches when not in operation, so that the power consumption of the detection device can be reduced to a minimum.

[0006] In view of this, the present invention proposes a detection device suitable for an electronic device. The detection device includes a voltage divider register, a controller, a detection circuit and a trigger circuit. The voltage divider register stores a voltage divider code. The controller generates a control signal according to a state signal. The detection circuit generates a reference voltage according to the voltage divider code, and determines the relationship between the voltage value of any one of a first pin and a second pin and the reference voltage according to the control signal to generate a detection signal. When the logic level of the detection signal changes, the trigger circuit generates a wake-up signal to wake up a central processing unit.

[0007] According to an embodiment of the present invention, the electronic device complies with the specification of USB Type-C. The first pin is a first configuration channel of USB Type-C, and the second pin is a second configuration channel of USB Type-C. The central processor determines that an external device electrically connected to the electronic device is correctly electrically connected according to the wake-up signal.

[0008] According to an embodiment of the present invention, the detection device further comprises a first register, a second register and a status register. The first register stores a first trimming code. The second register stores a second trimming code. The status register stores the status signal. The controller stores any one of the first trimming code and the second trimming code in the voltage divider register according to the status signal.

[0009] According to an embodiment of the present invention, when the state signal is in a first state, the electronic device is in a power supply mode. When the state signal is in a second state, the electronic device is in a power receiving mode. When the state signal is in a third state, the electronic device is in a dual mode. When the electronic device is in the dual mode, the electronic device is in any one of the power supply mode and the power receiving mode.

[0010] According to an embodiment of the present invention, the detection circuit includes a comparator, a first switch, a voltage divider circuit, a second switch, a third switch, a first pull-up resistor, a fourth switch, a second pull-up resistor, a fifth switch, a first pull-down resistor, a sixth switch, a second pull-down resistor and a seventh switch. The comparator is used to compare a detection voltage and the reference voltage to generate the detection signal. The first switch supplies a supply voltage to the comparator according to a first control signal. The voltage divider circuit generates a voltage divider ratio according to the voltage divider code and divides the supply voltage into the reference voltage. The second switch provides the supply voltage to the voltage divider circuit according to a second control signal. The third switch selects any one of the first pin and the second pin according to a third control signal to generate the detection voltage, and selects the other of the first pin and the second pin after a first predetermined time to generate the detection voltage. The first pull-up resistor is electrically connected between the supply voltage and the first pin. The fourth switch provides the supply voltage to the first pull-up resistor according to a fourth control signal. The second pull-up resistor is electrically connected between the supply voltage and the second pin. The fifth switch provides the supply voltage to the second pull-up resistor according to a fifth control signal. The first pull-down resistor is electrically connected between the first pin and a ground terminal. The sixth switch electrically connects the first pin to the first pull-down resistor according to a sixth control signal. The second pull-down resistor is electrically connected between the second pin and the ground terminal. The seventh switch electrically connects the second pin to the second pull-down resistor according to a seventh control signal.

[0011] According to an embodiment of the present invention, the control signal includes the first control signal, the second control signal, the third control signal, the fourth control signal, the fifth control signal, the sixth control signal and the seventh control signal.

[0012] According to one embodiment of the present invention, when the state signal is in the first state, the controller turns on the first switch, the second switch, the fourth switch and the fifth switch, and loads the first trimming code into the voltage divider register, so that the voltage divider circuit generates a first reference voltage. When the external device is not electrically connected to the electronic device or the external device is not in the power receiving mode, the detection voltage maintains the supply voltage, and the detection signal maintains a first logic level. When the external device is electrically connected to the electronic device and the external device is in the power receiving mode, the detection voltage drops from the supply voltage to below the first reference voltage, so that the detection signal is converted from the first logic level to a second logic level. The trigger circuit generates the wake-up signal to wake up the central processing unit according to the changed detection signal.

[0013] According to another embodiment of the present invention, when the state signal is in the second state, the controller turns on the first switch, the second switch, the sixth switch and the seventh switch, and loads the second trimming code into the voltage divider register, so that the voltage divider circuit generates a second reference voltage. The first reference voltage and the second reference voltage are different. When the external device is not electrically connected to the electronic device or the external device is not in the power supply mode, the detection voltage maintains the voltage level of the ground terminal, and the detection signal maintains the second logic level. When the external device is electrically connected to the electronic device and the external device is in the power supply mode, the detection voltage rises from the voltage level of the ground terminal to be higher than the second reference voltage, so that the detection signal is converted from the second logic level to the first logic level. The trigger circuit generates the wake-up signal to wake up the central processing unit according to the changed detection signal.

[0014] According to another embodiment of the present invention, when the state signal is in the third state, the controller turns on the first switch, the second switch, the fourth switch and the fifth switch, and loads the first trimming code into the voltage divider register, so that the voltage divider circuit generates the first reference voltage. When the external device is not electrically connected to the electronic device or the external device is not in the power receiving mode, the detection voltage maintains the supply voltage. When the external device is electrically connected to the electronic device and the external device is in the power receiving mode, the detection voltage drops from the supply voltage to below the first reference voltage, so that the detection signal is converted from the first logic level to the second logic level. When the detection signal does not change, the controller does not turn on the fourth switch and the fifth switch, loads the second trimming code into the voltage divider register and turns on the sixth switch and the seventh switch. When the external device is electrically connected to the electronic device and the external device is in the power supply mode, the detection voltage rises from the voltage level of the ground terminal to above the second reference voltage, so that the detection signal is converted from the second logic level to the first logic level.

[0015] According to an embodiment of the present invention, the detection device further includes a counter. The counter counts the first predetermined time to generate a first time signal, and counts a second predetermined time to generate a second time signal. The detection circuit determines the relationship between the voltage value of any one of the first pin and the second pin and the reference voltage every second predetermined time to generate the detection signal.

[0016] The present invention further proposes a detection method applicable to an electronic device, for detecting whether an external device is electrically connected to the electronic device. The detection device includes generating a reference voltage; determining the relationship between the voltage value of any one of a first pin and a second pin of the electronic device and the reference voltage to generate a detection signal; and when the logic level of the detection signal changes, determining that the external device electrically connected to the electronic device is correctly electrically connected and waking up the electronic device.

[0017] According to an embodiment of the present invention, the electronic device complies with the specification of USB Type-C, wherein the first pin is a first configuration channel of the USB Type-C, and the second pin is a second configuration channel of the USB Type-C.

[0018] According to one embodiment of the present invention, the detection method further includes: when the electronic device is in a power supply mode, a supply voltage is provided to the first pin through a first pull-up resistor, and the supply voltage is provided to the second pin through a second pull-up resistor, wherein the reference voltage is a first reference voltage; the voltage of the first pin and the voltage of the second pin are sequentially compared with the first reference voltage to generate the detection signal; when the detection signal is converted from a first logic level to a second logic level, it is determined that the external device is electrically connected to the electronic device and the external device is in a power receiving mode; and when the detection signal maintains the first logic level, it is determined that the external device is not electrically connected to the electronic device or the external device is not in the power receiving mode.

[0019] According to another embodiment of the present invention, the detection method further includes: when the electronic device is in the power receiving mode, a ground terminal is electrically connected to the first pin through a first pull-down resistor, and the ground terminal is electrically connected to the second pin through a second pull-down resistor, wherein the reference voltage is a second reference voltage; the voltage of the first pin and the voltage of the second pin are sequentially compared with the second reference voltage to generate the detection signal; when the detection signal is converted from the second logic level to the first logic level, it is determined that the external device is electrically connected to the electronic device and the external device is in the power supply mode; and when the detection signal maintains the second logic level, it is determined that the external device is not electrically connected to the electronic device or the external device is not in the power supply mode. The first reference voltage and the second reference voltage are different.

[0020] According to another embodiment of the present invention, the detection method further includes: when the electronic device is in a dual mode, the reference voltage is the first reference voltage, and the supply voltage is provided to the first pin and the second pin respectively through the first pull-up resistor and the second pull-up resistor; the voltage of the first pin and the voltage of the second pin are sequentially compared with the first reference voltage to generate the detection signal; when the detection signal is converted from the first logic level to the second logic level, it is determined that the external device is electrically connected to the electronic device and the external device is in the power receiving mode; when the detection signal maintains the first logic level, the reference voltage is adjusted to the second reference voltage, the first reference voltage is adjusted to the second reference voltage, and the second reference voltage is adjusted to the second reference voltage. The pull-up resistor and the second pull-up resistor are electrically isolated from the first pin and the second pin, respectively, and the ground terminal is electrically connected to the first pin and the second pin through the first pull-down resistor and the second pull-down resistor, respectively; the voltage of the first pin and the voltage of the second pin are sequentially compared with the second reference voltage to generate the detection signal; when the detection signal is converted from the second logic level to the first logic level, it is determined that the external device is electrically connected to the electronic device and the external device is in the power supply mode; and when the detection signal maintains the second logic level, it is determined that the external device is not electrically connected to the electronic device or the external device is not in the power supply mode.

[0021] According to one embodiment of the present invention, the step of sequentially comparing the voltage of the first pin and the voltage of the second pin with the reference voltage to generate the detection signal further includes: selecting any one of the voltage of the first pin and the voltage of the second pin to be compared with the reference voltage to generate the detection signal; and when the detection signal maintains the first logic level or the second logic level for a first predetermined time, selecting the other one of the voltage of the first pin and the voltage of the second pin to be compared with the reference voltage to generate the detection signal again.

[0022] According to an embodiment of the present invention, the detection method is executed once every second predetermined time. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 A circuit diagram showing an electronic device according to an embodiment of the present invention;

[0024] Figure 2 A circuit diagram showing a detection circuit according to an embodiment of the present invention; and

[0025] Figure 3 A flow chart showing a detection method according to an embodiment of the present invention.

[0026] Reference numerals:

[0027] 10: External devices

[0028] 100: Electronic devices

[0029] 110,200: Detection device

[0030] 111: First register

[0031] 112: Second register

[0032] 113: Voltage divider register

[0033] 114: Status register

[0034] 115: Controller

[0035] 116: Detection circuit

[0036] 117: Trigger Circuit

[0037] 118:Timer

[0038] 120:CPU

[0039] 210: Comparator

[0040] 220: Voltage divider circuit

[0041] 300: Detection method

[0042] PIN1: first pin

[0043] PIN2: The second pin

[0044] CH1: Channel 1

[0045] CH2: Second channel

[0046] TRM1: First trim code

[0047] TRM2: Second trim code

[0048] TRMC: voltage divider code

[0049] ST: Status signal

[0050] SLD: Load signal

[0051] SC: Control signal

[0052] SD: Detection signal

[0053] SWK: wake-up signal

[0054] T1: First time signal

[0055] T2: Second time signal

[0056] SW1: First switch

[0057] SW2: Second switch

[0058] SW3: The third switch

[0059] SW4: The fourth switch

[0060] SW5: The fifth switch

[0061] SW6: Sixth switch

[0062] SW7: Seventh switch

[0063] RP1: First pull-up resistor

[0064] RP2: Second pull-up resistor

[0065] RD1: First pull-down resistor

[0066] RD2: Second pull-down resistor

[0067] INP: Positive input terminal

[0068] INN: Negative input terminal

[0069] VDD: supply voltage

[0070] VDT: Detection voltage

[0071] VREF: Reference voltage

[0072] VREF1: First reference voltage

[0073] VREF2: Second reference voltage

[0074] C1: First capacitor

[0075] C2: Second capacitor

[0076] SC1: First control signal

[0077] SC2: Second control signal

[0078] SC3: The third control signal

[0079] SC4: Fourth control signal

[0080] SC5: Fifth control signal

[0081] SC6: Sixth control signal

[0082] SC7: Seventh control signal

[0083] GND: Ground terminal

[0084] S31~S33: Step Flow DETAILED DESCRIPTION

[0085] The following description is an embodiment of the present invention. Its purpose is to illustrate the general principles of the present invention and should not be regarded as limiting the present invention. The scope of the present invention should be based on the scope defined by the claims.

[0086] It is worth noting that the following disclosure may provide multiple embodiments or examples for practicing different features of the present invention. The specific component examples and arrangements described below are only used to briefly and concisely explain the spirit of the present invention and are not used to limit the scope of the present invention. In addition, the following description may reuse the same component symbols or words in multiple examples. However, the purpose of reusing is only to provide a simplified and clear description, and is not used to limit the relationship between the multiple embodiments and / or configurations discussed below.

[0087] In addition, the description below of a feature being connected to, coupled to and / or formed on another feature may actually include a plurality of different embodiments, including direct contact between the features, or including other additional features formed between the features, etc., so that the features are not in direct contact.

[0088] In addition, relative terms such as "lower" or "bottom" and "upper" or "top" may be used in the embodiments to describe the relative relationship of one element of the diagram to another element. It is understood that if the device of the diagram is turned upside down, the element described on the "lower" side will become the element on the "upper" side.

[0089] It is understood that, although the terms "first", "second", "third", etc. may be used herein to describe various elements, components, regions, layers, and / or parts, these elements, components, regions, layers, and / or parts should not be limited by these terms, and these terms are only used to distinguish different elements, components, regions, layers, and / or parts. Therefore, a first element, component, region, layer, and / or part discussed below may be referred to as a second element, component, region, layer, and / or part without departing from the teachings of some embodiments of the present invention.

[0090] Some embodiments of the present invention may be understood in conjunction with the drawings, and the drawings of the embodiments of the present invention are also considered as part of the description of the embodiments of the present invention. It should be understood that the drawings of the embodiments of the present invention are not drawn in proportion to the actual devices and components. The shapes and thicknesses of the embodiments may be exaggerated in the drawings to clearly show the features of the embodiments of the present invention. In addition, the structures and devices in the drawings are drawn in a schematic manner to clearly show the features of the embodiments of the present invention.

[0091] Here, the terms "about", "approximately" and "generally" generally mean within 20% of a given value or range, preferably within 10%, and more preferably within 5%, or within 3%, or within 2%, or within 1%, or within 0.5%. The numbers given here are approximate numbers, that is, in the absence of specific description of "about", "approximately" or "generally", the meanings of "about", "approximately" or "generally" can still be implied.

[0092] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meanings as those commonly understood by those skilled in the art to which this disclosure belongs. It is understood that these terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning consistent with the background or context of the relevant technology and the present invention, and should not be interpreted in an idealized or overly formal manner unless specifically defined in the embodiments of the present invention.

[0093] In some embodiments of the present invention, terms such as "connection" and "interconnection" may refer to two structures being in direct contact with each other, or two structures not being in direct contact with each other, with another structure disposed between the two structures, unless otherwise specified. Such terms may also include situations where both structures are movable or both structures are fixed.

[0094] In the drawings, similar components and / or features may have the same reference numerals. Various components of the same type may be distinguished by adding letters or numbers after the reference numerals to distinguish similar components and / or similar features.

[0095] Figure 1 A circuit diagram of an electronic device according to an embodiment of the present invention is shown. Figure 1 As shown, the electronic device 100 includes a detection device 110 and a central processor 120, wherein a first pin PIN1 and a second pin PIN2 of the electronic device 100 are electrically connected to an external device 10 through a first channel CH1 and a second channel CH2, respectively. According to an embodiment of the present invention, the electronic device 100 and the external device 10 comply with the USB Type-C specification, wherein the first pin PIN1 is a first configuration channel (i.e., CC1) of the USB Type-C, and the second pin PIN2 is a second configuration channel (i.e., CC2) of the USB Type-C.

[0096] like Figure 1As shown, the detection device 110 includes a first register 111, a second register 112, a voltage divider register 113, a state register 114, a controller 115, a detection circuit 116 and a trigger circuit 117. The first register 111 stores a first trimming code TRM1, and the second register 112 stores a second trimming code TRM2.

[0097] The state register 114 is used to store the state signal ST and provide it to the controller 115. According to one embodiment of the present invention, when the state signal ST is in the first state, the electronic device 100 is in the power supply mode. According to another embodiment of the present invention, when the state signal ST is in the second state, the electronic device 100 is in the power receiving mode. According to another embodiment of the present invention, when the state signal ST is in the third state, the electronic device 100 is in the dual mode.

[0098] According to another embodiment of the present invention, when the electronic device 100 is in dual mode, the electronic device 100 can be in either power supply mode or power receiving mode. In other words, when the electronic device 100 is in dual mode, the electronic device 100 can be in power supply mode or switch to power receiving mode.

[0099] The controller 115 writes any one of the first trimming code TRM1 and the second trimming code TRM2 into the voltage division register 113 through the load signal SLD according to the state signal ST and generates the control signal SC. The detection circuit 116 generates the reference voltage ( Figure 1 (not shown), and according to the control signal SC generated by the controller 115, detect the voltage value of any one of the first pin PIN1 and the second pin PIN2 to generate a detection signal SD.

[0100] The trigger circuit 117 generates a wake-up signal SWK according to the detection signal SD. According to one embodiment of the present invention, when the logic level of the detection signal SD changes, the trigger circuit 117 generates the wake-up signal SWK to wake up the CPU 120 from the standby mode. That is, when the detection signal SD changes from a low logic level to a high logic level or from a high logic level to a low logic level, the trigger circuit 117 generates the wake-up signal SWK. In other words, the CPU 120 determines that the external device 10 electrically connected to the electronic device 100 is correctly electrically connected according to the wake-up signal SWK generated by the trigger circuit 117, and thus returns to normal to perform subsequent actions.

[0101] According to one embodiment of the present invention, when the electronic device 100 is in the power supply mode, the central processing unit 120 determines that the external device 10 electrically connected to the electronic device 100 is in the power receiving mode according to the wake-up signal SWK. According to another embodiment of the present invention, when the electronic device 100 is in the power receiving mode, the central processing unit 120 determines that the external device 10 electrically connected to the electronic device 100 is in the power supply mode according to the wake-up signal SWK. According to another embodiment of the present invention, when the electronic device 100 is in the dual mode, the central processing unit 120 determines that the external device 10 electrically connected to the electronic device 100 is in the power receiving mode or the power supply mode according to the wake-up signal SWK and whether the electronic device 100 is currently in the power supply mode or the power receiving mode.

[0102] According to one embodiment of the present invention, Figure 1 As shown, the detection device 110 further includes a timer 118. The timer 118 is used to count a first predetermined time to generate a first time signal T1, and to count a second predetermined time to generate a second time signal T2. The controller 115 controls the detection circuit 116 to detect the voltage value of any one of the first pin PIN1 and the second pin PIN2 through the control signal SC according to the state signal ST to generate a detection signal SD, and controls the detection circuit 116 to detect the voltage value of the other of the first pin PIN1 and the second pin PIN2 according to the first time signal T1 to generate the detection signal SD again.

[0103] In addition, the controller 115 generates a control signal SC every second predetermined time according to the second time signal T2, so that the detection circuit 116 detects the voltage value of any one of the first pin PIN1 and the second pin PIN2 to generate a detection signal SD. According to some embodiments of the present invention, the first predetermined time is 1 millisecond, and the second predetermined time is 1 second. That is, the controller 115 enables the detection circuit 116 to detect the voltage value of any one of the first pin PIN1 and the second pin PIN2 every 1 second to generate the detection signal SD. When the detection signal SD does not change within 1 millisecond, the voltage value of the other of the first pin PIN1 and the second pin PIN2 is detected to generate the detection signal SD.

[0104] Figure 2 A circuit diagram of a detection circuit according to an embodiment of the present invention is shown. According to an embodiment of the present invention, Figure 2 The detection circuit 200 corresponds to Figure 1 The detection circuit 116. Figure 2As shown, the detection circuit 200 includes a comparator 210, a first switch SW1, a voltage divider circuit 220, a second switch SW2, a third switch SW3, a first pull-up resistor RP1, a fourth switch SW4, a second pull-up resistor RP2, a fifth switch SW5, a first pull-down resistor RD1, a sixth switch SW6, a second pull-down resistor RD2 and a seventh switch SW7.

[0105] The comparator 210 includes a positive input terminal INP and a negative input terminal INN, wherein the positive input terminal INP receives a detection voltage VDT, and the negative input terminal INN receives a reference voltage VREF. The comparator 210 is used to compare the detection voltage VDT with the reference voltage VREF to generate a detection signal SD. The first switch SW1 supplies the supply voltage VDD to the comparator 210 according to the first control signal SC1.

[0106] According to other embodiments of the present invention, the positive input terminal INP may also receive the reference voltage VREF, and the negative input terminal INN may also receive the detection voltage VDT, but the state of the detection signal SD is also inverted. Figure 2 The voltage dividing circuit 220 generates a voltage dividing ratio according to the voltage dividing code TRMC, and divides the supply voltage VDD into a reference voltage VREF.

[0107] exist Figure 2 In the embodiment of the present invention, the voltage divider circuit 220 includes a first capacitor C1 and a second capacitor C2, wherein the voltage divider code TRMC is used to adjust the voltage divider ratio generated by the first capacitor C1 and the second capacitor C2, so that the voltage divider circuit 220 divides the supply voltage VDD to generate a reference voltage VREF. According to other embodiments of the present invention, the voltage divider circuit 220 may also use resistors for voltage division, wherein the voltage divider code TRMC is used to adjust the ratio of the resistors. Compared with the voltage divider circuit 220 composed of resistors, the voltage divider circuit 220 using the first capacitor C1 and the second capacitor C2 does not generate direct current, which helps to reduce power loss.

[0108] According to one embodiment of the present invention, when Figure 1 When the controller 115 loads the first trimming code TRM1 into the voltage division register 113, the voltage division circuit 220 divides the supply voltage VDD to generate the first reference voltage VREF1 by using the voltage division ratio generated by the first capacitor C1 and the second capacitor C2.

[0109] According to another embodiment of the present invention, when Figure 1When the controller 115 loads the second trimming code TRM2 into the voltage divider register 113, the voltage divider circuit 220 generates a voltage divider ratio by the first capacitor C1 and the second capacitor C2, and divides the supply voltage VDD to generate the second reference voltage VREF2. According to some embodiments of the present invention, the first reference voltage VREF1 and the second reference voltage VREF2 are different. According to one embodiment of the present invention, the first reference voltage VREF1 is greater than the second reference voltage VREF2.

[0110] The second switch SW2 provides the supply voltage VDD to the voltage divider circuit 220 according to the second control signal SC2. The third switch SW3 selects any one of the first pin PIN1 and the second pin PIN2 to generate the detection voltage VDT according to the third control signal SC3, and selects the other one of the first pin PIN1 and the second pin PIN2 to generate the detection voltage VDT after a period of time.

[0111] The first pull-up resistor RP1 is electrically connected between the supply voltage VDD and the first pin PIN1, and the fourth switch SW4 provides the supply voltage VDD to the first pull-up resistor RP1 according to the fourth control signal SC4. The second pull-up resistor RP2 is electrically connected between the supply voltage VDD and the second pin PIN2, and the fifth switch SW5 provides the supply voltage VDD to the second pull-up resistor RP2 according to the fifth control signal SC5.

[0112] The first pull-down resistor RD1 is electrically connected between the first pin PIN1 and the ground terminal GND, and the sixth switch SW6 electrically connects the first pin PIN1 to the first pull-down resistor RD1 according to the sixth control signal SC6. The second pull-down resistor RD2 is electrically connected between the second pin PIN2 and the ground terminal GND, and the seventh switch SW7 electrically connects the second pin PIN2 to the second pull-down resistor RD2 according to the seventh control signal SC7.

[0113] According to one embodiment of the present invention, Figure 1 The control signal SC includes a first control signal SC1, a second control signal SC2, a third control signal SC3, a fourth control signal SC4, a fifth control signal SC5, a sixth control signal SC6 and a seventh control signal SC7. According to an embodiment of the present invention, since the detection circuit 200 has a plurality of switches, when the detection circuit 200 is not in operation, the plurality of switches may all be turned off, so that the current flowing through the detection circuit 200 is zero.

[0114] According to an embodiment of the present invention, when the state signal ST is in the first state, it means that the electronic device 100 is in the power supply mode, the controller 150 turns on the first switch SW1, the second switch SW2, the fourth switch SW4 and the fifth switch SW5, and loads the first trimming code TRM1 into the voltage division register 113, so that the voltage division circuit 220 generates the first reference voltage VREF1. When the external device 10 is not electrically connected to the electronic device 100 or the external device 10 is not in the power receiving mode, the detection voltage VDT maintains the supply voltage VDD, and the detection signal SD maintains a high logic level.

[0115] When the external device 10 is electrically connected to the electronic device 100 and the external device 10 is in a power receiving mode, the detection voltage VDT drops from the supply voltage VDD to below the first reference voltage VREF1, so that the detection signal SD is converted from a high logic level to a low logic level. The trigger circuit 117 generates a wake-up signal SWK to wake up the CPU 120 according to the changed detection signal SD.

[0116] According to another embodiment of the present invention, when the state signal ST is in the second state, it means that the electronic device 100 is in the power receiving mode, the controller 115 turns on the first switch SW1, the second switch SW2, the sixth switch SW6 and the seventh switch SW7, and loads the second trimming code TRM2 into the voltage dividing register 113, so that the voltage dividing circuit 220 generates the second detection voltage VREF2. When the external device 10 is not electrically connected to the electronic device 100 or the external device 10 is not in the power supply mode, the detection voltage VDT maintains the voltage level of the ground terminal GND, so that the detection signal SD maintains a low logic level.

[0117] When the external device 10 is electrically connected to the electronic device 100 and the external device 10 is in power supply mode, the detection voltage VDT rises from the voltage level of the ground terminal GND to be higher than the second reference voltage VREF2, so that the detection signal SD is converted from a low logic level to a high logic level. The trigger circuit 117 generates a wake-up signal SWK to wake up the CPU 120 according to the changed detection signal SD.

[0118] According to another embodiment of the present invention, when the state signal ST is in the third state, the controller 115 turns on the first switch SW1, the second switch SW2, the fourth switch SW4 and the fifth switch SW5, and loads the first trimming code TRM1 into the voltage division register 113, so that the voltage division circuit 220 generates the first reference voltage VREF1. When the external device 10 is not electrically connected to the electronic device 100 or the external device 10 is not in the power receiving mode, the detection voltage VDT is maintained at the supply voltage VDD.

[0119] When the external device 10 is electrically connected to the electronic device 100 and the external device 10 is in a power receiving mode, the detection voltage VDT drops from the supply voltage VDD to a level lower than the first reference voltage VREF1, so that the detection signal SD is converted from a high logic level to a low logic level. When the detection signal SD is maintained at a high logic level and does not change, the controller 115 loads the second trimming code TRM2 into the voltage division register 113, turns off the fourth switch SW4 and the fifth switch SW5, and turns on the sixth switch SW6 and the seventh switch SW7.

[0120] When the external device 10 is electrically connected to the electronic device 100 and the external device is in power supply mode, the detection voltage VDT rises from the voltage level of the ground terminal GND to be higher than the second reference voltage VREF2 , so that the detection signal SD is converted from a low logic level to a high logic level.

[0121] In other words, when the electronic device 100 is in power supply mode, the trigger circuit 117 generates a wake-up signal SWK to wake up the CPU 120 according to the falling edge of the detection signal SD; when the electronic device 100 is in power supply mode, the trigger circuit 117 generates a wake-up signal SWK to wake up the CPU 120 according to the rising edge of the detection signal SD.

[0122] According to some embodiments of the present invention, the third switch SW3 provides the voltage of any one of the first pin PIN1 and the second pin PIN2 to the detection voltage VDT. When the detection signal SD does not change after a first predetermined time, the third switch SW3 provides the voltage of the other one of the first pin PIN1 and the second pin PIN2 to the detection voltage VDT according to the third control signal SC3.

[0123] Figure 3 A flow chart of a detection method according to an embodiment of the present invention is shown. Figure 1 The electronic device 100 and Figure 2 The detection circuit 200 is described in detail.

[0124] First, the detection circuit 116 generates a reference voltage VREF according to the voltage division code TRMC stored in the voltage division register 113 (step S310). Figure 2 As shown, the second switch SW2 is turned on to provide the supply voltage VDD to the voltage divider circuit 220. The voltage divider circuit 220 adjusts the ratio of the first capacitor C1 and the second capacitor C2 according to the voltage divider code TRMC to generate the reference voltage VREF.

[0125] According to one embodiment of the present invention, when the voltage division code TRMC is the first trimming code TRM1, the reference voltage VREF is the first reference voltage VREF1. According to another embodiment of the present invention, when the voltage division code TRMC is the second trimming code TRM2, the reference voltage VREF is the second reference voltage VREF2.

[0126] Next, the comparator 210 is used to determine the relationship between the voltage value of any one of the first pin PIN1 and the second pin PIN2 of the electronic device 100 and the reference voltage VREF, and generate a detection signal (step S320). According to an embodiment of the present invention, the electronic device 100 and the external device 10 comply with the USB Type-C specification, wherein the first pin PIN1 is a first configuration channel (i.e., CC1) of the USB Type-C, and the second pin PIN2 is a second configuration channel (i.e., CC2) of the USB Type-C.

[0127] When the logic level of the detection signal SD changes, the external device 10 electrically connected to the electronic device 100 is determined to be correctly electrically connected (step S330), thereby waking up the electronic device 100. According to some embodiments of the present invention, when the external device 10 is electrically connected to the electronic device 100, the comparator 210 compares the voltage values ​​of the first pin PIN1 and the second pin PIN2 with the first reference voltage VREF1 or the second reference voltage VREF2 in sequence. When the external device 10 is correctly electrically connected to the electronic device 100, the voltage value of the first pin PIN1 or the second pin PIN2 will change, causing the detection signal SD to change. The trigger circuit 117 also generates a wake-up signal SWK according to the changed detection signal SD.

[0128] Specifically, when any one of the electronic device 100 and the external device 10 is in the power supply mode and the other is in the power receiving mode, the voltage value of any one of the first pin PIN1 and the second pin PIN2 will drop from the supply voltage VDD to below the first reference voltage VREF1, or rise from the voltage level of the ground terminal GND to above the second reference voltage VREF2. The comparator 210 confirms that the voltage value of the first pin PIN1 or the second pin PIN2 changes sufficiently to generate a sensing signal SD with a changed logic level, and then the trigger circuit 117 generates a wake-up signal SWK according to the changed sensing circuit SD.

[0129] According to an embodiment of the present invention, when it is found that the voltage value of any one of the first pin PIN1 and the second pin PIN2 has not changed and is maintained for a first predetermined time, the other of the first pin PIN1 and the second pin PIN2 is switched to determine the relationship between the voltage value and the reference voltage VREF. According to an embodiment of the present invention, the detection method 300 is executed once every second predetermined time to reduce power loss.

[0130] The present invention proposes a detection device and a detection method for detecting whether a USB Type-C device is correctly electrically connected, by determining whether the voltage of a first configuration channel or a second configuration channel of the USB Type-C changes and exceeds a threshold value to determine whether an external device is correctly electrically connected to an electronic device. In addition, the detection device and the detection method are executed once within a period of time, and the detection device is completely electrically isolated from the supply voltage by multiple switches when not in operation, so that the power consumption of the detection device can be reduced to a minimum.

[0131] Although the embodiments of the present invention and their advantages have been disclosed as above, it should be understood that any person skilled in the art may make changes, substitutions and modifications without departing from the spirit and scope of the present invention. In addition, the scope of protection of the present invention is not limited to the processes, machines, manufactures, material compositions, devices, methods and steps in the specific embodiments described in the specification. Any person skilled in the art can understand the processes, machines, manufactures, material compositions, devices, methods and steps developed in the prior art or in the future from the disclosure of some embodiments of the present invention. As long as they can implement substantially the same functions or obtain substantially the same results in the embodiments described herein, they can all be used according to some embodiments of the present invention. Therefore, the scope of protection of the present invention includes the above-mentioned processes, machines, manufactures, material compositions, devices, methods and steps. In addition, each claim constitutes a separate embodiment, and the scope of protection of the present invention also includes the combination of each claim and embodiment.

Claims

1. A detection device, characterized in that: Applicable to an electronic device, comprising: A voltage divider register for storing a voltage divider code; a controller, generating a control signal according to a status signal; a detection circuit, generating a reference voltage according to the voltage division code, and determining the relationship between the voltage value of any one of the first pin and the second pin and the reference voltage according to the control signal to generate a detection signal; and A trigger circuit generates a wake-up signal to wake up a central processing unit when the logic level of the detection signal changes.

2. The detection device according to claim 1, characterized in that The above electronic device complies with the USB Type-C specification; The first pin is a first configuration channel of the USB Type-C, and the second pin is a second configuration channel of the USB Type-C; The central processing unit determines that an external device electrically connected to the electronic device is correctly electrically connected according to the wake-up signal.

3. The detection device according to claim 1, characterized in that: Also includes: A first register storing a first trimming code; a second register storing a second trimming code; as well as A status register for storing the status signal; The controller stores any one of the first trimming code and the second trimming code in the voltage division register according to the status signal.

4. The detection device according to claim 3, characterized in that: When the state signal is in a first state, the electronic device is in a power supply mode; When the state signal is in a second state, the electronic device is in a power receiving mode; When the state signal is in a third state, the electronic device is in a dual mode; When the electronic device is in the dual mode, the electronic device is in any one of the power supply mode and the power receiving mode.

5. The detection device according to claim 4, characterized in that: The detection circuit comprises: a comparator, used for comparing a detection voltage with the reference voltage to generate the detection signal; a first switch, for supplying a supply voltage to the comparator according to a first control signal; a voltage dividing circuit, generating a voltage dividing ratio according to the voltage dividing code, and dividing the supply voltage into the reference voltage; a second switch, providing the supply voltage to the voltage divider circuit according to a second control signal; a third switch, which selects any one of the first pin and the second pin to generate the detection voltage according to a third control signal, and selects the other of the first pin and the second pin to generate the detection voltage after a first predetermined time; a first pull-up resistor, electrically connected between the supply voltage and the first pin; a fourth switch, providing the supply voltage to the first pull-up resistor according to a fourth control signal; a second pull-up resistor, electrically connected between the supply voltage and the second pin; a fifth switch, providing the supply voltage to the second pull-up resistor according to a fifth control signal; a first pull-down resistor, electrically connected between the first pin and a ground terminal; a sixth switch, electrically connecting the first pin to the first pull-down resistor according to a sixth control signal; a second pull-down resistor, electrically connected between the second pin and the ground terminal; and A seventh switch electrically connects the second pin to the second pull-down resistor according to a seventh control signal.

6. The detection device according to claim 5, characterized in that: The control signal includes the first control signal, the second control signal, the third control signal, the fourth control signal, the fifth control signal, the sixth control signal and the seventh control signal.

7. The detection device according to claim 5, characterized in that: When the state signal is in the first state, the controller turns on the first switch, the second switch, the fourth switch and the fifth switch, and loads the first trimming code into the voltage division register, so that the voltage division circuit generates a first reference voltage; When the external device is not electrically connected to the electronic device or the external device is not in the power receiving mode, the detection voltage maintains the supply voltage, and the detection signal maintains a first logic level; When the external device is electrically connected to the electronic device and the external device is in the power receiving mode, the detection voltage drops from the supply voltage to below the first reference voltage, so that the detection signal is converted from the first logic level to a second logic level; The trigger circuit generates the wake-up signal to wake up the central processing unit according to the changed detection signal.

8. The detection device according to claim 7, characterized in that: When the state signal is in the second state, the controller turns on the first switch, the second switch, the sixth switch and the seventh switch, and loads the second trimming code into the voltage division register, so that the voltage division circuit generates a second reference voltage; wherein the first reference voltage and the second reference voltage are different; When the external device is not electrically connected to the electronic device or the external device is not in the power supply mode, the detection voltage maintains the voltage level of the ground terminal, and the detection signal maintains the second logic level; When the external device is electrically connected to the electronic device and the external device is in the power supply mode, the detection voltage rises from the voltage level of the ground terminal to a level higher than the second reference voltage, so that the detection signal is converted from the second logic level to the first logic level; The trigger circuit generates the wake-up signal to wake up the central processing unit according to the changed detection signal.

9. The detection device according to claim 8, characterized in that: When the state signal is in the third state, the controller turns on the first switch, the second switch, the fourth switch and the fifth switch, and loads the first trimming code into the voltage division register, so that the voltage division circuit generates the first reference voltage; When the external device is not electrically connected to the electronic device or the external device is not in the power receiving mode, the detection voltage maintains the supply voltage; When the external device is electrically connected to the electronic device and the external device is in the power receiving mode, the detection voltage drops from the supply voltage to below the first reference voltage, so that the detection signal is converted from the first logic level to the second logic level; When the detection signal does not change, the controller turns off the fourth switch and the fifth switch, loads the second trimming code into the voltage divider register, and turns on the sixth switch and the seventh switch; When the external device is electrically connected to the electronic device and the external device is in the power supply mode, the detection voltage rises from the voltage level of the ground terminal to a level higher than the second reference voltage, so that the detection signal is converted from the second logic level to the first logic level.

10. The detection device according to claim 5, characterized in that: Also includes: a counter, which counts the first predetermined time to generate a first time signal, and counts a second predetermined time to generate a second time signal; The detection circuit determines the relationship between the voltage value of any one of the first pin and the second pin and the reference voltage every the second predetermined time to generate the detection signal.

11. A detection method of a detection device, characterized in that: Applicable to an electronic device, for detecting whether an external device is electrically connected to the electronic device, wherein the detection method comprises: generating a reference voltage; Determining the relationship between the voltage value of any one of a first pin and a second pin of the electronic device and the reference voltage to generate a detection signal; and When the logic level of the detection signal changes, it is determined that the external device electrically connected to the electronic device is correctly electrically connected and the electronic device is awakened.

12. The detection method of the detection device according to claim 11, characterized in that: The electronic device complies with the specification of USB Type-C, wherein the first pin is a first configuration channel of the USB Type-C, and the second pin is a second configuration channel of the USB Type-C.

13. The detection method of the detection device according to claim 12, characterized in that: Also includes: When the electronic device is in a power supply mode, a supply voltage is provided to the first pin through a first pull-up resistor, and the supply voltage is provided to the second pin through a second pull-up resistor, wherein the reference voltage is a first reference voltage; Sequentially comparing the voltage of the first pin and the voltage of the second pin with the first reference voltage to generate the detection signal; When the detection signal is converted from a first logic level to a second logic level, it is determined that the external device is electrically connected to the electronic device and the external device is in a power receiving mode; and When the detection signal maintains the first logic level, it is determined that the external device is not electrically connected to the electronic device or the external device is not in the power receiving mode.

14. The detection method of the detection device according to claim 13, characterized in that: Also includes: When the electronic device is in the power receiving mode, a ground terminal is electrically connected to the first pin through a first pull-down resistor, and the ground terminal is electrically connected to the second pin through a second pull-down resistor, wherein the reference voltage is a second reference voltage; Sequentially comparing the voltage of the first pin and the voltage of the second pin with the second reference voltage to generate the detection signal; When the detection signal is converted from the second logic level to the first logic level, it is determined that the external device is electrically connected to the electronic device and the external device is in the power supply mode; and When the detection signal maintains the second logic level, it is determined that the external device is not electrically connected to the electronic device or the external device is not in the power supply mode; The first reference voltage and the second reference voltage are different.

15. The detection method of the detection device according to claim 14, characterized in that: Also includes: When the electronic device is in a dual mode, the reference voltage is the first reference voltage, and the supply voltage is provided to the first pin and the second pin respectively through the first pull-up resistor and the second pull-up resistor; Sequentially comparing the voltage of the first pin and the voltage of the second pin with the first reference voltage to generate the detection signal; When the detection signal is converted from the first logic level to the second logic level, it is determined that the external device is electrically connected to the electronic device and the external device is in the power receiving mode; When the detection signal maintains the first logic level, the reference voltage is adjusted to the second reference voltage, the first pull-up resistor and the second pull-up resistor are electrically isolated from the first pin and the second pin respectively, and the ground terminal is electrically connected to the first pin and the second pin respectively through the first pull-down resistor and the second pull-down resistor; Sequentially comparing the voltage of the first pin and the voltage of the second pin with the second reference voltage to generate the detection signal; When the detection signal is converted from the second logic level to the first logic level, it is determined that the external device is electrically connected to the electronic device and the external device is in the power supply mode; and When the detection signal maintains the second logic level, it is determined that the external device is not electrically connected to the electronic device or the external device is not in the power supply mode.

16. The detection method of the detection device according to claim 14, characterized in that: The step of sequentially comparing the voltage of the first pin and the voltage of the second pin with the reference voltage to generate the detection signal further includes: Selecting any one of the voltage of the first pin and the voltage of the second pin to be compared with the reference voltage to generate the detection signal; and When the detection signal maintains the first logic level or the second logic level for a first predetermined time, the other of the voltage of the first pin and the voltage of the second pin and the reference voltage are selected to generate the detection signal again.

17. The detection method of the detection device according to claim 11, characterized in that: The above detection method is executed once every a second predetermined time.