Timing synchronization recovery system based on Gardner algorithm

Abstract

The invention provides a timing synchronization recovery system based on a Gardner algorithm, relates to the technical field of signal processing, and is used for solving the problem that in the prior art, in long-distance communication, due to the fact that signals are affected by noise and errors caused by factors such as atmospheric turbulence and Doppler effect in the transmission process, the transmission efficiency of the signals is improved. And complete synchronization of the clock, the phase and the frequency is difficult to guarantee. The system comprises a signal sending end used for generating a random binary signal and modulating the binary signal into a simulation signal suitable for transmission, and the simulation signal is used for simulating transmitted bit data; the channel is used for transmitting the simulation signal and introducing noise in the transmission process to carry out simulation interference on the simulation signal to obtain a distortion signal; and the signal receiving end is used for receiving the distorted signal, performing timing synchronization and interpolation processing on a symbol of the distorted signal by using a Gardner loop, correcting a sampling deviation introduced by a channel, and recovering original bit data from the distorted signal.

Description

Technical Field

[0001] The present disclosure relates to the field of signal processing technology, and more specifically, to a timing synchronization recovery system based on a Gardner algorithm. Background Art

[0002] The Gardner algorithm is widely used in wireless communication, satellite communication, cable TV modulation and demodulation, and cellular network systems. As an efficient technology for symbol timing recovery, it performs well in a channel environment with noise or multipath effects, so it plays an important role in modern communications. The Gardner algorithm is a classic method for time-frequency synchronization. It is mainly used to solve the symbol synchronization problem, especially in digital communication systems (such as QAM (Quadrature Amplitude Modulation) modulation and QPSK (Quadrature Phase Shift Keying) modulation). It belongs to the error-based timing recovery method. It derives the timing error by analyzing the oversampling points in the received signal, thereby adjusting the sampling moment of the receiver. The Gardner algorithm is based on the characteristics of inter-symbol interference (ISI) and uses the known structure (such as symbol edge) in the received signal to estimate and adjust the synchronization error. The algorithm is particularly suitable for working in a noisy environment, such as the transmission system in wireless communication or satellite communication. Time-frequency synchronization technology is widely used in modern communication systems, such as OFDM (Orthogonal Frequency Division Multiplexing) systems, which can effectively solve problems such as multipath effects and frequency selective fading.

[0003] However, in long-distance communications, the existing technology is difficult to ensure complete synchronization of clock, phase and frequency because the signal is affected by noise and errors caused by factors such as atmospheric turbulence and the Doppler effect during transmission. Summary of the invention

[0004] In view of this, the present disclosure provides a timing synchronization recovery system based on the Gardner algorithm to solve the technical problem that in the prior art, it is difficult to ensure complete synchronization of clock, phase and frequency during long-distance communication due to the influence of noise and errors caused by factors such as atmospheric turbulence and Doppler effect during signal transmission.

[0005] One aspect of the present disclosure provides a timing synchronization recovery system based on the Gardner algorithm, including: a signal transmitting end, used to generate a random binary signal, and modulate the binary signal into a simulation signal suitable for transmission, wherein the simulation signal is used to simulate the bit data to be transmitted; a channel, used to transmit the simulation signal, and introduce noise during the transmission process to simulate the interference of the simulation signal to obtain a distorted signal; a signal receiving end, used to receive the distorted signal, and use a Gardner loop to perform timing synchronization and interpolation processing on the symbols of the distorted signal, correct the sampling deviation introduced by the channel, and recover the original bit data from the distorted signal; wherein the Gardner loop is configured to be able to use the Gardner algorithm to adjust the phase of the clock of the signal receiving end to ensure that the received symbol moment can be accurately aligned with the transmitted symbol moment.

[0006] According to an embodiment of the present disclosure, the signal transmitting end includes: a signal source, which is used to generate a random binary signal and convert the binary signal into a bipolar signal; an encoder, which is used to encode the bipolar signal; a modulator, which is used to convert the encoded bipolar signal into a simulation signal suitable for transmission; and a symbol timing module, which is used to time the sending time of each symbol during the modulation process and control the time interval for sending each symbol.

[0007] According to an embodiment of the present disclosure, the signal transmitting end further includes: a sampling deviation module, which is used to evaluate the impact on signal quality by introducing sampling deviation to simulate clock asynchronism between the signal transmitting end and the signal receiving end.

[0008] According to an embodiment of the present disclosure, the signal transmitting end further includes: a delay removal module, which is used to remove the delay caused by the signal modulation process so that the modulated signal is aligned with the symbol during the original transmission.

[0009] According to an embodiment of the present disclosure, the channel is configured as a Gaussian white noise channel; wherein the Gaussian white noise channel can add noise to the simulation signal for different signal-to-noise ratios.

[0010] According to an embodiment of the present disclosure, the signal receiving end includes: a matched filter, which is used to filter the received distorted signal and suppress the noise and inter-symbol interference in the distorted signal; a symbol timing recovery module, which is used to recover the received symbol timing point through the Gardner algorithm to ensure that the distorted signal is sampled at the most appropriate time, thereby recovering the original bit data.

[0011] According to an embodiment of the present disclosure, the symbol timing recovery module includes: a timing error detector, which is used to generate a feedback signal for adjusting the sampling moment according to the timing error of the sampling point detected by the Gardner loop, so as to achieve synchronization of the symbol timing; a loop filter, which is used to adjust the phase of the clock at the signal receiving end to gradually reduce the timing error; a piecewise polynomial interpolation module, which is used to sample the correct symbol value from the continuous distorted signal to ensure symbol synchronization; a demodulator, which is used to convert the simulated signal back to a digital signal; and a decoder, which is used to decode the digital signal and recover the original bit data.

[0012] According to an embodiment of the present disclosure, the timing error is calculated as follows: e(1,ms) = yI(1,k-1)*(yI(1,k)-yI(1,k-2)); wherein e(1,ms) represents the timing error, yI represents the signal sampling point after interpolation, yI(1,k-1) represents the sampling value at the midpoint of the symbol, and yI(1,k) and yI(1,k-2) represent the sampling values ​​before and after the symbol, respectively.

[0013] According to an embodiment of the present disclosure, the signal receiving end further includes: an equalizer for compensating for inter-symbol interference introduced by the channel and reducing the influence of multipath effects.

[0014] According to an embodiment of the present disclosure, the signal receiving end further includes: a bit error rate calculation module, which is used to judge the signal according to the recovered symbols after completing symbol synchronization, and compare it with the original bit data to calculate the bit error rate.

[0015] The timing synchronization recovery system based on the Gardner algorithm provided in the embodiments of the present disclosure has at least the following beneficial effects:

[0016] (1) The timing synchronization recovery system based on the Gardner algorithm provided in the embodiments of the present disclosure accurately recovers the original signal by using the Gardner loop to perform symbol synchronization at the signal receiving end, thereby effectively realizing clock and frequency synchronization in long-distance communication. The system not only has strong anti-interference and anti-noise capabilities, but also can achieve low bit error rate at high transmission rates.

[0017] (2) The timing synchronization recovery system based on the Gardner algorithm provided in the embodiment of the present disclosure can capture and correct the noise and error caused by atmospheric turbulence and Doppler effect during the transmission process through the design of the frame header data format, thereby achieving time-frequency synchronization.

[0018] (3) The timing synchronization recovery system based on the Gardner algorithm provided in the embodiments of the present disclosure adopts a highly autocorrelated pseudocode calculation sequence (such as Barker code) for signal capture and frame synchronization, ensuring efficient and accurate data transmission. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The above and other objects, features and advantages of the present disclosure will become more apparent through the following description of the embodiments of the present disclosure with reference to the accompanying drawings, in which:

[0020] Figure 1 The structure block diagram of the timing synchronization recovery system based on the Gardner algorithm according to the embodiment of the present disclosure is schematically shown;

[0021] Figure 2 The schematic diagram shows a principle block diagram of a symbol timing recovery module according to an embodiment of the present disclosure;

[0022] Figure 3 Schematically shows a structure diagram of an interpolation filter with a Farrow structure according to an embodiment of the present disclosure;

[0023] Figure 4 Schematically shows a pseudo code calculation sequence and an algorithm digital frame format block diagram according to an embodiment of the present disclosure;

[0024] Figure 5 A comparison diagram of the simulated bit error rate and the theoretical value of the timing synchronization recovery system based on the Gardner algorithm at a 4-fold sampling rate according to an embodiment of the present disclosure is schematically shown. DETAILED DESCRIPTION

[0025] Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of the present disclosure. In the following detailed description, for ease of explanation, many specific details are set forth to provide a comprehensive understanding of the embodiments of the present disclosure. However, it is apparent that one or more embodiments may also be implemented without these specific details. In addition, in the following description, descriptions of known structures and technologies are omitted to avoid unnecessary confusion of the concepts of the present disclosure.

[0026] The terms used herein are only for describing specific embodiments and are not intended to limit the present disclosure. The terms "comprise", "include", etc. used herein indicate the existence of the features, steps, operations and / or components, but do not exclude the existence or addition of one or more other features, steps, operations or components.

[0027] All terms (including technical and scientific terms) used herein have the meanings commonly understood by those skilled in the art unless otherwise defined. It should be noted that the terms used herein should be interpreted as having a meaning consistent with the context of this specification and should not be interpreted in an idealized or overly rigid manner.

[0028] When using expressions such as "at least one of A, B, and C, etc.", they should generally be interpreted according to the meaning of the expression commonly understood by those skilled in the art (for example, "a system having at least one of A, B, and C" should include but is not limited to a system having A alone, B alone, C alone, A and B, A and C, B and C, and / or A, B, C, etc.).

[0029] The Gardner algorithm is widely used in wireless communication, satellite communication, cable TV modulation and demodulation, and cellular network systems. As an efficient technology for symbol timing recovery, it performs well in a channel environment with noise or multipath effects, so it plays an important role in modern communications. The Gardner algorithm is a classic method for time-frequency synchronization. It is mainly used to solve the symbol synchronization problem, especially in digital communication systems (such as QAM (Quadrature Amplitude Modulation) modulation and QPSK (Quadrature Phase Shift Keying) modulation). It belongs to the error-based timing recovery method. It derives the timing error by analyzing the oversampling points in the received signal, thereby adjusting the sampling moment of the receiver. The Gardner algorithm is based on the characteristics of inter-symbol interference (ISI) and uses the known structure (such as symbol edge) in the received signal to estimate and adjust the synchronization error. The algorithm is particularly suitable for working in a noisy environment, such as the transmission system in wireless communication or satellite communication. Time-frequency synchronization technology is widely used in modern communication systems, such as OFDM (Orthogonal Frequency Division Multiplexing) systems, which can effectively solve problems such as multipath effects and frequency selective fading.

[0030] However, in long-distance communications, the existing technology is difficult to ensure complete synchronization of clock, phase and frequency because the signal is affected by noise and errors caused by factors such as atmospheric turbulence and the Doppler effect during transmission.

[0031] Based on this, the embodiment of the present disclosure provides a timing synchronization recovery system based on the Gardner algorithm to solve the technical problem that in the prior art, it is difficult to ensure complete synchronization of clock, phase and frequency during long-distance communication due to the influence of noise and errors caused by factors such as atmospheric turbulence and Doppler effect during signal transmission.

[0032] Figure 1 The structural block diagram of the timing synchronization recovery system based on the Gardner algorithm according to an embodiment of the present disclosure is schematically shown.

[0033] like Figure 1As shown, the timing synchronization recovery system based on the Gardner algorithm of the embodiment of the present disclosure includes: a signal sending end, a channel and a signal receiving end.

[0034] The signal transmitting end is used to generate a random binary signal and modulate the binary signal into a simulation signal suitable for transmission, and the simulation signal is used to simulate the bit data to be transmitted.

[0035] The channel is used to transmit the simulated signal, and during the transmission process, noise is introduced to simulate interference on the simulated signal to obtain a distorted signal.

[0036] The signal receiving end is used to receive the distorted signal, and use the Gardner loop to perform timing synchronization and interpolation processing on the symbols of the distorted signal, correct the sampling deviation introduced by the channel, and recover the original bit data from the distorted signal.

[0037] In a digital communication system, the signal transmitter converts a bit stream (0s and 1s) into an analog signal and then transmits it to the signal receiver through a channel (a transmission medium that is usually noisy).

[0038] In order for the receiving end to accurately restore the original bit stream, symbol synchronization is required, that is, the receiving end must correctly identify the start time and end time of each symbol, so as to accurately extract the information in the signal. Therefore, in this embodiment, the Gardner loop is configured to use the Gardner algorithm to adjust the phase of the signal receiving end clock to ensure that the received symbol time can be accurately aligned with the transmitted symbol time.

[0039] The timing synchronization recovery system based on the Gardner algorithm provided in the embodiment of the present disclosure accurately recovers the original signal by using the Gardner loop to perform symbol synchronization at the signal receiving end, effectively realizing clock and frequency synchronization in long-distance communication. The system not only has strong anti-interference and anti-noise capabilities, but also can achieve low bit error rate at high transmission rate.

[0040] According to an embodiment of the present disclosure, the signal transmitting end may specifically include: a signal source, an encoder, a modulator, a sampling deviation module and a delay removal module.

[0041] The signal source is used to generate a random binary signal and convert the binary signal into a bipolar signal.

[0042] The encoder is used to encode the bipolar signal.

[0043] The modulator is used to convert the encoded bipolar signal into an analog signal suitable for transmission.

[0044] The symbol timing module is used to time the transmission time of each symbol during the modulation process and control the time interval for transmitting each symbol.

[0045] The sampling deviation module is used to evaluate the impact on signal quality by introducing sampling deviation to simulate the clock asynchronism between the signal sending end and the signal receiving end.

[0046] The delay removal module is used to remove the delay caused by the signal modulation process so that the modulated signal is aligned with the symbol during the original transmission.

[0047] In this embodiment, the workflow of the signal sending end may be as follows:

[0048] (1) Set the communication parameters.

[0049] In this embodiment, for example, more important communication parameters can be set, such as bit rate, symbol rate, and number of sampling points per symbol, that is, the number of sampling times in the process of transmitting a symbol, which can usually be set to 4, 8, and 16 times in simulation. The higher the number, the higher the signal accuracy. The above parameters determine the transmission speed of the system and the processing details of the signal.

[0050] (2) Generation of signal source.

[0051] In this embodiment, the signal source can generate a random binary signal stream to simulate the transmitted bit data. For example, a random array containing 1 million 0s and 1s can be generated. Since bipolar signals (+1 and -1) are often used instead of 0 and 1 in digital communication, the binary signal can be encoded and converted into a bipolar signal.

[0052] (3) Signal modulation and filtering.

[0053] Since the Gardner algorithm is an interpolation synchronization algorithm, the signal sending end should use a function to insert more sampling points into the original signal for upsampling, which is also to make the signal smoother and facilitate subsequent processing. In order to better capture the changes and shapes of the signal, the signal receiving end should also upsample the signal. In this embodiment, two sampling multiples of 4 times and 16 times are analyzed and compared.

[0054] The modulator converts the bit stream into a signal form suitable for transmission. In this embodiment, the modulator may use, for example, a roll-off filter, which has the following functions:

[0055] Limit the bandwidth of the signal to prevent the signal frequency from exceeding the system transmission capability.

[0056] Suppressing inter-symbol interference (ISI), i.e. the “overlap” between symbols, ensures that the received signal is as clear as possible.

[0057] By generating a roll-off filter, the roll-off factor can be set to 1, and the signal is then processed through the roll-off filter to form a smooth transmission signal.

[0058] (4) Introducing sampling bias.

[0059] In actual communication systems, the clocks of the signal transmitter and the signal receiver are not always completely synchronized, and there may be a time error, called sampling deviation. This deviation will cause the signal receiver to fail to sample the symbol at the correct time, which will lead to symbol decision errors.

[0060] In this embodiment, such sampling deviation can be simulated by interpolation operation at the signal transmitting end. Specifically, a sampling frequency with offset is first generated, and the sampling frequency offset of this simulated clock offset is 0.1. Then, the original signal is resampled using the spline interpolation function to simulate the effect of such deviation on the signal. The waveform of the interpolated signal will be a singular waveform, indicating that the sampling deviation is caused by the asynchronous clock of the signal receiving end. This also proves the necessity of sampling clock synchronization from another perspective.

[0061] (5) Remove delay.

[0062] When the signal is processed by a filter (such as a roll-off filter) at the transmitter, the design of the filter will introduce a certain delay, which will affect the synchronization and processing of the signal. Therefore, the delay needs to be removed after filtering so that the signal is aligned with the original transmitted symbol. Especially for finite impulse response (FIR) filters, the signal will experience a certain delay. The length of the impulse response of the roll-off filter determines the amount of delay. When the signal is convolved, the front end of the signal will be affected by the impulse response. By sampling from the middle of the signal, the delay at the front end can be effectively removed and the signal can be aligned.

[0063] According to an embodiment of the present disclosure, the channel is configured as a Gaussian white noise channel; wherein the Gaussian white noise channel can add noise to the simulation signal for different signal-to-noise ratios.

[0064] The signal will inevitably be affected by noise during the channel transmission process. In this embodiment, the noise type is Gaussian white noise, which is a typical noise model used to simulate noise interference in an actual communication environment.

[0065] In this embodiment, noise can be added to the signal under different signal-to-noise ratios (SNR) during the channel simulation process. The signal-to-noise ratio (SNR) is an important performance indicator, which represents the ratio of signal strength to noise strength. The higher the signal-to-noise ratio, the less the signal is affected by noise and the lower the bit error rate. In this embodiment, different SNR values ​​can be simulated later.

[0066] According to an embodiment of the present disclosure, the signal receiving end may specifically include: a matched filter and a symbol timing recovery module.

[0067] The matched filter is used to filter the received distorted signal and suppress the noise and inter-symbol interference in the distorted signal.

[0068] The symbol timing recovery module is used to recover the received symbol timing point through the Gardner algorithm, ensuring that the distorted signal is sampled at the most appropriate time, thereby recovering the original bit data.

[0069] According to an embodiment of the present disclosure, the symbol timing recovery module may specifically include: a timing error detector, a loop filter, a piecewise polynomial interpolation module and a demodulator.

[0070] The timing error detector is used to detect the timing error of the sampling point according to the Gardner loop, and generate a feedback signal for adjusting the sampling moment to achieve symbol timing synchronization.

[0071] The loop filter is used to adjust the phase of the clock at the signal receiving end to gradually reduce the timing error.

[0072] The piecewise polynomial interpolation module is used to sample the correct symbol value from the continuous distorted signal to ensure symbol synchronization.

[0073] The demodulator is used to convert the analog signal back into a digital signal.

[0074] The decoder is used to decode the digital signal and restore the original bit data.

[0075] According to an embodiment of the present disclosure, the signal receiving end may further specifically include: an equalizer and a bit error rate calculation module.

[0076] Among them, the equalizer is used to compensate for the inter-symbol interference introduced by the channel and reduce the impact of the multipath effect.

[0077] The bit error rate calculation module is used to judge the signal according to the restored symbols after completing the symbol synchronization, and compare it with the original bit data to calculate the bit error rate.

[0078] Bit Error Rate (BER): It refers to the ratio of the number of erroneous bits received to the total number of bits compared with the originally sent bits. It is an important indicator for evaluating the performance of a communication system.

[0079] In a communication system, the signal receiving end must be synchronized with the signal transmitting end, especially the timing synchronization of symbols, that is, it is necessary to know the exact start and end time of each symbol. If the clocks are not synchronized, the signal receiving end may sample the signal at the wrong time, resulting in symbol judgment errors, which in turn increases the bit error rate.

[0080] In this embodiment, the workflow of the signal receiving end may be, for example, as follows:

[0081] (1) Filter the signal.

[0082] In this embodiment, after receiving the distorted signal, the signal receiving end processes the signal through a matched filter. The matched filter is a filter that matches the roll-off filter of the signal transmitting end, and its function is to maximize the signal-to-noise ratio of the received signal and suppress noise and inter-symbol interference in the signal.

[0083] (2) Symbol timing recovery.

[0084] In this embodiment, the filtered data enters the symbol timing recovery module, which gradually adjusts the sampling clock of the signal receiving end through feedback control to synchronize it with the symbol clock of the signal transmitting end. The core function of the Gardner loop at the signal receiving end is to adjust the symbol timing. Since the clock of the signal receiving end may not be synchronized with the signal transmitting end, it is necessary to continuously adjust the receiving time to ensure that the signal is sampled at the best time. The specific principle is shown in Figure 2 .

[0085] Figure 2 The principle block diagram of the symbol timing recovery module according to the embodiment of the present disclosure is schematically shown.

[0086] like Figure 2 As shown, after the filtered data enters the symbol timing recovery module, the specific workflow is as follows:

[0087] (21) Timing error estimation.

[0088] The Gardner loop calculates the timing error by observing the midpoint of the symbol and the difference between the previous and next symbols. The timing error is calculated as follows:

[0089] e(1,ms) = yI(1,k-1)*(yI(1,k)-yI(1,k-2));

[0090] Among them, e(1, ms) represents the timing error, yI represents the signal sampling point after interpolation, yI(1, k-1) represents the symbol midpoint sampling value, yI(1, k) and yI(1, k-2) represent the sampling values ​​before and after the symbol respectively.

[0091] If the current sampling point deviates from the correct position of the symbol, the calculated error value e(1,ms) can reflect this deviation.

[0092] (22) Error estimate adjustment.

[0093] To reduce the error, the loop filter is adjusted based on the calculated timing error. The loop filter acts like a feedback control system, which gradually reduces the timing error by continuously fine-tuning the phase of the signal receiving end clock until the system reaches synchronization.

[0094] (23) Piecewise polynomial interpolation processing.

[0095] In order to determine the position of the symbol more accurately, in this embodiment, piecewise polynomial interpolation is used, which is a technique for estimating symbol values ​​between discrete sampling points by interpolation. Specifically, a Farrow structure is used to implement this interpolation. The interpolation filter structure of the Farrow structure is specifically shown in Figure 3 .

[0096] Figure 3 The structure diagram of an interpolation filter with a Farrow structure according to an embodiment of the present disclosure is schematically shown.

[0097] like Figure 3 As shown in the figure, the Farrow structure is a filter design that implements fractional delays through polynomial interpolation. The core idea is to use polynomial approximation to estimate the value of the signal at different fractional moments and design the filter structure as multiple parallel polynomial term coefficients. The role of the interpolation filter is to increase the sampling rate of the signal by adding additional data points, thereby generating new data between the original data points.

[0098] In this embodiment, the piecewise polynomial interpolation process is to enable the signal receiving end to more accurately sample the correct symbol value from the continuous signal to ensure symbol synchronization.

[0099] (3) Bit error rate (BER) calculation.

[0100] When symbol synchronization is completed, the signal receiving end will judge the signal based on the recovered symbols to determine whether each symbol is 0 or 1. Then, by comparing it with the original transmitted bit stream, the bit error rate (BER) is calculated.

[0101] The bit error rate (BER) is calculated as:

[0102] Bit err ratio = number of erroneous bits / total number of bits

[0103] Bit err ratio refers to the bit error rate (BER). Under different signal-to-noise ratios, the system will calculate and record the bit error rate for subsequent performance analysis.

[0104] Since the goal of the system is to make two devices separated by kilometers output clock signals with completely synchronized frequency, phase, and time, and transmit data information at the same time, the focus of the system is to compensate for the phase noise and errors caused by atmospheric turbulence and Doppler frequency shift in the process of transmitting the time frequency and data information of station A to station B.

[0105] Based on this, in order to make the timing synchronization recovery system based on the Gardner algorithm of the embodiment of the present disclosure more perfect, the embodiment of the present disclosure also designs a highly autocorrelated pseudo code calculation sequence and algorithm digital frame format from the data level, see Figure 4 .

[0106] Figure 4 The block diagram schematically shows a pseudo-code calculation sequence and an algorithm digital frame format according to an embodiment of the present disclosure.

[0107] like Figure 4 As shown, the pseudo-code calculation sequence and algorithm digital frame format of the embodiment of the present disclosure, in terms of frame header data, the second-level time is used to record the year (2B), month (1B), day (1B), hour (1B), minute (1B), and second (1B). Nanosecond time is used to record the source clock that sends the data of this packet, which must be an integer multiple of 8 under the 125M clock, so 30 bits are enough. The packet number is used to check for occasional packet loss and can be recorded continuously for 0.16 seconds. The total delay is the nanosecond delay and phase delay of receiving the most recent data packet, a signed number, with an accuracy of 800 / 2^32ps and a range of 10s. The pulse position information represents the exact position of the next pulse, and the 20-bit effective digit is used to display the position of the next second pulse from the data of this packet. The pulse information after up to 10ms (i.e. 1000 packets) can be marked, and a small amount of packet loss during this period will not affect the pulse triggering. There is a 10-bit check at the end of the packet. If the check fails, the data of this packet is abandoned. In terms of coding design: the total amount of data before RS encoding is 10.4kbit, and 12.2kbit of data is output through 208-244 encoding. Adding the 256+24bit of the frame header, the total amount of 12.48kbit is sent in 10us, which is exactly 1.248Gbps.

[0108] The timing synchronization recovery system based on the Gardner algorithm provided in the embodiment of the present disclosure can capture and correct the noise and error caused by atmospheric turbulence and Doppler effect during the transmission process through the design of the frame header data format, thereby achieving time-frequency synchronization.

[0109] According to an embodiment of the present disclosure, a usage rule of a highly autocorrelated pseudocode calculation sequence Barker code is also provided, specifically, a 16-bit all-1 sequence and an 11-bit Barker code sequence are spread 40 times to obtain a total of 1080 bits for capture and frame synchronization. The coding has extremely strong autocorrelation and can be perfectly applied to algorithm logic.

[0110] In this embodiment, the system clock, phase and frequency information are integrated and sent with the data in the algorithm frame structure to achieve real-time synchronization of the two targets.

[0111] The timing synchronization recovery system based on the Gardner algorithm provided by the embodiment of the present disclosure adopts a highly autocorrelated pseudocode calculation sequence (such as Barker code) for signal capture and frame synchronization, ensuring efficient and accurate data transmission.

[0112] Figure 5 A comparison diagram of the simulated bit error rate and the theoretical value of the timing synchronization recovery system based on the Gardner algorithm at a 4-fold sampling rate according to an embodiment of the present disclosure is schematically shown.

[0113] like Figure 5 As shown, the simulated bit error rate of the timing synchronization recovery system based on the Gardner algorithm of the embodiment of the present disclosure is compared with the theoretical value at a 4 times sampling rate. The figure shows the performance of the system under different signal-to-noise ratios.

[0114] Through this system, we can verify the symbol synchronization capability of the Gardner loop when dealing with sampling deviation and noise. Under high signal-to-noise ratio, the system can achieve a low bit error rate; but as the signal-to-noise ratio decreases and the noise interference increases, the bit error rate will increase significantly. This provides theoretical and simulation support for the design of actual communication systems.

[0115] The flowcharts and block diagrams in the accompanying drawings illustrate the possible implementation architecture, functions and operations of the systems, methods and computer program products according to various embodiments of the present disclosure. In this regard, each box in the flowchart or block diagram may represent a module, a program segment, or a part of a code, and the above-mentioned module, program segment, or a part of the code contains one or more executable instructions for implementing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the box may also occur in an order different from that marked in the accompanying drawings. For example, two boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram or flowchart, and the combination of boxes in the block diagram or flowchart, can be implemented with a dedicated hardware-based system that performs a specified function or operation, or can be implemented with a combination of dedicated hardware and computer instructions. It can be understood by those skilled in the art that the features recorded in the various embodiments of the present disclosure can be combined and / or combined in a variety of ways, even if such a combination or combination is not explicitly recorded in the present disclosure. In particular, without departing from the spirit and teaching of the present disclosure, the features described in the various embodiments of the present disclosure may be combined and / or combined in a variety of ways. All of these combinations and / or combinations fall within the scope of the present disclosure.

[0116] The embodiments of the present disclosure are described above. However, these embodiments are only for illustrative purposes and are not intended to limit the scope of the present disclosure. Although the embodiments are described above, this does not mean that the measures in the various embodiments cannot be used in combination to advantage. Without departing from the scope of the present disclosure, those skilled in the art may make a variety of substitutions and modifications, which should all fall within the scope of the present disclosure.

Claims

1. A timing synchronization recovery system based on Gardner algorithm, characterized in that: The system comprises: A signal transmitting end, used for generating a random binary signal and modulating the binary signal into a simulation signal suitable for transmission, wherein the simulation signal is used for simulating the bit data to be transmitted; A channel is used to transmit the simulated signal, and introduce noise during the transmission process to simulate interference on the simulated signal to obtain a distorted signal; A signal receiving end, used for receiving the distorted signal, and performing timing synchronization and interpolation processing on the symbols of the distorted signal using a Gardner loop, correcting the sampling deviation introduced by the channel, and recovering the original bit data from the distorted signal; The Gardner loop is configured to use the Gardner algorithm to adjust the phase of the signal receiving end clock to ensure that the received symbol time can be accurately aligned with the transmitted symbol time.

2. The timing synchronization recovery system based on the Gardner algorithm according to claim 1, characterized in that: The signal sending end comprises: A signal source, used for generating a random binary signal and converting the binary signal into a bipolar signal; An encoder, used for encoding the bipolar signal; A modulator, used to convert the coded bipolar signal into an analog signal suitable for transmission; The symbol timing module is used to time the transmission time of each symbol during the modulation process and control the time interval for transmitting each symbol.

3. The timing synchronization recovery system based on the Gardner algorithm according to claim 2, characterized in that: The signal transmitting end further includes: The sampling deviation module is used to simulate the clock asynchronism between the signal sending end and the signal receiving end by introducing sampling deviation, so as to evaluate the influence on the signal quality.

4. The timing synchronization recovery system based on the Gardner algorithm according to claim 2, characterized in that: The signal transmitting end further includes: The delay removal module is used to remove the delay caused by the signal modulation process so that the modulated signal is aligned with the symbol during the original transmission.

5. The timing synchronization recovery system based on the Gardner algorithm according to claim 1, characterized in that: The channel is configured as a Gaussian white noise channel; The Gaussian white noise channel can add noise to the simulation signal according to different signal-to-noise ratios.

6. The timing synchronization recovery system based on the Gardner algorithm according to claim 1, characterized in that: The signal receiving end comprises: A matched filter, used to filter the received distorted signal and suppress noise and inter-symbol interference in the distorted signal; The symbol timing recovery module is used to recover the received symbol timing point through the Gardner algorithm to ensure that the distorted signal is sampled at the most appropriate time, thereby recovering the original bit data.

7. The timing synchronization recovery system based on the Gardner algorithm according to claim 6, characterized in that: The symbol timing recovery module comprises: A timing error detector, configured to generate a feedback signal for adjusting the sampling time according to the timing error of the sampling point detected by the Gardner loop, so as to achieve synchronization of symbol timing; A loop filter, used for adjusting the phase of the signal receiving end clock to gradually reduce the timing error; A piecewise polynomial interpolation module is used to sample the correct symbol value from the continuous distorted signal to ensure symbol synchronization; A demodulator, used for converting the simulated signal back into a digital signal; The decoder is used to decode the digital signal and restore the original bit data.

8. The timing synchronization recovery system based on the Gardner algorithm according to claim 7, characterized in that: The timing error is calculated as follows: e(1,ms) = yI(1,k-1)*(yI(1,k)-yI(1,k-2)); Where e(1, ms) represents the timing error, yI represents the signal sampling point after interpolation, yI(1, k-1) represents the symbol midpoint sampling value, yI(1, k) and yI(1, k-2) represent the sampling values ​​before and after the symbol respectively.

9. The timing synchronization recovery system based on the Gardner algorithm according to claim 6, characterized in that: The signal receiving end also includes: The equalizer is used to compensate for the inter-symbol interference introduced by the channel and reduce the influence of the multipath effect.

10. The timing synchronization recovery system based on the Gardner algorithm according to claim 6, characterized in that: The signal receiving end also includes: The bit error rate calculation module is used to judge the signal according to the restored symbols after completing the symbol synchronization, and compare it with the original bit data to calculate the bit error rate.

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