Data transmission system, method, device, medium and product

Abstract

The invention discloses a data transmission system, method and device, a medium and a product. The system comprises a clock module, a data processing module, a composer module and a scheduler module. The clock module updates a global clock variable according to a configuration period, generates a scheduling semaphore and sends the scheduling semaphore to the scheduler module; the data processing module receives a data packet of a data sending end, divides the data packet into a user plane data packet and a control plane data packet, and sends the user plane data packet to the composer module, and the control plane data packet comprises a preset target time delay; the orchestrator module determines a target cache queue according to a preset target time delay, a scheduling interval, a preset total number of queues, a timestamp of the user plane data packet and a global clock variable, and stores the target cache queue in the target cache queue; and the scheduler module responds to the received scheduling semaphore and sends the to-be-sent data packets in the cache queues according to the storage sequence. The time delay shaping of the data packet is realized through the receiving residence and accurate sending of the data packet.

Description

Technical Field

[0001] The present invention relates to the field of communication technologies, and in particular to a data transmission system, method, device, medium and product. Background Art

[0002] The integration of 5G and Time-Sensitive Networking (TSN) has become the key to realizing the wireless upgrade and transformation of the Industrial Internet in the future.

[0003] To support the integration of 5G and TSN, the 3rd Generation Partnership Project (3GPP) added the time-sensitive communication (TSC) function to the R16 standard, in which the 5G system is integrated into TSN as a virtual bridge of TSN. In order to achieve the interconnection and interoperability between the 5G system and TSN on the user plane, a terminal-side TSN translator (Device-side TSN translator, DS-TT) is added to the user equipment side, and a network-side TSN translator (Network-side TSN translator, NW-TT) is added to the user plane function side. NW-TT and DS-TT are mainly responsible for the conversion of data formats and communication protocols between TSN and 5G systems, ensuring that the two systems can communicate and exchange data smoothly. The integration of 5G and TSN can also be achieved through the TSN Translator method.

[0004] However, how to achieve the deep integration of 5G and TSN is still in its infancy. As a key link in the integration of 5G and TSN, it is still unclear how to use TSN Translator to receive and accurately send data streams. Summary of the invention

[0005] The present invention provides a data transmission system, method, device, medium and product to achieve the reception and accurate transmission of TSN data.

[0006] According to a first aspect of the present invention, there is provided a data transmission system, the system comprising: a clock module, a data processing module, an arranger module and a scheduler module;

[0007] The clock module is used to update the global clock variable corresponding to the time according to the configuration period, and generate a scheduling semaphore and send it to the scheduler module, so that other modules can obtain time information by reading the global clock variable;

[0008] The data processing module is used to receive data packets from the data sending end, divide the data packets into user plane data packets and control plane data packets, and send the user plane data packets to the orchestrator module, wherein the control plane data packets include a preset target delay;

[0009] The scheduler module is used to determine the target cache queue to which the user plane data packet belongs according to the preset target delay and scheduling interval, the preset total number of queues, the data packet timestamp of the user plane data packet and the global clock variable, and store the user plane data packet in the target cache queue;

[0010] The scheduler module is used to send the to-be-sent data packets in each cache queue in the order in which they are stored in response to the received scheduling signal.

[0011] According to a second aspect of the present invention, there is provided a data transmission method, comprising:

[0012] The clock module updates the global clock variable corresponding to the time according to the configuration period, and generates a scheduling semaphore and sends it to the scheduler module, so that other modules can obtain time information by reading the global clock variable;

[0013] Receive data packets from the data sending end through the data processing module, divide the data packets into user plane data packets and control plane data packets, send the user plane data packets to the orchestrator module, and the control plane data packets include a preset target delay;

[0014] Determine, by the scheduler module, the target cache queue to which the user plane data packet belongs according to the preset target delay and scheduling interval, the preset total number of queues, the data packet timestamp of the user plane data packet and the global clock variable, and store the user plane data packet in the target cache queue;

[0015] In response to receiving the scheduling signal, the to-be-sent data packets in each cache queue are sent in the order in which they are stored, through the scheduler module.

[0016] According to a third aspect of the present invention, there is provided an electronic device, the electronic device comprising:

[0017] at least one processor; and

[0018] a memory communicatively connected to the at least one processor; wherein,

[0019] The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute the data transmission method described in any embodiment of the present invention.

[0020] According to another aspect of the present invention, a computer-readable storage medium is provided, wherein the computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the data transmission method described in any embodiment of the present invention when executed.

[0021] According to another aspect of the present invention, an embodiment of the present invention further provides a computer program product, the computer program product includes a computer program, and when the computer program is executed by a processor, the data transmission method of any embodiment of the present invention is implemented.

[0022] The technical solution of the embodiment of the present invention, the system includes: a clock module, a data processing module, an orchestrator module and a scheduler module; the clock module is used to update the global clock variable corresponding to the time according to the configuration cycle, and generate a scheduling signal and send it to the scheduler module, so that other modules can obtain time information by reading the global clock variable; the data processing module is used to receive the data packet of the data sending end, and divide the data packet into a user plane data packet and a control plane data packet, and send the user plane data packet to the orchestrator module, and the control plane data packet includes a preset target delay; the orchestrator module is used to determine the target cache queue to which the user plane data packet belongs according to the preset target delay and the scheduling interval, the preset total number of queues, the data packet timestamp of the user plane data packet and the global clock variable, and store the user plane data packet in the target cache queue; the scheduler module is used to send the data packets to be sent in each cache queue in the storage order in response to receiving the scheduling signal. Smaller delay jitter is achieved through the high-precision clock module, and the user plane data packets are sorted and stored based on the preset target delay through the orchestrator module to form a target cache queue, which is sent in sequence through the scheduler module. It realizes the shaping of data packet delay, ensures that the delay of data stream is maintained at the preset target delay, and realizes the reception and accurate sending of data stream.

[0023] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0025] Figure 1 is a structural block diagram of a data transmission system provided according to Embodiment 1 of the present invention;

[0026] Figure 2 is another structural block diagram of a data transmission system provided according to the first embodiment of the present invention;

[0027] Figure 3 A schematic diagram of a cache queue in a data transmission system is provided according to a first embodiment of the present invention;

[0028] Figure 4 is a flowchart of a data transmission method provided according to Embodiment 1 of the present invention;

[0029] Figure 5 It is a schematic diagram of the structure of an electronic device implementing an embodiment of the present invention. DETAILED DESCRIPTION

[0030] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0031] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0032] Embodiment 1

[0033] Figure 1 A structural block diagram of a data transmission system is provided for the first embodiment of the present invention. This embodiment is applicable to the transmission of TSN service data streams. The system can be set on the device side or on the core network side, for example, in the form of a TSN Translator converter network element.

[0034] like Figure 1 As shown, the system includes: a clock module, a data processing module, an arranger module and a scheduler module.

[0035] A clock module is used to update the global clock variable corresponding to the time according to the configuration period, so that other modules can obtain time information by reading the global clock variable, generate a scheduling semaphore and send it to the scheduler module; a data processing module is used to receive data packets from the data sending end, divide the data packets into user-plane data packets and control-plane data packets, and send the user-plane data packets to the orchestrator module, wherein the control-plane data packets include a preset target delay; the orchestrator module is used to determine the target cache queue to which the user-plane data packet belongs according to the preset target delay, the scheduling interval, the preset total number of queues, the data packet timestamp of the user-plane data packet and the global clock variable, and store the user-plane data packet in the target cache queue; the scheduler module is used to send the data packets to be sent in each cache queue in the storage order in response to receiving the scheduling semaphore.

[0036] In this embodiment, the time synchronization process is completed between the electronic device and the server that marks the data packet timestamp using GPS, IEEE1588 or other time synchronization protocols based on IEEE802.11as.

[0037] In this embodiment, the configuration cycle can be understood as a pre-set cycle for the operation of other modules, for example, which may include the scheduling interval of the scheduler module. The scheduling semaphore can be understood as the semaphore used to trigger the scheduler module to perform event processing. The global clock variable can be understood as the clock variable used to synchronize various modules. The data sending end can be understood as one end that sends data packets in the TSN network. Other modules can be understood as all modules except the clock module. The user plane data packet can be understood as a data packet processed and routed by the user plane function (UPF) in the 5G core network. The control plane data packet can be understood as a data packet that transmits control information to manage network devices and sessions, which may include parameters such as preset target delay, delay jitter and timeout rate, where the timeout rate is the proportion of user plane data packets whose reception delay is greater than the target delay when arriving at the system to all user plane data packets. The preset target delay can be understood as the time expected for the user plane data packet to experience from the generation to the leaving of the data transmission system network element.

[0038] In this embodiment, the target cache queue can be understood as a queue for caching user-plane data packets. The cache queue can be understood as a cache queue under each processing interval of the scheduler module. The number and capacity of the queue are configured according to actual requirements such as traffic and / or target delay. For example, the larger the target delay, the longer the data needs to be cached, and the larger the number, the larger the capacity, to ensure that a sufficient number of user-plane data packets to be shaped can be stored. The data packets to be sent can be understood as the user-plane data packets waiting to be sent in the queue. The storage order can be understood as the arrangement order in the cache queue.

[0039] Specifically, the clock module can generate a basic clock signal with equal intervals according to the configuration cycle and establish a corresponding relationship between the clock signal and the system time. The configuration cycle includes a clock interval, a scheduling cycle, a statistical cycle, a control cycle, etc., which are used for different modules, wherein the clock interval is used to generate a basic clock signal, the clock interval is the smallest time unit in the present invention, and the other cycles are integer multiples of the clock interval. The scheduling cycle is the scheduling interval, which is used to generate a scheduling semaphore, the statistical cycle is used to generate a statistical semaphore, and the control cycle is used to generate a control semaphore. The clock module generates semaphores according to different configuration cycles and sends the semaphores to the corresponding modules to trigger event processing of other modules, such as the clock module can generate a scheduling semaphore according to the configured scheduling interval, and send the scheduling semaphore to the scheduler module to drive the scheduler module to send user-side data packets. The clock module also maintains and updates the global clock variable corresponding to the time according to the clock interval, such as by adding one to the global clock variable when each clock interval is reached, and the global time information can be obtained in combination with the clock interval. The data processing module can receive data packets sent by the data transmitter from the TSN network, divide the data packets into user-plane data packets and control-plane data packets from the packet header field, and send the user-plane data packets to the scheduler module. The scheduler module can determine the target cache queue to which the user-plane data packet belongs by preset target delay, scheduling interval, preset total number of queues, data packet timestamp in the user-plane data packet and global clock variable, and store the user-plane data packet in the target cache queue in the order of timestamp. When the scheduler module receives the scheduling semaphore, in response to the scheduling semaphore, reads the global clock variable, uses the modulus of the queue length combined with the global clock variable to determine the cache queue for this transmission, and sends all the data packets to be sent in the cache queue in the order of storage.

[0040] The technical solution of the embodiment of the present invention, the system includes: a clock module, a data processing module, an orchestrator module and a scheduler module; the clock module is used to update the global clock variable corresponding to the time according to the configuration period, and generate a scheduling signal and send it to the scheduler module, so that other modules can obtain time information by reading the global clock variable; the data processing module is used to receive the data packet of the data sending end, and divide the data packet into a user plane data packet and a control plane data packet, and send the user plane data packet to the orchestrator module, and the control plane data packet includes a preset target delay; the orchestrator module is used to determine the target cache queue to which the user plane data packet belongs according to the preset target delay, the scheduling interval, the preset total number of queues, the data packet timestamp of the user plane data packet and the global clock variable, and store the user plane data packet in the target cache queue; the scheduler module is used to send the data packets to be sent in each cache queue in the storage order in response to receiving the scheduling signal. Smaller delay jitter is achieved through the high-precision clock module, and the user plane data packets are sorted and stored based on the preset target delay through the orchestrator module to form a target cache queue, which is sent in sequence through the scheduler module. It realizes the shaping of data packet delay, ensures that the delay of data stream is maintained at the preset target delay, and realizes the reception and accurate sending of data stream.

[0041] Furthermore, the orchestrator module includes:

[0042] A data packet decoding unit is used to decode the user-side data packet to obtain a data packet timestamp; an index determination unit is used to determine the target cache queue to which the user-side data packet belongs based on the data packet timestamp, a preset target delay, a scheduling interval, a preset total number of queues and a global clock variable; a data packet storage unit is used to store the user-side data packet in the target cache queue based on the data packet timestamp.

[0043] In this embodiment, the data packet timestamp can be understood as the timestamp corresponding to the sending time of the data packet sent by the data sending end. The target queue index can be understood as a target cache queue for determining the storage of the user plane data packet in an indexed manner.

[0044] Specifically, the data packet decoding unit can decode the user-plane data packet to obtain the timestamp of the data packet carried. The index determination unit can determine the expected sending time of the user-plane data packet by adding the preset target delay to the timestamp of the data packet, and quantize the time difference between the expected sending time and the current time according to the time interval of the discrete scheduler module, and calculate the target queue index corresponding to the expected sending time according to the quantized value and the global clock variable. The data packet storage unit can store the user-plane data packet in the target cache queue corresponding to the target queue index, and the user-plane data packets in the same cache queue are arranged from small to large according to the timestamp carried by the data packet.

[0045] The index determination unit is specifically used for:

[0046] Determine the current time based on the global clock variable; determine the length of time the user-side data packet stays in the cache queue based on the current time, data packet timestamp and preset target delay; determine the target queue index to which the user-side data packet belongs based on the length of stay, scheduling interval and total number of preset queues.

[0047] In this embodiment, the current time can be understood as the time when the index is determined. The scheduling interval can be understood as the time interval for the scheduler module to send. The residence time can be understood as the length of time that the user plane data packet stays in the cache queue from the current time to the expected sending time.

[0048] Specifically, the index determination unit can determine the current time through the global clock variable, the data packet timestamp plus the preset target delay, determine the expected sending time of the user-side data packet, and quantize the time difference between the expected sending time and the current time according to the scheduling interval, and calculate the target queue index corresponding to the expected sending time based on the quantized value and the global clock variable.

[0049] For example, the dwell time d can be determined by the following formula: tick :

[0050]

[0051] Among them, the global clock variable is g tick , the stay time is d tick , the current time is recorded as t0, and the packet timestamp is t s , the target delay is T d , the scheduling interval is T c , the time unit is ns.

[0052] Then, according to the dwell time and the total number of cache queues N, the target queue index w can be determined by the following formula: index :

[0053] w index =(g tick +d tick )%N

[0054] Furthermore, the orchestrator module is also used to:

[0055] When the sum of the data packet timestamp and the preset target delay is less than the current time, the user plane data packet is directly sent out.

[0056] Specifically, when the sum of the packet timestamp and the preset target delay is less than the current time (i.e., t s +T dWhen t < 0), the data packet has timed out when it reaches the data processing module, and the user plane data packet is directly sent out without participating in the orchestration process.

[0057] Furthermore, the scheduler module is specifically configured to:

[0058] In response to receiving a scheduling semaphore, read the global clock variable; determine the index of the queue to be sent according to the global clock variable and the preset total number of queues; determine the buffer queue to be sent corresponding to the index of the queue to be sent, and send the data packets to be sent in the buffer queue to be sent in the storage order.

[0059] In this embodiment, the index of the queue to be sent can be understood as the index value corresponding to the buffer queue to be sent. The buffer queue to be sent can be understood as the buffer queue that the scheduler module wakes up to send this time.

[0060] Specifically, after receiving the scheduling semaphore from the clock module, the scheduler module wakes up and sends, reads the global clock information, maps the global clock information to the index of the queue to be sent by taking the modulo of the queue length, takes the buffer queue corresponding to the index of the queue to be sent as the buffer queue to be sent, and sends the data packets in the buffer queue to be sent out through the network interface in the order of storage order.

[0061] Exemplarily, the index r of the queue to be sent can be determined by the following formula index :

[0062] r index = g tick % N

[0063] Optionally, the system further includes: a statistics module;

[0064] The statistics module is used to determine the packet reception time information of the data packets received by the data processing module, and determine the packet transmission time information of the user plane data packets sent by the scheduler module; the clock module generates a statistics semaphore for the statistics module according to the configured period, and sends the statistics semaphore to the statistics module; in response to receiving the statistics semaphore, determine the delay statistics information within the statistics period according to the packet transmission time information and the packet reception time information.

[0065] In this embodiment, the packet receiving time information can be understood as the time information when the data processing module receives the data packet, for example, it can include the time when the data packet is received, the timestamp of the data packet, and the packet length. The packet sending time information can be understood as the time information when the scheduler module sends the data packet, for example, it can include the time when the data packet is sent, the timestamp of the corresponding data packet, and the packet length. The receiving delay can be understood as the time when the data packet is generated and enters the data transmission system. The sending delay can be understood as the time when the data packet is generated and leaves the data transmission system. The statistical cycle can be understood as the interval between two triggering statistical modules to perform statistical operations. The delay statistical information can be understood as information used to evaluate the delay adjustment effect, for example, it can include statistical information such as the maximum value, minimum value, average value, range and variance of the receiving delay and the sending delay.

[0066] Specifically, the clock module can generate a statistical signal according to the configured statistical cycle to drive the statistical module to process. When the statistical module receives the statistical signal, the statistical module can determine the packet receiving time information of all data packets received by the data processing module between two statistical cycles (when the data processing module receives the data packet, the packet receiving time information of the received data packet can be determined and sent to the statistical module), and determine the packet sending time information of all user-side data packets sent by the scheduler module (when the scheduler module sends the data packet, the packet sending time information of the sent data packet can be determined and sent to the statistical module). According to the packet sending time information and the packet receiving time information, the delay statistical information is determined by a corresponding calculation method. For example, the receiving delay can be determined by the current timestamp when the data packet is sent and the timestamp of the corresponding data packet, and the sending delay can be determined by the current timestamp when the data packet is received and the timestamp of the corresponding data packet, and the maximum value, minimum value, average difference, range and variance of the sending delay in all the data packets counted this time, and the maximum value, minimum value, average difference, range and variance of the receiving delay are found together as the delay statistical information.

[0067] Optionally, the system further includes: a control module, the control module being used to obtain a control plane data packet from the data processing module, and adjust a preset target delay and delay jitter in the control plane data packet according to delay statistical information.

[0068] In this embodiment, the delay jitter can be understood as the fluctuation range of the delay when the data packet leaves the data transmission system.

[0069] Specifically, the clock module can also generate a control signal according to the control cycle to drive the control module to process the control plane data packet. In response to the control signal, the control module can obtain the control plane data packet sent by the data processing module, and use the delay statistical information to determine the change trend of the preset target delay in the current control plane data packet to predict the change trend of the timeout rate, and then determine whether the preset target delay and delay jitter are reasonable. For example, a threshold can be set for comparison to determine whether it is reasonable. The larger the preset target delay, the lower the timeout rate; the smaller the preset target delay, the higher the timeout rate, and then the preset target delay and delay jitter can be adjusted according to the set adjustment threshold and other methods.

[0070] The technical solution of the embodiment of the present invention determines the residence time of the user-side data packet in the cache queue according to the data packet timestamp, current time and preset target delay of the user-side data packet through the scheduler module, and determines the target queue index to which the user-side data packet belongs through the residence time, scheduling interval, preset total number of queues and global clock variable, and stores it in the target cache queue corresponding to the target queue index. The scheduler module responds to the scheduling signal and determines the queue index to be sent based on the global clock variable and the preset total number of queues, and sends the data packets to be sent therein in the storage order to ensure that the data packets can be sent according to the preset target delay. The data packet delay shaping is realized to keep the delay of the data stream at the target delay, and a smaller delay jitter is achieved through the high-precision clock module. The statistical module determines the delay statistical information according to the packet sending time information and the packet receiving time information, and uses the delay statistical information as the basis for evaluating the delay adjustment effect, which provides a basis for the subsequent delay adjustment. The preset target delay and delay jitter in the control data packet are adjusted by the control module in combination with statistical information, thereby realizing dynamic update of the preset target delay and delay jitter, and providing support for ensuring that the delay of the data stream is maintained at the preset target delay.

[0071] Figure 2 Another structural block diagram of a data transmission system is provided for the first embodiment of the present invention. Figure 2 As shown, the system includes: a clock module 11, a data processing module 12, an arranger module 13, a scheduler module 14, a statistics module 15 and a control module 16.

[0072] The clock module generates a control signal according to the control cycle and sends it to the control module 16; generates a statistical signal according to the configured statistical cycle and sends it to the statistical module 15; generates a scheduling signal according to the configured scheduling cycle and sends it to the scheduler module 14. The data processing module 12 receives the data packet from the data sending end. When receiving the data packet, it determines the packet receiving time information and sends it to the statistical module 15, divides the data packet into user-plane data packets and sends it to the scheduler module 13, and divides it into control-plane data packets and sends it to the control module 16. The scheduler module 13 determines the target cache queue to which the user-plane data packet belongs according to the preset target delay, scheduling interval, preset total number of queues, data packet timestamp of the user-plane data packet and the global clock variable, and stores the user-plane data packet in the target cache queue in the order of timestamps, and sends the cache queue to the scheduler module 14. In response to the scheduling signal, the scheduler module 14 determines the queue index to be sent based on the global clock variable and the preset total number of queues, sends the queue index to be sent in sequence, and generates the packet sending time information of each data packet after sending the data packet and sends it to the statistical module 15. The statistical module 15 responds to the statistical signal amount, determines the statistical time information according to the packet sending time information and the packet receiving time information, and sends the statistical time information to the control module 16. The control module 16 responds to the control signal amount, determines whether the target delay and timeout rate are reasonable according to the control plane data packet and the statistical delay information.

[0073] In order to better understand the cache queue in the present invention, a specific example is used for demonstration, and the symbols in the above example are used. Figure 3 A schematic diagram of a cache queue in a data transmission system is provided for the first embodiment of the present invention. Figure 3 As shown, there are N cache queues, the index of the first cache queue is N-1, and its corresponding time range is: t0-T c to t0; the index of the second cache queue is 0, and its corresponding time range is t0 to t0+T c ; The index of the third cache queue is 1, and its corresponding time range is t0+T c to t0+2*T c The time range of the cache queue is based on the scheduler's scheduling interval T c By superimposing, and so on, we get N cache queues. Each square represents a data packet. By s +T d , determine the target queue index to which the data packet belongs, and put it into the target cache queue corresponding to the target queue index in the order of timestamp. The scheduler module then sends the data packets in each cache queue in sequence.

[0074] Embodiment 2

[0075] Figure 4 A flowchart of a data transmission method is provided for the first embodiment of the present invention. This embodiment is applicable to the transmission of TSN service data streams. The method can be executed by a data transmission system. The data transmission system can be implemented in the form of hardware and / or software. The data transmission system can be configured in an electronic device. Figure 4 As shown, the method includes:

[0076] S410. Update the global clock variable corresponding to the time according to the configuration period through the clock module, so that other modules can obtain time information by reading the global clock variable, generate a scheduling semaphore and send it to the scheduler module.

[0077] S420. Receive data packets from the data sending end through the data processing module, divide the data packets into user plane data packets and control plane data packets, and send the user plane data packets to the orchestrator module.

[0078] S430. Determine the target cache queue to which the user plane data packet belongs according to the preset target delay, the scheduling interval, the preset total number of queues, the data packet timestamp of the user plane data packet and the global clock variable through the orchestrator module, and store the user plane data packet in the target cache queue.

[0079] S440 , in response to receiving the scheduling signal, the scheduler module sends the to-be-sent data packets in each cache queue in the order in which they are stored.

[0080] The technical solution of the embodiment of the present invention is to update the global clock variable corresponding to the time according to the configuration cycle through the clock module, and generate the scheduling signal and send it to the scheduler module, so that other modules can obtain time information by reading the global clock variable. The data packet of the data sending end is received by the data processing module, and the data packet is divided into a user plane data packet and a control plane data packet, and the user plane data packet is sent to the orchestrator module. The target cache queue to which the user plane data packet belongs is determined by the orchestrator module according to the preset target delay, the scheduling interval, the preset total number of queues, the data packet timestamp of the user plane data packet and the global clock variable, and the user plane data packet is stored in the target cache queue. The scheduler module responds to the receipt of the scheduling signal and sends the data packets to be sent in each cache queue in the storage order. Smaller delay jitter is achieved by the high-precision clock module, and the user plane data packets are sorted and stored by the orchestrator module based on the preset target delay to form a target cache queue, which is sent in sequence by the scheduler module. The shaping of the data packet delay is realized, ensuring that the delay of the data stream is maintained at the preset target delay, and the reception and accurate sending of the data stream are realized.

[0081] Embodiment 4

[0082] Figure 5 A schematic diagram of an electronic device 50 that can be used to implement an embodiment of the present invention is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices (such as helmets, glasses, watches, etc.) and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the present invention described and / or required herein.

[0083] like Figure 5 As shown, the electronic device 50 includes at least one processor 51, and a memory connected to the at least one processor 51 in communication, such as a read-only memory (ROM) 52, a random access memory (RAM) 53, etc., wherein the memory stores a computer program that can be executed by at least one processor, and the processor 51 can perform various appropriate actions and processes according to the computer program stored in the read-only memory (ROM) 52 or the computer program loaded from the storage unit 58 to the random access memory (RAM) 53. In the RAM 53, various programs and data required for the operation of the electronic device 50 can also be stored. The processor 51, the ROM 52, and the RAM 53 are connected to each other via a bus 54. An input / output (I / O) interface 55 is also connected to the bus 54.

[0084] A number of components in the electronic device 50 are connected to the I / O interface 55, including: an input unit 56, such as a keyboard, a mouse, etc.; an output unit 57, such as various types of displays, speakers, etc.; a storage unit 58, such as a disk, an optical disk, etc.; and a communication unit 59, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 59 allows the electronic device 50 to exchange information / data with other devices through a computer network such as the Internet and / or various telecommunication networks.

[0085] The processor 51 may be a variety of general and / or special processing components with processing and computing capabilities. Some examples of the processor 51 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various dedicated artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, a digital signal processor (DSP), and any appropriate processor, controller, microcontroller, etc. The processor 51 performs the various methods and processes described above, such as a data transmission method.

[0086] In some embodiments, the data transmission method may be implemented as a computer program, which is tangibly contained in a computer-readable storage medium, such as a storage unit 58. In some embodiments, part or all of the computer program may be loaded and / or installed on the electronic device 50 via the ROM 52 and / or the communication unit 59. When the computer program is loaded into the RAM 53 and executed by the processor 51, one or more steps of the data transmission method described above may be performed. Alternatively, in other embodiments, the processor 51 may be configured to perform the data transmission method in any other suitable manner (e.g., by means of firmware).

[0087] Various implementations of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), systems on chips (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various implementations can include: being implemented in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which can be a special purpose or general purpose programmable processor that can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.

[0088] Computer programs for implementing the methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, so that when the computer program is executed by the processor, the functions / operations specified in the flow chart and / or block diagram are implemented. The computer program may be executed entirely on the machine, partially on the machine, partially on the machine and partially on a remote machine as a stand-alone software package, or entirely on a remote machine or server.

[0089] In the context of the present invention, a computer-readable storage medium may be a tangible medium that may contain or store a computer program for use by or in combination with an instruction execution system, device or equipment. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices or equipment, or any suitable combination of the foregoing. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. A more specific example of a machine-readable storage medium may include an electrical connection based on one or more lines, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0090] To provide interaction with a user, the systems and techniques described herein may be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and a pointing device (e.g., a mouse or trackball) through which the user can provide input to the electronic device. Other types of devices may also be used to provide interaction with the user; for example, the feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form (including acoustic input, voice input, or tactile input).

[0091] The systems and techniques described herein may be implemented in a computing system that includes backend components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes frontend components (e.g., a user computer with a graphical user interface or a web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such backend components, middleware components, or frontend components. The components of the system may be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: a local area network (LAN), a wide area network (WAN), a blockchain network, and the Internet.

[0092] A computing system may include a client and a server. The client and the server are generally remote from each other and usually interact through a communication network. The client and server relationship is generated by computer programs running on the corresponding computers and having a client-server relationship with each other. The server may be a cloud server, also known as a cloud computing server or cloud host, which is a host product in the cloud computing service system to solve the defects of difficult management and weak business scalability in traditional physical hosts and VPS services.

[0093] In one embodiment, the present invention further includes a computer program product. The computer program product includes a computer program. When the computer program is executed by a processor, the data transmission method of any embodiment of the present invention is implemented.

[0094] In the process of implementation, the computer program product can be written in one or more programming languages ​​or a combination thereof to perform the computer program code of the present invention, including object-oriented programming languages, such as Java, Smalltalk, C++, and conventional procedural programming languages, such as "C" language or similar programming languages. The program code can be executed entirely on the user's computer, partially on the user's computer, as a separate software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the case of a remote computer, the remote computer can be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or can be connected to an external computer (for example, using an Internet service provider to connect through the Internet).

[0095] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps described in the present invention can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solution of the present invention can be achieved, and this document does not limit this.

[0096] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A data transmission system, characterized in that: The system includes: a clock module, a data processing module, an arranger module and a scheduler module; The clock module is used to update the global clock variable corresponding to the time according to the configuration period, so that other modules can obtain time information by reading the global clock variable, generate a scheduling semaphore and send it to the scheduler module; The data processing module is used to receive data packets from the data sending end, divide the data packets into user plane data packets and control plane data packets, and send the user plane data packets to the orchestrator module, wherein the control plane data packets include a preset target delay; The scheduler module is used to determine the target cache queue to which the user plane data packet belongs according to the preset target delay and scheduling interval, the preset total number of queues, the data packet timestamp of the user plane data packet and the global clock variable, and store the user plane data packet in the target cache queue; The scheduler module is used to send the to-be-sent data packets in each cache queue in a storage order in response to receiving the scheduling signal.

2. The system according to claim 1, characterized in that The orchestrator module includes: A data packet decoding unit, used to decode the user plane data packet to obtain a data packet timestamp; An index determination unit, configured to determine a target cache queue to which the user plane data packet belongs according to the data packet timestamp, the preset target delay, the scheduling interval, the preset total number of queues and the global clock variable; The data packet storage unit is used to store the user plane data packet in the target cache queue based on the data packet timestamp.

3. The system according to claim 2, characterized in that The index determination unit includes: Determine the current time according to the global clock variable; Determining a stay time of the user plane data packet in the cache queue according to the current time, the data packet timestamp and a preset target delay; The target queue index to which the user plane data packet belongs is determined according to the dwell time, the scheduling interval and the total number of preset queues.

4. The system according to claim 2, characterized in that The orchestrator module is also used to: When the sum of the data packet timestamp and the preset target delay is less than the current time, the user plane data packet is directly sent out.

5. The system according to claim 1, characterized in that The scheduler module comprises: In response to receiving the scheduling semaphore, reading the global clock variable; Determine the queue index to be sent according to the global clock variable and the total number of preset queues; A to-be-sent buffer queue corresponding to the to-be-sent queue index is determined, and the to-be-sent data packets in the to-be-sent buffer queue are sent in a storage order.

6. The system according to claim 1, characterized in that The system further comprises: a statistics module; The statistical module is used to determine the packet receiving time information of the data processing module receiving the data packet, and determine the packet sending time information of the scheduler module sending the user plane data packet; The clock module generates a statistical signal quantity of the statistical module according to the configuration period, and sends the statistical signal quantity to the statistical module; The statistical module, in response to receiving the statistical signal quantity, determines the delay statistical information within a statistical period according to the packet sending time information and the packet receiving time information.

7. The system according to claim 6, characterized in that The system further includes: a control module, which is used to obtain a control plane data packet from the data processing module, and adjust the preset target delay in the control plane data packet according to the delay statistical information.

8. A data transmission method, characterized in that: include: The clock module updates the global clock variable corresponding to the time according to the configuration period, so that other modules can obtain time information by reading the global clock variable, generate a scheduling semaphore and send it to the scheduler module; Receive data packets from the data sending end through the data processing module, divide the data packets into user plane data packets and control plane data packets, send the user plane data packets to the orchestrator module, and the control plane data packets include a preset target delay; Determine, by the scheduler module, the target cache queue to which the user plane data packet belongs according to the preset target delay and scheduling interval, the preset total number of queues, the data packet timestamp of the user plane data packet and the global clock variable, and store the user plane data packet in the target cache queue; In response to receiving the scheduling signal, the to-be-sent data packets in each cache queue are sent in the order in which they are stored, through the scheduler module.

9. An electronic device, characterized in that: The electronic device comprises: at least one processor; and a memory communicatively connected to the at least one processor; wherein, The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can perform the data transmission method described in claim 8.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer instructions, and the computer instructions are used to implement the data transmission method described in claim 8 when executed by a processor.

11. A computer program product, characterized in that The computer program product comprises a computer program which, when executed by a processor, implements the data transmission method according to claim 8 .

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