Digital current sensor and current detection method

Abstract

The invention discloses a digital current sensor and a current detection method, and particularly relates to the technical field of current sensors, and the technical key points are as follows: at least one feedback coil is wound on the outer side wall of a magnetism gathering ring, the magnetism gathering ring is provided with a notch, a magnetic sensitive chip is placed in the notch, and a detected conductor is placed in the magnetism gathering ring; the output end of the magnetic sensitive chip is connected to the input end of the comparator and the input end of the multiplexer, the output end of the comparator is connected with the selection end of the multiplexer, and the input end of the at least one low-level collector is connected to the output end of the multiplexer; the at least one low-level collector is provided with two output ends, the first output end of the at least one low-level collector is connected to the input end of the multi-bit data linker, the output end of the multi-bit data linker is connected with an external data collection end through the logic interface, the second output end of the low-level collector is connected to the input end of the power amplifier, and the output end of the power amplifier is connected with the output end of the multi-bit data linker. The output end of the power amplifier is connected to the input end of the feedback coil.

Description

Technical Field

[0001] The present invention relates to the technical field of current sensors, and in particular to a digital current sensor and a current detection method. Background Art

[0002] Sensor digitization has made some progress in various sensors. The main method of digital current sensors is to integrate high-bit ADC and MCU on the original analog output sensor for data conversion and communication. Due to the limitations of high-bit ADC and MCU with high data flow processing capabilities, the cost of digitized sensors is generally high and difficult to popularize. In addition, the quantization error and band attenuation introduced by adding ADC to the original analog sensor need to be compensated by algorithm, which brings uncertainty to the overall performance of the sensor.

[0003] For example, a Chinese patent with publication number CN116298486A discloses a digital current sensor, which uses an alloy resistor to collect analog signals, converts them into digital signals through ADC, and converts them into CAN bus output through MCU and CAN driver. It is a typical sensor digitization method. The system works in an open-loop state, and the calibration and accuracy are completely guaranteed by the post-stage compensation algorithm. Another Chinese patent with publication number CN115378253A discloses a computational current sensor, which improves the accuracy of current monitoring by using Kalman Filter, and also relies on the front-end ADC / TDC accuracy for correction.

[0004] Therefore, the present invention aims to provide a digital current sensor and a current detection method to solve the above-mentioned related problems. Summary of the invention

[0005] The technical problem to be solved by the present invention is that the digital current sensor in the prior art needs to perform algorithmic compensation for the quantization error and band attenuation introduced after adding ADC to the original analog sensor, which brings interference and uncertainty to the sensor as a whole. The purpose is to provide a digital current sensor and a current detection method, construct a multi-order low-order collector through multiple low-order collectors, and compare the voltage assignment output by the magnetic sensitive chip with the preset voltage threshold through a comparator, and control the multiplexer to select the output to the corresponding low-order collector, thereby shortening the response time and improving the detection speed; and after the output voltage analog quantity of the low-order collector is amplified by the power amplifier, it is transmitted to the feedback coil to generate an equivalent feedback current, thereby generating a feedback magnetic field on the magnetic focusing ring, thereby compensating for the quantization error and band attenuation introduced after the low-order collector, solving the problem that the digital current sensor in the prior art needs to perform algorithmic compensation for the quantization error and band attenuation introduced after adding ADC to the original analog sensor, thereby bringing interference and uncertainty to the sensor as a whole.

[0006] The present invention is achieved through the following technical solutions:

[0007] A digital current sensor, the sensor includes a magnetic concentrator, a magnetic sensitive chip, a comparator, a multiplexer, at least one low-bit collector, at least one power amplifier, at least one feedback coil, a multi-bit data linker and a logic interface;

[0008] At least one feedback coil is wound around the outer wall of the magnetic focusing ring at intervals, the magnetic focusing ring is provided with a cutout, the magnetic sensitive chip is placed in the cutout, and the conductor to be measured is placed in the magnetic focusing ring;

[0009] The output end of the magnetic sensitive chip is connected to the input end of the comparator and the input end of the multiplexer, the output end of the comparator is connected to the selection end of the multiplexer, and the input end of at least one low-bit collector is connected to the output end of the multiplexer;

[0010] At least one low-bit collector has two output ends, a first output end of at least one low-bit collector is connected to an input end of a multi-bit data linker, an output end of the multi-bit data linker is connected to an external data collection end via a logic interface, a second output end of the low-bit collector is connected to an input end of a power amplifier, an output end of the power amplifier is connected to an input end of a feedback coil, and the low-bit collector, the power amplifier and the feedback coil are all in one-to-one correspondence.

[0011] Furthermore, the sensor includes a magnetic focusing ring, a magnetic sensitive chip, a comparator, a multiplexer, four low-bit collectors, four power amplifiers, four feedback coils, a multi-bit data linker and a logic interface; the four feedback coils are wound around the outer wall of the magnetic focusing ring at intervals, the magnetic focusing ring is provided with a cut, and the magnetic sensitive chip is placed in the cut; the output end of the magnetic sensitive chip is connected to the input end of the comparator and the input end of the multiplexer, the output end of the comparator is connected to the selection end of the multiplexer, and the input ends of the four low-bit collectors are connected to the output end of the multiplexer; the four low-bit collectors each have two output ends, the first output ends of the four low-bit collectors are connected to the input end of the multi-bit data linker, the output end of the multi-bit data linker is connected to the external data collection end via the logic interface, the second output ends of the four low-bit collectors are respectively connected to the input ends of the four power amplifiers, and the output ends of the four power amplifiers are respectively connected to the input ends of the four feedback coils.

[0012] Furthermore, the sensitivity direction of the magnetic sensitive chip is parallel to the direction of the magnetic field at the cutout.

[0013] Furthermore, the magnetic focusing ring is made of soft magnetic material.

[0014] Furthermore, the inner diameter of the magnetic focusing ring is larger than the outer diameter of the conductor to be measured.

[0015] Furthermore, the low-bit collector includes a collection and holding circuit, a four-bit analog-to-digital converter and a four-bit digital-to-analog converter. The input end of the collection and holding circuit is connected to the output end of the multiplexer, the output end of the collection and holding circuit is connected to the input end of the four-bit analog-to-digital converter, the first output end of the four-bit analog-to-digital converter is connected to the four-bit digital-to-analog converter, the second output end of the four-bit analog-to-digital converter is connected to the multi-bit data linker, and the four-bit digital-to-analog converter is connected to the input end of the power amplifier.

[0016] The present invention also provides a current detection method, the method comprising:

[0017] S1: The conductor under test generates a current signal to be measured, which generates an inductive magnetic field on the magnetic focusing ring. The magnetic sensitive chip outputs a first voltage based on the inductive magnetic field and assigns it to the comparator and the multiplexer;

[0018] S2: The comparator compares the first voltage assignment with the voltage thresholds in the preset voltage sequence in sequence, and outputs a selection signal based on the comparison result. The multiplexer inputs the first voltage assignment to the corresponding low-bit collector based on the selection signal;

[0019] S3: The low-bit collector converts the first voltage assignment into a voltage digital quantity and a voltage analog quantity, transmits the voltage digital quantity to the multi-bit data linker, and transmits the voltage analog quantity to the power amplifier;

[0020] S4: The multi-bit data linker integrates the voltage digital quantities output by the four low-bit collectors and outputs the test data through the logic interface after integration;

[0021] S5: the power amplifier transmits the amplified voltage analog quantity to the corresponding feedback coil to obtain an equivalent feedback current, and the equivalent feedback current acts on the magnetic focusing ring to generate a feedback magnetic field. Based on the superposition of the inductor magnetic field and the feedback magnetic field, the first voltage assignment generated by the magnetic sensitive chip is updated to output a second voltage assignment;

[0022] S6: Input the second voltage assignment to the comparator and the multi-channel sensor and repeat the above steps S2-S5 until the digital output in the multi-bit data linker no longer changes. The multi-bit data linker integrates and outputs the final test data through the logic interface.

[0023] Furthermore, the voltage thresholds in the preset voltage sequence include a first voltage threshold, a second voltage threshold, a third voltage threshold and a fourth voltage threshold, and the voltage thresholds are arranged in descending order.

[0024] Further, the four low-level collectors include a first low-level collector, a second low-level collector, a third low-level collector and a fourth low-level collector.

[0025] Further, when the first voltage assignment is greater than the first voltage threshold, the output selection signal selects the first low-order collector input; when the first voltage assignment is less than the first voltage threshold and greater than the second voltage threshold, the output selection signal selects the second low-order collector input; when the first voltage assignment is less than the second voltage threshold and greater than the third voltage threshold, the output selection signal selects the third low-order collector input; when the first voltage assignment is less than the third voltage threshold and greater than the fourth voltage threshold, the output selection signal selects the fourth low-order collector input.

[0026] Compared with the prior art, the present invention has the following advantages and beneficial effects:

[0027] In the present invention, the digital current sensor provided by the technical solution constructs a multi-stage low-bit collector through multiple low-bit collectors, and compares the voltage assignment output by the magnetic sensitive chip with a preset voltage threshold through a comparator, and controls the multiplexer to select the output to the corresponding low-bit collector, thereby shortening the response time and improving the detection speed; and the output voltage analog quantity of the low-bit collector is amplified by the power amplifier and transmitted to the feedback coil to generate an equivalent feedback current, thereby generating a feedback magnetic field on the magnetic focusing ring, thereby compensating for the quantization error and band attenuation introduced after the low-bit collector, solving the problem that the digital current sensor in the prior art needs to add an ADC to the original analog sensor, which requires algorithm compensation for the quantization error and band attenuation introduced, thereby bringing interference and uncertainty to the sensor as a whole. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] In order to more clearly illustrate the technical solutions of the exemplary embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments. It should be understood that the following drawings only illustrate certain embodiments of the present invention and should not be regarded as limiting the scope. For those of ordinary skill in the art, other relevant drawings can be obtained based on these drawings without creative work. In the drawings:

[0029] Figure 1 This is a schematic diagram of the structure of a digital current sensor in this embodiment;

[0030] Figure 2 This is a schematic diagram of the structure of a low-level collector in a digital current sensor in this embodiment;

[0031] Figure 3 is a schematic diagram of a flow chart of a current detection method in this embodiment;

[0032] Figure 4 Schematic diagram of the delay composition during step response in this embodiment.

[0033] Marks and corresponding parts names in the attached drawings:

[0034] 1. Magnetic focusing ring; 2. Magnetic sensitive chip; 3. Comparator; 4. Multiplexer; 5. Low-bit collector; 6. Power amplifier; 7. Feedback coil; 8. Multi-bit data linker; 9. Logic interface. DETAILED DESCRIPTION

[0035] The following is a description of exemplary embodiments of the present disclosure in conjunction with the accompanying drawings, including various details of the embodiments of the present disclosure to facilitate understanding, which should be considered as merely exemplary. Therefore, it should be recognized by those of ordinary skill in the art that various changes and modifications may be made to the embodiments described herein without departing from the scope of the present disclosure. Similarly, for the sake of clarity and conciseness, the description of well-known functions and structures is omitted in the following description.

[0036] In the present disclosure, unless otherwise specified, the use of the terms "first", "second", "third", "fourth", etc. to describe various elements is not intended to limit the positional relationship, temporal relationship, or importance relationship of these elements, and such terms are only used to distinguish one element from another. In some examples, the first element and the second element may refer to the same instance of the element, and in some cases, based on the context of the description, they may also refer to different instances.

[0037] The terms used in the description of various examples in this disclosure are only for the purpose of describing specific examples and are not intended to be limiting. Unless the context clearly indicates otherwise, if the number of elements is not specifically limited, the element can be one or more. In addition, the term "and / or" used in this disclosure covers any one of the listed items and all possible combinations.

[0038] Example 1

[0039] See also Figure 1-Figure 2As shown, a digital current sensor includes a magnetic ring 1, a magnetic sensitive chip 2, a comparator 3, a multiplexer 4, at least one low-bit collector 5, at least one power amplifier 6, at least one feedback coil 7, a multi-bit data linker 8 and a logic interface 9; at least one feedback coil 7 is wound around the outer wall of the magnetic ring 1 at intervals, and the conductor to be measured is placed in the magnetic ring 1. The inner diameter of the magnetic ring 1 is larger than the diameter of the conductor to be measured. The magnetic ring 1 is made of soft magnetic material wound into a ring shape. Silicon steel, amorphous, nanocrystalline or Permalloy can be selected according to the type of the measured signal. The magnetic ring 1 is cut with a notch, and the magnetic sensitive chip 2 is placed in the notch. The sensitivity direction of the magnetic sensitive chip 2 is parallel to the magnetic field direction at the notch, and the output of the magnetic sensitive chip 2 is the switch for the measured current. ring response; the output end of the magnetic sensitive chip 2 is connected to the input end of the comparator 3 and the input end of the multiplexer 4, the output end of the comparator 3 is connected to the selection end of the multiplexer 4, and the input end of at least one low-level collector 5 is connected to the output end of the multiplexer 4; at least one low-level collector 5 has two output ends, the first output end of at least one low-level collector 5 is connected to the input end of the multi-bit data linker 8, the output end of the multi-bit data linker 8 is connected to the external data acquisition end via the logic interface 9, the second output end of at least one low-level collector 5 is connected to the input end of at least one power amplifier 6, the output end of at least one power amplifier 6 is connected to the input end of at least one feedback coil 7, and the low-level collector 5, the power amplifier 6 and the feedback coil 7 are all in one-to-one correspondence.

[0040] It should be noted that, in this embodiment, a multi-order low-order collector is constructed by multiple low-order collectors 5, the output of the magnetic sensitive chip 2 is linked to the comparator 3 and the multiplexer 4, the switching of the multiplexer 4 is controlled by the comparator 3, and the threshold of the comparator 3 can be configured through the corresponding register of the logic interface 9; through the comparator 3 and the multiplexer 4, according to the output value of the current magnetic sensitive chip 2, the multiplexer 4 can be controlled to link the output signal of the magnetic sensitive chip 2 to the low-order collectors 5 of different orders;

[0041] Meanwhile, in this embodiment, the low-level collector 5, the power amplifier 6 and the feedback coil 7 are each provided with four, see Figure 1As shown, the low-level collectors 5 are respectively the first low-level collector STAGE1, the second low-level collector STAGE2, the third low-level collector STAGE3 and the fourth low-level collector STAGE4, ​​the power amplifiers 6 are respectively the first power amplifier PA1, the second power amplifier PA2, the third power amplifier PA3 and the fourth power amplifier PA4, the feedback coils 7 are respectively the first feedback coil N1, the second feedback coil N2, the third feedback coil N3 and the fourth feedback coil N4, the first low-level collector STAGE1 is a first-order low-level collector, the second low-level collector STAGE2 is a second-order low-level collector, the third low-level collector STAGE3 is a third-order low-level collector, and the fourth low-level collector ST AGE4 is a fourth-order low-level collector, the first low-level collector STAGE1 is connected to the input end of the first power amplifier PA1, the output end of the first power amplifier PA1 is connected to the first feedback coil N1, the second low-level collector STAGE2 is connected to the input end of the second power amplifier PA2, the output end of the second power amplifier PA2 is connected to the second feedback coil N2, the third low-level collector STAGE3 is connected to the input end of the third power amplifier PA3, the output end of the third power amplifier PA3 is connected to the third feedback coil N3, the fourth low-level collector STAGE4 is connected to the input end of the fourth power amplifier PA4, and the output end of the fourth power amplifier PA4 is connected to the fourth feedback coil N4;

[0042] Further, see Figure 3 As shown, the low-bit collector 5 includes a collection and holding circuit C&H, a four-bit analog-to-digital converter 4bitADC and a four-bit digital-to-analog converter 4bitDAC, the input end of the collection and holding circuit is connected to the output end of the multiplexer 4, the output end of the collection and holding circuit is connected to the input end of the four-bit analog-to-digital converter, the first output end of the four-bit analog-to-digital converter is connected to the four-bit digital-to-analog converter, the second output end of the four-bit analog-to-digital converter is connected to the multi-bit data linker 8, and the four-bit digital-to-analog converter is connected to the input end of the power amplifier.

[0043] Specifically, in this embodiment, the acquisition and holding circuit is used to hold the signal input to the low-bit collector 5, and the output of the acquisition and holding circuit is connected to the input end of the four-bit analog-to-digital converter. The output register of the four-bit analog-to-digital converter is the four-bit digital-to-analog converter input register, and the output of the four-bit analog-to-digital converter is the digital output of the low-bit collector 5. The output of the four-bit digital-to-analog converter is the voltage output of the low-bit collector 5.

[0044] Specifically, in this embodiment, the digital outputs of the low-order collectors 5 of different orders are integrated into a group of high-order data through a multi-bit data device. The integration method can be realized by a hardware shift register or by {} operation; the output with a smaller order after linking is the high-order one in front. The logic interface 9 is used to encode the high-order data into a suitable protocol for external communication, and is also used as a reference voltage for calibrating the comparator 3 threshold, ADC and DAC.

[0045] Furthermore, the coil turns of the four feedback coils 7 are arranged in an increasing geometric progression.

[0046] Specifically, in the present embodiment, different feedback coils 7 have different numbers of turns to correspond to the outputs of different-order low-bit collectors 5, so that the feedback current generated by the output of the low-order collector can generate a larger feedback; for example: the output of the first-order low-bit collector is connected to 16-13 bits, and the output of the second-order low-bit collector is 12-9 bits, then the corresponding N1:N2 turns ratio is 16:1, and so on.

[0047] Example 2

[0048] See also Figure 3 As shown, the present invention also provides a current detection method, the method comprising:

[0049] S1: The conductor to be measured generates a current signal to be measured, which generates an inductive magnetic field on the magnetic focusing ring 1. The magnetic sensitive chip 2 outputs a first voltage based on the inductive magnetic field and assigns it to the comparator 3 and the multiplexer 4;

[0050] It should be noted that, in this embodiment, the current sensor is reset to zero when power is turned on, and then the conductor to be measured is placed in the magnetic focusing ring 1. At this time, there is no current in the feedback coil 7, that is, the magnetic field applied to the magnetic sensitive chip 2 in the initial state is only the inductive magnetic field generated by the measured current of the measured conductor on the magnetic focusing ring 1, and the magnetic sensitive chip 2 outputs the first voltage assignment V out1 .

[0051] S2: the comparator 3 compares the first voltage assignment with the voltage thresholds in the preset voltage sequence in sequence, and outputs a selection signal based on the comparison result. The multiplexer 4 inputs the first voltage assignment to the corresponding low-bit collector 5 based on the selection signal;

[0052] It should be noted that, in this embodiment, the voltage thresholds in the preset voltage sequence include a first voltage threshold V1, a second voltage threshold V2, a third voltage threshold V3 and a fourth voltage threshold V4, and the voltage thresholds are arranged in descending order, specifically V1>V2>V3>V4; out1 When the voltage is greater than the first voltage threshold V1, the output selection signal selects the first low-level collector STAGE1 input; when the first voltage is assigned V out1When the voltage is less than the first voltage threshold V1 and greater than the second voltage threshold V2, the output selection signal selects the second low-order collector STAGE2 input; when the first voltage is assigned V out1 When the voltage is less than the second voltage threshold V2 and greater than the third voltage threshold V3, the output selection signal selects the third low-level collector STAGE3 input; when the first voltage is assigned V out1 When it is less than the third voltage threshold V3 and greater than the fourth voltage threshold V4, the output selection signal selects the input of the fourth low-bit collector STAGE4.

[0053] S3: the low-bit collector 5 converts the first voltage assignment into a voltage digital quantity and a voltage analog quantity, and transmits the voltage digital quantity to the multi-bit data linker 8, and transmits the voltage analog quantity to the power amplifier 6;

[0054] For example, in this embodiment, if the first voltage generated by the magnetic sensitive chip 2 is assigned a value V out1 is greater than the first voltage threshold V1, the output selection signal selects the first low-order collector STAGE1 input, and the first voltage assignment V out1 The four-bit analog-to-digital converter in STAGE1 converts the digital voltage into digital value, namely bit15 to bit12; at the same time, the four-bit digital-to-analog converter in STAGE1 converts the analog voltage into analog value, and then transmits it to the first power amplifier PA1.

[0055] S4: The multi-bit data linker 8 integrates the voltage digital quantities output by the four low-bit collectors 5, and outputs the test data through the logic interface 9 after integration;

[0056] Exemplarily, in this embodiment, the first low-bit collector STAGE1 outputs voltage digital quantities bit15~bit12 to the multi-bit data linker 8, triggering the multi-bit data linker 8 to update data to [bit15, bit14, bit13, bit12, 0,0,0,0,0,0,0,0,0,0,0,0,0], and then outputs test data to the outside through the logic interface 9.

[0057] S5: the power amplifier 6 transmits the voltage analog quantity after amplification to the corresponding feedback coil 7 to obtain an equivalent feedback current. The equivalent feedback current acts on the magnetic focusing ring 1 to generate a feedback magnetic field. Based on the superposition of the inductance magnetic field and the feedback magnetic field, the first voltage assignment generated by the magnetic sensitive chip 2 is updated to output a second voltage assignment.

[0058] Exemplarily, in this embodiment, the first power amplifier PA1 amplifies the voltage analog quantity and outputs it to the first feedback coil N1 to generate an equivalent feedback current I1, and the equivalent feedback current I1 acts on the magnetic focusing ring 1 to generate a feedback magnetic field. Based on the superposition of the inductor magnetic field and the feedback magnetic field, the magnetic field of the magnetic sensitive chip 2 changes, and the second voltage assignment V is output.out2 .

[0059] S6: Input the second voltage value into the comparator 3 and the multi-channel sensor to loop the above steps S2-S5 until the digital output in the multi-bit data linker 8 no longer changes. The multi-bit data linker 8 integrates and outputs the final test data through the logic interface 9.

[0060] For example, in this embodiment, if the second voltage output by the magnetic sensitive chip 2 is assigned a value V out2 is less than the second voltage threshold V2 and greater than the third voltage threshold V3, then the second voltage is assigned a value V out2 Input it into the third low-bit collector STAGE3, and then repeat the above steps. Finally, the updated data in the multi-bit data linker 8 is [bit15, bit14, bit13, bit12, 0, 0, 0, bit7, bit6, bit5, bit4, 0, 0, 0, 0], and then the updated test data is output to the outside through the logic interface 9. After N cycles, the sensor digital output of 4N bits can be obtained.

[0061] Specifically, in this embodiment, since a 4-bit ADC is used in a single low-bit collector STAGE, a 0-90% response can be obtained only in the first cycle; see Figure 4 As shown in FIG. 1 , in the delay composition of the step response, when encountering a fast-changing signal, the main delay composition is divided into two parts; one is the delay T including the magnetic field generated by the measured current, the response generated by the magnetic sensitive chip 2, the output judgment of the comparator 3, the signal switching, and the ADC conversion time. d ; One is the rise time T of all levels above r ; It can be regarded as open-loop operation when responding, and can be reduced by improving the working clock and device characteristics, because the above time can easily reach the ns level, and the ADC is only 4 bits. Compared with the direct use of 16-bit sensors with the same other links, the lower the bit number, the shorter the conversion time, so a faster response can be obtained; moreover, when any first-order low-bit collector STAGE output changes, it will trigger the change of the multi-bit data connector, so any change amplitude can be quickly responded with 4-bit accuracy;

[0062] At the same time, the closed loop is used to ensure accuracy. After each cycle, there will be a certain feedback current related to the quantization error acting on the magnetic sensitive chip 2. Since each digit is relatively low, the circuit is configured for different levels of range and signal amplification is performed, so that the digits at each level can be valid digits.

[0063] Taking the present embodiment as an example, it can be learned through analysis that, in theory, at least 15 bits of effective bit data can be obtained after the last level of feedback, while directly adding a 16-bit ADC to the traditional sensor can only obtain 12-14 bits of effective bit due to the requirements of range setting and the like; at the same time, due to the use of a closed-loop solution, the residual magnetic flux in the magnetic ring 1 after the last cycle is part of the sensor error, that is, the actual working magnetic field of the magnetic sensitive chip 2 after the sensor enters a steady state is about 1 / 2^16 of the maximum working magnetic field, so the linearity requirement for the magnetic sensitive chip 2 in the entire range can be reduced. Taking the current 4-bit ADC as an example, a magnetic sensitive chip 2 with a linearity of 5% FS can be used to achieve a sensor linearity of nearly 0.1‰.

[0064] The specific implementation methods described above further illustrate the objectives, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above description is only a specific implementation method of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A digital current sensor, characterized in that: The sensor includes a magnetic concentrator, a magnetic sensitive chip, a comparator, a multiplexer, at least one low-bit collector, at least one power amplifier, at least one feedback coil, a multi-bit data linker and a logic interface; At least one feedback coil is wound around the outer wall of the magnetic focusing ring at intervals, the magnetic focusing ring is provided with a cutout, the magnetic sensitive chip is placed in the cutout, and the conductor to be measured is placed in the magnetic focusing ring; The output end of the magnetic sensitive chip is connected to the input end of the comparator and the input end of the multiplexer, the output end of the comparator is connected to the selection end of the multiplexer, and the input end of at least one low-bit collector is connected to the output end of the multiplexer; At least one low-bit collector has two output ends, a first output end of at least one low-bit collector is connected to an input end of a multi-bit data linker, an output end of the multi-bit data linker is connected to an external data collection end via a logic interface, a second output end of the low-bit collector is connected to an input end of a power amplifier, an output end of the power amplifier is connected to an input end of a feedback coil, and the low-bit collector, the power amplifier and the feedback coil are all in one-to-one correspondence.

2. A digital current sensor according to claim 1, characterized in that: The sensor includes a magnetic collecting ring, a magnetic sensitive chip, a comparator, a multiplexer, four low-bit collectors, four power amplifiers, four feedback coils, a multi-bit data linker and a logic interface; the four feedback coils are wound around the outer wall of the magnetic collecting ring at intervals, the magnetic collecting ring is provided with a cut, and the magnetic sensitive chip is placed in the cut; the output end of the magnetic sensitive chip is connected to the input end of the comparator and the input end of the multiplexer, the output end of the comparator is connected to the selection end of the multiplexer, and the input ends of the four low-bit collectors are connected to the output end of the multiplexer; the four low-bit collectors each have two output ends, the first output ends of the four low-bit collectors are connected to the input end of the multi-bit data linker, the output end of the multi-bit data linker is connected to the external data collection end via the logic interface, the second output ends of the four low-bit collectors are respectively connected to the input ends of the four power amplifiers, and the output ends of the four power amplifiers are respectively connected to the input ends of the four feedback coils.

3. A digital current sensor according to claim 2, characterized in that: The sensitivity direction of the magnetic sensitive chip is parallel to the magnetic field direction at the cutout.

4. A digital current sensor according to claim 2, characterized in that: The magnetic ring is made of soft magnetic material.

5. A digital current sensor according to claim 2, characterized in that: The inner diameter of the magnetic ring is larger than the outer diameter of the conductor being measured.

6. A digital current sensor according to claim 2, characterized in that: The low-bit collector includes a collection and holding circuit, a four-bit analog-to-digital converter and a four-bit digital-to-analog converter. The input end of the collection and holding circuit is connected to the output end of the multiplexer, the output end of the collection and holding circuit is connected to the input end of the four-bit analog-to-digital converter, the first output end of the four-bit analog-to-digital converter is connected to the four-bit digital-to-analog converter, the second output end of the four-bit analog-to-digital converter is connected to the multi-bit data linker, and the four-bit digital-to-analog converter is connected to the input end of the power amplifier.

7. A current detection method based on the digital current sensor according to any one of claims 2 to 6, characterized in that: Methods include: S1: The conductor under test generates a current signal to be measured, which generates an inductive magnetic field on the magnetic focusing ring. The magnetic sensitive chip outputs a first voltage based on the inductive magnetic field and assigns it to the comparator and the multiplexer; S2: The comparator compares the first voltage assignment with the voltage thresholds in the preset voltage sequence in sequence, and outputs a selection signal based on the comparison result. The multiplexer inputs the first voltage assignment to the corresponding low-bit collector based on the selection signal; S3: The low-bit collector converts the first voltage assignment into a voltage digital quantity and a voltage analog quantity, transmits the voltage digital quantity to the multi-bit data linker, and transmits the voltage analog quantity to the power amplifier; S4: The multi-bit data linker integrates the voltage digital quantities output by the four low-bit collectors and outputs the test data through the logic interface after integration; S5: the power amplifier transmits the amplified voltage analog quantity to the corresponding feedback coil to obtain an equivalent feedback current, and the equivalent feedback current acts on the magnetic focusing ring to generate a feedback magnetic field. Based on the superposition of the inductor magnetic field and the feedback magnetic field, the first voltage assignment generated by the magnetic sensitive chip is updated to output a second voltage assignment; S6: Input the second voltage assignment to the comparator and the multi-channel sensor and repeat the above steps S2-S5 until the digital output in the multi-bit data linker no longer changes. The multi-bit data linker integrates and outputs the final test data through the logic interface.

8. A current detection method according to claim 7, characterized in that: The voltage thresholds in the preset voltage sequence include a first voltage threshold, a second voltage threshold, a third voltage threshold and a fourth voltage threshold, and the voltage thresholds are arranged in descending order.

9. A current detection method according to claim 8, characterized in that: The four low-level collectors include a first low-level collector, a second low-level collector, a third low-level collector and a fourth low-level collector.

10. A current detection method according to claim 9, characterized in that: When the first voltage assignment is greater than the first voltage threshold, the output selection signal selects the first low-order collector input; when the first voltage assignment is less than the first voltage threshold and greater than the second voltage threshold, the output selection signal selects the second low-order collector input; When the first voltage assignment is less than the second voltage threshold and greater than the third voltage threshold, the output selection signal selects the third low-order collector input; When the first voltage assignment is less than the third voltage threshold and greater than the fourth voltage threshold, the output selection signal selects the fourth low-bit collector input.

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