ISWAP gate generation method, generation device, electronic device and storage medium

Abstract

The present application provides a method for generating an ISWAP gate, a generating device, an electronic device and a storage medium. The method comprises: responding to a gate generation instruction, respectively moving the frequencies of two transmission sub-qubits to the same position, and opening the XY coupling between the two transmission sub-qubits to form a fermion simulation gate, wherein the fermion simulation gate has a control phase generated by ZZ coupling; determining microwave parameters according to the bit parameters of the two transmission sub-qubits in the fermion simulation gate and the system parameters of a superconducting quantum circuit; and respectively applying coherent microwaves with microwave parameters in the two superconducting quantum circuits to suppress the ZZ coupling, thereby correcting the fermion simulation gate to an ISWAP gate.

Description

Technical Field

[0001] The present application relates to the field of quantum computing technology, and more specifically, to a method for generating an ISWAP gate, a generating device, an electronic device, a computer-readable storage medium, and a computer program product. Background Art

[0002] Quantum error correction is considered to be the most promising path to practical universal quantum computing, and surface codes are currently the most promising type of solution in the field of superconducting quantum computing. To reach the threshold of quantum error correction, it is necessary to implement high-fidelity quantum gates. In addition to the common CZ gate, the ISWAP gate is also a type of two-bit gate that can be used for surface codes, so it is very important to build a high-fidelity ISWAP gate. Compared with the traditional CZ gate solution, the ISWAP gate only involves the alignment of the 01 energy levels of two bits, and does not use the 2-state energy levels other than the calculation basis vector, so the risk of leakage is relatively small, which is more friendly to surface codes. Summary of the invention

[0003] In view of this, the present application provides a method for generating an ISWAP gate, a generating device, an electronic device, a computer-readable storage medium, and a computer program product.

[0004] One aspect of the present application provides a method for generating an ISWAP gate, comprising:

[0005] In response to the gate generation instruction, the frequencies of the two transmission sub-qubits are respectively moved to the same position, and the XY coupling between the two transmission sub-qubits is turned on to form a fermion simulation gate, wherein the fermion simulation gate has a control phase generated by the ZZ coupling;

[0006] Determining microwave parameters according to the bit parameters of the two transmission sub-qubits in the fermion simulation gate and the system parameters of the superconducting quantum circuit;

[0007] Coherent microwaves with the above microwave parameters are applied to the two superconducting quantum circuits respectively to suppress the above ZZ coupling, thereby modifying the above fermion simulation gate into the above ISWAP gate.

[0008] According to an embodiment of the present application, microwave parameters are determined according to the bit parameters of the two transmission sub-qubits in the fermion simulation gate and the system parameters of the superconducting quantum circuit, including:

[0009] Determining a microwave frequency interval according to the bit frequencies of the two transmission sub-qubits;

[0010] Determining a microwave amplitude range according to waveform parameters of an arbitrary wave generator in the superconducting quantum circuit;

[0011] According to the microwave frequency interval, the microwave amplitude interval and the preset phase interval, the target microwave frequency, the target microwave amplitude and the target phase difference are determined, wherein the microwave parameters include the target microwave frequency, the target microwave amplitude and the target phase difference.

[0012] According to an embodiment of the present application, determining a target microwave frequency, a target microwave amplitude and a target phase difference according to the microwave frequency interval, the microwave amplitude interval and the preset phase interval includes:

[0013] For any target parameter, determining the associated parameter values ​​of the other two associated parameters, wherein the target parameter includes the microwave amplitude interval or the preset phase interval, and the associated parameter includes the microwave frequency interval and one of the following: the preset phase interval and the microwave amplitude interval;

[0014] Iteratively determining i initial parameter values ​​of the target parameter according to the parameter interval of the target parameter;

[0015] For the i-th initial parameter value, based on the i-th initial parameter value of the target parameter and the associated parameter values ​​of the two associated parameters, calculating the control phase between the two transmission sub-qubits;

[0016] In a case where the control phase satisfies a preset threshold, the i-th initial parameter value is determined as the target parameter value of the target parameter.

[0017] According to an embodiment of the present application, based on the i-th initial parameter value of the target parameter and the associated parameter values ​​of the two associated parameters, calculating the control phase between the two transmission sub-qubits includes:

[0018] In a case where the target parameter is the target microwave frequency, scanning the microwave frequency interval to determine i initial microwave frequency values;

[0019] Calculating the control phase corresponding to each of the above initial microwave frequency values;

[0020] In the case where the target parameter is the target microwave amplitude, scanning the microwave frequency interval to determine i initial microwave amplitude values;

[0021] Calculating the control phase corresponding to each of the above initial microwave amplitude values;

[0022] When the target parameter is the target phase difference, fixing the microwave phase on one of the transmission sub-qubits, and scanning the microwave phase on another transmission sub-qubit based on the preset phase interval to determine i initial microwave phase values;

[0023] For each of the above initial microwave phase values, the control phase between the two transmission sub-qubits is calculated.

[0024] According to an embodiment of the present application, the above-mentioned microwave parameters include the target microwave frequency, the above-mentioned target microwave amplitude and the above-mentioned target phase difference.

[0025] According to an embodiment of the present application, coherent microwaves having the above microwave parameters are applied to the two superconducting quantum circuits to suppress the ZZ coupling, thereby modifying the fermion simulation gate to the ISWAP gate, including:

[0026] Applying coherent microwaves having the target microwave frequency to the two superconducting quantum circuits respectively, wherein the two transmission sub-qubits in the superconducting quantum circuits have the target microwave amplitude, and the two coherent microwaves have the target phase difference;

[0027] Calculate the equivalent ZZ coupling value in the above superconducting quantum circuit;

[0028] When the equivalent ZZ coupling value is a preset value, the ISWAP gate is generated.

[0029] According to an embodiment of the present application, the above equivalent ZZ coupling value is shown in formula (1):

[0030] (1)

[0031] in, represents the ZZ coupling introduced when xy coupling is turned on, represents the ZZ coupling introduced by dual coherent microwaves; represents the frequency difference between the bit frequency of the first transmitted sub-qubit and the target microwave frequency of the coherent microwave, represents the frequency difference between the bit frequency of the second transmission sub-qubit and the target microwave frequency of the coherent microwave, represents the frequency difference between the two transmission sub-qubits; and They represent the anharmonicity of the two transmission sub-qubits respectively; represents the xy coupling strength between the two transporter qubits; and Represent the target microwave amplitudes of the two transmission sub-qubits respectively; Represents the target phase difference between two coherent microwaves.

[0032] Another aspect of the present application provides a device for generating an ISWAP gate, including:

[0033] A first generation module is used to move the frequencies of the two transmission sub-qubits to the same position respectively in response to the gate generation instruction, and open the XY coupling between the two transmission sub-qubits to form a fermion simulation gate, wherein the fermion simulation gate has a control phase generated by the ZZ coupling;

[0034] A determination module, used to determine microwave parameters according to the bit parameters of the two transmission sub-qubits in the fermion simulation gate and the system parameters of the superconducting quantum circuit;

[0035] The second generating module is used to apply coherent microwaves with the above microwave parameters in the two superconducting quantum circuits respectively to suppress the above ZZ coupling, thereby modifying the above fermion simulation gate into the above ISWAP gate.

[0036] Another aspect of the present application provides an electronic device, comprising:

[0037] one or more processors;

[0038] a memory for storing one or more programs,

[0039] When the one or more programs are executed by the one or more processors, the one or more processors implement the method as described above.

[0040] Another aspect of the present application provides a computer-readable storage medium storing computer-executable instructions, which are used to implement the method described above when executed.

[0041] Another aspect of the present application provides a computer program product, which includes computer executable instructions, and the instructions are used to implement the method as described above when executed.

[0042] According to an embodiment of the present application, by moving the frequencies of the two transmission sub-qubits to the same position respectively and opening the XY coupling between the two transmission sub-qubits, a fermion simulation gate is formed, and microwave parameters are determined according to the bit parameters of the two transmission sub-qubits in the fermion simulation gate and the system parameters of the superconducting quantum circuit, and coherent microwaves are applied in the two superconducting quantum circuits to correct the fermion simulation gate to an ISWAP gate. The method of generating an ISWAP gate in the present application can effectively reduce the gate time, and there is no need to additionally correct the redundant control phase after the gate is made. Reducing the gate time and suppressing the control phase are of great significance for the surface code scheme of quantum error correction. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] The above and other objects, features and advantages of the present application will become more apparent through the following description of the embodiments of the present application with reference to the accompanying drawings, in which:

[0044] Figure 1 A flow chart of a method for generating an ISWAP gate according to an embodiment of the present application is shown;

[0045] Figure 2 A waveform diagram of an ISWAP gate according to an embodiment of the present application is shown;

[0046] Figure 3 A schematic diagram showing data for calibrating dual microwave frequencies that can be used to suppress ZZ coupling according to an embodiment of the present application is shown;

[0047] Figure 4 A schematic diagram of calibrating the relative phase of dual microwaves according to an embodiment of the present application is shown;

[0048] Figure 5 A schematic diagram of calibrating dual microwave amplitudes according to an embodiment of the present application is shown;

[0049] Figure 6 A block diagram showing a device for generating an ISWAP gate according to an embodiment of the present application; and

[0050] Figure 7 A block diagram of an electronic device suitable for implementing the method described above according to an embodiment of the present application is shown. DETAILED DESCRIPTION

[0051] Below, embodiments of the present application will be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of the present application. In the following detailed description, for ease of explanation, many specific details are set forth to provide a comprehensive understanding of the embodiments of the present application. However, it is apparent that one or more embodiments may also be implemented without these specific details. In addition, in the following description, descriptions of known structures and technologies are omitted to avoid unnecessary confusion of the concepts of the present application.

[0052] The terms used herein are only for describing specific embodiments and are not intended to limit the present application. The terms "include", "comprising", etc. used herein indicate the existence of the features, steps, operations and / or components, but do not exclude the existence or addition of one or more other features, steps, operations or components.

[0053] All terms (including technical and scientific terms) used herein have the meanings commonly understood by those skilled in the art unless otherwise defined. It should be noted that the terms used herein should be interpreted as having a meaning consistent with the context of this specification and should not be interpreted in an idealized or overly rigid manner.

[0054] When using expressions such as "at least one of A, B, and C, etc.", they should generally be interpreted according to the meaning of the expression commonly understood by those skilled in the art (for example, "a system having at least one of A, B, and C" should include but is not limited to a system having A alone, B alone, C alone, A and B, A and C, B and C, and / or A, B, C, etc.).

[0055] In the field of superconducting quantum computing, the iSWAP gate is an important dual-qubit gate that can realize the exchange of two qubits. In the fixed coupling design, the implementation of the ISWAP gate only involves the frequency alignment of the two bits themselves. After the emergence of the adjustable coupling architecture, the specific gate scheme of the ISWAP gate also involves the z control signal of the coupler, which is used to open the xy coupling between the bits.

[0056] However, there is a problem with these schemes. When the frequencies of two bits are aligned and there is interaction, the ZZ coupling will inevitably be slightly opened at the same time, which introduces an additional control phase. This type of control phase error is more difficult to correct for quantum error correction, so after completing the ISWAP gate, it is necessary to additionally correct the introduced control phase, which in turn increases the overall gate time. Since the relaxation time of current quantum bits is limited, this will introduce more relaxation errors, thus limiting the prospects for the application of the ISWAP scheme in surface codes.

[0057] In order to eliminate the error of controlling the phase and control the overall gate time at the same time, it is necessary to use the technology of dual microwave regulated ZZ coupling. By applying coherent microwaves of the same frequency to the two gated bits at the same time, an equivalent ZZ coupling is introduced, which just cancels out the ZZ coupling introduced by opening the coupler. In this way, the additional phase introduced when making the ISWAP gate is eliminated in situ, eliminating a series of post-processing operations.

[0058] The related technology uses coherent dual microwaves to control ZZ coupling, which can be regarded as a special type of cross-resonance gate: by utilizing the difference in AC Stark offsets of the energy levels of the two bits under dual microwaves, the ZZ coupling strength between the two bits can be equivalently controlled. However, this scheme was originally designed for superconducting bits with a fixed coupling architecture, providing a CZ gate scheme that does not require a coupler. But conversely, the original scheme can actually be used in superconducting bits with adjustable coupling architectures. In particular, when pursuing high-precision quantum gates, this effect can cleverly shut down the residual ZZ coupling when making the gate, providing a feasible path for realizing a fault-tolerant quantum computer.

[0059] In view of this, an embodiment of the present application provides a method for generating an ISWAP gate, a generating device, an electronic device and a storage medium, the method comprising: responding to a gate generation instruction, moving the frequencies of two transmission sub-qubits to the same position respectively, and opening the XY coupling between the two transmission sub-qubits to form a fermion simulation gate, wherein the fermion simulation gate has a control phase generated by ZZ coupling; determining microwave parameters according to the bit parameters of the two transmission sub-qubits in the fermion simulation gate and the system parameters of the superconducting quantum circuit; applying coherent microwaves with microwave parameters in the two superconducting quantum circuits respectively to suppress the ZZ coupling, thereby correcting the fermion simulation gate to an ISWAP gate.

[0060] Figure 1 A flow chart of a method for generating an ISWAP gate according to an embodiment of the present application is shown.

[0061] like Figure 1 As shown, the method for generating the ISWAP gate includes operations S101 to S103.

[0062] In operation S101, in response to a gate generation instruction, the frequencies of the two transmission sub-qubits are respectively moved to the same position, and the XY coupling between the two transmission sub-qubits is turned on to form a fermion simulation gate, wherein the fermion simulation gate has a control phase generated by the ZZ coupling;

[0063] In operation S102, microwave parameters are determined according to bit parameters of two transmission sub-qubits in the fermion simulation gate and system parameters of the superconducting quantum circuit;

[0064] In operation S103 , coherent microwaves with microwave parameters are applied to two superconducting quantum circuits respectively to suppress ZZ coupling, thereby modifying the fermion simulation gate into an ISWAP gate.

[0065] According to an embodiment of the present application, in the generation method of the ISWAP gate, firstly, a fermion simulation gate, i.e., an fSIM gate, is calibrated between two transmission sub-qubits, and the respective detunes required for the bit frequency alignment of the two transmission sub-qubits and the coupling g required for theta to be equal to pi / 2 are calibrated. However, due to the residual ZZ coupling, the calibrated quantum gate has a non-zero control phase, so it is not a standard ISWAP gate, but a fermion simulation gate.

[0066] According to an embodiment of the present application, the microwave parameters required for preparing the ISWAP gate are determined based on the bit parameters of the two transmission sub-qubits in the fermion simulation gate and the system parameters of the superconducting quantum circuit. By applying coherent microwaves in the two superconducting quantum circuits respectively, the fermion simulation gate can be corrected to an ISWAP gate.

[0067] According to an embodiment of the present application, by moving the frequencies of the two transmission sub-qubits to the same position respectively and opening the XY coupling between the two transmission sub-qubits, a fermion simulation gate is formed, and microwave parameters are determined according to the bit parameters of the two transmission sub-qubits in the fermion simulation gate and the system parameters of the superconducting quantum circuit, and coherent microwaves are applied in the two superconducting quantum circuits to correct the fermion simulation gate to an ISWAP gate. The method of generating an ISWAP gate in the present application can effectively reduce the gate time, and there is no need to additionally correct the redundant control phase after the gate is made. Reducing the gate time and suppressing the control phase are of great significance for the surface code scheme of quantum error correction.

[0068] According to an embodiment of the present application, microwave parameters are determined according to bit parameters of two transmission sub-qubits in a fermion simulation gate and system parameters of a superconducting quantum circuit, including:

[0069] Determine the microwave frequency range according to the bit frequencies of the two transmission sub-qubits;

[0070] Determine the microwave amplitude range according to the waveform parameters of the arbitrary wave generator in the superconducting quantum circuit;

[0071] According to the microwave frequency interval, the microwave amplitude interval and the preset phase interval, the target microwave frequency, the target microwave amplitude and the target phase difference are determined, wherein the microwave parameters include the target microwave frequency, the target microwave amplitude and the target phase difference.

[0072] According to an embodiment of the present application, assuming that the bit frequencies of the two transmission sub-qubits are 2.4 GHz and 2.7 GHz respectively, the microwave frequency interval can be determined as [2.2, 2.8]. The microwave amplitude interval is determined based on the waveform parameters of the arbitrary wave generator in the superconducting quantum circuit, and a preset phase interval is set at the same time. Based on the above interval, the microwave parameters for generating the ISWAP gate can be determined, such as the target microwave frequency of the coherent microwaves, the target microwave amplitude of the two transmission sub-qubits, and the target phase difference between the two coherent microwaves.

[0073] According to an embodiment of the present application, determining a target microwave frequency, a target microwave amplitude, and a target phase difference according to a microwave frequency interval, a microwave amplitude interval, and a preset phase interval includes:

[0074] For any target parameter, determining associated parameter values ​​of the other two associated parameters, wherein the target parameter includes a microwave amplitude interval or a preset phase interval, and the associated parameter includes a microwave frequency interval and one of the following: a preset phase interval and a microwave amplitude interval;

[0075] Iteratively determine i initial parameter values ​​of the target parameter according to the parameter interval of the target parameter;

[0076] For the i-th initial parameter value, based on the i-th initial parameter value of the target parameter and the associated parameter values ​​of the two associated parameters, calculating the control phase between the two transmission sub-qubits;

[0077] When the control phase satisfies a preset threshold, the i-th initial parameter value is determined as the target parameter value of the target parameter.

[0078] According to an embodiment of the present application, the preset threshold value can be specifically set according to actual needs, such as a value close to 0.

[0079] According to an embodiment of the present application, when determining the microwave frequency interval, an initial value is set for the microwave amplitude interval or the preset phase interval, and then based on each parameter value in the microwave frequency interval, the population number of the line final state of the superconducting quantum circuit leaking to states other than the 01 state or the 10 state is measured experimentally, and when the leaked population number is close to 0, the parameter value is determined as the target microwave frequency.

[0080] According to an embodiment of the present application, for a microwave amplitude interval or a preset phase interval, after it is determined as a target parameter, another parameter and a microwave frequency interval are determined as associated parameters, and an initial value of the associated parameter, i.e., the associated parameter value, is given. Thereafter, the parameter interval of the target parameter is scanned to accurately shut down the ZZ coupling between the two transmission sub-qubits to ensure that the control phase CPhase does not change over time, i.e., the ZZ coupling is equal to 0.

[0081] According to the embodiment of the present application, the circuit for calibrating the control phase CPhase is similar to the Ramsey experiment commonly used in the field of superconducting quantum computing. First, the first transmission sub-qubit is given an I gate or an X gate, and the other transmission sub-qubit is given an X gate. Then, a number of even-numbered layers of dual-microwave ISWAP gates are superimposed to amplify the control phase CPhase between the two transmission sub-qubits. or The control phase between the two transmission sub-qubits is calculated.

[0082] According to an embodiment of the present application, when the control phase is close to a preset threshold value 0, the initial parameter value is determined as the target parameter value of the target parameter.

[0083] According to an embodiment of the present application, based on the i-th initial parameter value of the target parameter and the associated parameter values ​​of the two associated parameters, calculating the control phase between the two transmission sub-qubits includes:

[0084] When the target parameter is a target microwave frequency, scanning the microwave frequency interval to determine i initial microwave frequency values;

[0085] Calculating the control phase corresponding to each initial microwave frequency value;

[0086] When the target parameter is a target microwave amplitude, scanning the microwave frequency interval to determine i initial microwave amplitude values;

[0087] Calculate the control phase corresponding to each initial microwave amplitude value;

[0088] When the target parameter is a target phase difference, the microwave phase on one transmission sub-qubit is fixed, and the microwave phase on another transmission sub-qubit is scanned based on a preset phase interval to determine i initial microwave phase values;

[0089] For each initial microwave phase value, the control phase between the two transmission sub-qubits is calculated.

[0090] According to an embodiment of the present application, the microwave parameters include a target microwave frequency, a target microwave amplitude, and a target phase difference.

[0091] According to an embodiment of the present application, coherent microwaves with microwave parameters are applied to two superconducting quantum circuits respectively to suppress ZZ coupling, thereby modifying the fermion simulation gate to an ISWAP gate, including:

[0092] Applying coherent microwaves with target microwave frequencies to two superconducting quantum circuits respectively, wherein two transmission sub-qubits in the superconducting quantum circuits have target microwave amplitudes, and the two coherent microwaves have target phase differences;

[0093] Calculate the equivalent ZZ coupling value in superconducting quantum circuits;

[0094] Generate an ISWAP gate when the equivalent ZZ coupling value is the preset value.

[0095] According to the embodiment of the present application, in the process of generating the ISWAP gate, the xy coupling between the two transmission sub-qubits is opened by applying a z-line pulse to the coupler to realize the exchange of quantum states. In addition, coherent microwaves of the same frequency are applied to the xy control lines of the two transmission sub-qubits to regulate the zz coupling.

[0096] According to an embodiment of the present application, the equivalent ZZ coupling value in the superconducting quantum circuit is calculated after applying coherent microwaves. If the equivalent ZZ coupling value is a preset value, it means that the ZZ coupling at this time has been corrected, that is, the ISWAP gate is obtained.

[0097] According to an embodiment of the present application, the equivalent ZZ coupling value is shown in formula (1):

[0098] (1)

[0099] in, represents the ZZ coupling introduced when xy coupling is turned on, represents the ZZ coupling introduced by dual coherent microwaves; represents the frequency difference between the bit frequency of the first transmitted sub-qubit and the target microwave frequency of the coherent microwave, represents the frequency difference between the bit frequency of the second transmission sub-qubit and the target microwave frequency of the coherent microwave, represents the frequency difference between the two transmission sub-qubits; and They represent the anharmonicity of the two transmission sub-qubits respectively; represents the xy coupling strength between the two transporter qubits; and Represent the target microwave amplitudes of the two transmission sub-qubits respectively; Represents the target phase difference between two coherent microwaves.

[0100] Figure 2 A waveform diagram of an ISWAP gate according to an embodiment of the present application is shown. Figure 3 A schematic diagram of data for calibrating dual microwave frequencies that can be used to suppress ZZ coupling according to an embodiment of the present application is shown. Figure 4 A schematic diagram of calibrating the relative phase of dual microwaves according to an embodiment of the present application is shown. Figure 5 A schematic diagram of calibrating dual microwave amplitudes according to an embodiment of the present application is shown.

[0101] In a specific embodiment, the required xy waveform and z waveform are drawn when making a dual microwave ISWAP gate to demonstrate the solution of the present application, such as Figure 2 shown.

[0102] According to the embodiments of the present application, Figure 3 The figure shows the calibration data of scanning dual microwave (i.e. two coherent microwave) frequency points. The horizontal axis represents the discussion of the superimposed ISWAP gate, and the vertical axis represents the sideband frequency driven by the dual microwave. The frequency points used need to avoid points with large leakage, such as the frequency points in the figure where the excitation increases significantly with the increase in the number of rounds.

[0103] like Figure 4 As shown in the figure, the data graph for calibrating the relative phase of dual microwaves is demonstrated. Because the relative phase rather than the absolute phase really affects ZZ coupling, we will choose to fix the phase of one bit and change the driving phase of the other bit. We need to mark the points where the control phase changes less with the increase in the number of quantum gate layers, corresponding to the relative phase points with slower color changes in the figure.

[0104] like Figure 5As shown in the figure, the data graph for calibrating the dual microwave amplitude is demonstrated. In this data graph, when the amplitude is not appropriate, there is still a residual control phase between the two bits, so as the number of rounds increases, the control phase gradually increases. The vertical pattern in the figure, which is always blue, represents the ideal dual microwave amplitude. At this amplitude, because the zz coupling is suppressed to near 0, the control phase will not change with the increase of time.

[0105] According to the embodiment of the present application, the surface code needs an ISWAP gate with the gate time as short as possible. This solution can realize the in-situ correction of the ZZ coupling ISWAP gate by applying the dual microwave and the Z waveform of the coupler at the same time.

[0106] According to the embodiments of the present application, in some cases, such as defects in the preparation of superconducting quantum chips, the z control line of the coupler may be broken, causing the coupler to be uncontrollable. This will cause a certain amount of residual ZZ coupling to always exist between the two bits connected by this coupler. If a single-bit gate is performed on these two bits at the same time, the error rate of the single-bit gate will increase due to the residual ZZ coupling. Through the method of the present application, dual-coherent microwaves can be applied simultaneously to decouple two bits when performing a single-bit gate, solving the problem of residual ZZ coupling caused by a broken coupler.

[0107] Figure 6 A block diagram of a device for generating an ISWAP gate according to an embodiment of the present application is shown.

[0108] like Figure 6 As shown, the ISWAP gate generation device 600 includes a first generation module 610 , a determination module 620 , and a second generation module 630 .

[0109] A first generation module 610 is used to move the frequencies of the two transmission sub-qubits to the same position respectively in response to the gate generation instruction, and to open the XY coupling between the two transmission sub-qubits to form a fermion simulation gate, wherein the fermion simulation gate has a control phase generated by the ZZ coupling;

[0110] A determination module 620, configured to determine microwave parameters according to bit parameters of two transmission sub-qubits in the fermion simulation gate and system parameters of the superconducting quantum circuit;

[0111] The second generating module 630 is used to apply coherent microwaves with microwave parameters in two superconducting quantum circuits respectively to suppress ZZ coupling, thereby modifying the fermion simulation gate into an ISWAP gate.

[0112] According to an embodiment of the present application, by moving the frequencies of the two transmission sub-qubits to the same position respectively and opening the XY coupling between the two transmission sub-qubits, a fermion simulation gate is formed, and microwave parameters are determined according to the bit parameters of the two transmission sub-qubits in the fermion simulation gate and the system parameters of the superconducting quantum circuit, and coherent microwaves are applied in the two superconducting quantum circuits to correct the fermion simulation gate to an ISWAP gate. The method of generating an ISWAP gate in the present application can effectively reduce the gate time, and there is no need to additionally correct the redundant control phase after the gate is made. Reducing the gate time and suppressing the control phase are of great significance for the surface code scheme of quantum error correction.

[0113] According to the embodiments of the present application, any one or more of the modules, submodules, units, and subunits, or at least part of the functions of any one of them can be implemented in one module. According to the embodiments of the present application, any one or more of the modules, submodules, units, and subunits can be split into multiple modules for implementation. According to the embodiments of the present application, any one or more of the modules, submodules, units, and subunits can be at least partially implemented as hardware circuits, such as field programmable gate arrays (FPGAs), programmable logic arrays (PLAs), systems on chips, systems on substrates, systems on packages, application specific integrated circuits (ASICs), or can be implemented by hardware or firmware in any other reasonable way of integrating or packaging the circuit, or in any one of the three implementation methods of software, hardware, and firmware, or in any appropriate combination of any of them. Alternatively, according to the embodiments of the present application, one or more of the modules, submodules, units, and subunits can be at least partially implemented as computer program modules, and when the computer program modules are run, the corresponding functions can be executed.

[0114] For example, any of the first generation module 610, the determination module 620, and the second generation module 630 can be combined in one module / unit / sub-unit for implementation, or any of the modules / units / sub-units can be split into multiple modules / units / sub-units. Alternatively, at least part of the functions of one or more of these modules / units / sub-units can be combined with at least part of the functions of other modules / units / sub-units and implemented in one module / unit / sub-unit. According to an embodiment of the present application, at least one of the first generation module 610, the determination module 620, and the second generation module 630 can be at least partially implemented as a hardware circuit, such as a field programmable gate array (FPGA), a programmable logic array (PLA), a system on a chip, a system on a substrate, a system on a package, an application specific integrated circuit (ASIC), or can be implemented by hardware or firmware such as any other reasonable way of integrating or packaging the circuit, or by any one of the three implementation methods of software, hardware, and firmware, or by a suitable combination of any of them. Alternatively, at least one of the first generating module 610 , the determining module 620 , and the second generating module 630 may be at least partially implemented as a computer program module, and when the computer program module is executed, a corresponding function may be performed.

[0115] It should be noted that the ISWAP gate generation device part in the embodiment of the present application corresponds to the ISWAP gate generation method part in the embodiment of the present application. The description of the ISWAP gate generation device part specifically refers to the ISWAP gate generation method part, which will not be repeated here.

[0116] Figure 7 A block diagram of an electronic device suitable for implementing the method described above according to an embodiment of the present application is shown. Figure 7 The electronic device shown is merely an example and should not bring any limitation to the functions and scope of use of the embodiments of the present application.

[0117] like Figure 7 As shown, the electronic device 700 according to an embodiment of the present application includes a processor 701, which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM) 702 or a program loaded from a storage part 708 to a random access memory (RAM) 703. The processor 701 may include, for example, a general-purpose microprocessor (such as a CPU), an instruction set processor and / or a related chipset and / or a special-purpose microprocessor (for example, an application-specific integrated circuit (ASIC)), etc. The processor 701 may also include an onboard memory for caching purposes. The processor 701 may include a single processing unit or multiple processing units for performing different actions of the method flow according to an embodiment of the present application.

[0118] In RAM 703, various programs and data required for the operation of electronic device 700 are stored. Processor 701, ROM 702 and RAM 703 are connected to each other via bus 704. Processor 701 performs various operations of the method flow according to the embodiment of the present application by executing the program in ROM 702 and / or RAM 703. It should be noted that the program can also be stored in one or more memories other than ROM 702 and RAM 703. Processor 701 can also perform various operations of the method flow according to the embodiment of the present application by executing the program stored in the one or more memories.

[0119] According to an embodiment of the present application, the electronic device 700 may further include an input / output (I / O) interface 705, which is also connected to the bus 704. The electronic device 700 may further include one or more of the following components connected to the input / output (I / O) interface 705: an input portion 706 including a keyboard, a mouse, etc.; an output portion 707 including a cathode ray tube (CRT), a liquid crystal display (LCD), etc., and a speaker, etc.; a storage portion 708 including a hard disk, etc.; and a communication portion 709 including a network interface card such as a LAN card, a modem, etc. The communication portion 709 performs communication processing via a network such as the Internet. A drive 710 is also connected to the input / output (I / O) interface 705 as needed. A removable medium 711, such as a magnetic disk, an optical disk, a magneto-optical disk, a semiconductor memory, etc., is installed on the drive 710 as needed, so that a computer program read therefrom is installed into the storage portion 708 as needed.

[0120] According to an embodiment of the present application, the method flow according to the embodiment of the present application can be implemented as a computer software program. For example, an embodiment of the present application includes a computer program product, which includes a computer program carried on a computer-readable storage medium, and the computer program includes a program code for executing the method shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed from the network through the communication part 709, and / or installed from the removable medium 711. When the computer program is executed by the processor 701, the above-mentioned functions defined in the system of the embodiment of the present application are executed. According to an embodiment of the present application, the system, equipment, device, module, unit, etc. described above can be implemented by a computer program module.

[0121] The present application also provides a computer-readable storage medium, which may be included in the device / apparatus / system described in the above embodiments; or may exist independently without being assembled into the device / apparatus / system. The above computer-readable storage medium carries one or more programs, and when the above one or more programs are executed, the method according to the embodiment of the present application is implemented.

[0122] According to an embodiment of the present application, the computer-readable storage medium may be a non-volatile computer-readable storage medium. For example, it may include, but is not limited to: a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination thereof. In the present application, a computer-readable storage medium may be any tangible medium containing or storing a program that may be used by or in combination with an instruction execution system, apparatus, or device.

[0123] For example, according to an embodiment of the present application, the computer-readable storage medium may include the ROM 702 and / or the RAM 703 described above and / or one or more memories other than the ROM 702 and the RAM 703 .

[0124] An embodiment of the present application also includes a computer program product, which includes a computer program, and the computer program contains program code for executing the method provided by the embodiment of the present application. When the computer program product runs on an electronic device, the program code is used to enable the electronic device to implement the method provided by the embodiment of the present application.

[0125] When the computer program is executed by the processor 701, the above functions defined in the system / device of the embodiment of the present application are executed. According to the embodiment of the present application, the system, device, module, unit, etc. described above can be implemented by a computer program module.

[0126] In one embodiment, the computer program may rely on tangible storage media such as optical storage devices, magnetic storage devices, etc. In another embodiment, the computer program may also be transmitted and distributed in the form of signals on a network medium, and downloaded and installed through the communication part 709, and / or installed from the removable medium 711. The program code contained in the computer program may be transmitted using any appropriate network medium, including but not limited to: wireless, wired, etc., or any suitable combination of the above.

[0127] According to an embodiment of the present application, the program code for executing the computer program provided by the embodiment of the present application can be written in any combination of one or more programming languages, and specifically, these computing programs can be implemented using high-level process and / or object-oriented programming languages, and / or assembly / machine languages. Programming languages ​​include, but are not limited to, such as Java, C++, python, "C" language or similar programming languages. The program code can be executed entirely on the user computing device, partially on the user device, partially on the remote computing device, or completely on the remote computing device or server. In the case of a remote computing device, the remote computing device can be connected to the user computing device through any type of network, including a local area network (LAN) or a wide area network (WAN), or can be connected to an external computing device (e.g., using an Internet service provider to connect through the Internet).

[0128] The flowcharts and block diagrams in the accompanying drawings illustrate the possible architecture, functions and operations of the systems, methods and computer program products according to various embodiments of the present application. In this regard, each box in the flowchart or block diagram may represent a module, a program segment, or a part of a code, and the above-mentioned module, program segment, or a part of the code contains one or more executable instructions for realizing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the box may also occur in a different order from the order marked in the accompanying drawings. For example, two boxes represented in succession can actually be executed substantially in parallel, and they may sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram or flowchart, and the combination of the boxes in the block diagram or flowchart, can be implemented with a dedicated hardware-based system that performs a specified function or operation, or can be implemented with a combination of dedicated hardware and computer instructions. It will be appreciated by those skilled in the art that the features recorded in the various embodiments of the present application can be combined and / or combined in a variety of ways, even if such a combination or combination is not clearly recorded in the present application. In particular, without departing from the spirit and teachings of the present application, the features described in the various embodiments of the present application may be combined and / or combined in a variety of ways. All of these combinations and / or combinations fall within the scope of the present application.

[0129] The embodiments of the present application are described above. However, these embodiments are only for the purpose of illustration, and are not intended to limit the scope of the present application. Although each embodiment is described above, this does not mean that the measures in each embodiment cannot be used in combination advantageously. The present application does not depart from the scope of the present application, and those skilled in the art may make various substitutions and modifications, which should all fall within the scope of the present application.

Claims

1. A method for generating an ISWAP gate, characterized in that: include: In response to the gate generation instruction, the frequencies of the two transmission sub-qubits are respectively moved to the same position, and the XY coupling between the two transmission sub-qubits is turned on to form a fermion simulation gate, wherein the fermion simulation gate has a control phase generated by the ZZ coupling; Determining microwave parameters according to the bit parameters of the two transmission sub-qubits in the fermion simulation gate and the system parameters of the superconducting quantum circuit; Coherent microwaves with the microwave parameters are applied to the two superconducting quantum circuits respectively to suppress the ZZ coupling, thereby modifying the fermion simulation gate into the ISWAP gate.

2. The method according to claim 1, characterized in that Determining microwave parameters according to the bit parameters of the two transmission sub-qubits in the fermion simulation gate and the system parameters of the superconducting quantum circuit includes: Determining a microwave frequency interval according to the bit frequencies of the two transmission sub-qubits; Determining a microwave amplitude range according to waveform parameters of an arbitrary wave generator in the superconducting quantum circuit; According to the microwave frequency interval, the microwave amplitude interval and the preset phase interval, a target microwave frequency, a target microwave amplitude and a target phase difference are determined, wherein the microwave parameters include the target microwave frequency, the target microwave amplitude and the target phase difference.

3. The method according to claim 2, characterized in that Determining a target microwave frequency, a target microwave amplitude and a target phase difference according to the microwave frequency interval, the microwave amplitude interval and the preset phase interval includes: For any target parameter, determining associated parameter values ​​of the other two associated parameters, wherein the target parameter includes the microwave amplitude interval or the preset phase interval, and the associated parameter includes the microwave frequency interval and one of the following: the preset phase interval and the microwave amplitude interval; Iteratively determining i initial parameter values ​​of the target parameter according to the parameter interval of the target parameter; For an i-th initial parameter value, based on the i-th initial parameter value of the target parameter and the associated parameter values ​​of the two associated parameters, calculating a control phase between the two transmission sub-qubits; In a case where the control phase satisfies a preset threshold, the i-th initial parameter value is determined as a target parameter value of the target parameter.

4. The method according to claim 3, characterized in that Calculating a control phase between two transmission sub-qubits based on the i-th initial parameter value of the target parameter and the associated parameter values ​​of the two associated parameters comprises: In a case where the target parameter is the target microwave frequency, scanning the microwave frequency interval to determine i initial microwave frequency values; Calculating a control phase corresponding to each of the initial microwave frequency values; In a case where the target parameter is the target microwave amplitude, scanning the microwave frequency interval to determine i initial microwave amplitude values; Calculating the control phase corresponding to each of the initial microwave amplitude values; When the target parameter is the target phase difference, fixing the microwave phase on one of the transmission sub-qubits, and scanning the microwave phase on another transmission sub-qubit based on the preset phase interval to determine i initial microwave phase values; For each of the initial microwave phase values, a control phase between two transmission sub-qubits is calculated.

5. The method according to claim 1, characterized in that The microwave parameters include target microwave frequency, target microwave amplitude and target phase difference; Wherein, applying coherent microwaves with the microwave parameters to the two superconducting quantum circuits respectively to suppress the ZZ coupling, thereby correcting the fermion simulation gate to the ISWAP gate, comprises: Applying coherent microwaves having the target microwave frequency to the two superconducting quantum circuits respectively, wherein the two transmission sub-qubits in the superconducting quantum circuits have the target microwave amplitude, and the two coherent microwaves have the target phase difference; Calculating an equivalent ZZ coupling value in the superconducting quantum circuit; When the equivalent ZZ coupling value is a preset value, the ISWAP gate is generated.

6. The method according to claim 5, characterized in that The equivalent ZZ coupling value is shown in formula (1): （1） in, represents the ZZ coupling introduced when xy coupling is turned on, represents the ZZ coupling introduced by dual coherent microwaves; represents the frequency difference between the bit frequency of the first transmitted sub-qubit and the target microwave frequency of the coherent microwave, represents the frequency difference between the bit frequency of the second transmission sub-qubit and the target microwave frequency of the coherent microwave, represents the frequency difference between the two transmission sub-qubits; and They represent the anharmonicity of the two transmission sub-qubits respectively; represents the xy coupling strength between the two transporter qubits; and Represent the target microwave amplitudes of the two transmission sub-qubits respectively; Represents the target phase difference between two coherent microwaves.

7. A device for generating an ISWAP gate, characterized in that: include: A first generation module is used to move the frequencies of the two transmission sub-qubits to the same position respectively in response to the gate generation instruction, and open the XY coupling between the two transmission sub-qubits to form a fermion simulation gate, wherein the fermion simulation gate has a control phase generated by the ZZ coupling; A determination module, used to determine microwave parameters according to the bit parameters of the two transmission sub-qubits in the fermion simulation gate and the system parameters of the superconducting quantum circuit; The second generating module is used to apply coherent microwaves with the microwave parameters in the two superconducting quantum circuits respectively to suppress the ZZ coupling, thereby modifying the fermion simulation gate into the ISWAP gate.

8. An electronic device, characterized in that: include: one or more processors; a memory for storing one or more programs, When the one or more programs are executed by the one or more processors, the one or more processors implement the method according to any one of claims 1 to 6.

9. A computer-readable storage medium having executable instructions stored thereon, characterized in that: When the instruction is executed by a processor, the processor implements the method according to any one of claims 1 to 6.

10. A computer program product, characterized in that A computer program is included which, when executed by a processor, implements the method according to any one of claims 1 to 6.

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