Display device and driving method of display panel

Abstract

The invention discloses a display device which comprises a display panel and a control system. The display panel comprises a plurality of pixel groups. Each pixel group comprises a plurality of sub-pixel circuits and a pulse width modulation circuit. The sub-pixel circuit receives the pulse wave amplitude modulation data and controls the luminous intensity. The pulse width modulation circuit receives the pulse width modulation data and controls the light emitting time. The control system is used for receiving image information containing the current gray-scale value of the sub-pixel circuit; establishing pulse width modulation data based on the current gray-scale value through a first lookup table; converting the current gray-scale value into a target gray-scale value through a second lookup table, wherein the target gray-scale value corresponds to the pulse wave amplitude modulation data; and outputting the image information with the pulse width modulation data and the target gray-scale value.

Description

Technical Field

[0001] The present disclosure relates to a display device and a driving method of a display panel. Background Art

[0002] In applications where the display screen has both high grayscale areas and low grayscale areas (e.g., a dial whose pointer display area is high grayscale and whose background is medium to low grayscale), as the grayscale value decreases, the driving current of the light-emitting element will also decrease, which not only causes greater power loss but also reduces the overall efficiency. Whether it is red sub-pixels, green sub-pixels or blue sub-pixels, the smaller the driving current, the greater the decline in efficiency, and the efficiency decline of red sub-pixels is the most significant. Summary of the invention

[0003] Therefore, the embodiment of the present disclosure provides a display device, including a display panel and a control system. The display panel includes a plurality of pixel groups. Each pixel group includes a plurality of sub-pixel circuits and a pulse width modulation circuit. The sub-pixel circuits are configured to receive pulse amplitude modulation data respectively, and control the luminous intensity of these sub-pixel circuits according to the pulse amplitude modulation data. The pulse width modulation circuit is configured to receive pulse width modulation data, and control the luminous time of these sub-pixel circuits according to the pulse width modulation data. The control system is configured to perform: receiving image information of a display panel, wherein the image information includes a current grayscale value of each sub-pixel circuit; establishing pulse width modulation data based on the current grayscale value through a first lookup table, wherein the first lookup table includes a plurality of input grayscale values ​​and a plurality of output pulse width modulation data corresponding to these input grayscale values; converting the current grayscale value into a target grayscale value through a second lookup table, wherein the target grayscale value corresponds to pulse amplitude modulation data, and the second lookup table includes these input grayscale values ​​and a plurality of output grayscale values ​​corresponding to these input grayscale values; and controlling the display panel to display the image information having the pulse width modulation data and the target grayscale value.

[0004] According to an embodiment of the present disclosure, the sub-pixel circuits include a red sub-pixel circuit, a green sub-pixel circuit and a blue sub-pixel circuit, and the red sub-pixel circuit, the green sub-pixel circuit and the blue sub-pixel circuit are respectively controlled by different pulse width modulation circuits.

[0005] According to an embodiment of the present disclosure, the control system is further configured to establish a second lookup table, and the step of establishing the second lookup table further includes: generating a plurality of grayscale intervals based on a ramp signal and a duty cycle multiple corresponding to the ramp signal, so as to divide these input grayscale values ​​into these grayscale intervals, wherein the duty cycle multiple corresponding to the first grayscale interval of these grayscale intervals is smaller than the duty cycle multiples of the remaining grayscale intervals; calculating the target brightness of these input grayscale values ​​through a gamma curve; and taking these input grayscale values ​​in the first grayscale interval, respectively recording these output grayscale values ​​required for these input grayscale values ​​in the remaining grayscale intervals to achieve the target brightness based on the duty cycle multiples.

[0006] According to an embodiment of the present disclosure, the input grayscale value of the first grayscale range includes 0 to 95.

[0007] According to an embodiment of the present disclosure, the control system further comprises a ramp signal generating circuit configured to generate a ramp signal and supply the ramp signal to the pulse width modulation circuit.

[0008] According to an embodiment of the present disclosure, a driving circuit is further included. The driving circuit is disposed between the display panel and the control system and is configured to drive the pixel groups of the display panel.

[0009] According to an embodiment of the present disclosure, the pulse width modulation circuit includes a first capacitor, a first transistor, a second transistor, a third transistor, a fourth transistor and a second capacitor. The first end of the first capacitor receives a scan signal, and the second end thereof is coupled to the first node. The first end of the first transistor is coupled to the first node, the second end thereof receives pulse amplitude modulation data, and the control end thereof receives a second scan signal. The first end of the second transistor is coupled to the first system high voltage, and the control end thereof is coupled to the first node. The first end of the third transistor is coupled to the second end of the second transistor, the second end thereof is coupled to the third node, and the control end thereof receives a light emitting signal. The first end of the fourth transistor is coupled to the third node, the second end thereof is coupled to the first system low voltage, and the control end thereof receives a reset signal. The first end of the second capacitor is coupled to the third node, and the second end thereof is coupled to the first system low voltage.

[0010] According to an embodiment of the present disclosure, each sub-pixel circuit includes a light-emitting element, a fifth transistor, a sixth transistor, a third capacitor, a seventh transistor, an eighth transistor, a ninth transistor, a tenth transistor, and an eleventh transistor. The cathode terminal of the light-emitting element receives a second system low voltage. The first terminal of the fifth transistor receives a first reference voltage, the second terminal thereof is coupled to the fourth node, and the control terminal thereof receives a light-emitting signal. The first terminal of the sixth transistor is coupled to the fourth node, the second terminal thereof receives a pulse amplitude modulation data, and the control terminal thereof receives a second scanning signal. The first terminal of the third capacitor is coupled to the fourth node, and the second terminal thereof is coupled to the fifth node. The first terminal of the seventh transistor is coupled to the fifth node, the second terminal thereof is coupled to the sixth node, and the control terminal thereof receives the second scanning signal. The first terminal of the eighth transistor is coupled to the sixth node, the second terminal thereof is coupled to the seventh node, and the control terminal thereof receives the second scanning signal. The first terminal of the ninth transistor is coupled to the sixth node, the second terminal thereof receives the second reference voltage, and the control terminal thereof receives the first scanning signal. The first terminal of the tenth transistor receives a second system high voltage, the second terminal thereof is coupled to the seventh node, and the control terminal thereof is coupled to the fifth node. A first terminal of the eleventh transistor is coupled to the seventh node, a second terminal of the eleventh transistor is coupled to the anode terminal of the light emitting element, and a control terminal of the eleventh transistor is coupled to the third node.

[0011] A method for driving a display panel, the display panel comprising a plurality of pixel groups, wherein each pixel group comprises a plurality of sub-pixel circuits, the method comprising receiving image information of the display panel, wherein the image information comprises a current grayscale value of each sub-pixel circuit; establishing pulse width modulation data based on the current grayscale value by using a first lookup table, wherein the first lookup table comprises a plurality of input grayscale values ​​and a plurality of output pulse width modulation data corresponding to the input grayscale values; converting the current grayscale value into a target grayscale value by using a second lookup table, wherein the target grayscale value corresponds to pulse amplitude modulation data, and the second lookup table comprises the input grayscale values ​​and a plurality of output grayscale values ​​corresponding to the input grayscale values; and displaying the image information having the pulse width modulation data and the target grayscale value.

[0012] According to an embodiment of the present disclosure, the driving method further includes establishing a second lookup table, and the step of establishing the second lookup table further includes generating a plurality of grayscale intervals according to a ramp signal and a duty cycle multiple corresponding to the ramp signal, so as to divide these input grayscale values ​​into these grayscale intervals, wherein the duty cycle multiple corresponding to the first grayscale interval of these grayscale intervals is smaller than the duty cycle multiples of the remaining grayscale intervals; calculating the target brightness of these input grayscale values ​​through a gamma curve; and taking these input grayscale values ​​in the first grayscale interval, respectively recording these output grayscale values ​​required for these input grayscale values ​​in the remaining grayscale intervals to achieve the target brightness based on the duty cycle multiples. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] To make the above and other features, advantages and embodiments of the present invention more understandable, the accompanying drawings are described as follows:

[0014] Figure 1 is a schematic diagram of a display device according to an embodiment of the present invention;

[0015] Figure 2A and Figure 2B It is a schematic diagram of a pulse width modulation circuit controlling a sub-pixel circuit according to an embodiment of the present invention;

[0016] Figure 3 A schematic diagram of a pulse width modulation circuit according to an embodiment of the present invention;

[0017] Figure 4 is a schematic diagram of a sub-pixel circuit according to an embodiment of the present invention;

[0018] Figure 5 is a schematic diagram of a method for driving a display panel according to an embodiment of the present invention;

[0019] Figures 6 to 9 It is a schematic diagram of applying a driving method to generate image information having pulse width modulation data and a target grayscale value according to an embodiment of the present invention;

[0020] Fig.10 is a schematic diagram of a first lookup table according to an embodiment of the present invention;

[0021] Fig.11 is a schematic diagram of a second lookup table according to an embodiment of the present invention;

[0022] Fig.12 is a schematic diagram of the relationship between the input grayscale value and the output grayscale value of the second lookup table according to an embodiment of the present invention; and

[0023] Fig.13 FIG. 4 is a schematic diagram showing the relationship between the pulse width modulation data of the first lookup table and the output grayscale value according to an embodiment of the present invention.

[0024] Wherein, the reference numerals are:

[0025] 100: Display device

[0026] 110: Display panel

[0027] 111: Pixel group

[0028] 120: Control system

[0029] 121: Operation module

[0030] 122: Ramp signal generating circuit

[0031] 130: driving circuit

[0032] 200: Driving method

[0033] 210,220,230,240: Steps

[0034] COF: Chip on Film

[0035] C1-C3: Capacitors

[0036] D1: Oblique straight line

[0037] EM: Luminescent signal

[0038] Gin: Input grayscale value

[0039] Gout: Output grayscale value

[0040] R,G,B: Sub-pixel circuit

[0041] R1, G1, B1: Current grayscale value

[0042] R2, G2, B2: Grayscale value

[0043] RT,GT,BT: target grayscale value

[0044] I1, I2: Image information

[0045] ILED: driving current

[0046] LED: Light Emitting Element

[0047] L1: First Lookup Table

[0048] L2: Second lookup table

[0049] N1-N7: Node

[0050] P: Pulse Width Modulation Circuit

[0051] PEM_H, OVDD: system high voltage

[0052] PEM_L, OVSS: system low voltage

[0053] PAM_data: Pulse Amplitude Modulation Data

[0054] PWM_data: pulse width modulation data

[0055] PEM: Control Signal

[0056] RST_PEM: reset signal

[0057] SWEEP: ramp signal

[0058] S1: first scanning signal

[0059] S2: Second scanning signal

[0060] Step1-Step4: Grayscale interval

[0061] T1-T11: Transistor

[0062] VP: First reference voltage

[0063] VN: Second reference voltage DETAILED DESCRIPTION

[0064] The following disclosure provides many different embodiments or examples for implementing different features of the provided invention. The embodiments of components and configurations described below are provided as examples only and are not intended to be limiting. In addition, for the purpose of simplicity and clarity, the disclosure repeats reference symbols and / or numbers in each example, which in itself does not limit the relationship between the various embodiments and / or components discussed.

[0065] Please refer to Figure 1 , Figure 1 1 is a schematic diagram of a display device 100 according to an embodiment of the present invention. The display device 100 includes a display panel 110 and a control system 120. The display panel 110 includes a plurality of pixel groups 111 arranged in rows and columns, and each pixel group 111 includes sub-pixel circuits R, G, B and a pulse width modulation circuit P. The sub-pixel circuits R, G, B may represent a red sub-pixel, a green sub-pixel and a blue sub-pixel, respectively, and the red sub-pixel, the green sub-pixel and the blue sub-pixel constitute a basic unit pixel on the display panel 110.

[0066] The pulse width modulation circuit P occupies the pixel space on the display panel 110 like the sub-pixel circuits R, G, and B. In other words, the pulse width modulation circuit P increases the image information resolution of the display panel 110. For example but not limited to this, in the case where the pulse width modulation circuit P is not included, the image information resolution is [H]×[W], and in the case where the pulse width modulation circuit P is included, the image information resolution is

[0067] The display device 100 further includes a driving circuit 130. The driving circuit 130 is disposed between the display panel 110 and the control system 120, and is configured to drive the light-emitting elements in the pixel group 111. The driving circuit 130 can receive the image information I1 having the pulse width modulation data PWM_data and the pulse amplitude modulation data PAM_data from the control system 120, and control the amplitude and width of the driving current flowing through the light-emitting element according to the pulse width modulation data PWM_data and the pulse amplitude modulation data PAM_data, thereby controlling the light-emitting time and light-emitting intensity of the light-emitting element. In an embodiment of the present invention, the driving circuit 130 can be disposed on a film, and its construction method is, for example, a chip on film (COF).

[0068] In the embodiment of the present invention, the control system 120 further includes a calculation module 121. The calculation module 121 is used to calculate the pulse width modulation data PWM_data and the pulse amplitude modulation data PAM_data on the image information I1 received by the control system 120, thereby generating new image information I2. Specifically, the calculation module 121 receives the grayscale values ​​of the sub-pixel circuits R, G, and B, and establishes the pulse width modulation data PWM_data through the built-in first lookup table L1, and adjusts the grayscale values ​​of the sub-pixel circuits R, G, and B to the target grayscale values ​​through the built-in second lookup table L2, so that the image information I2 finally output includes the pulse width modulation data PWM_data and the pulse amplitude modulation data PAM_data.

[0069] In an embodiment of the present invention, the control system 120 further includes a ramp signal generating circuit 122. The ramp signal generating circuit 122 is configured to generate a ramp signal SWEEP to the pulse width modulation circuit P, so that the pulse width modulation circuit P can synthesize the required control signal PEM based on the ramp signal SWEEP and the pulse width modulation data PWM_data to further control the light emitting time of the light emitting elements in the sub-pixel circuits R, G, and B.

[0070] Please refer to Figure 2A , Figure 2A FIG. 1 is a schematic diagram of a pulse width modulation circuit P controlling sub-pixel circuits R, G, and B according to an embodiment of the present invention. Figure 2A In the example of FIG. 1 , a pulse width modulation circuit P can be used to control a basic unit pixel, including a sub-pixel circuit R, a sub-pixel circuit G, and a sub-pixel circuit B. In the embodiment of the present invention, a pulse width modulation circuit P is equivalent to occupying the same pixel space (i.e., the physical position on the display panel 110) as a sub-pixel circuit R, G, or B.

[0071] Please refer to Figure 2B , Figure 2B FIG. 1 is a schematic diagram of a pulse width modulation circuit P controlling sub-pixel circuits R, G, and B according to another embodiment of the present invention. Figure 2B In the example of FIG. 1 , a pulse width modulation circuit P can be used to control a sub-pixel circuit R, G or B. In such an implementation, each sub-pixel circuit R, G or B can be regulated separately, so that the luminous efficiency of each sub-pixel circuit R, G and B can be improved, or the sub-pixel circuit R with lower efficiency can be regulated to improve the overall efficiency.

[0072] Please refer to Figure 3 , Figure 3 FIG. 1 is a schematic diagram of a pulse width modulation circuit P according to an embodiment of the present invention. The pulse width modulation circuit P comprises a first capacitor C1, a first transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4 and a second capacitor C2.

[0073] The first end of the first capacitor C1 receives the ramp signal SWEEP, and the second end thereof is coupled to the first node N1. The first end of the first transistor T1 is coupled to the first node N1, the second end thereof receives the pulse width modulation data PWM_data, and the control end thereof receives the second scan signal S2. The first end of the second transistor T2 is coupled to the system high voltage PEM_H, the second end thereof is coupled to the second node N2, and the control end thereof is coupled to the first node N1. The first end of the third transistor T3 is coupled to the second node N2, the second end thereof is coupled to the third node N3, and the control end thereof receives the light emitting signal EM. The first end of the fourth transistor T4 is coupled to the third node N3, the second end thereof is coupled to the system low voltage PEM_L, and the control end thereof receives the reset signal RST_PEM. The first end of the second capacitor C2 is coupled to the third node N3, and the second end thereof is coupled to the system low voltage PEM_L.

[0074] The pulse width modulation circuit P generates a control signal PEM at a node N3 according to the pulse width modulation data PWM_data, the second scanning signal S2, the light emitting signal EM, the reset signal RST_PEM, the ramp signal SWEEP, the system high voltage PEM_H and the system low voltage PEM_L. The control signal PEM is then transmitted to the sub-pixel circuits R, G, B via the node N3, thereby controlling the time when the driving current ILED flows through the light emitting element LED in the sub-pixel circuits R, G, B.

[0075] Please refer to Figure 4 , Figure 4Schematic diagram of sub-pixel circuits R, G, B according to an embodiment of the present invention, wherein the sub-pixel circuits R, G, B can be regarded as pulse amplitude modulation circuits. Each sub-pixel circuit (R, G or B) includes a fifth transistor T5, a sixth transistor T6, a third capacitor C3, a seventh transistor T7, an eighth transistor T8, a ninth transistor T9, a tenth transistor T10 and an eleventh transistor T11.

[0076] The first end of the fifth transistor T5 receives the first reference voltage VP, the second end thereof is coupled to the fourth node N4, and the control end thereof receives the light emitting signal EM. The first end of the sixth transistor T6 is coupled to the fourth node N4, the second end thereof receives the pulse amplitude modulation data PAM_data, and the control end thereof receives the second scanning signal S2. The first end of the third capacitor C3 is coupled to the fourth node N4, and the second end thereof is coupled to the fifth node N5. The first end of the seventh transistor T7 is coupled to the fifth node N5, the second end thereof is coupled to the sixth node N6, and the control end thereof receives the second scanning signal S2.

[0077] The first end of the eighth transistor T8 is coupled to the sixth node N6, the second end thereof is coupled to the seventh node N7, and the control end thereof receives the second scan signal S2. The first end of the ninth transistor T9 is coupled to the sixth node N6, the second end thereof receives the second reference voltage VN, and the control end thereof receives the first scan signal S1. The first end of the tenth transistor T10 receives the system high voltage OVDD, the second end thereof is coupled to the seventh node N7, and the control end thereof is coupled to the fifth node N5. The first end of the eleventh transistor T11 is coupled to the seventh node N7, the second end thereof is coupled to the anode end of the light emitting element LED, the control end thereof is coupled to the third node N3 of the pulse width modulation circuit P to receive the control signal PEM, and the cathode end of the light emitting element LED receives the system low voltage OVSS.

[0078] Based on the pulse width modulation circuit P and the sub-pixel circuits R, G, and B, the pulse amplitude modulation data PAM_data can determine the size of the driving current ILED flowing through the light-emitting element LED (i.e., the luminous intensity or brightness), and the synthetic signal of the ramp signal SWEEP and the pulse width modulation data PWM_data determines the time when the driving current ILED flows through the light-emitting element LED (i.e., the luminous time).

[0079] Please refer to Figure 5 , Figure 5 FIG. 2 is a schematic diagram of a display panel driving method 200 according to an embodiment of the present invention. The driving method 200 includes steps 210 to 240, and is combined with Figures 6 to 11 The schematic diagrams shown here can provide a better understanding of the present invention.

[0080] In step 210, the image information I1 of the display panel 110 is first received to obtain the current grayscale values ​​R1, G1 and B1 of each sub-pixel circuit R, G and B. Figure 6 In the example of , the resolution of the image information I1 is

[156] ×

[156] , and it includes five grayscale blocks corresponding to five current grayscale values ​​of 0, 64, 129, 193 and 255 respectively.

[0081] Next, the operation module 121 adds the PWM channel to the image information I1 to subsequently establish the pulse width modulation data PWM_data. Figure 7 As shown, multiple PWM channels are added to the horizontal width of the image information I1, so that the resolution changes from the original

[156] ×

[156] to

[156] ×

[208] . In the current state where the pulse width modulation data PWM_data has not yet been filled in, each PWM channel is a full black grayscale.

[0082] In step 220 , the pulse width modulation data PWM_data is established based on the current grayscale values ​​R1 , G1 and B1 of each sub-pixel circuit R, G and B through the first lookup table L1 .

[0083] Please refer to Figure 8 and Fig.10 In the block where the current grayscale values ​​R1, G1 and B1 of the image information I1 are 0, the order Step corresponds to the first order of the first lookup table L1 (i.e., the current grayscale value is between 0 and 95), so the pulse width modulation data PWM_data with grayscale values ​​R2, G2 and B2 of 127 are respectively established in the PWM channel to respectively control the sub-pixel circuits R, G and B. In other words, in the block where the current grayscale value of the image information I1 is 0, the pulse width modulation data PWM_data established by the sub-pixel circuits R, G and B are 3.3V, 2.8V and 3.3V respectively, and the corresponding grayscale values ​​R2, G2 and B2 can be expressed as (127, 127, 127).

[0084] In the block where the current grayscale value R1, G1 and B1 of the image information I1 is 64, the order Step corresponds to the first order of the first lookup table L1 (i.e., the current grayscale value is between 0 and 95), so the pulse width modulation data PWM_data with grayscale values ​​R2, G2 and B2 of 127 is established in the PWM channel to respectively control the sub-pixel circuits R, G and B. In other words, in the block where the current grayscale value of the image information I1 is 64, the pulse width modulation data PWM_data established by the sub-pixel circuits R, G and B are 3.3V, 2.8V and 3.3V respectively, and the corresponding grayscale values ​​R2, G2 and B2 can be expressed as (127, 127, 127).

[0085] In the block where the current grayscale values ​​R1, G1 and B1 of the image information I1 are 129, the order Step corresponds to the second order of the first lookup table L1 (i.e., the current grayscale value is between 96 and 168), so the pulse width modulation data PWM_data with grayscale values ​​R2, G2 and B2 of 143 are respectively established in the PWM channel to respectively control the sub-pixel circuits R, G and B. In other words, in the block where the current grayscale value of the image information I1 is 129, the pulse width modulation data PWM_data established by the sub-pixel circuits R, G and B are 3.7V, 3.1V and 3.4V respectively, and the corresponding grayscale values ​​R2, G2 and B2 can be expressed as (143, 143, 143).

[0086] In the block where the current grayscale values ​​R1, G1 and B1 of the image information I1 are 193, the order Step corresponds to the third order of the first lookup table L1 (i.e., the current grayscale value is between 169 and 216), so the pulse width modulation data PWM_data with grayscale values ​​R2, G2 and B2 of 239 are respectively established in the PWM channel to respectively control the sub-pixel circuits R, G and B. In other words, in the block where the current grayscale value of the image information I1 is 193, the pulse width modulation data PWM_data established by the sub-pixel circuits R, G and B are 4.7V, 4.2V and 4.5V respectively, and the corresponding grayscale values ​​R2, G2 and B2 can be expressed as (239, 239, 239).

[0087] In the block where the current grayscale values ​​R1, G1 and B1 of the image information I1 are 255, the order Step corresponds to the fourth order of the first lookup table L1 (i.e., the current grayscale value is between 217 and 255), so the pulse width modulation data PWM_data with grayscale values ​​R2, G2 and B2 of 250 are respectively established in the PWM channel to respectively control the sub-pixel circuits R, G and B. In other words, in the block where the current grayscale value of the image information I1 is 255, the pulse width modulation data PWM_data established by the sub-pixel circuits R, G and B are 5.4V, 5.1V and 5.2V respectively, and the corresponding grayscale values ​​R2, G2 and B2 can be expressed as (250, 250, 250).

[0088] After completing step 220 , step 230 is then performed to convert the current grayscale values ​​R1 , G1 and B1 of each sub-pixel circuit R, G and B into target grayscale values ​​RT, GT and BT through the second lookup table L2 .

[0089] Please refer to Fig. 9 and Fig.11, in the block where the current grayscale values ​​R1, G1 and B1 of the image information I1 are 129, the order Step corresponds to the second order of the second lookup table L2 (i.e., the current grayscale value is between 96 and 168), and the target grayscale values ​​RT, GT and BT to be converted are between grayscale 51 and grayscale 90. Through interpolation calculation, it can be calculated that the current grayscale value is 129 and needs to be converted to the target grayscale value 69, so Fig. 9 It is represented as (69,69,69) in Chinese.

[0090] In the block where the current grayscale value of the image information I1 is 193, its level corresponds to the third level of the second lookup table L2 (i.e., the current grayscale value is between 169 and 216), and the target grayscale values ​​RT, GT, and BT to be converted are between grayscale 71 and grayscale 90. Through interpolation calculation, it can be calculated that the current grayscale value is 193 and needs to be converted to the target grayscale value 81. Fig. 9 In the figure, it is represented as (81,81,81). Similarly, the current grayscale values ​​R1, G1 and B1 of all regions are converted into target grayscale values ​​RT, GT and BT. So far, the image information I1 has been converted into new image information I2.

[0091] In step 240 , the new image information I2 is transmitted to the driving circuit 130 via the control system 120 , and the driving circuit 130 further drives the display panel 110 to display the image information I2 having the pulse width modulation data PWM_data and the target grayscale values ​​RT, GT and BT.

[0092] In an embodiment of the present invention, the driving method 200 further includes building a second lookup table L2. Fig.12 As shown, firstly, a plurality of grayscale intervals (or steps) Step1 to Step4 are generated according to the ramp signal SWEEP and the duty cycle multiple Duty corresponding to the ramp signal SWEEP, so as to divide the input grayscale value Gin (grayscale 0 to grayscale 255) on the horizontal axis into the grayscale intervals Step1 to Step4.

[0093] In an embodiment of the present invention, input grayscale values ​​0 to 95 are divided into grayscale interval Step1, input grayscale values ​​96 to 168 are divided into grayscale interval Step2, input grayscale values ​​169 to 216 are divided into grayscale interval Step3, and input grayscale values ​​217 to 255 are divided into grayscale interval Step4.

[0094] In the embodiment of the present invention, the ramp signal SWEEP may be pre-set with a corresponding duty cycle multiple Duty, so that it can be combined with different pulse width modulation data PWM_data to generate light-emitting times of different widths. In the embodiment of the present invention, the duty cycle multiple Duty corresponding to the grayscale interval Step1 is smaller than the duty cycle multiple Duty of the remaining grayscale intervals Step1 to Step4. In other words, the grayscale interval Step1 has the narrowest width of light-emitting time, while the grayscale interval Step4 has the widest width of light-emitting time.

[0095] Next, the input grayscale value Gin (grayscale value 0 to grayscale value 95) of the grayscale interval Step1 is adjusted by the gamma curve, so that the grayscale value 0 to grayscale value 95 is bounded with the target brightness, and an inclined straight line D1 in the grayscale interval Step1 is generated. Fig.11 According to the values ​​recorded in the second lookup table L2, in the grayscale interval Step1, the output grayscale value Gout (corresponding to the target grayscale values ​​RT, GT and BT) is the same as the input grayscale value Gin (corresponding to the current grayscale values ​​R1, G1 and B1).

[0096] After completing the target brightness binding of the input grayscale values ​​in the grayscale interval Step1, the target brightness of the input grayscale values ​​Gin (grayscale value 96 to grayscale value 255) in the remaining grayscale intervals Step2 to Step4 is calculated using the gamma curve.

[0097] Finally, the input grayscale values ​​0 to 95 in the grayscale interval Step1 are taken, and the input grayscale values ​​(grayscale value 96 to grayscale value 255) in the remaining grayscale intervals Step2 to Step4 are recorded respectively to achieve the output grayscale value Gout required for the target brightness based on the duty cycle multiple Duty.

[0098] Specifically, since the remaining grayscale intervals Step2 to Step4 have a greater luminous duration than the grayscale interval Step1, only a lower output grayscale value Gout is required to achieve the ideal target brightness. For example, the grayscale interval Step2 has a greater luminous duration than the grayscale interval Step1, so that when the input grayscale value 168 in the grayscale interval Step2 is compared with the grayscale interval Step1, the output grayscale value actually only needs to be 90 to achieve the ideal target brightness when the input grayscale value is 168.

[0099] Similarly, based on the duty cycle multiples Duty of different grayscale intervals Step2 to Step4, the output grayscale values ​​Gout required for the remaining input grayscale values ​​96 to 255 are recorded respectively, and then the following Fig.11In the embodiment of the present invention, the second lookup table L2 only establishes the output grayscale values ​​to be converted from the minimum input grayscale value and the maximum input grayscale value of each grayscale interval Step2 to Step4, and the output grayscale values ​​of the remaining input grayscale values ​​can be calculated by interpolation.

[0100] It is worth noting that the target grayscale values ​​RT, GT and BT obtained by the conversion of the second lookup table L2 are all between grayscale values ​​0 and 95. The main purpose is to adjust the pulse amplitude modulation data PAM_data with the ramp signal SWEEP. When the light-emitting time generated by the ramp signal SWEEP is longer (i.e., in the grayscale interval Step2 to Step4 that is greater than the grayscale interval Step1), the pulse amplitude modulation data PAM_data can be adjusted to decrease to output a grayscale value between 0 and 95.

[0101] In an embodiment of the present invention, the driving method 200 further includes building a first lookup table L1. Fig.13 As shown in the first lookup table L1, the grayscale values ​​corresponding to each grayscale interval Step1 to Step4 are the same as those in the second lookup table L2, the grayscale interval Step1 includes grayscale values ​​0 to 95, the grayscale interval Step2 includes grayscale values ​​96 to 168, the grayscale interval Step3 includes grayscale values ​​169 to 216, and the grayscale interval Step4 includes grayscale values ​​217 to 255. In the embodiment of the present invention, the voltage value of the pulse width modulation data PWM_data required for each grayscale interval Step1 to Step4 can be set as a preset value (or expected value) at the initial stage of hardware circuit design, and the grayscale values ​​R2, G2 and B2 can be calculated and obtained through the gamma curve and the target brightness bound to each grayscale value (as mentioned when constructing the second lookup table L2 above, which will not be repeated here), so that the voltage value of the pulse amplitude modulation data PAM_data required corresponding to each grayscale value R2, G2 and B2 can be obtained. By obtaining the voltage value of the pulse width modulation data PWM_data and the voltage value of the pulse amplitude modulation data PAM_data, the following can be summarized: Fig.13 The curve diagram shown in Fig.10 The first lookup table L1.

[0102] In the embodiment of the present invention, since the voltage value of the pulse width modulation data PWM_data and the voltage value of the pulse amplitude modulation data PAM_data are both controlled by the same gamma curve, and the pulse width modulation data PWM_data only outputs the target grayscale value between 0 and 95, it means that the voltage values ​​corresponding to the remaining grayscale values ​​96 to 255 are not used, so the voltage value of the pulse width modulation data PWM_data can be set arbitrarily. In some embodiments, the voltage value range of the pulse width modulation data PWM_data is set to a voltage value greater than the grayscale value 95 and less than the maximum value of the system data voltage.

[0103] In summary, the display device and the display panel driving method of the present invention embed the pulse width modulation data into the image information and adjust the pulse amplitude modulation data to a lower target grayscale value to generate new image information with the pulse width modulation data and the target grayscale value. In this way, the middle and low grayscales can be controlled to have a narrower light-emitting width and a larger LED driving current, so that the middle and low grayscales can also be maintained at a high light-emitting efficiency point, thereby improving the overall light-emitting efficiency.

[0104] Although the present invention has been disclosed as above in various embodiments, they are not intended to limit the present invention. Any person with ordinary knowledge in the technical field can make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be determined by the scope of the attached patent application.

Claims

1. A display device, characterized in that: Include: A display panel, comprising: A plurality of pixel groups, each of the pixel groups comprising: A plurality of sub-pixel circuits are configured to receive a pulse amplitude modulation data respectively and control the light emission intensity of the sub-pixel circuits according to the pulse amplitude modulation data; and a pulse width modulation circuit configured to receive a pulse width modulation data and control the light emission time of the sub-pixel circuits according to the pulse width modulation data; and A control system configured to perform: Receiving image information of the display panel, wherein the image information includes a current grayscale value of each of the sub-pixel circuits; Establishing the pulse width modulation data based on the current grayscale value through a first lookup table, wherein the first lookup table includes a plurality of input grayscale values ​​and a plurality of output pulse width modulation data corresponding to the input grayscale values; Converting the current grayscale value into a target grayscale value through a second lookup table, wherein the target grayscale value corresponds to the pulse amplitude modulation data, and the second lookup table includes the input grayscale values ​​and a plurality of output grayscale values ​​corresponding to the input grayscale values; and The display panel is controlled to display the image information having the pulse width modulation data and the target grayscale value.

2. The display device according to claim 1, wherein: The sub-pixel circuits include a red sub-pixel circuit, a green sub-pixel circuit and a blue sub-pixel circuit, and the red sub-pixel circuit, the green sub-pixel circuit and the blue sub-pixel circuit are respectively controlled by different pulse width modulation circuits.

3. The display device according to claim 1, wherein: The control system is further configured to build the second lookup table, and the step of building the second lookup table further includes: Generating a plurality of grayscale intervals according to a ramp signal and a duty cycle multiple corresponding to the ramp signal, so as to divide the input grayscale values ​​into the grayscale intervals, wherein the duty cycle multiple corresponding to a first grayscale interval of the grayscale intervals is smaller than the duty cycle multiples of the remaining grayscale intervals; Calculating a target brightness of the input grayscale values ​​through a gamma curve; and The input grayscale values ​​in the first grayscale interval are taken, and the output grayscale values ​​required for the input grayscale values ​​in the remaining grayscale intervals to reach the target brightness based on the duty cycle multiple are recorded respectively.

4. The display device according to claim 3, characterized in that The input grayscale values ​​of the first grayscale interval include 0 to 95.

5. The display device according to claim 3, characterized in that The control system also includes: A ramp signal generating circuit is configured to generate the ramp signal and supply the ramp signal to the pulse width modulation circuit.

6. The display device according to claim 1, wherein: Also includes: A driving circuit is disposed between the display panel and the control system and is configured to drive the pixel groups of the display panel.

7. The display device according to claim 1, wherein: The pulse width modulation circuit comprises: a first capacitor, a first end of which receives a scan signal, and a second end of which is coupled to a first node; a first transistor, a first terminal of which is coupled to the first node, a second terminal of which receives the pulse amplitude modulation data, and a control terminal of which receives a second scanning signal; a second transistor, a first terminal of which is coupled to a first system high voltage, and a control terminal of which is coupled to the first node; a third transistor, a first terminal of which is coupled to a second terminal of the second transistor, a second terminal of which is coupled to a third node, and a control terminal of which receives a light emitting signal; a fourth transistor, a first terminal of which is coupled to the third node, a second terminal of which is coupled to a first system low voltage, and a control terminal of which receives a reset signal; as well as A second capacitor has a first terminal coupled to the third node and a second terminal coupled to the first system low voltage.

8. The display device according to claim 7, characterized in that Each of the sub-pixel circuits comprises: A light emitting element, a cathode terminal of which receives a second system low voltage; a fifth transistor, a first terminal of which receives a first reference voltage, a second terminal of which is coupled to a fourth node, and a control terminal of which receives the light emitting signal; a sixth transistor, a first terminal of which is coupled to the fourth node, a second terminal of which receives the pulse amplitude modulation data, and a control terminal of which receives the second scanning signal; a third capacitor, a first end of which is coupled to the fourth node, and a second end of which is coupled to a fifth node; a seventh transistor, a first terminal of which is coupled to the fifth node, a second terminal of which is coupled to a sixth node, and a control terminal of which receives the second scan signal; an eighth transistor, a first terminal of which is coupled to the sixth node, a second terminal of which is coupled to a seventh node, and a control terminal of which receives the second scan signal; a ninth transistor, a first terminal of which is coupled to the sixth node, a second terminal of which receives a second reference voltage, and a control terminal of which receives a first scan signal; a tenth transistor, a first terminal of which receives a second system high voltage, a second terminal of which is coupled to a seventh node, and a control terminal of which is coupled to the fifth node; as well as An eleventh transistor has a first terminal coupled to the seventh node, a second terminal coupled to an anode terminal of the light emitting element, and a control terminal coupled to the third node.

9. A method for driving a display panel, characterized in that: The display panel includes a plurality of pixel groups, wherein each of the pixel groups includes a plurality of sub-pixel circuits, and the driving method includes: Receiving image information of the display panel, wherein the image information includes a current grayscale value of each of the sub-pixel circuits; Establishing a pulse width modulation data based on the current grayscale value through a first lookup table, wherein the first lookup table includes a plurality of input grayscale values ​​and a plurality of output pulse width modulation data corresponding to the input grayscale values; Converting the current grayscale value into a target grayscale value through a second lookup table, wherein the target grayscale value corresponds to a pulse amplitude modulation data, and the second lookup table includes the input grayscale values ​​and a plurality of output grayscale values ​​corresponding to the input grayscale values; and The image information having the pulse width modulation data and the target grayscale value is displayed.

10. The driving method according to claim 9, characterized in that: The method further includes building the second lookup table, and the step of building the second lookup table further includes: Generating a plurality of grayscale intervals according to a ramp signal and a duty cycle multiple corresponding to the ramp signal, so as to divide the input grayscale values ​​into the grayscale intervals, wherein the duty cycle multiple corresponding to a first grayscale interval of the grayscale intervals is smaller than the duty cycle multiples of the remaining grayscale intervals; Calculating a target brightness of the input grayscale values ​​through a gamma curve; and The input grayscale values ​​in the first grayscale interval are taken, and the output grayscale values ​​required for the input grayscale values ​​in the remaining grayscale intervals to reach the target brightness based on the duty cycle multiple are recorded respectively.

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