Method of depositing a dielectric material

Abstract

Embodiments of the present invention provide an apparatus and method for depositing dielectric material using RF bias pulses and remote plasma source deposition for fabricating semiconductor devices, particularly for filling openings with high aspect ratios in semiconductor applications. In one embodiment, a method of depositing a dielectric material includes providing a gas mixture into a processing chamber, the processing chamber having a substrate disposed therein; forming a remote plasma in a remote plasma source and delivering the remote plasma to an internal processing region defined in the processing chamber; applying RF bias power to the processing chamber in a pulsed mode; and forming a dielectric material in an opening defined in a material layer disposed on the substrate in the presence of the gas mixture and the remote plasma.

Description

[0001] This application is a divisional application of an invention patent application with an application date of August 20, 2019, application number 201980059660.8, and invention name “Method for depositing dielectric materials”. Technical Field

[0002] Embodiments of the present invention generally relate to methods for depositing dielectric materials using RF bias pulse control during deposition, and more particularly to methods for depositing dielectric materials using remote plasma control and RF bias pulses during deposition in semiconductor applications. Background Art

[0003] Reliably producing sub-half micron and smaller features is one of the key technical challenges for the next generation of very large scale integrated circuits (VLSI) and ultra large scale integrated circuits (ULSI) for semiconductor devices. However, as the limits of circuit technology are pushed, the shrinking dimensions of VLSI and ULSI interconnect technologies place additional demands on processing capabilities. Reliably forming gate structures on substrates is important to the success of VLSI and ULSI and the ongoing efforts to increase the circuit density and quality of individual substrates and dies.

[0004] A patterned mask, such as a photoresist layer, is typically used to form structures, such as gate structures, shallow trench isolation (STI), bit lines, and the like, on a substrate by an etching process. The patterned mask is typically fabricated using a photolithography process to optically transfer a pattern having a desired critical dimension to the photoresist layer. The photoresist layer is then developed to remove portions of the undesired photoresist, thereby creating openings in the remaining photoresist.

[0005] In order to be able to manufacture the next generation of devices and structures, the performance of transistors is usually improved by three-dimensional (3D) stacking of semiconductor chips. By arranging transistors in three dimensions rather than the traditional two dimensions, multiple transistors can be placed very close to each other in an integrated circuit (IC). The three-dimensional (3D) stacking of semiconductor chips reduces the wire length and keeps the wiring delay low. As the width of the groove continues to shrink, the aspect ratio (depth divided by width) continues to grow for stacking semiconductor chips. A challenge in the manufacture of high aspect ratio grooves is to avoid the formation of gaps during the deposition of dielectric materials in the grooves.

[0006] To fill the trench, a layer of dielectric material (such as silicon oxide) is deposited. The dielectric layer typically covers the field and walls and bottom of the trench. If the trench is wide and shallow, it is relatively easy to completely fill the trench. However, as the aspect ratio of the trench increases, it becomes more likely that the opening of the trench will be "pinched off," thereby forming a void (e.g., defect) within the trench.

[0007] In order to reduce the possibility of voids forming within the trenches or seams forming within the trenches, many different processing techniques have been developed to fill the trenches with dielectric materials with minimal defects. Poor process control during the deposition process will result in irregular structure profiles or premature closure of the trenches, thereby creating voids or air gaps in the trenches when the trenches are filled with dielectric materials.

[0008] Therefore, a need exists for improved deposition processes for forming dielectric materials in trenches with desired profiles and with minimal defects. Summary of the invention

[0009] Embodiments of the present invention provide an apparatus and method for depositing dielectric materials using RF bias pulses and remote plasma source deposition for use in manufacturing semiconductor devices, particularly for filling openings with high aspect ratios in semiconductor applications. In one embodiment, a method for depositing dielectric materials includes: providing a gas mixture into a processing chamber in which a substrate is disposed; forming a remote plasma in a remote plasma source and delivering the remote plasma to an internal processing region defined in the processing chamber; applying RF bias power to the processing chamber in a pulsed mode; and forming a dielectric material in an opening defined in a material layer disposed on the substrate in the presence of the gas mixture and the remote plasma.

[0010] In another embodiment, a method for forming a dielectric material includes: forming a remote plasma from a remote plasma source and delivering the remote plasma to an internal processing region of a processing chamber; applying RF bias power to a substrate support member disposed in the processing chamber; maintaining a substrate temperature between about -20 degrees Celsius and about 200 degrees Celsius; and forming a dielectric material in an opening defined in a material layer disposed on a substrate.

[0011] In yet another embodiment, a method for forming a dielectric material includes filling an opening having an aspect ratio greater than 5 on a substrate with a dielectric material formed from a remote plasma and a pulsed RF bias power supplied to an interior processing region of a processing chamber in which the substrate is disposed. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] In order that the manner in which the above-mentioned features of the present invention may be understood in detail, a more specific description of the present invention briefly summarized above may be obtained by reference to embodiments, some of which are shown in the accompanying drawings. However, it should be noted that the accompanying drawings only show typical embodiments of the present invention and therefore should not be considered to limit the scope of the present invention, as the present invention may allow other equally effective embodiments.

[0013] Figure 1 depicts an apparatus for performing a deposition process according to some embodiments of the present disclosure;

[0014] Figure 2 Depicted include Figure 1 A top plan view of one embodiment of a processing tool of an apparatus;

[0015] Figure 3 is a process flow diagram illustrating a method for forming a dielectric material in accordance with one embodiment of the present disclosure;

[0016] Figures 4A-4B depicts one embodiment of a sequence for depositing dielectric materials according to some embodiments of the present disclosure; and

[0017] Figures 5A-5C Depicted are some embodiments according to the present disclosure. Figure 3 Various embodiments of remote plasma source power and RF bias power control are utilized during a deposition process.

[0018] To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures. It is contemplated that elements and features of one embodiment may be beneficially incorporated in other embodiments without further recitation.

[0019] It is to be noted, however, that the appended drawings illustrate only exemplary embodiments of this invention and are therefore not to be considered limiting of its scope, for the invention may admit to other equally effective embodiments. DETAILED DESCRIPTION

[0020] The present invention provides a method for depositing dielectric materials in high aspect ratio trenches of semiconductor devices, particularly for three-dimensional (3D) stacking of semiconductor chips. In one embodiment, the deposition process can use remote plasma and pulsed RF bias power supplied to a substrate support assembly on which a substrate is placed. The deposition process is performed without RF source power generation in the chamber. The remotely generated remote plasma and pulsed RF bias power can be supplied to the internal processing area of ​​the processing chamber synchronously, alternately or sequentially as needed to provide good gap filling capability for the dielectric material filling the trench from the substrate.

[0021] Figure 1 is a cross-sectional view of a processing chamber 100 for performing a deposition process that can deposit dielectric materials for semiconductor applications, particularly dielectric materials with good gas filling capabilities. Suitable processing chambers that may be suitable for use with the teachings disclosed herein include, for example, the 10000 available from Applied Materials, Inc. of Santa Clara, California. or Processing Chamber. Although the illustrated processing chamber 100 includes a number of features that enable superior mask trimming and structure reshaping processes, it is contemplated that other processing chambers may be adapted to benefit from one or more of the inventive features disclosed herein.

[0022] The processing chamber 100 includes a processing chamber body 102 and a remote plasma source 104 coupled to the processing chamber body 102. The remote plasma source 104 may be any suitable source capable of generating free radicals. The remote plasma source 104 may be a remote plasma source, such as a radio frequency (RF) or very high radio frequency (VHRF) capacitively coupled plasma (CCP) source, an inductively coupled plasma (ICP) source, a microwave induction (MW) plasma source, an electron cyclotron resonance (ECR) chamber, or a high density plasma (HDP) chamber. The remote plasma source 104 may include one or more gas sources 106, and the remote plasma source 104 may be coupled to the processing chamber 100 via a free radical conduit 108. One or more process gases, which may be free radical forming gases, may enter the remote plasma source 104 via the one or more gas sources 106. The one or more process gases may include a chlorine-containing gas, a fluorine-containing gas, an inert gas, an oxygen-containing gas, a nitrogen-containing gas, a hydrogen-containing gas, or any combination thereof. The radicals generated in the remote plasma source 104 travel into the processing chamber 100 through a radical conduit 108 coupled to the processing chamber 100 to an interior processing region 151 defined in the processing chamber 100 .

[0023] The free radical conduit 108 is part of a lid assembly 112, which also includes a free radical chamber 110, a top plate 114, a lid edge 116, and a showerhead 118. The free radical conduit 108 may include a material that is substantially non-reactive with free radicals. For example, the free radical conduit 108 may include: AlN; SiO2; Y2O3; MgO; anodized Al2O3; sapphire; a ceramic containing one or more of Al2O3, sapphire, AlN, Y2O3, MgO; or a plastic. A representative example of a suitable SiO2 material is quartz. The free radical conduit 108 may be disposed in and supported by a free radical conduit support member 120. The free radical conduit support member 120 may be disposed on the top plate 114, which is disposed on the lid edge 116.

[0024] The radical chamber 110 is positioned below and coupled to the radical conduit 108, and the radicals generated in the remote plasma source 104 travel to the radical chamber 110 through the radical conduit 108. The radical chamber 110 is defined by the top plate 114, the cover edge 116, and the showerhead 118. Optionally, the radical chamber 110 may include a liner 122. The liner 122 may cover the surfaces of the top plate 114 and the cover edge 116 exposed to the radical chamber 110. The radicals from the remote plasma source 104 pass through a plurality of tubes 124 disposed in the showerhead 118 and enter the internal processing region 151. The showerhead 118 further includes a plurality of openings 126, the diameter of the plurality of openings 126 being smaller than the diameter of the plurality of tubes 124. The plurality of openings 126 are connected to an internal volume (not shown) that is not in fluid communication with the plurality of tubes 124. One or more fluid sources 119 may be coupled to the showerhead 118 for introducing a fluid mixture into the interior processing region 151 of the processing chamber 100. The fluid mixture may include a precursor, a porogen, and / or a carrier fluid. The fluid mixture may be a mixture of a gas and a liquid.

[0025] The processing chamber 100 may include a lid assembly 112, a chamber body 130, and a substrate support assembly 132. The substrate support assembly 132 may be at least partially disposed within the chamber body 130. The chamber body 130 may include a slit valve 135 to provide access to the interior of the processing chamber 100. The chamber body 130 may include a liner 134 covering an inner surface of the chamber body 130. The liner 134 may include one or more holes 136 and a pumping channel 138 formed therein, the pumping channel 138 being in fluid communication with the vacuum system 140. The holes 136 provide a flow path for gas to enter the pumping channel 138, which provides an outlet for gas within the processing chamber 100.

[0026] The vacuum system 140 may include a vacuum port 142, a valve 144, and a vacuum pump 146. The vacuum pump 146 is in fluid communication with the pumping channel 138 via the vacuum port 142. The aperture 136 allows the pumping channel 138 to be in fluid communication with an interior processing region 151 within the chamber body 130. The interior processing region 151 is defined by a lower surface 148 of the showerhead 118 and an upper surface 150 of the substrate support assembly 132, and the interior processing region 151 is surrounded by the liner 134.

[0027] The substrate support assembly 132 may include a substrate support member 152 to support a substrate (not shown) for processing within the chamber body 130. The substrate may be any standard wafer size, such as, for example, 300 mm. Alternatively, the substrate may be larger than 300 mm, such as 450 mm or larger. Depending on the operating temperature, the substrate support member 152 may include aluminum nitride (AlN) or aluminum. The substrate support member 152 may be configured to attract the substrate to the substrate support member 152. For example, the substrate support member 152 may be an electrostatic chuck or a vacuum chuck.

[0028] The substrate support member 152 may be coupled to a lift mechanism 154 via a shaft 156 that extends through a centrally located opening 158 formed in the bottom surface of the chamber body 130. The lift mechanism 154 may be flexibly sealed to the chamber body 130 via a bellows 160 that prevents vacuum from leaking around the shaft 156. The lift mechanism 154 allows the substrate support member 152 to move vertically within the chamber body 130 between a processing position and a lower transfer position. The transfer position is slightly below the opening of the slit valve 135. During operation, the spacing between the substrate 301 and the showerhead 118 may be minimized in order to maximize the free radical flux at the substrate surface. For example, the spacing may be between about 100 mm and about 5,000 mm. The lift mechanism 154 is capable of rotating the shaft 156, which in turn rotates the substrate support member 152, so that the substrate disposed on the substrate support member 152 rotates during operation.

[0029] One or more heating elements 162 and cooling channels 164 may be embedded in the substrate support member 152. The heating elements 162 and cooling channels 164 may be used to control the temperature of the substrate during operation. The heating elements 162 may be any suitable heating elements, such as one or more resistive heating elements. The heating elements 162 may be connected to one or more power sources (not shown). The heating elements 162 may be individually controlled to provide independent heating and / or cooling control for multi-zone heating or cooling. Since the multi-zone heating and cooling can be independently controlled, the substrate temperature distribution can be improved under any given processing conditions. A coolant may flow through the cooling channels 164 to cool the substrate. The substrate support member 152 may further include a gas channel extending to the upper surface 150 for flowing a cooling gas to the back side of the substrate.

[0030] The RF source power 143 may be coupled to the showerhead 118 via the RF source power matching box 147. The RF source power 143 may be a low frequency, a high frequency, or a very high frequency. In one embodiment, the RF source power 143 is a high frequency RF generator that can generate a high density plasma to deposit a high density film layer. In one example, the RF source power 143 may be used as an inductively coupled RF energy delivery device that can generate and control an inductively coupled plasma (ICP) generated in the inner processing region 351 above the substrate support member 152. When the inductively coupled plasma (ICP) is generated, dynamic impedance matching from the RF source power matching box 147 may be provided.

[0031] In addition to the RF source power 143, an RF bias power source 145 may be coupled to the substrate support member 152. The substrate support member 152 is configured as a cathode and includes an electrode 163 coupled to the RF bias power source 145. The RF bias power source 145 is coupled between the electrode 163 disposed in the substrate support member 152 and another electrode such as the showerhead 118 or the chamber ceiling (ceiling 114) of the chamber body 130. The RF bias power generated from the RF bias power source 145 excites and maintains a plasma discharge formed by a gas disposed in an inner processing region 151 of the chamber body 130.

[0032] In one mode of operation, substrate 301 is disposed on substrate support member 152 in processing chamber 100. Processing gas and / or gas mixture is introduced from gas source 106 into chamber body 130 through showerhead 118. Vacuum pump 146 maintains pressure within chamber body 130 while removing deposition byproducts.

[0033] A controller 170 is coupled to the processing chamber 100 to control the operation of the processing chamber 100. The controller 170 includes a central processing unit (CPU) 172, a memory 174, and support circuits 176 to control the processing sequence and regulate the gas flow from the gas source 106. The CPU 172 can be any form of general purpose computer processor that can be used in an industrial environment. The software program can be stored in the memory 174, such as a random access memory, a read-only memory, a floppy disk, or a hard drive or other form of digital storage. The support circuits 176 are typically coupled to the CPU 172 and can include caches, clock circuits, input / output systems, power supplies, and the like. Two-way communication between the controller 170 and the various components of the processing chamber 100 is handled by a plurality of signal cables.

[0034] Figure 2 is a schematic top plan view of an exemplary processing system 200, the processing system 200 comprising Figure 1 In one embodiment, the processing system 200 may be a process chamber 100 that is combined and integrated therein. The integrated processing system is commercially available from Applied Materials, Inc. located in Santa Clara, Calif. It is contemplated that other processing systems, including those from other manufacturers, may be adapted to benefit from the present disclosure.

[0035] The system 200 includes a vacuum sealed processing platform 204, a factory interface 202, and a system controller 244. The processing platform 204 includes at least one processing chamber 100 (such as Figure 1 ), a plurality of processing chambers 201 , 228 , 220 , 210 , and at least one load lock chamber 222 coupled to a vacuum substrate transfer chamber 236 . Figure 2 Two load lock chambers 222 are shown in FIG. The factory interface 202 is coupled to the transfer chamber 236 through the load lock chambers 222 .

[0036] In one embodiment, the factory interface 202 includes at least one docking station 208 and at least one factory interface robot 214 to facilitate the transfer of substrates. The docking station 208 is configured to receive one or more front opening wafer transport boxes (FOUPs). Figure 2 In the embodiment of the present invention, two FOUPs 206A-B are shown. A factory interface robot 214 having a blade 216 disposed on one end of the robot 214 is configured to transfer substrates from the factory interface 202 through the load lock chamber 222 to the processing platform 204 for processing. Optionally, one or more processing chambers 100, 201, 210, 220, 228 can be connected to the terminal 226 of the factory interface 202 to facilitate processing of substrates from the FOUPs 206A-B.

[0037] Each load lock chamber 222 has a first port coupled to the factory interface 202 and a second port coupled to the transfer chamber 236. The load lock chambers 222 are coupled to a pressure control system (not shown) that evacuates and vents the load lock chambers 222 to facilitate transferring substrates between the vacuum environment of the transfer chamber 236 and the substantially ambient (e.g., atmospheric) environment of the factory interface 202.

[0038] The transfer chamber 236 has a vacuum robot 230 disposed therein. The vacuum robot 230 has a blade 234 capable of transferring the substrate 301 between the load lock chamber 222, the deposition chamber 100, the process chamber 201, and the process chambers 201, 210, 220, 228.

[0039] In one embodiment of the system 200, the system 200 may include Figure 1The processing chamber 100 (such as a high density plasma (HDP) chamber) and other processing chambers 201, 210, 220, 228 depicted in the figure, which may be a deposition chamber, an etching chamber, a thermal treatment chamber or other similar types of semiconductor processing chambers, can help form a dielectric material with good gap filling capabilities to fill in trenches in semiconductor devices.

[0040] A system controller 244 is coupled to the processing system 200. The system controller 244, which may include or be included within the computing device 241, controls the operation of the processing system 200 using direct control of the processing chambers 100, 201, 210, 220, 228 of the system 200. Alternatively, the system controller 244 may control computers (or controllers) associated with the processing chambers 100, 201, 210, 220, 228 and the system 200. In operation, the system controller 244 also enables data collection and feedback from the various chambers and the processing chamber 100 to optimize the performance of the system 200.

[0041] Much like the controller 170 described above, the system controller 244 typically includes a central processing unit (CPU) 238, memory 240, and support circuits 242. The CPU 238 may be one of any form of general purpose computer processor that may be used in an industrial environment. The support circuits 242 are typically coupled to the CPU 238 and may include caches, clock circuits, input / output subsystems, power supplies, and the like. A software program transforms the CPU 238 into a special purpose computer (controller) 244. The software program may also be stored and / or executed by a second controller (not shown) remote from the system 200.

[0042] Figure 3 is a flow chart of one embodiment of a deposition process 300 that may be performed in chamber 100 or other suitable processing chambers. Figures 4A-4B 3 is a schematic cross-sectional view of a portion of a composite substrate corresponding to various stages of a deposition process 300. Process 300 may be used to form high aspect ratio features, e.g., greater than 5:1, for structures used in semiconductor devices, particularly three-dimensional (3D) stacking for semiconductor memory. Alternatively, process 300 may be advantageously utilized to etch other types of structures.

[0043] By transferring (ie, providing) a substrate (such as substrate 301) to a deposition process chamber (such as Figure 1 ), process 300 begins at operation 302. Substrate 301 may have a substantially flat surface, an uneven surface, or a substantially flat surface with structures formed thereon. Figure 4AIn the illustrated embodiment, substrate 301 has a patterned material layer 404 disposed on interface layer 402. In one embodiment, patterned material layer 404 includes an opening 408 formed therein. Patterned material layer 404 may be used to form a gate structure, a contact structure, an interconnect structure, or any suitable structure as desired in a front-end or back-end process. In one embodiment, process 300 may be performed on patterned material layer 404 to form a contact structure therein. Substrate 301 may be a material such as crystalline silicon (e.g., Si <100> or Si <111> ), silicon oxide, strained silicon, silicon germanium, doped or undoped polysilicon, doped or undoped silicon wafers and patterned or unpatterned wafers silicon on insulator (SOI), carbon doped silicon oxide, silicon nitride, doped silicon, germanium, gallium arsenide, glass, sapphire. Substrate 301 may have various sizes, such as 200mm, 300mm, 450mm or other diameter wafers, and rectangular or square panels. Unless otherwise stated, the embodiments and examples described herein are performed on substrates having a 200mm diameter, 300mm diameter or 450mm diameter substrate. In embodiments where an SOI structure is used for substrate 301, substrate 301 may include a buried dielectric layer disposed on a silicon crystalline substrate. In the embodiments depicted herein, substrate 301 may be a crystalline silicon substrate.

[0044] In one embodiment, the interface layer 402 may be a dielectric layer. The patterned material layer 404 has an opening 408 exposing a portion 410 of the interface layer 402 for depositing a dielectric material therein. The opening 408 described herein may include a groove, a through hole, an opening, and the like. In one embodiment, the patterned material layer 404 may be a metal-containing material, a silicon-containing material, a carbon-containing material, or other suitable material. Suitable examples of metal-containing materials include copper-containing materials, aluminum-containing materials, nickel-containing materials, tungsten-containing materials, or other metal-containing materials. Suitable silicon-containing materials include silicon, silicon oxide, silicon nitride, silicon oxynitride, and combinations thereof. Suitable carbon-containing materials include silicon carbide, amorphous carbon, or the like. In the exemplary embodiment depicted herein, the patterned material layer 404 is a silicon layer.

[0045] As desired, the interface layer 402 may be a dielectric layer, such as a dielectric oxide layer or a dielectric nitride layer. The interface layer 402 may include multiple layers, a composite layer, or a single layer. Other suitable materials for the dielectric layer include undoped silicon glass (USG) (such as silicon oxide or TEOS), borosilicate glass (BSG), phosphosilicate glass (PSG), borophosphosilicate glass (BPSG), silicon nitride, amorphous silicon, and combinations thereof.

[0046] In one embodiment, the patterned material layer 404 may be patterned to a predetermined depth to expose a portion 410 of the interface layer 402, such as Figure 4AThe material layer 404 may be etched or patterned by any suitable patterning process. The patterned material layer 404 may be patterned by supplying a gas mixture into a processing chamber and applying a predetermined RF power level to the processing chamber.

[0047] At operation 304, a deposition gas mixture is supplied to a processing chamber (such as Figure 1 ) in the processing chamber 100 to perform a deposition process to form a dielectric material 406 ( Figure 4B ). The gas mixture supplied to the processing chamber 100 may vary based on the different types of materials to be formed and filled in the opening 408. In one example, when the dielectric material 406 to be formed is expected to be a silicon nitride layer, the supplied deposition gas mixture includes at least one silicon-containing gas, a nitrogen-containing gas, or an optional inert gas. In another example, when the dielectric material 406 to be formed is expected to be a silicon oxide layer, the supplied deposition gas mixture includes at least one silicon-containing gas, an oxygen-containing gas, or an optional inert gas. In another example, when the dielectric material 406 to be formed is expected to be a silicon carbide layer, the supplied deposition gas mixture includes at least one silicon-containing gas, a carbon-containing gas, or an optional inert gas. In yet another example, when the dielectric material 406 to be formed is expected to be a carbide layer, the supplied deposition gas mixture includes at least one carbon-containing gas or an optional inert gas.

[0048] Suitable examples of silicon-containing gases include SiH4, TEOS, Si2H6, and the like. Suitable examples of nitrogen-containing gases include N2, NH3, N2O, NO2, and the like. Suitable examples of oxygen-containing gases include H2O2, H2O, O2, O3, and the like. Suitable examples of carbon-containing gases include CO2, hydrocarbon gases (such as CH4 and C2H6), and the like. Suitable examples of inert gases include He, Ar, and the like.

[0049] In some examples, a carrier gas such as N2, H2, and the like may also be supplied in the deposition gas mixture as desired.

[0050] In one example, the deposition gas mixture includes a silicon-containing gas, a nitrogen-containing or carbon-containing gas, and an Ar or H2 gas. In a specific example, the deposition gas mixture includes SiH4, Ar or He, NH3, H2 or N2, or a combination thereof, for depositing a silicon nitride layer as the dielectric material 406. In another specific example, the deposition gas mixture includes SiH4, Ar or He, CH4 or CO2, H2 or N2, for depositing a silicon carbide layer as the dielectric material 406. In yet another specific example, the deposition gas mixture includes SiH4, Ar or He, O2 or NO2, for depositing a silicon oxide layer as the dielectric material 406.

[0051] In one embodiment, the silicon-containing gas is controlled at a flow rate between about 30 sccm and about 500 sccm (volume). The oxygen-containing, carbon-containing or nitrogen-containing gas is controlled at a flow rate between about 50 sccm and about 2000 sccm (volume). The Ar gas or He gas is controlled at a flow rate between about 250 sccm and about 2000 sccm (volume).

[0052] In one embodiment, some gases from the deposition gas mixture may be supplied from the gas source 106 through the remote plasma source 104 to the inner processing region 151, while some gases may be supplied from a side of the processing chamber 100 (such as a fluid source 119 formed laterally around the showerhead 118) and delivered to the inner processing region 151. In some examples, a first gas (e.g., a reactive precursor) from the deposition gas mixture (such as a silicon-containing gas) is supplied from the side of the processing chamber 100 (e.g., the fluid source 119), while a second gas (e.g., a carrier gas, an inert gas, a carbon- or nitrogen-containing gas, or other gas) from the deposition gas mixture is supplied from the gas source 106 through the remote plasma source 104 to the inner processing region 151. In one example, the first gas is SiH4 gas supplied from the fluid source 119 into the processing chamber, while the second gas is at least one of Ar, He, NH3, H2, N2, or a combination thereof supplied from the gas source 106 through the remote plasma source 104 to the inner processing region 151.

[0053] At operation 306, after the deposition gas mixture is supplied to the processing chamber, remote plasma source power is applied to the remote plasma source 104 to generate a remote plasma to be transported from the remote plasma source 104 to the inner processing region 151. It is believed that the remotely dissociated gas and / or other gases can provide high density and low energy atomic species compared to conventional in-chamber RF source power applied to a showerhead (which can provide high energy but relatively low density of gas radicals). Therefore, by utilizing a remote plasma source with certain reactive gas species and gas supplied from the side (e.g., from the fluid source 119), a high density of gas species with relatively low energy atomic species is then transported to the inner processing region 151 to form the dielectric material 406 on the substrate 301, as shown in FIG. Figure 4B It is believed that the atomic gas species from the remote plasma source have a higher degree of reactivity, which can react more effectively, slowly and thoroughly with the gas precursor supplied from the side (e.g., from the fluid source 119), thereby providing good gap filling capability for filling the dielectric material 406 into the opening 408 defined in the patterned material layer 404.

[0054] It should be noted that the amount of each gas introduced into the processing chamber can be varied and adjusted to accommodate, for example, the thickness of the dielectric material 406 to be formed in the opening 408 (e.g., the height or geometry of the opening 408). In one or more embodiments, the gases supplied from the remote plasma source 104 can have a certain ratio. For example, the ratio of nitrogen-containing gas or carbon-containing gas to Ar gas can be controlled between about 0.2:1 and about 2:1 (by volume).

[0055] In one example, a remote RF source power between about 1000 Watts and about 10,000 Watts, such as between about 2000 Watts and about 4000 Watts, is supplied to the remote plasma source 104 to generate a remote plasma to be delivered to the inner processing region 151. The frequency of the power applied to the remote plasma source 104 is around 400 kHz. The frequency may range from about 50 kHz to about 2.45 GHz. The substrate temperature is maintained between about -20 degrees Celsius and about 200 degrees Celsius, such as between about 20 degrees Celsius and about 90 degrees Celsius.

[0056] At operation 308, while supplying remote plasma from the remote plasma source 104 to the inner processing region 151, pulsed RF bias power may be applied to the substrate support member 152 to generate RF bias power to the substrate 301 disposed on the substrate support member 152. It should be noted that the RF bias power generated to the substrate support member 152 is used to help provide directionality to the plasma in the inner processing region 151 during the deposition process. In one embodiment, 60 MHz and / or 2 MHz RF bias power may be provided as desired. In a specific embodiment, 60 MHz, 2 MHz, or 400 KHz RF bias power is provided.

[0057] In some examples, the RF bias power may be supplied in a pulsed mode to the substrate support member 152. It is believed that the RF bias power supplied in a pulsed mode may provide a relatively mild RF power level to the substrate 301 disposed on the substrate support assembly, so that reactive species may be accelerated toward the substrate 301 at a relatively mild energy level. The RF bias power supplied to the substrate support member 152 may be supplied synchronously, simultaneously, separately, alternatively, or sequentially with the remote plasma power supplied from the remote plasma source 104.

[0058] Figures 5A-5C Various examples of RF bias power supplied to the substrate support member 152 during a deposition process are depicted. Figures 5A-5C Depicted is the power intensity supplied to the processing chamber 100 plotted as a function of time. Figures 5A-5CThe traces 502 , 510 , 520 depicted in illustrative embodiment show the power intensity supplied from the remote plasma source 104 , while the traces 504 , 512 , 522 show the power intensity supplied from the RF bias power source 145 to the substrate support member 152 .

[0059] exist Figure 5A , remote plasma is supplied from the remote plasma source 104 to the substrate 301, and RF bias power is supplied to the substrate support member 152 at the same time during a predetermined time period from a first time point 506 to a second time point 508. When the remote plasma from the remote plasma source 104 is supplied in a continuous mode, the RF bias power supplied to the substrate support member 152 is in a pulsed mode. When a desired thickness of dielectric material 406 is filled in the opening 408 in the material layer 404, the remote plasma from the remote plasma source 104 and the RF bias power supplied to the substrate support member 152 may be terminated (i.e., turned off) at the second time point 508. In this example, the dielectric material 406 formed in the material layer 404 may be a silicon nitride material.

[0060] exist Figure 5B , remote plasma is supplied from the remote plasma source 104 from a first time point 514 to a second time point 516. Subsequently, after the power applied to the remote plasma source 104 is terminated at the second time point 516 (e.g., the remote plasma supplied from the remote plasma source 104 is turned off), the RF bias power is then supplied to the substrate support member 152 in a pulsed mode from the second time point 516 to a third time point 518. When the dielectric material 406 of a desired thickness is filled in the opening 408 in the material layer 404, the RF bias power supplied to the substrate support member 152 in the pulsed mode may be terminated (i.e., turned off). In this example, the dielectric material 406 formed in the material layer 404 may be a silicon nitride material.

[0061] exist Figure 5C 524, remote plasma is supplied from the remote plasma source 104 from a first time point 524 to a second time point 525. While the remote plasma from the remote plasma source 104 is still continuously supplied, the RF bias power is then supplied to the substrate support member 152 in a pulsed mode from the second time point 525 to a third time point 526. Therefore, the remote plasma from the remote plasma source 104 is partially supplied synchronously with the RF bias power supplied to the substrate support member 152. When the dielectric material 406 of a desired thickness is filled in the opening 408 in the material layer 404, the remote plasma from the remote plasma source 104 and the RF bias power supplied to the substrate support member 152 in a pulsed mode may be terminated (i.e., turned off) at the third time point 526.

[0062] It should be noted that the supply of remote plasma from the remote plasma source 104 and the supply of RF bias power to the substrate support member 152 may be in any arrangement, in any order, and in any sequence as desired.

[0063] It is believed that the RF bias power supplied to the substrate support member 152 can help accelerate electrons, ions, and other species in the plasma toward the depth of the opening 408 (e.g., the exposed portion 410 of the interface layer 402). The acceleration generated by the RF bias power can help enhance the gap filling capability when filling the dielectric material 406 into the opening 408. In addition, by controlling the pulse time period and pulse power intensity of the power from the RF bias, reactive species with excessive energy or excessive aggressiveness can be eliminated to control the deposition profile, reactive species trajectory, and deposition directionality as desired.

[0064] In one example, 60 MHz and / or 2 MHz RF bias power may be provided as needed. In a specific embodiment, the RF bias power is provided at about 162 MHz, 60 MHz, or 2 MHz. In one example, the RF bias power having a frequency of 2 MHz is supplied to the substrate support member 152 at between about 1000 watts and about 4000 watts, such as between about 1500 watts and about 3000 watts. The RF bias power may be utilized for a duration between about 210 microseconds and about 100 milliseconds. The substrate temperature is maintained between about -20 degrees Celsius and about 200 degrees Celsius, such as between about 20 degrees Celsius and about 90 degrees Celsius.

[0065] It should be noted that operations 306 and 308 may be performed repeatedly (i.e., cyclically), such as Figure 3 As indicated by loop 309 in FIG. 1 , until the opening 408 in the patterned material layer 404 is filled with dielectric material 406 , as shown in FIG. Figure 4B As shown. Repeated processes can cyclically and incrementally deposit dielectric material 406 with good gap filling capability. When filling opening 408 with dielectric material 406, overly aggressive reactive species may react at a relatively high deposition rate, ultimately leading to early closure of opening 408, forming undesirable voids or air gaps in opening 408. Incremental deposition improves the gap filling capability and enhances the deposition profile of dielectric material 406 formed in opening 408 in material layer 404.

[0066] At operation 310, after the dielectric material 406 is filled to a desired thickness in the opening 408, the dielectric material 406 is then formed on the substrate 301. Thus, the process 300 is then completed and the substrate 301 can be removed from the processing chamber.

[0067] By utilizing a deposition process with good gap-fill capabilities, additional treatments or curing processes may be eliminated, thereby improving manufacturing cycle time and cost.

[0068] Thus, a method for depositing dielectric materials in openings with high aspect ratios and small dimensions is provided by appropriately managing remote plasma power and RF bias power during a deposition process. A deposition process with good gap filling capability is obtained by replacing, synchronizing, or partially synchronizing remote plasma power and RF bias power with different supply modes (e.g., continuous mode or pulsed mode) during a deposition process. By doing so, an improved deposition process is obtained to fill dielectric materials in openings with high aspect ratios and small dimensions, particularly for applications in three-dimensional (3D) stacking of semiconductor chips.

[0069] While the foregoing is directed to embodiments of the present invention, other and further embodiments of the invention may be devised without departing from the basic scope of the invention, and the scope of the invention is determined by the appended claims.

Claims

1. A method for forming a dielectric material, comprising: A dielectric material is deposited in an opening defined in a material layer disposed on an interface layer of a substrate, the dielectric material being formed by remote plasma, the opening having an aspect ratio greater than 5, wherein while depositing the dielectric material, a pulsed mode RF bias power is supplied to an inner processing region of a processing chamber in which the substrate is disposed.

2. The method of claim 1, wherein the dielectric material is a silicon nitride material. The method of claim 1 , wherein the dielectric material is a silicon carbide material.

4. The method of claim 1, wherein the remote plasma is formed prior to applying the RF bias power to the processing chamber.

5. The method of claim 4, wherein the remote plasma is formed for a predetermined period of time and is terminated before applying the RF bias power.

6. The method of claim 1, further comprising: Maintain the substrate temperature between -20 °C and 200 °C.

7. The method of claim 1, wherein the RF bias power is applied in the pulse mode with a duration between 210 microseconds and 100 milliseconds.

8. The method of claim 1, wherein the RF bias power has a frequency of 400 kHz, 2 MHz, or 60 MHz.

9. The method of claim 1, further comprising repeating the depositing of the dielectric material a plurality of times.

10. The method of claim 9, wherein the dielectric material is repeatedly deposited until the opening is filled with the dielectric material.

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