A differential closed-loop negative feedback amplification circuit based on JFET pair tubes

Through the differential closed-loop negative feedback amplifier circuit based on JFET tubes, the problem that differential input and closed-loop feedback cannot be achieved simultaneously in the existing technology is solved, and the amplification effect of low noise, low common-mode noise and high linearity is achieved, thereby improving the accuracy and stability of signal measurement.

CN119363048BActive Publication Date: 2025-10-17JILIN UNIVERSITY
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Patent Information

Application Number
CN202411413125.7
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-10-11
Publication Date
2025-10-17
Estimated Expiration
2044-10-11

AI Technical Summary

Technical Problem

In the existing aviation electromagnetic field, differential input and closed-loop feedback cannot be achieved simultaneously, resulting in the inability to simultaneously reduce common-mode noise and linearity, affecting the accuracy of signal measurement.

Method used

A differential closed-loop negative feedback amplifier circuit based on a JFET pair tube is adopted, including a first-stage amplifier, a second-stage amplifier, a feedback loop and a current mirror. The differential amplifier circuit is composed of the JFET field-effect tube and the current mirror, and a closed-loop negative feedback is formed by combining the fully differential amplifier and the feedback loop to achieve differential input and high gain stability.

Benefits of technology

It achieves low noise, low common-mode noise and high linearity amplification effects, can effectively suppress zero drift and common-mode interference, and improve the accuracy and stability of signal amplification.

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Abstract

The application discloses a differential closed-loop negative feedback amplifying circuit based on a JFET pair, and a low-noise amplifier is used for weak voltage signal measurement. The input stage of the low-noise amplifier is composed of discrete JFET field effect tubes. While reducing noise interference, the JFET field effect tube can provide extremely high input impedance by virtue of the characteristic that the gate current of the JFET field effect tube is basically zero. The current mirror of the low-noise amplifier provides mirror current for a pair of JFET field effect tubes in the low-noise amplifier module. The closed-loop feedback structure of the application can save one input for the JFET pair, so that the amplifying circuit can have double-channel input. The double-channel input structure can make the input signal be a differential signal, effectively suppress common-mode interference, and the overall closed-loop negative feedback can have high gain stability, reduce nonlinear distortion, increase input impedance, reduce output impedance, and improve the performance of the amplifier, thereby solving the precise amplification and measurement of weak voltage signals in the field of aviation electromagnetism.
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Description

TECHNICAL FIELD

[0001] The present application relates to the field of low noise amplifiers, in particular to a differential closed-loop negative feedback amplification circuit based on JFET pair tubes. BACKGROUND

[0002] The amplifier is mainly aimed at the receiving system in the field of airborne electromagnetic, and is used for high-precision amplification of voltage signals. The Z-axis tilt electromagnetic measurement system belongs to the field of frequency domain deep geophysical exploration, and is usually used for detecting and analyzing electromagnetic signals in the Z-axis direction. The system is widely used in geological exploration, earthquake warning, underground resource detection and other fields. These applications are very sensitive to the weak changes of signals, so accurate capture and amplification of signals are crucial.

[0003] For weak voltage signal amplification, there are currently two research directions: one is to use an integrated operational amplifier for preamplification, and the other is to use JFET discrete devices to build an amplifier. The preamplifier circuit in the traditional Z-axis tilt electromagnetic measurement system mainly uses an instrument amplifier as shown in Figure 1 However, the instrument amplifier uses an integrated operational amplifier for input stage, resulting in that the noise of the instrument amplifier is mainly determined by the amplifier model used in the first stage. The noise performance of the integrated operational amplifier is not ideal, and it is difficult to meet the demand of effectively amplifying and receiving the signals collected by the Z-axis tilt electromagnetic measurement system.

[0004] The existing patent document CN118508892A discloses a wideband high-gain low-noise amplifier, which adopts a source degeneration inductance structure and a common source and common gate structure based on Darlington topology, but its input stage is single-ended input, which cannot amplify the signals of differential structure sensors. CN115765641A discloses a multi-discrete current source low-noise JFET differential parallel amplifier, which includes a JFET first-stage amplification circuit and an IOA second-stage amplification circuit, but no closed-loop feedback is formed between the two-stage amplification circuits, so the stability and high linearity of amplification cannot be realized.

[0005] At present, another research direction of weak voltage signal amplification is an amplifier composed of discrete components as shown in Figure 2 These circuit structures are simple and have certain gain effect, but the amplifier composed of such discrete components occupies one input terminal of the differential pair tube in the feedback loop, so that the signals of the sensor cannot be differentially input, and are greatly affected by environmental noise, temperature drift and signal distortion, etc. In such a case, the accuracy of measurement will obviously decrease. SUMMARY

[0006] The application is to solve the problem that in the field of existing airborne electromagnetic voltage measurement, differential input and closed-loop feedback cannot be realized at the same time, resulting in the inability to simultaneously reduce common-mode noise and improve linearity; a differential closed-loop negative feedback amplification circuit based on JFET pair tube is provided.

[0007] A differential closed-loop negative feedback amplification circuit based on JFET pair tube, the amplification circuit comprises a low noise amplifier; the low noise amplifier comprises a first stage amplifier, a second stage amplifier, a feedback loop and a current mirror;

[0008] The first stage amplifier adopts a discrete JFET pair tube structure as the input stage of the amplifier module,

[0009] The first stage amplifier is connected with the current mirror, the current mirror is connected with the second stage amplifier, and the second stage amplifier is connected with the first stage amplifier through the feedback loop;

[0010] The first stage amplifier comprises JFET field effect tube Q1, JFET field effect tube Q2, triode Q7, triode Q8 and V-I conversion current source;

[0011] The feedback loop is composed of resistors R3, R4, R10, R11, R12 and R13;

[0012] The drain of the JFET field effect tube Q1 is connected with the emitter of the triode Q7, and the drain of the JFET field effect tube Q2 is connected with the emitter of the triode Q8;

[0013] The base and collector of the triode Q7 and the base and collector of the triode Q8 are connected with the current mirror;

[0014] The source of the JFET field effect tube Q1 is connected with the V-I conversion current source through the resistor R3, and the source of the JFET field effect tube Q2 is connected with the V-I conversion current source through the resistor R4;

[0015] The current mirror is connected with the second stage amplifier, the second stage amplifier is connected with the source of the JFET field effect tube Q1 and the resistor R3 through the resistor R10, and is connected with the source of the JFET field effect tube Q2 and the resistor R4 through the resistor R11, the resistor R10 is grounded through the resistor R12, and the resistor R11 is grounded through the resistor R13.

[0016] Further, a power management circuit is further included, which is used to provide a power supply with a rated voltage value to the first stage amplifier, the second stage amplifier, the feedback loop and the current mirror.

[0017] Further, the current mirror is used to access the low noise amplifier to provide stable current; the current mirror comprises resistor R1, resistor R2, triode Q4, triode Q5 and triode Q6;

[0018] The collector of the triode Q7 is connected with the collector of the triode Q4, and the emitter of the triode Q4 is connected with the resistor R1 and then connected with the power supply VCC;

[0019] The collector of the triode Q8 is connected with the collector of the triode Q5, and the emitter of the triode Q5 is connected with the resistor R2 and then connected with the power supply VCC;

[0020] The base of the triode Q7 is connected with the base of the triode Q8 and then connected with the collector of the triode Q6; the base of the triode Q4 is connected with the base of the triode Q5 and then connected with the emitter of the triode Q6, and the base of the triode Q6 is connected with the second-stage amplifier.

[0021] Further, the second-stage amplifier comprises amplifier U2, resistor R6, resistor R7, resistor R8 and resistor R9;

[0022] The collector of the triode Q5 is connected with the inverting input terminal of the amplifier U2 through the resistor R6, and the collector of the triode Q4 is connected with the non-inverting input terminal of the amplifier U2 through the resistor R7;

[0023] The non-inverting output terminal of the amplifier U2 is connected with the non-inverting input terminal of the amplifier U2 through the resistor R8, the inverting output terminal of the amplifier U2 is connected with the inverting input terminal of the amplifier U2 through the resistor R9, the non-inverting output terminal of the amplifier U2 is connected with the source of the JFET Q1 through the resistor R10, and the inverting output terminal of the amplifier U2 is connected with the source of the JFET Q2 through the resistor R11.

[0024] Further, the V-I conversion current source is composed of diode D1, amplifier U1, JFET Q3 and resistor R5;

[0025] The source of the JFET Q1 is connected with the drain of the JFET Q3 through the resistor R3, the source of the JFET Q2 is connected with the drain of the JFET Q3 through the resistor R4, the gate of the JFET Q3 is connected with the output terminal of the amplifier U1, the non-inverting input terminal of the amplifier U1 is grounded through the diode D1, and the inverting input terminal of the amplifier U1 is connected with the source of the JFET Q3 and then grounded through the resistor R5.

[0026] The application effect of the application: the amplification circuit has the characteristics of high gain stability, can meet the requirement of realizing differential input in the case of overall closed loop, and has low noise and good linearity. Specifically, the following advantages are provided:

[0027] 1. In the amplification circuit, the JFET pair and the current mirror constitute a differential amplification circuit. The JFET has the characteristics of high input impedance, small voltage noise, and extremely low current noise (generally in the order of fA / √Hz). Combined with the differential structure, the influence of zero drift and common-mode interference can be suppressed. In the case of a large source impedance of the front-end inductive coil, the first-stage amplifier can have better noise performance.

[0028] 2. The second-stage amplifier is composed of a fully differential amplifier, which constitutes a closed-loop negative feedback with the first-stage amplifier through a feedback loop. The fully differential amplifier uses a truly full-differential signal path from input to output, which brings excellent common-mode noise suppression capability and total harmonic distortion. The high-voltage differential signal chain can improve the margin and dynamic range through a wide power voltage range without adding separate amplifiers for each polarity of the differential signal. This topology can occupy the differential input of the first-stage amplifier while constituting negative feedback with the first-stage amplifier, so that the effects of low common-mode noise and high linearity can be achieved at the same time.

[0029] 3. In order to make the JFET amplifier amplify signals without distortion, a bias circuit is needed to ensure that the JFET is in a saturated state. The bias circuit in the amplification circuit mainly includes a direct current bias structure and a current source as a load function. In order to make a pair of JFET field effect tubes of the first-stage amplifier pass through the same current, a proportional buffer current mirror is used instead of a traditional resistor. The proportional buffer current mirror has small error when copying current, which is beneficial to the design of precision circuits.

[0030] 4. In order to improve the common-mode rejection ratio of the JFET field effect tube differential circuit, a V-I conversion current source is used, and the current is adjusted by adjusting the resistance R5.

[0031] 5. According to the amplification circuit, the signal of the front-end sensor can be input into the amplifier in a differential form, and the input noise is basically equal to the noise of the first-stage JFET field effect tube. Due to the closed-loop feedback, the voltage gain of the amplifier is independent of the devices of the first-stage and the second-stage. When R10=R11, R12=R13, and R3=R4, the voltage gain AV of the application is 1+(R10 / (R3 / / R12)). BRIEF DESCRIPTION OF DRAWINGS

[0032] Figure 1A circuit diagram of an existing amplifier circuit as an instrument amplifier circuit;

[0033] Figure 2 A circuit diagram of an existing amplifier as a discrete component amplifier circuit;

[0034] Figure 3 A circuit diagram of the differential closed-loop negative feedback amplifier circuit based on JFET pair tubes according to the present application;

[0035] Figure 4 A block diagram of the electromagnetic measurement receiving system of the Z-axis inclination in the differential closed-loop negative feedback amplifier circuit based on JFET pair tubes according to the present application.

[0036] Figure 5 A physical structure diagram of the air core coil of the electromagnetic measurement receiving system of the Z-axis inclination in the differential closed-loop negative feedback amplifier circuit based on JFET pair tubes according to the present application. DETAILED DESCRIPTION

[0037] DETAILED DESCRIPTION Figure 3 The present embodiment is a differential closed-loop negative feedback amplifier circuit based on JFET pair tubes, which includes a power management circuit, a first-stage amplifier, a second-stage amplifier, a feedback loop, and a current mirror; the first-stage amplifier uses a discrete JFET pair tube structure as the input stage of the amplifier module, the first-stage amplifier is connected to the current mirror, the current mirror is connected to the second-stage amplifier, and the second-stage amplifier is connected to the first-stage amplifier through the feedback loop.

[0038] The power management circuit is used to provide a rated voltage value of power supply to the first-stage amplifier, the second-stage amplifier, the feedback loop, and the current mirror module.

[0039] The low-noise amplifier is used to perform low-noise amplification on a weak voltage signal.

[0040] The feedback loop is used to form a closed-loop negative feedback of the two-stage amplifier circuit of the low-noise amplifier circuit, thereby improving the gain stability and linearity of the amplifier circuit.

[0041] The current mirror module is used to provide a stable current to the low-noise amplifier.

[0042] The first-stage amplifier includes JFET field effect tubes Q1 and Q2, triodes Q7 and Q8, and a V-I conversion current source.

[0043] The feedback loop is composed of resistors R3, R4, R10, R11, R12, and R13.

[0044] The current mirror comprises resistor Rl, resistor R2, transistor Q4, transistor Q5 and transistor Q6;

[0045] The second stage amplifier comprises amplifier U2, resistor R6, resistor R7, resistor R8 and resistor R9;

[0046] The drain of JFET Ql is connected to the emitter of transistor Q7, the collector of transistor Q7 is connected to the collector of transistor Q4, the emitter of transistor Q4 is connected to resistor Rl and then to the positive power supply;

[0047] The drain of JFET Q2 is connected to the emitter of transistor Q8, the collector of transistor Q8 is connected to the collector of transistor Q5, the emitter of transistor Q5 is connected to resistor R2 and then to the positive power supply;

[0048] The source of JFET Ql is connected to the drain of JFET Q3 through resistor R3, the source of JFET Q2 is connected to the drain of JFET Q3 through resistor R4, the gate of JFET Q3 is connected to the output of amplifier Ul, the non-inverting input of amplifier Ul is connected to ground through diode Dl, the inverting input of amplifier Ul is connected to the source of JFET Q3 and then to resistor R5 and then to ground;

[0049] The base of transistor Q4 is connected to the emitter of transistor Q6, the collector of transistor Q6 is connected to the base of transistor Q7, the base of transistor Q7 is connected to the base of transistor Q8; the collector of transistor Q5 is connected to the inverting input of amplifier U2 through resistor R6, the collector of transistor Q4 is connected to the non-inverting input of amplifier U2 through resistor R7;

[0050] The non-inverting output of amplifier U2 is connected to the non-inverting input of amplifier U2 through resistor R8, the inverting output of amplifier U2 is connected to the inverting input of amplifier U2 through resistor R9, the non-inverting output of amplifier U2 is connected to the source of JFET Ql through resistor RlO, the inverting output of amplifier U2 is connected to the source of JFET Q2 through resistor Rl l; resistor RlO is connected to ground through resistor Rl2, resistor Rl l is connected to ground through resistor Rl3.

[0051] DETAILED DESCRIPTION Figure 4 and Figure 5The embodiment is based on the JFET pair differential closed-loop negative feedback amplification circuit for Z-axis inclination electromagnetic measurement receiving system, which comprises the amplification circuit, the air coil and the receiver.

[0052] In the embodiment, first, according to Faraday's law of electromagnetic induction, the induced electromotive force generated by the air coil is:

[0053]

[0054] Where the negative sign represents the direction relationship, n is the number of turns, Φ is the magnetic flux passing through the cross section of the coil, S is the average cross-sectional area of the coil, B is the magnetic induction intensity, q=n*S, which is called the effective area of the air coil.

[0055] Secondly, the differential input of the air coil is connected to the low-noise amplifier, and the weak voltage signal is amplified and connected to the receiver box through the coaxial transmission line with a length of about 100m for collection and storage.

[0056] According to the characteristics of the existing system, first, a diameter of 8m air coil is designed, and the number of turns is selected as 37*4 turns. In order to avoid interference, the air coil is usually kept a certain distance from the amplification circuit, and the two are connected by a long-distance coaxial signal transmission line. In order to suppress common-mode interference in the transmission process, the amplification circuit usually uses differential amplifier, and accordingly, the air coil is usually designed as differential structure. The differential air coil is essentially a series connection of two coils wound in the same direction, with a center point as a common end connected to the ground potential of the amplification circuit, and a uniform fixed shape skeleton is used for fixation. Figure 5

[0057] After connecting the whole system, first, power the receiver, and confirm that the system is working properly by observing the ground static data displayed on the receiver.

[0058] Secondly, power the amplification circuit, and confirm that the signal amplification multiple is normal by observing the data displayed on the receiver.

[0059] Finally, after the system completes the detection task, first, turn off the power of the amplification circuit, then turn off the data collection of the receiver, exit the disk, turn off the power of the receiver, and then perform data processing.

[0060] ​Any combination of the technical features in the above-described embodiments can be made, and for the sake of brevity, not all possible combinations are described, however, as long as there is no conflict, any combination of the technical features should be considered within the scope of the present disclosure.

[0061] The above-described embodiments only express several implementation manners of the present application, and the description is relatively specific and detailed, but should not be understood as a limitation on the patent scope of the present application. It should be noted that, for ordinary skilled persons in the art, several modifications and improvements can be made without departing from the concept of the present application, and these are within the protection scope of the present application. Therefore, the protection scope of the patent of the present application should be subject to the appended claims.

Claims

1. A differential closed-loop negative feedback amplifier circuit based on a JFET pair, the amplifier circuit including a low-noise amplifier; characterized by: The low noise amplifier comprises a first stage amplifier, a second stage amplifier, a feedback loop and a current mirror; The first-stage amplifier uses a discrete JFET pair structure as the input stage of the amplifier module. The first stage amplifier is connected to a current mirror, the current mirror is connected to a second stage amplifier, and the second stage amplifier is connected to the first stage amplifier via a feedback loop; The first stage amplifier includes a JFET field effect transistor Q1, a JFET field effect transistor Q2, a transistor Q7, a transistor Q8 and a VI conversion current source; The feedback loop is composed of a resistor R3, a resistor R4, a resistor R10, a resistor R11, a resistor R12 and a resistor R13; The drain of the JFET field effect transistor Q1 is connected to the emitter of the transistor Q7, and the drain of the JFET field effect transistor Q2 is connected to the emitter of the transistor Q8; The base and collector of the transistor Q7, and the base and collector of the transistor Q8 are all connected to the current mirror; The source of the JFET Q1 is connected to the VI conversion current source through the resistor R3, and the source of the JFET Q2 is connected to the VI conversion current source through the resistor R4; The current mirror is connected to a second-stage amplifier, which is connected to the source of the JFET field-effect transistor Q1 and the resistor R3 through a resistor R10, and to the source of the JFET field-effect transistor Q2 and the resistor R4 through a resistor R11. The resistor R10 is grounded through a resistor R12, and the resistor R11 is grounded through a resistor R13. The current mirror is used to connect to the low noise amplifier to provide a stable current to it; the current mirror includes a resistor R1, a resistor R2, a transistor Q4, a transistor Q5 and a transistor Q6; The collector of the transistor Q7 is connected to the collector of the transistor Q4, and the emitter of the transistor Q4 is connected to the resistor R1 and then connected to the power supply VCC; The collector of the transistor Q8 is connected to the collector of the transistor Q5, and the emitter of the transistor Q5 is connected to the resistor R2 and then connected to the power supply VCC; The base of the transistor Q7 is connected to the base of the transistor Q8 and then to the collector of the transistor Q6; the base of the transistor Q4 is connected to the base of the transistor Q5 and then to the emitter of the transistor Q6, and the base of the transistor Q6 is connected to the second-stage amplifier.

2. The differential closed-loop negative feedback amplifier circuit based on a JFET pair according to claim 1, characterized in that: The system also includes a power management circuit, which is used to provide a power supply with a rated voltage value to the first-stage amplifier, the second-stage amplifier, the feedback loop and the current mirror.

3. The differential closed-loop negative feedback amplifier circuit based on a JFET pair according to claim 1, characterized in that: The second stage amplifier includes an amplifier U2, a resistor R6, a resistor R7, a resistor R8 and a resistor R9; The collector of the transistor Q5 is connected to the inverting input terminal of the amplifier U2 through the resistor R6, and the collector of the transistor Q4 is connected to the non-inverting input terminal of the amplifier U2 through the resistor R7; The non-inverting output terminal of the amplifier U2 is connected to the non-inverting input terminal of the amplifier U2 through the resistor R8, the inverting output terminal of the amplifier U2 is connected to the inverting input terminal of the amplifier U2 through the resistor R9, the non-inverting output terminal of the amplifier U2 is connected to the source of the JFET field effect tube Q1 through the resistor R10, and the inverting output terminal of the amplifier U2 is connected to the source of the JFET field effect tube Q2 through the resistor R11.

4. The differential closed-loop negative feedback amplifier circuit based on a JFET pair according to claim 1, characterized in that: The VI conversion current source is composed of a diode D1, an amplifier U1, a JFET field effect tube Q3 and a resistor R5; The source of the JFET field effect transistor Q1 is connected to the drain of the JFET field effect transistor Q3 through the resistor R3, the source of the JFET field effect transistor Q2 is connected to the drain of the JFET field effect transistor Q3 through the resistor R4, the gate of the JFET field effect transistor Q3 is connected to the output end of the amplifier U1, the non-inverting input end of the amplifier U1 is grounded through the diode D1, and the inverting input end of the amplifier U1 is connected to the source of the JFET field effect transistor Q3 and then to ground through the resistor R5.

Citation Information

Patent Citations

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