Methods and devices for early read of solid-state drives

Abstract

The embodiment of the present application provides a method and device for advance reading of a solid-state hard disk, wherein the method includes: a flash memory conversion layer module predicts the next read position of a read-write request device, and performs advance reading of data in the solid-state hard disk that matches the next read position; the flash memory conversion layer module applies for multiple data buffers for the data obtained by the advance reading; in the case that the next read request of the read-write request device does not hit the data stored in the data buffer, the flash memory conversion layer module sends the next read request to the back-end module, and the back-end module reads the data matched by the next read request from the non-volatile memory; in the case that the next read request hits the data stored in the data buffer, the flash memory conversion layer module returns the data read from the data buffer to the read-write request device. Through the present application, the problem of low efficiency of the solid-state hard disk in processing read requests is solved, thereby achieving the effect of improving the efficiency of the solid-state hard disk in processing read requests.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of computers, and more specifically, to a method and device for early reading of a solid state drive. Background Art

[0002] In the related art, in the scenario of solid-state hard disk, when the load is heavy, the number of communications between the back-end module and the flash translation layer module will be relatively high, and the number of communications between the back-end and the flash translation layer will increase. Because the delay caused by the communication will also increase, the efficiency of the solid-state hard disk in processing read and write requests will be reduced, which will lead to the problem of low efficiency of the solid-state hard disk in processing read requests. Therefore, there is a problem of low efficiency of the solid-state hard disk in processing read requests.

[0003] To address the above-mentioned problems, no effective solution has been proposed yet. Summary of the invention

[0004] The embodiments of the present application provide a method and device for advance reading of a solid state drive, so as to at least solve the problem of low efficiency of processing read requests by the solid state drive in the related art.

[0005] According to an embodiment of the present application, a method for reading ahead of a solid state drive is provided, comprising:

[0006] The above-mentioned flash memory conversion layer module predicts the next read position of the read-write request device, and reads in advance the data in the solid-state hard disk that matches the above-mentioned next read position, wherein the above-mentioned read-write request device is a device that initiates a read request to the above-mentioned solid-state hard disk; the above-mentioned flash memory conversion layer module applies for multiple data buffers for the above-mentioned data obtained by the advance reading, wherein the above-mentioned data buffer is used to store the above-mentioned data obtained by the advance reading; in the case that the next read request of the above-mentioned read-write request device does not hit the data stored in the above-mentioned data buffer, the above-mentioned flash memory conversion layer module sends the above-mentioned next read request to the back-end module, and the above-mentioned back-end module reads the data matching the above-mentioned next read request from the non-volatile memory; in the case that the above-mentioned next read request hits the data stored in the above-mentioned data buffer, the above-mentioned flash memory conversion layer module returns the data read from the above-mentioned data buffer to the above-mentioned read-write request device.

[0007] According to another embodiment of the present application, there is provided an advance reading device for a solid state hard disk, comprising:

[0008] An advance read unit is used to advance read the data in the solid-state hard disk that matches the next read position when the flash memory conversion layer module predicts the next read position of the read-write request device, wherein the read-write request device is a device that initiates a read request to the solid-state hard disk; an application unit is used to enable the flash memory conversion layer module to apply for multiple data buffers for the data obtained by the advance read, wherein the data buffer is used to store the data obtained by the advance read; a sending unit is used to enable the flash memory conversion layer module to send the next read request to the back-end module when the next read request of the read-write request device does not hit the data stored in the data buffer, and the back-end module reads the data matching the next read request from the non-volatile memory; a return unit is used to enable the flash memory conversion layer module to return the data read from the data buffer to the read-write request device when the next read request hits the data stored in the data buffer.

[0009] As an optional solution, the application unit includes: a sending module, used to enable the flash translation layer module to send an advance read message to the back-end module, wherein the advance read message includes the buffer addresses of the multiple data buffers.

[0010] As an optional solution, the sending module includes: the flash translation layer module sends an advance read message carrying an indication flag to the back-end module, wherein the indication flag is used to indicate that the back-end module does not need to apply for the data buffer.

[0011] As an optional solution, the above-mentioned advance read unit includes: an allocation module, which is used to enable the above-mentioned flash memory conversion layer module to allocate a corresponding node array to each channel of the above-mentioned non-volatile memory, wherein the above-mentioned channel is used for data transmission and access, and the above-mentioned node array is used to record and store the relevant information of the above-mentioned advance read.

[0012] As an optional solution, the allocation module includes: a first allocation submodule, which is used to enable the flash translation layer module to allocate corresponding first information to each channel of the non-volatile memory, wherein the relevant information includes the first information, and the first information is used to indicate the physical storage location of the data obtained by the advance read in the non-volatile memory; a second allocation submodule, which is used to enable the flash translation layer module to allocate corresponding second information to each channel of the non-volatile memory, wherein the relevant information includes the second information, and the second information is used to indicate the validity of the data obtained by the advance read; a third allocation submodule, which is used to enable the flash translation layer module to allocate corresponding second information to each channel of the non-volatile memory, wherein the relevant information includes the second information, and the second information is used to indicate the validity of the data obtained by the advance read; Each channel of the volatile memory is allocated corresponding third information, wherein the above-mentioned related information includes the above-mentioned third information, and the above-mentioned third information is used to indicate the address of the above-mentioned data buffer; a fourth allocation submodule is used to enable the above-mentioned flash translation layer module to allocate corresponding fourth information to each channel of the above-mentioned non-volatile memory, wherein the above-mentioned related information includes the above-mentioned fourth information, and the above-mentioned fourth information is used to indicate the aging time of the above-mentioned data buffer; a fifth allocation submodule is used to enable the above-mentioned flash translation layer module to allocate corresponding fifth information to each channel of the above-mentioned non-volatile memory, wherein the above-mentioned related information includes the above-mentioned fifth information, and the above-mentioned fifth information is used to indicate the advance read count of the above-mentioned physical storage location.

[0013] As an optional solution, the allocation module includes: an initialization submodule, which is used to initialize the corresponding thread lock for the node array, wherein the thread lock is used to synchronize access to the node array.

[0014] As an optional solution, the initialization submodule includes: an ensuring subunit, which is used to use the thread lock to ensure the data consistency of the deletion operation when performing the deletion operation of the node array.

[0015] As an optional solution, the allocation module includes: a creation submodule for creating a timer thread, wherein the timer thread is used to periodically traverse the entire node array and perform specific checks and operations.

[0016] As an optional scheme, the above-mentioned creation submodule includes: a starting subunit, used to enable the above-mentioned timer thread to start at a preset time interval and determine the current node array from the above-mentioned all node arrays; a checking subunit, used to enable the above-mentioned timer thread to check the marking state of the above-mentioned current node array; a recording subunit, used to record the invalid time of the above-mentioned current node array when the above-mentioned marking state indicates that the above-mentioned current node array is an invalid node array, wherein the data in the data buffer pointed to by the above-mentioned invalid node array is not currently accessed or hit, and the above-mentioned invalid time is the duration of the above-mentioned current node array being the above-mentioned invalid node array; when the duration corresponding to the above-mentioned current node array is greater than or equal to the preset threshold, the data buffer pointed to by the above-mentioned current node array is released.

[0017] As an optional solution, the application unit includes: a prohibition module, which is used to temporarily prohibit the flash translation layer module from performing the above-mentioned advance reading when the amount of data in the above-mentioned multiple data buffers meets the data storage edge.

[0018] As an optional solution, the above-mentioned advance reading unit includes: a configuration module, which is used to configure the above-mentioned flash translation layer module with a global flag during the power-on initialization phase, wherein the above-mentioned global flag is used to control whether the above-mentioned flash translation layer module allows the above-mentioned advance reading.

[0019] According to another embodiment of the present application, a computer-readable storage medium is provided, in which a computer program is stored, wherein the computer program is configured to execute the steps of any one of the above method embodiments when running.

[0020] According to another embodiment of the present application, an electronic device is provided, including a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to execute the steps in any one of the above method embodiments.

[0021] According to another embodiment of the present application, a computer program product is provided, including a computer program, wherein when the computer program is configured to be executed by a processor, the steps in any one of the above method embodiments are performed.

[0022] Through the present application, the flash translation layer module predicts the next read position of the read-write request device, and reads in advance the data in the solid-state hard disk that matches the next read position, wherein the read-write request device is a device that initiates a read request to the solid-state hard disk; the flash translation layer module applies for multiple data buffers for the data obtained by the advance read, wherein the data buffer is used to store the data obtained by the advance read; if the next read request of the read-write request device does not hit the data stored in the data buffer, the flash translation layer module sends the next read request to the back-end module, and the back-end module reads the data matched by the next read request from the non-volatile memory; if the next read request hits the data stored in the data buffer, the flash translation layer module returns the data read from the data buffer to the read-write request device.

[0023] Specifically, the flash translation layer module predicts the next read position of the next read / write request device, and matches the advance read position in the solid-state hard disk, thereby reading the corresponding data and storing it in the data buffer. When the next read request does not hit, the next read request is sent to the back-end module. If it hits, the data is directly read from the data buffer and returned to the device of the read / write request. That is, through the advance read strategy, the communication between the back-end module and the flash translation layer module is effectively reduced, thereby effectively reducing the delay caused by the communication, thereby improving the efficiency of the solid-state hard disk in processing read requests. Due to the effective reduction of the delay caused by the communication, the problem of low efficiency of the solid-state hard disk in processing read requests can be solved, thereby achieving the technical effect of improving the efficiency of the solid-state hard disk in processing read requests. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 is a schematic diagram of an application environment of a solid state drive read-ahead method according to an embodiment of the present application;

[0025] Figure 2 is a flow chart of a method for advance reading of a solid state drive according to an embodiment of the present application;

[0026] Figure 3 is a schematic diagram of a solid state drive read-ahead method according to an embodiment of the present application;

[0027] Figure 4 is a schematic diagram of a solid state drive read-ahead method according to an embodiment of the present application;

[0028] Figure 5 is a schematic diagram of a solid state drive read-ahead method according to an embodiment of the present application;

[0029] Figure 6 It is a structural block diagram of the advance reading device of the solid state hard disk according to an embodiment of the present application. DETAILED DESCRIPTION

[0030] The embodiments of the present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0031] It should be noted that the terms "first", "second", etc. in the specification and claims of this application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence.

[0032] The method embodiments provided in the embodiments of the present application can be executed in a server device or a similar computing device. Taking running on a server device as an example, Figure 1 1 is a hardware structure block diagram of a server device of a solid state hard disk advance reading method according to an embodiment of the present application. Figure 1 As shown, the server device may include one or more ( Figure 1 Only one is shown in the figure) a processor 102 (the processor 102 may include but is not limited to a processing device such as a microprocessor MCU or a programmable logic device FPGA) and a memory 104 for storing data, wherein the above-mentioned server device may also include a transmission device 106 and an input / output device 108 for communication functions. It can be understood by those skilled in the art that Figure 1 The structure shown is only for illustration and does not limit the structure of the above server device. Figure 1 More or fewer components as shown, or with Figure 1 Different configurations shown.

[0033] The memory 104 can be used to store computer programs, for example, software programs and modules of application software, such as the computer program corresponding to the advance reading method of the solid-state hard disk in the embodiment of the present application. The processor 102 executes various functional applications and data processing by running the computer program stored in the memory 104, that is, to implement the above method. The memory 104 may include a high-speed random access memory, and may also include a non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some instances, the memory 104 may further include a memory remotely arranged relative to the processor 102, and these remote memories can be connected to the server device via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0034] The transmission device 106 is used to receive or send data via a network. The specific example of the above network may include a wireless network provided by a communication provider of the server device. In one example, the transmission device 106 includes a network adapter (Network Interface Controller, referred to as NIC), which can be connected to other network devices through a base station so as to communicate with the Internet. In one example, the transmission device 106 can be a radio frequency (RF) module, which is used to communicate with the Internet wirelessly.

[0035] In this embodiment, a method for early reading of a solid state drive is provided. Figure 2 is a flow chart of a method for reading ahead of a solid state drive according to an embodiment of the present application, such as Figure 2 As shown, the process includes the following steps:

[0036] Step S202, the flash translation layer module predicts the next read position of the read / write request device, and reads the data in the solid state drive that matches the next read position in advance, wherein the read / write request device is the device that initiates a read request to the solid state drive;

[0037] In an optional embodiment, the Flash Translation Layer (FTL) module may be, but is not limited to, a core component in a solid state disk (SSD), and may be, but is not limited to, responsible for converting the logical address of the host into the physical address of the flash memory, managing data read and write operations, and the storage location of data inside the SSD.

[0038] In an optional embodiment, the solid state drive may be, but is not limited to, a solid state drive.

[0039] Step S204, the flash translation layer module applies for a plurality of data buffers for the data read in advance, wherein the data buffers are used to store the data read in advance;

[0040] In an optional embodiment, the data buffer may be, but is not limited to, a space inside a solid state drive for temporarily storing data, may be, but is not limited to, a part of a double data rate memory (Double Data Rate SDRAM, DDR memory for short), and may be, but is not limited to, used to improve data transmission efficiency and speed.

[0041] Step S206, when the next read request of the read / write request device does not hit the data stored in the data buffer, the flash translation layer module sends the next read request to the backend module, and the backend module reads the data matched by the next read request from the non-volatile memory;

[0042] In an optional embodiment, the back end module (BE for short) may be, but is not limited to, a back end processing module of a solid state drive, responsible for data interaction with a flash memory and performing read and write operations.

[0043] In an optional embodiment, the non-volatile memory (NAND) may be, but is not limited to, a storage medium in a solid state drive for long-term storage of data, and the data will not be lost even in the event of a power outage.

[0044] Step S208: When the next read request hits the data stored in the data buffer, the flash translation layer module returns the data read from the data buffer to the read / write request device.

[0045] It should be noted that the flash translation layer module can predict the host's next read position. This prediction is based on the host's read mode and is usually performed in a low-pressure sequential read scenario in order to prepare data in advance.

[0046] Secondly, the flash translation layer module applies for multiple data buffers for pre-read data. The number and size of these buffers can be adjusted according to the specific SSD architecture.

[0047] Then, when the next read request of the host misses the data in the buffer, the flash translation layer module forwards the read request to the backend module, and the backend module performs the read operation to directly read the data from the non-volatile memory.

[0048] Finally, when the host's next read request hits the data in the buffer, the flash translation layer module can return the data directly from the buffer, avoiding sending a read request to the non-volatile memory again, thereby saving data transmission time and significantly reducing read latency.

[0049] To further illustrate, assume that a solid-state drive is running in a low-stress sequential read scenario, and the host is continuously reading a series of 4k-sized data blocks. When the host reads the first block of data, the flash translation layer module predicts the location of the second block of data that may be read next by analyzing the host's read mode. The flash translation layer module pre-applies a buffer for the second block of data, encapsulates the buffer address and the physical address of the second block of data into a read request message, and sends it to the backend module.

[0050] When the backend module receives the read request, it reads the block of data from the non-volatile memory, stores it in the buffer specified by the flash translation layer module, and sends a completion signal to the flash translation layer module. During this period, the host sends a request to read the second block of data. The flash translation layer module immediately finds the node that matches the host request in the node array and returns the data directly from the buffer to the host without sending a read request to the non-volatile memory again, thereby reducing read latency and improving read performance.

[0051] It should be noted that when a large amount of computing power is required in a specific scenario, such as when the load is large and more buffers need to be applied for, computing power is more considered rather than efficiency. That is to say, this embodiment is aimed at a specific scenario where more buffers need to be applied for. By using the flash translation layer to apply for multiple data buffers, the powerful computing power of the flash translation layer is fully utilized, thereby solving the problem of insufficient computing power in scenarios with large loads.

[0052] In addition, if a cache area is set up through the back-end module, and the data to be read next is predicted by advance reading, and then the data is stored in the cache area, regardless of whether the read request hits the data in the cache area, the read request needs to be sent to the back-end module through the flash conversion layer, which requires more information transmission overhead and will also cause more delays due to communication, thereby affecting the processing efficiency and performance of the read request.

[0053] The present application sets a cache area through a flash memory conversion layer, predicts the data to be read next time by reading in advance, and then stores the data in the cache area. If a read request hits the data in the cache area, there is no need to send the read request to the back-end module through the flash memory conversion layer, and the data can be read, which saves information transmission overhead and reduces the delay between the flash memory conversion layer and the back-end module, thereby improving the processing efficiency and performance of read requests.

[0054] Through the above steps, the flash translation layer module predicts the next read position of the read-write request device, and reads in advance the data in the solid-state hard disk that matches the next read position, wherein the read-write request device is a device that initiates a read request to the solid-state hard disk; the flash translation layer module applies for multiple data buffers for the data obtained by the advance read, wherein the data buffer is used to store the data obtained by the advance read; if the next read request of the read-write request device does not hit the data stored in the data buffer, the flash translation layer module sends the next read request to the back-end module, and the back-end module reads the data matching the next read request from the non-volatile memory; if the next read request hits the data stored in the data buffer, the flash translation layer module returns the data read from the data buffer to the read-write request device.

[0055] Specifically, the flash translation layer module predicts the next read position of the next read / write request device, and matches the advance read position in the solid-state hard disk, thereby reading the corresponding data and storing it in the data buffer. When the next read request does not hit, the next read request is sent to the back-end module. If it hits, the data is directly read from the data buffer and returned to the device of the read / write request. That is, through the advance read strategy, the communication between the back-end module and the flash translation layer module is effectively reduced, thereby effectively reducing the delay caused by the communication, thereby improving the efficiency of the solid-state hard disk in processing read requests. Due to the effective reduction of the delay caused by the communication, the problem of low efficiency of the solid-state hard disk in processing read requests can be solved, thereby achieving the technical purpose of making full use of the multi-core processor and parallel computing capabilities of the server, thereby achieving the technical effect of improving the efficiency of the solid-state hard disk in processing read requests.

[0056] The execution subject of the above steps may be a server, a terminal, etc., but is not limited thereto.

[0057] As an optional solution, after the flash translation layer module applies for multiple data buffers for the data read in advance, the method further includes:

[0058] The flash translation layer module sends an advance read message to the backend module, wherein the advance read message includes buffer addresses of multiple data buffers.

[0059] In an optional embodiment, the advance read message may be, but is not limited to, a special read instruction sent by the flash translation layer module to the back-end module, may be, but is not limited to, containing the physical address of the pre-read position and one or more buffer addresses, and may be, but is not limited to, used to instruct the back-end module to store the pre-read data in a designated buffer.

[0060] It should be noted that when the flash translation layer module determines a pre-read position, it will pre-apply for one or more buffers for the data to be read in advance, and encapsulate the addresses of these buffers in a special pre-read message. This message not only contains the physical address of the pre-read data, but also clearly indicates the buffer location where the data is stored, so that the back-end module can directly store the data in the specified buffer after receiving the message, without the need for additional buffer applications, reducing the number of communications and improving reading performance. In addition, because the flash translation layer module directly manages the storage of pre-read data, it can more finely control the use of the buffer, avoid the long-term occupation of invalid data, and improve the utilization of the buffer.

[0061] Through the embodiment of the present application, the flash translation layer module sends the advance read message to the backend module, wherein the advance read message includes the buffer addresses of multiple data buffers, thereby achieving the technical purpose of avoiding the long-term occupation of invalid data, and further achieving the technical effect of improving the utilization rate of the buffer.

[0062] As an optional solution, the flash translation layer module sends the advance read message to the backend module, including:

[0063] The flash translation layer module sends the advance read message carrying the indication flag to the back-end module, wherein the indication flag is used to indicate that the back-end module does not need to apply for a data buffer.

[0064] In an optional embodiment, the indication flag may be, but is not limited to, a special flag added to the advance read message, used to inform the back end whether it is necessary to apply for a data buffer.

[0065] It should be noted that when the flash translation layer module decides to perform an advance read operation, it will pre-apply for one or more buffers for the pre-read data and encapsulate the addresses of these buffers in the advance read message. At the same time, the flash translation layer will set an indication flag in the message, which tells the back-end module that it does not need to apply for a new buffer for this read operation. In this way, when the back-end module receives the advance read message, it can immediately read the data according to the physical address and buffer address in the message without performing additional buffer application operations, thereby significantly reducing the processing burden of the back-end module and the delay in the entire reading process, thereby improving the reading performance.

[0066] Through the embodiment of the present application, the flash translation layer module sends the advance read message carrying the indication flag to the backend module, wherein the indication flag is used to indicate that the backend module does not need to apply for a data buffer. This achieves the technical purpose of significantly reducing the processing burden of the backend module and the delay in the entire reading process, thereby achieving the technical effect of improving the reading performance.

[0067] As an optional solution, before the flash translation layer module predicts the next read position of the read / write request device and reads the data matching the next read position in the solid state drive in advance, the method further includes:

[0068] The flash translation layer module allocates a corresponding node array to each channel of the non-volatile memory, wherein the channel is used for data transmission and access, and the node array is used for recording and storing related information of advance reading.

[0069] In an optional embodiment, a channel may be used for, but is not limited to, data transmission and access, and a node array is used to record and store related information of advance reading.

[0070] In an optional embodiment, the node array may be, but is not limited to, a storage structure pre-allocated by the flash translation layer module on each channel, and may be, but is not limited to, used to record information such as the physical address, valid flag, buffer address, and data aging time counter of the data read in advance. In addition, the node array may also be, but is not limited to, adjusted according to the capacity and performance requirements of the solid-state drive.

[0071] It should be noted that during the power-on initialization phase, the flash translation layer module pre-allocates a node array for each channel. Each node in the node array contains key information such as the physical address of the data, valid flag, buffer address, and data aging time counter. In this way, the flash translation layer module can independently manage the pre-read operation on each channel, record the pre-read data location and the buffer where the data is stored, and provide the ability to quickly respond and judge data hits for subsequent read operations, thereby improving the efficiency of reading.

[0072] Through the embodiment of the present application, the flash translation layer module allocates a corresponding node array to each channel of the non-volatile memory, wherein the channel is used for data transmission and access, and the node array is used to record and store the relevant information of the advance read. Thus, the technical purpose of providing the ability of rapid response and data hit judgment for subsequent read operations is achieved, thereby achieving the technical effect of improving the efficiency of reading.

[0073] As an optional solution, the flash translation layer module allocates a corresponding array for each channel of the non-volatile memory, including at least one of the following:

[0074] S1-1, the flash translation layer module allocates corresponding first information to each channel of the non-volatile memory, wherein the relevant information includes the first information, and the first information is used to indicate the physical storage location of the data obtained by the advance read in the non-volatile memory;

[0075] S1-2, the flash translation layer module allocates corresponding second information to each channel of the non-volatile memory, wherein the relevant information includes the second information, and the second information is used to indicate the validity of the data obtained by the advance read;

[0076] S1-3, the flash translation layer module allocates corresponding third information to each channel of the non-volatile memory, wherein the relevant information includes the third information, and the third information is used to indicate the address of the data buffer;

[0077] S1-4, the flash translation layer module allocates corresponding fourth information to each channel of the non-volatile memory, wherein the relevant information includes the fourth information, and the fourth information is used to indicate the aging time of the data buffer;

[0078] S1-5 The flash translation layer module allocates corresponding fifth information to each channel of the non-volatile memory, wherein the relevant information includes the fifth information, and the fifth information is used to indicate an advance read count of a physical storage location.

[0079] In an optional embodiment, the first information may be, but is not limited to, used to indicate the physical storage location of the data obtained by pre-reading in the non-volatile memory. The physical storage location may be, but is not limited to, the actual storage location of the data in the non-volatile memory, and may be, but is not limited to, used for hit judgment and data reading operations in the flash memory conversion layer.

[0080] In an optional embodiment, the second information can be but is not limited to being used to indicate the validity of the data read in advance. The data validity can be but is not limited to being understood as judging whether the flag data is in an available state, used to judge whether the data has been read by the host. If so, the data is invalid and can be released.

[0081] In an optional embodiment, the third information may be but is not limited to being used to represent the address of a data buffer, and the address of the data buffer may be but is not limited to being understood as pointing to a buffer in the DDR memory inside the solid-state drive for storing advance read data, facilitating quick access to data.

[0082] In an optional embodiment, the fourth information can be but is not limited to being used to represent the aging time of the data buffer. The aging time of the data buffer can be but is not limited to being understood as the time during which the data is not read by the host in the buffer, and is used to implement data aging management to avoid long-term unused data occupying limited resources.

[0083] In an optional embodiment, the fifth information may be, but is not limited to, used to represent a read-ahead count of a physical storage location. The read-ahead count may be, but is not limited to, understood as recording the number of times the same physical location is read in advance, and is used to dynamically adjust the read-ahead strategy to avoid invalid reading.

[0084] It should be noted that during the startup phase of the solid-state drive, the flash translation layer module will initialize the node array for each channel of the non-volatile memory, and each node contains the above five types of information. The design of the node array enables the flash translation layer to be independent of the back-end module and efficiently manage the read-ahead strategy on each channel, including the recording of data storage locations, the management of data validity, the allocation of buffer addresses, the monitoring of data aging time, and the statistics of read-ahead counts. This solution reduces the IPC communication overhead, avoids the long-term occupation of invalid data, and improves the efficiency of buffer usage.

[0085] Through the embodiment of the present application, the flash translation layer module allocates corresponding first information to each channel of the non-volatile memory, wherein the relevant information includes the first information, and the first information is used to indicate the physical storage location of the data obtained by the advance reading in the non-volatile memory; the flash translation layer module allocates corresponding second information to each channel of the non-volatile memory, wherein the relevant information includes the second information, and the second information is used to indicate the validity of the data obtained by the advance reading; the flash translation layer module allocates corresponding third information to each channel of the non-volatile memory, wherein the relevant information includes the third information, and the third information is used to indicate the address of the data buffer; the flash translation layer module allocates corresponding fourth information to each channel of the non-volatile memory, wherein the relevant information includes the fourth information, and the fourth information is used to indicate the aging time of the data buffer; the flash translation layer module allocates corresponding fifth information to each channel of the non-volatile memory, wherein the relevant information includes the fifth information, and the fifth information is used to indicate the advance reading count of the physical storage location. Thus, the technical purpose of avoiding the long-term occupation of invalid data is achieved, and the technical effect of improving the use efficiency of the buffer is achieved.

[0086] As an optional solution, in the process in which the flash translation layer module allocates a corresponding node array to each channel of the non-volatile memory, the method further includes:

[0087] Initialize the corresponding thread lock for the node array, where the thread lock is used to synchronize access to the node array.

[0088] In an optional embodiment, the thread lock can be but is not limited to being understood as a synchronization mechanism, which can be but is not limited to being used to ensure that access to node arrays in a multi-threaded environment is mutually exclusive, avoiding data inconsistency or conflict caused by multiple threads modifying the same resource at the same time, that is, used to synchronize access to node arrays.

[0089] It should be noted that in order to ensure the effective management of the node array and the correctness of the data, the flash translation layer module initializes the corresponding thread lock for each node array. In the multi-threaded parallel processing environment inside the solid-state drive, multiple threads may access the same node array at the same time to query or update the data information therein. The introduction of thread locks ensures that at any time, only one thread can access the node array, avoiding data conflicts and inconsistencies caused by concurrent access, and improving the stability of the system and the security of data processing.

[0090] Through the embodiment of the present application, the thread lock corresponding to the node array is initialized, wherein the thread lock is used to synchronize access to the node array, thereby achieving the technical purpose of avoiding data conflicts and inconsistency problems caused by concurrent access, and further achieving the technical effect of improving the stability of the system and the security of data processing.

[0091] As an optional solution, after initializing the corresponding thread lock for the node array, the method further includes:

[0092] When deleting a node array, a thread lock is used to ensure data consistency of the deletion operation.

[0093] It should be noted that in the node array deletion operation, the flash translation layer module uses thread locks to ensure data consistency and atomicity of operations. In the multi-threaded parallel processing environment inside the SSD, multiple threads may access and modify the same node array at the same time to perform deletion operations or other management tasks. In order to avoid data inconsistency and conflicts caused by concurrent operations, the flash translation layer module will first lock the thread lock corresponding to the node array before performing any deletion operation to ensure that the node array is used exclusively during the deletion operation. Other threads cannot access or modify the array until the deletion operation is completed and the lock is released, which improves the stability of the SSD and the reliability of data processing.

[0094] Through the embodiment of the present application, when performing the node array deletion operation, a thread lock is used to ensure the data consistency of the deletion operation. Thus, the technical purpose of ensuring that the node array is used exclusively during the deletion operation and other threads cannot access or modify the array is achieved, thereby achieving the technical effect of improving the stability of the solid-state drive and the reliability of data processing.

[0095] As an optional solution, in the process in which the flash translation layer module allocates a corresponding node array to each channel of the non-volatile memory, the method further includes:

[0096] A timer thread is created, wherein the timer thread is used to periodically traverse the entire node array and perform specific checks and operations.

[0097] In an optional embodiment, the timer thread can be but is not limited to being understood as a periodically running thread, which can be but is not limited to being used to periodically traverse the entire node array, check the aging status of the data, and perform necessary resource release operations to ensure the efficiency and accuracy of the node array.

[0098] During the operation of the solid-state drive, the flash conversion layer will execute the advance read strategy according to the host's read mode, and preload the data that may be needed into the buffer. However, if this data has not been read for a long time, it will form aged data and occupy resources. Therefore, this embodiment creates a timer thread that regularly traverses all node arrays, checks the aging time counter of the data, identifies the nodes that have not been read by the host for a long time, and releases resources, so as to maintain the high efficiency and accuracy of the node array.

[0099] Through the embodiment of the present application, a timer thread is created, wherein the timer thread is used to periodically traverse the entire node array and perform specific checks and operations. Thus, the technical purpose of identifying nodes that have not been read by the host for a long time and releasing resources is achieved, thereby achieving the technical effect of maintaining high efficiency and accuracy of the node array.

[0100] As an optional solution, after creating the timer thread, the method further includes:

[0101] Execute the following steps until the timer thread traverses the entire node array:

[0102] S2-1, the timer thread starts at a preset time interval and determines the current node array from all node arrays;

[0103] S2-2, the timer thread checks the marking status of the current node array;

[0104] S2-3, when the mark state indicates that the current node array is an invalid node array, recording the invalid time of the current node array, wherein the invalid node array refers to data in the data buffer that is not currently accessed or hit, and the invalid time refers to the duration of the current node array being an invalid node array;

[0105] S2-4, when the duration corresponding to the current node array is greater than or equal to a preset threshold, release the data buffer pointed to by the current node array.

[0106] In an optional embodiment, the invalid node array may be, but is not limited to, an array of nodes pointing to data in the data buffer that is not currently accessed or hit.

[0107] In an optional embodiment, the invalid time may be, but is not limited to, the duration after the node array is marked as invalid, and may be, but is not limited to, used to determine whether data is aged and the timing of releasing resources.

[0108] It should be noted that during the operation of the solid-state drive, the timer thread is started at a predetermined time interval, and each time a current node array is determined from all node arrays for inspection. During the inspection process, the thread first checks the mark status of the current node array to determine whether it is an invalid node array. If the current node array is marked as invalid, the thread will record its invalid time and compare it with the preset threshold. If the invalid time reaches or exceeds the preset threshold, the timer thread will release the data buffer resources pointed to by the current node array to avoid resource waste and improve the reading performance and resource utilization efficiency of the solid-state drive.

[0109] For further explanation, assume that a solid-state drive has 8 channels, and the node array of each channel includes 64 nodes. When the solid-state drive is started and initialized, the flash translation layer module creates a timer thread and sets its operation cycle to once per second. During operation, assume that a node in the node array of channel 1 is marked as invalid. Since the data in the data buffer pointed to by it has not been read or hit by the host for a long time, the timer thread records its invalid time during the check. Assuming that the preset threshold is 60 seconds, when the timer thread checks again, it finds that the invalid time of the node has reached 60 seconds, and the release condition is met. The timer thread then releases the data buffer resource pointed to by the node and resets the node to an available state for subsequent advance read operations.

[0110] Through the embodiment of the present application, the timer thread starts at a preset time interval and determines the current node array from all node arrays; the timer thread checks the mark state of the current node array; when the mark state indicates that the current node array is an invalid node array, the invalid time of the current node array is recorded, wherein the invalid node array is the data in the data buffer that is pointed to and is not currently accessed or hit, and the invalid time is the duration of the current node array being an invalid node array; when the duration corresponding to the current node array is greater than or equal to the preset threshold, the data buffer pointed to by the current node array is released. Thus, the technical purpose of avoiding resource waste is achieved, and the technical effect of improving the reading performance and resource utilization efficiency of the solid-state hard disk is achieved.

[0111] As an optional solution, after the flash translation layer module applies for multiple data buffers for the data read in advance, the method further includes:

[0112] When the amount of data in the plurality of data buffers meets the data storage edge, the flash translation layer module is temporarily prohibited from performing advance reading.

[0113] In an optional embodiment, the data storage edge can be understood as, but not limited to, a state in which the amount of data in the data buffer is close to its capacity limit. At this time, buffer resources are tight, which may affect the execution efficiency of subsequent data read and write operations.

[0114] It should be noted that when the data buffer resources are close to their storage edge, the flash translation layer module will temporarily prohibit the execution of the read-ahead strategy to avoid excessive occupation of buffer resources and ensure the efficiency and stability of system data processing. Specifically, when the amount of data in the data buffer inside the solid-state drive reaches or exceeds the preset storage edge threshold, the flash translation layer module will detect this state and immediately take measures to temporarily prohibit the read-ahead operation until the buffer resources are released and the amount of data is lower than the storage edge threshold, at which time the read-ahead operation is allowed again. This ensures that in the case of tight resources, the solid-state drive can give priority to the read request of the current host, avoiding data processing delays and performance degradation that may be caused by excessive occupation of buffer resources.

[0115] Through the embodiment of the present application, when the amount of data in multiple data buffers meets the data storage edge, the flash translation layer module is temporarily prohibited from performing advance reading, thereby achieving the technical purpose of giving priority to the read request of the current host, and further achieving the technical effect of avoiding data processing delays and performance degradation that may be caused by excessive occupation of buffer resources.

[0116] As an optional solution, before the flash translation layer module predicts the next read position of the read / write request device and reads the data matching the next read position in the solid state drive in advance, the method further includes:

[0117] During the power-on initialization phase, the flash translation layer module configures a global flag, where the global flag is used to control whether the flash translation layer module allows advance reading.

[0118] In an optional embodiment, the global flag bit may be, but is not limited to, a global variable in the flash translation layer module for controlling the read-ahead function, may be, but is not limited to, used to determine whether the flash translation layer allows the read-ahead operation, and may be, but is not limited to, set to a binary bit, where "1" indicates that read-ahead is allowed and "0" indicates that read-ahead is disabled.

[0119] It should be noted that the global flag bit is used as a control variable to indicate whether the flash translation layer module allows the read-ahead operation to be performed before the host read request. During the initialization phase, the flash translation layer sets the global flag bit to the default on state, which means that after the system starts, the read-ahead function will be enabled by default. However, as the SSD runs, the flash translation layer module will dynamically adjust the value of the global flag bit according to the real-time status of the host read mode, data buffer usage, and read-ahead hit rate, thereby intelligently controlling the enabling and disabling of the read-ahead function.

[0120] Through the embodiment of the present application, in the power-on initialization stage, the flash translation layer module configures a global flag, wherein the global flag is used to control whether the flash translation layer module allows advance reading. Thus, the technical purpose of dynamically adjusting the value of the global flag is achieved, and the technical effect of intelligently controlling the enabling and disabling of the advance reading function is achieved.

[0121] As an optional solution, for ease of understanding, the SSD read-ahead is applied to the SSD (SolidState Disk, SSD for short) scenario.

[0122] In an optional embodiment, this embodiment proposes a method for reducing read latency and improving read performance by optimizing the read-ahead function, and based on the read-ahead management mechanism of the Flash Translation Layer (FTL), the back-end module overhead is greatly reduced, and the message interaction between the FTL and the back-end module (BE) is reduced. The buffer management method of the read-ahead function proposed in this embodiment greatly improves the effect of reducing read latency.

[0123] In an optional embodiment, the NAND physical address where the data is located (used to record the advance read position and subsequently determine whether the host hits. If the address is consistent with the address in the request message, it is a hit), the node valid mark (when the node hits, the data in the buffer is read out by the host, and the buff is released, the flag position is valid, and all nodes are set to valid during initialization), the buffer address (the buffer size pointed to is 4k, and the corresponding buffer is found according to the buffer address to retrieve the data), the advance read data aging timer_cnt (used to release the data buff corresponding to the position that has not been hit for a long time), and update_cnt (records the number of times a physical location has been read in advance multiple times, and is used to dynamically switch the advance read according to the hit pressure).

[0124] Then, the thread lock is initialized for the node array of each channel for asynchronous operation when deleting nodes. Finally, after the node array is initialized, FTL calls pthread_create() to create a timer thread, traverses the node array, and performs self-increment operation every second for the timer_cnt corresponding to the invalid mark buff in the node array. If it has not hit within 60 seconds, the node buff is released and the node is set to a valid buff for saving the advance read data next time. If run_flag is 0 at this time, run_flag is set to 1 to enable the subsequent advance read to be sent.

[0125] It should be noted that in the low-pressure sequential read scenario of SSD (iod is 1, bs is 4k or 8k), each time the host sends a read request, the FTL module will predict the host's next read position in advance, and read the predicted position in advance. When sending the advance read message to the backend, the FTL module will first apply for a buff to save the data for the advance read, and find the specific node array according to the channel number, find the node that is not currently used in the node array to save the nand physical address of the read and the buff address of the data, and then set the node to a valid state (already used). Then, FTL sets a flag in the read message body sent to the backend module that does not require the backend module to apply for a buff, and stores the read buff address applied by FTL itself in the message body and sends it to the backend module. For the backend module, the difference between advance read and normal read is only that advance read does not require the backend to apply for a data buff by itself, and the process of reading nand is the same. The data returned from nand is transferred to the corresponding buff. For normal read, FTL receives the read message cpl from the backend module, sends the data to the host and then releases the buff. For advance read, the corresponding data is temporarily stored in the corresponding buff, and the next time the real read hits, the data is directly taken to the host and then released, or waits for aging release.

[0126] For subsequent normal host reads, before FTL sends the read request to the back-end module, it will first find the node array according to the channel corresponding to the physical address and traverse the nand physical address in the node to make a match. If it is a previously saved pre-read location, it is a hit, and the data buff corresponding to the node is directly taken out and transmitted to the host, and then the buff is released and the node is set to available. If it does not hit, the normal read is sent to the back-end module to read the nand data.

[0127] For subsequent advance reads, after the backend responds to the read request cpl, FTL finds the node array according to the channel corresponding to the physical address and traverses the nand physical address in the node to make a match judgment. If it hits, it updates the node, saves the new data buff address, releases the old address, clears the aging counter, and adds one to the update_cnt variable. If update_cnt is greater than 50, run_flag is set to 0, and the advance read is temporarily closed. If it does not hit, a valid node is found to save the physical address and data address. If the subsequent advance read data cannot find an available node, the node aging counts of all advance read groups of the current channel are sorted, and the largest node is released to save the latest advance read data. At this time, the node array is considered full, and run_flag is set to 0 to temporarily close the advance read.

[0128] In addition, before FTL sends the erase operation to the backend module, it needs to find the node array according to the channel corresponding to the physical address and traverse the nand physical address in the node to make a match. If the bolck of the erase operation to be executed has been recorded by advance reading, the nodes on the channel and bolck will be cleared. The ratio of advance reading and normal read requests is adjusted by FTL according to the load of the SSD and the usage of the node array. The backend module does not care. The entire advance reading mechanism is the responsibility of FTL. For the backend module, the advance reading request can be regarded as a normal read request message with buff.

[0129] In an optional embodiment, FTL initializes a structure array preread

[64] of size 64 for each channel, and the structure of each array element becomes an advance read node, each node containing the following variables:

[0130] addr: The physical address of the nand to be read in the read request.

[0131] valid: Node valid flag, 1 means the node is valid and can be used to store pre-read data buff.

[0132] buff_addr: read nand data storage buffer address.

[0133] timer_cnt: Read data aging count in advance, aging after 60s, and releasing the node.

[0134] Update_cnt: records the number of times a physical location is read ahead, and is used to temporarily disable read ahead.

[0135] To further illustrate, the optional Figure 3 As shown, the specific implementation steps are as follows:

[0136] S302, FTL module initialization;

[0137] S304, initialize run_flag=1, initialize the advance read array of each channel, set the valid flag of each node to 1 to indicate that the node is available, and initialize the thread lock for each advance read array to ensure the atomicity of the operation when updating and clearing nodes;

[0138] S306, pthread_create() creates an independent timer thread to execute the aging mechanism of the node array. The aging count timer_cnt of all nodes storing the advance read information is increased by 1 every 1 second. If it is not hit for 60 seconds, the buff_addr saved by the node is released, the node valid is set to 1, and if run_flag is 0, it is set to 1 at this time to enable the delivery of the advance read. The aging timer runs all the time when the advance read function is enabled to ensure that the buff corresponding to the node that has not been hit for a long time is released.

[0139] S308, the FTL module sends an operation nand message to the backend module. If it is a read message, execute S310, otherwise execute S322.

[0140] S310, FTL sends a read request message to the backend module (before sending, the run_flag flag is determined, if it is 0, the read-ahead is temporarily disabled) to determine the read request type, if it is a read-ahead, execute S314, otherwise execute S312.

[0141] S312, FTL sequentially retrieves the 64 addrs in the corresponding channel node array. If the valid value of the node is 0 and the host read address is retrieved (hit), it means that the host read hits, and the valid value is set to 1 (indicating that the data has been taken away and the node is available for subsequent advance reads), and the data in the buffer corresponding to buff_addr is taken out and directly returned to the host. If the host read address is not retrieved (miss), the data is directly read from nand, and the BE responds to the read cpl to complete the read request.

[0142] S314, FTL applies for buff, and stores the buff address in the read request message, and sets the flag position of BE applying for buff to 0, and sends a read request message to BE. After BE completes the nand read operation and transfers the data to the buff specified by FTL and replies cpl to FTL, FTL sequentially searches the 64 addr in the corresponding channel advance read node array. If the valid value of the node is 0 and the host read address is retrieved, it means that the advance read has been recorded before, and execute S316, otherwise execute S318.

[0143] S316, the previously saved buff_addr in the node is released, and the buff_addr read ahead of time is updated, the timer_cnt aging count is cleared to 0, and update_cnt is increased by 1. If update_cnt>50, run_flag is set to 0. The information saved for this advance read is completed.

[0144] S318, inspect the node array and search for a node with a valid value of 1 (an available node). If found, execute S322; otherwise, if there is no available node, execute S320.

[0145] S320, sort the aging count timer_cnt of the node array, release the buff_addr in the node with the largest timer_cnt (earliest data), clear timer_cnt to 0, update the addr and buff_addr of the node, complete the information storage of this advance read, the node array is full, and run_flag is set to 0.

[0146] S322, write the addr and buff_addr of this advance reading into the currently found available node, set the valid of the node to 0, and set timer_cnt to 0. The storage of this advance reading information is completed.

[0147] S324, FTL searches the corresponding channel node array in turn. If the valid value of the node is 0 and the block retrieved for the current erase operation is consistent with the block corresponding to the addr saved in the node, it is necessary to release the buff_addr saved in the node, clear the node, and set valid to 1.

[0148] In an optional embodiment, the flowchart of the above method is as follows Figure 4 , 5 shown.

[0149] Optional, such as Figure 4 As shown, first initialize the FTL module, then initialize run_flag=1, initialize each channel node array, then initialize each node array thread lock, then create a thread to start the aging timer, and then traverse the nodes. If the node aging count is greater than 60, release the buff, clear the node, set run_flag to -1, if not, add 1 to the node aging count.

[0150] Optional such as Figure 5 As shown, the details are as follows:

[0151] S502, FTL transmits the message;

[0152] S504, determine whether it is a read operation, if yes, execute S512, otherwise execute S506;

[0153] S506, traverse the node array to determine whether the block currently operated has recorded pre-reading;

[0154] S508, determine whether the value of run_flag is 1, if yes, execute S510, otherwise execute S502;

[0155] S510, release the node buff_addr, clear the node, and set valid to 1;

[0156] S512, whether the value of run_flag is 1, if yes, execute S518, otherwise execute S514;

[0157] S514, close the read-ahead function, only normal read function is available;

[0158] S516, sending a read request to BE, and BE applies for data buff;

[0159] S518, determine whether it is read ahead, if yes, execute S528, otherwise execute S520;

[0160] S520, traverse the node array corresponding to the channel advance read;

[0161] S522, determine whether it is a hit, if yes, execute S524, otherwise execute S516;

[0162] S524, fetch data back to host, release buff, and release node;

[0163] S526, receiving the read request from BE, fetching data back to the host, and then releasing buff;

[0164] S528, send an advance read message to BE with the buff requested by FTL;

[0165] S530, BE processes the advance read message, transfers the data to the buff brought down by FTL, and restores cpl to FTL;

[0166] S532, FTL processes cpl and stores the data in the corresponding node array;

[0167] S534, determine whether the current physical location has been stored, if yes, execute S536, otherwise execute S538;

[0168] S536, release the old buff, save the new buff, clear the aging count to 0, update the node, add 1 to update_cnt, and if update_cnt is greater than 50, set run_flag to 0;

[0169] S538, determine whether there is no available node position, if yes, execute S540, otherwise execute S542;

[0170] S540, traverse the node array, release the node with the largest aging count, then save the buff information of this advance read, and set run_flag to 0;

[0171] S542, find an available node and save the local advance read buff information.

[0172] It should be noted that in low-pressure sequential read scenarios, the new buff management and hit management mechanisms in this read-ahead solution can effectively improve sequential read performance; and compared with the previous backend-based buff management and hit judgment solutions, this solution implements read-ahead buff management and hit judgment in the FTL module, which can reduce the IPC communication overhead between FTL and BE and relieve the pressure on the BE module. In the SSD architecture with a large firmware core and a small BE core, the FTL module can also apply for more DDR resources for read-ahead.

[0173] Through the embodiment of the present application, a new buffer management scheme for the FTL module in the read-ahead scheme is proposed: 64 nodes are managed on each channel. Compared with the read-ahead buff management and hit judgment scheme based on the BE module, the ipc message overhead of BE replying to FTL cpl after the hit is reduced, and the comparison test iod1, 4k sequential read delay is reduced from 17us to 15us. In addition, the new FTL buffer read-ahead management rules reduce the operating pressure of the small core of the backend, and there are more buff resources available in the FTL large core. For the data aging strategy of the read-ahead function, it can avoid the timely release of the old read-ahead buff after the hit rate continues to decline, avoiding the invalid occupation of the buff. A new buffer management scheme for the FTL module in the read-ahead scheme: 64 4k-sized buffers are managed on each channel. Compared with the BE module buffer management scheme, the ipc overhead of BE replying to FTL cpl after the read-ahead hit is reduced. For a 2T capacity SSD, the iod1, 4k sequential read delay will be reduced from 17us to 15us. The FTL module in the read-ahead scheme uses a data aging strategy for read-ahead data to avoid the problem of the hit rate continuing to drop and the buff not being released in time, thereby improving the buff utilization rate. A dynamic switch read-ahead strategy is proposed to reduce invalid read nand and reduce flash memory loss.

[0174] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus a necessary general hardware platform, and of course it can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, disk, CD), and includes a number of instructions for a terminal device (which can be a mobile phone, computer, server, or network device, etc.) to execute the methods of each embodiment of the present application.

[0175] In this embodiment, a pre-reading device for a solid state drive is also provided, which is used to implement the above-mentioned embodiments and preferred implementation modes, and the descriptions that have been made will not be repeated. As used below, the term "module" can be a combination of software and / or hardware that implements a predetermined function. Although the devices described in the following embodiments are preferably implemented in software, the implementation of hardware, or a combination of software and hardware, is also possible and conceivable.

[0176] Figure 6 is a structural block diagram of a solid state hard disk advance reading device according to an embodiment of the present application, such as Figure 6 As shown, the device comprises:

[0177] The advance reading unit 602 is used to advance read the data matching the next read position in the solid state drive when the flash translation layer module predicts the next read position of the read / write request device, wherein the read / write request device is a device that initiates a read request to the solid state drive;

[0178] An application unit 604 is used to enable the flash translation layer module to apply for multiple data buffers for the data read in advance, wherein the data buffers are used to store the data read in advance;

[0179] The sending unit 606 is used to enable the flash translation layer module to send the next read request to the back-end module when the next read request of the read / write request device does not hit the data stored in the data buffer, and the back-end module reads the data matched by the next read request from the non-volatile memory;

[0180] The return unit 608 is used to enable the flash translation layer module to return the data read from the data buffer to the read / write request device when the next read request hits the data stored in the data buffer.

[0181] For specific embodiments, reference may be made to the example shown in the above-mentioned advance reading method of the solid state drive, which will not be described in detail in this example.

[0182] As an optional solution, the application unit 604 includes: a sending module, which is used to enable the flash translation layer module to send an advance read message to the backend module, wherein the advance read message includes buffer addresses of multiple data buffers.

[0183] For specific embodiments, reference may be made to the example shown in the above-mentioned advance reading method of the solid state drive, which will not be described in detail in this example.

[0184] As an optional solution, the sending module includes: the flash translation layer module sends the advance read message carrying the indication flag to the backend module, wherein the indication flag is used to indicate that the backend module does not need to apply for a data buffer.

[0185] For specific embodiments, reference may be made to the example shown in the above-mentioned method for advance reading of a solid state drive, which will not be described in detail in this example.

[0186] As an optional solution, the read-ahead unit 602 includes: an allocation module, used to enable the flash translation layer module to allocate a corresponding node array to each channel of the non-volatile memory, wherein the channel is used for data transmission and access, and the node array is used to record and store relevant information of the read-ahead.

[0187] For specific embodiments, reference may be made to the example shown in the above-mentioned method for advance reading of a solid state drive, which will not be described in detail in this example.

[0188] As an optional solution, the allocation module includes: a first allocation submodule, used to enable the flash translation layer module to allocate corresponding first information to each channel of the non-volatile memory, wherein the relevant information includes the first information, and the first information is used to indicate the physical storage position of the data obtained by advance reading in the non-volatile memory; a second allocation submodule, used to enable the flash translation layer module to allocate corresponding second information to each channel of the non-volatile memory, wherein the relevant information includes the second information, and the second information is used to indicate the validity of the data obtained by advance reading; a third allocation submodule, used to enable the flash translation layer module to allocate corresponding third information to each channel of the non-volatile memory, wherein the relevant information includes the third information, and the third information is used to indicate the address of the data buffer; a fourth allocation submodule, used to enable the flash translation layer module to allocate corresponding fourth information to each channel of the non-volatile memory, wherein the relevant information includes the fourth information, and the fourth information is used to indicate the aging time of the data buffer; a fifth allocation submodule, used to enable the flash translation layer module to allocate corresponding fifth information to each channel of the non-volatile memory, wherein the relevant information includes the fifth information, and the fifth information is used to indicate the advance read count of the physical storage location.

[0189] For specific embodiments, reference may be made to the example shown in the above-mentioned method for advance reading of a solid state drive, which will not be described in detail in this example.

[0190] As an optional solution, the allocation module includes: an initialization submodule, which is used to initialize the corresponding thread lock for the node array, wherein the thread lock is used to synchronize the access to the node array.

[0191] For specific embodiments, reference may be made to the example shown in the above-mentioned method for advance reading of a solid state drive, which will not be described in detail in this example.

[0192] As an optional solution, the initialization submodule includes: an ensuring subunit, which is used to use a thread lock to ensure data consistency of the deletion operation when performing a deletion operation on the node array.

[0193] For specific embodiments, reference may be made to the example shown in the above-mentioned advance reading method of the solid state drive, which will not be described in detail in this example.

[0194] As an optional solution, the allocation module includes: a creation submodule for creating a timer thread, wherein the timer thread is used to periodically traverse the entire node array and perform specific checks and operations.

[0195] For specific embodiments, reference may be made to the example shown in the above-mentioned advance reading method of the solid state drive, which will not be described in detail in this example.

[0196] As an optional solution, the application unit 604 includes: a prohibition module, which is used to temporarily prohibit the flash translation layer module from performing advance reading when the amount of data in the multiple data buffers meets the data storage edge.

[0197] For specific embodiments, reference may be made to the example shown in the above-mentioned advance reading method of the solid state drive, which will not be described in detail in this example.

[0198] As an optional solution, a submodule is created, including: a starting subunit, used to start the timer thread at a preset time interval and determine the current node array from all node arrays; a checking subunit, used to enable the timer thread to check the marking state of the current node array; a recording subunit, used to record the invalid time of the current node array when the marking state indicates that the current node array is an invalid node array, wherein the invalid node array refers to a data buffer in which the data is not currently accessed or hit, and the invalid time is the duration of the current node array being an invalid node array; when the duration corresponding to the current node array is greater than or equal to a preset threshold, the data buffer pointed to by the current node array is released.

[0199] For specific embodiments, reference may be made to the example shown in the above-mentioned advance reading method of the solid state drive, which will not be described in detail in this example.

[0200] As an optional solution, the application unit 604 includes: a prohibition module, which is used to temporarily prohibit the flash translation layer module from performing advance reading when the amount of data in the multiple data buffers meets the data storage edge.

[0201] For specific embodiments, reference may be made to the example shown in the above-mentioned advance reading method of the solid state drive, which will not be described in detail in this example.

[0202] It should be noted that the above-mentioned virtual devices (modules, units, sub-modules, sub-units, components, etc.) can be implemented by software or hardware. For the latter, it can be implemented in the following ways, but not limited to this: the above-mentioned virtual devices are all located in the same processor; or, the above-mentioned virtual devices are located in different processors in any combination.

[0203] An embodiment of the present application further provides a computer-readable storage medium, in which a computer program is stored, wherein the computer program is configured to execute the steps of any of the above method embodiments when running.

[0204] In an exemplary embodiment, the computer-readable storage medium may include, but is not limited to, various media that can store computer programs, such as a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk or an optical disk.

[0205] An embodiment of the present application further provides an electronic device, including a memory and a processor, wherein a computer program is stored in the memory, and the processor is configured to run the computer program to execute the steps in any one of the above method embodiments.

[0206] In an exemplary embodiment, the electronic device may further include a transmission device and an input / output device, wherein the transmission device is connected to the processor, and the input / output device is connected to the processor.

[0207] For specific examples in this embodiment, reference may be made to the examples described in the above embodiments and exemplary implementation modes, and this embodiment will not be described in detail herein.

[0208] An embodiment of the present application further provides a computer program product, including a computer program, wherein when the computer program is configured to be executed by a processor, the computer program performs the steps in any of the above method embodiments.

[0209] For specific examples in this embodiment, reference may be made to the examples described in the above embodiments and exemplary implementation modes, and this embodiment will not be described in detail herein.

[0210] Obviously, those skilled in the art should understand that the above-mentioned virtual devices or steps of the present application can be implemented by a general computing device, they can be concentrated on a single computing device, or distributed on a network composed of multiple computing devices, they can be implemented by a program code executable by a computing device, so that they can be stored in a storage device and executed by the computing device, and in some cases, the steps shown or described can be executed in a different order from that herein, or they can be made into individual integrated circuit modules, or multiple modules or steps therein can be made into a single integrated circuit module for implementation. Thus, the present application is not limited to any specific combination of hardware and software.

[0211] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the principles of the present application shall be included in the protection scope of the present application.

Claims

1. A method for advance reading of a solid state hard disk, characterized in that: Applied to a flash translation layer module, the method comprises: The flash translation layer module predicts the next read position of the read / write request device, and reads data in the solid state drive that matches the next read position in advance, wherein the read / write request device is a device that initiates a read request to the solid state drive; The flash translation layer module applies for a plurality of data buffers for the data obtained by the advance read, wherein the data buffers are used to store the data obtained by the advance read; When the next read request of the read / write request device does not hit the data stored in the data buffer, the flash translation layer module sends the next read request to the backend module, and the backend module reads the data matched by the next read request from the non-volatile memory; In the case where the next read request hits the data stored in the data buffer, the flash translation layer module returns the data read from the data buffer to the read / write request device; Before the flash translation layer module predicts the next read position of the read / write request device and performs advance reading of data matching the next read position in the solid state drive, the method further includes: the flash translation layer module allocates a corresponding node array to each channel of the non-volatile memory, wherein the channel is used for data transmission and access, and the node array is used for recording and storing relevant information of the advance reading; The flash translation layer module allocates a corresponding array to each channel of the non-volatile memory, including at least one of the following: the flash translation layer module allocates corresponding first information to each channel of the non-volatile memory, wherein the relevant information includes the first information, and the first information is used to indicate the physical storage location of the data obtained by the advance read in the non-volatile memory; the flash translation layer module allocates corresponding second information to each channel of the non-volatile memory, wherein the relevant information includes the second information, and the second information is used to indicate the validity of the data obtained by the advance read; the flash translation layer module allocates corresponding third information to each channel of the non-volatile memory, wherein the relevant information includes the third information, and the third information is used to indicate the address of the data buffer; the flash translation layer module allocates corresponding fourth information to each channel of the non-volatile memory, wherein the relevant information includes the fourth information, and the fourth information is used to indicate the aging time of the data buffer; the flash translation layer module allocates corresponding fifth information to each channel of the non-volatile memory, wherein the relevant information includes the fifth information, and the fifth information is used to indicate the advance read count of the physical storage location.

2. The method according to claim 1, characterized in that After the flash translation layer module applies for a plurality of data buffers for the data obtained by the advance read, the method further includes: The flash translation layer module sends a read-ahead message to the backend module, wherein the read-ahead message includes buffer addresses of the multiple data buffers.

3. The method according to claim 2, characterized in that The flash translation layer module sends the advance read message to the backend module, including: The flash translation layer module sends an advance read message carrying an indication flag to the backend module, wherein the indication flag is used to indicate that the backend module does not need to apply for the data buffer.

4. The method according to claim 1, characterized in that: In the process in which the flash translation layer module allocates a corresponding node array to each channel of the non-volatile memory, the method further includes: A corresponding thread lock is initialized for the node array, wherein the thread lock is used to synchronize access to the node array.

5. The method according to claim 4, characterized in that After initializing the corresponding thread lock for the node array, the method further includes: When performing a deletion operation on the node array, the thread lock is used to ensure data consistency of the deletion operation.

6. The method according to claim 1, characterized in that In the process in which the flash translation layer module allocates a corresponding node array to each channel of the non-volatile memory, the method further includes: Creating a timer thread, wherein the timer thread is used to periodically traverse all node arrays and perform specific checks and operations; Among them, the specific checks and operations include: starting at a preset time interval and determining the current node array from all the node arrays; checking the marking status of the current node array; when the marking status indicates that the current node array is an invalid node array, recording the invalid time of the current node array, wherein the invalid node array refers to a data buffer in which the data is not currently accessed or hit, and the invalid time is the duration of the current node array being the invalid node array; when the duration corresponding to the current node array is greater than or equal to a preset threshold, releasing the data buffer pointed to by the current node array.

7. The method according to claim 6, characterized in that After creating the timer thread, the method further includes: Perform the following steps until the timer thread traverses the entire node array: The timer thread is started at a preset time interval and determines a current node array from all node arrays; The timer thread checks the marking status of the current node array; In the case where the mark state indicates that the current node array is an invalid node array, recording the invalid time of the current node array, wherein the invalid node array refers to a data buffer in which data is not currently accessed or hit, and the invalid time is the duration of the current node array being the invalid node array; When the duration corresponding to the current node array is greater than or equal to a preset threshold, the data buffer pointed to by the current node array is released.

8. The method according to any one of claims 1 to 7, characterized in that After the flash translation layer module applies for a plurality of data buffers for the data obtained by the advance read, the method further includes: When the amount of data in the plurality of data buffers meets the data storage edge, the flash translation layer module is temporarily prohibited from performing the advance read.

9. The method according to any one of claims 1 to 7, characterized in that Before the flash translation layer module predicts the next read position of the read / write request device and reads in advance the data in the solid state drive that matches the next read position, the method further includes: During the power-on initialization phase, the flash translation layer module configures a global flag, wherein the global flag is used to control whether the flash translation layer module allows the advance read.

10. A read-ahead device for a solid state hard disk, characterized in that: Applied to a flash translation layer module, the device comprises: An advance reading unit, configured to read in advance data in the solid state drive that matches the next read position of a read / write request device when the flash translation layer module predicts the next read position of the read / write request device, wherein the read / write request device is a device that initiates a read request to the solid state drive; an application unit, configured to enable the flash translation layer module to apply for a plurality of data buffers for the data obtained by the advance read, wherein the data buffers are used to store the data obtained by the advance read; a sending unit, configured to, when the next read request of the read-write request device does not hit the data stored in the data buffer, enable the flash translation layer module to send the next read request to the back-end module, and have the back-end module read the data matched by the next read request from the non-volatile memory; a returning unit, configured to enable the flash translation layer module to return the data read from the data buffer to the read / write request device when the next read request hits the data stored in the data buffer; The device further includes: an allocation module, which is used to enable the flash translation layer module to allocate a corresponding node array to each channel of the non-volatile memory before the flash translation layer module predicts the next read position of the read-write request device and reads the data matching the next read position in the solid-state hard disk in advance, wherein the channel is used for data transmission and access, and the node array is used to record and store the relevant information of the advance reading; The allocation module includes: a first allocation submodule, which is used to enable the flash translation layer module to allocate corresponding first information to each channel of the non-volatile memory, wherein the relevant information includes the first information, and the first information is used to indicate the physical storage location of the data obtained by the advance reading in the non-volatile memory; a second allocation submodule, which is used to enable the flash translation layer module to allocate corresponding second information to each channel of the non-volatile memory, wherein the relevant information includes the second information, and the second information is used to indicate the validity of the data obtained by the advance reading; a third allocation submodule, which is used to enable the flash translation layer module to allocate corresponding second information to each channel of the non-volatile memory, wherein the relevant information includes the second information, and the second information is used to indicate the validity of the data obtained by the advance reading; Each channel of the non-volatile memory is allocated corresponding third information, wherein the relevant information includes the third information, and the third information is used to represent the address of the data buffer; a fourth allocation submodule is used to enable the flash translation layer module to allocate corresponding fourth information to each channel of the non-volatile memory, wherein the relevant information includes the fourth information, and the fourth information is used to represent the aging time of the data buffer; a fifth allocation submodule is used to enable the flash translation layer module to allocate corresponding fifth information to each channel of the non-volatile memory, wherein the relevant information includes the fifth information, and the fifth information is used to represent the advance read count of the physical storage location.

11. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, wherein the computer program implements the steps of the method described in any one of claims 1 to 9 when executed by a processor.

12. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the steps of the method described in any one of claims 1 to 9 are implemented.

13. A computer program product, comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 9 are implemented.

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