Division calculation method and device based on hardware implementation and electronic equipment

Abstract

The invention relates to a division calculation method and device based on hardware implementation and electronic equipment. The method comprises the steps of obtaining to-be-calculated data and a preset output data bit width; based on the to-be-calculated data and the output data bit width, determining initial values of a plurality of parameters participating in iterative calculation; judging whether the current number of iterations is smaller than the value of the bit width of the output data; under the condition that the current number of iterations is smaller than the value of the bit width of the output data, determining the product of the first parameter obtained by the previous iterative calculation and the to-be-calculated data as a fifth parameter; and substituting the second parameter, the third parameter and the first parameter which are determined again based on the fifth parameter into the next iterative calculation until the current iteration times reach the value of the bit width of the output data, and outputting the first parameter which is finally calculated as a calculation result. As the division calculation result is actually represented by the fixed-point number of the floating-point number with the error range of 2-Q in hardware, fixed-point and floating-point conversion is not needed, and the calculation efficiency is improved.

Description

Technical Field

[0001] The present application relates to the field of wireless communication technology, and in particular to a division calculation method, device and electronic device based on hardware implementation. Background Art

[0002] With the development of the fifth generation mobile communication technology (5G), the amount of data that user equipment (UE) needs to process is increasing. In order to ensure that the user equipment has a higher throughput and faster processing speed, most of the data processing cannot be achieved directly through digital signal processing (DSP) or central processing unit (CPU), so it needs to be achieved with the help of hardware.

[0003] In the related art, the traditional hardware divider is aimed at the division between fixed-point numbers. Although floating-point numbers can be represented by the shift of fixed-point numbers, the precision cannot be controlled, and only the fixed-point division of the same type of numbers is implemented. For example, when calculating the binary number b'1001010 divided by the binary number b'1000, the calculation is subtracted from left to right. The left four bits of the binary number b'1001010 are subtracted from the binary number b'1000 to obtain 1. At this time, 1 is set on the result bit. Since 1 is not enough for four bits, the calculation cannot continue. At this time, two bits are taken to the right in turn, and two 0s are set on the result bit to obtain the four-bit binary number b'1010. Then, a subtraction operation is performed on the binary number b'1000. Finally, the division result is the binary number b'1001, and the remainder is 10. The calculation process is as follows:

[0004] In this example, the expression of converting a binary number to a decimal number is that 74 divided by 8 is 9 with a remainder of 2. Therefore, it is necessary to redefine a fixed-point to floating-point conversion algorithm based on the data representation range after the division is completed, so as to map and express the current division result (quotient and remainder) in a reasonable way, resulting in low hardware calculation efficiency. Summary of the invention

[0005] The present application provides a division calculation method, device and electronic device based on hardware implementation to solve the problem of low calculation efficiency of traditional hardware dividers.

[0006] In a first aspect, an embodiment of the present application provides a division calculation method based on hardware implementation, the method comprising: Obtain the data x to be calculated and the preset output data bit width Q. Among them, the data x to be calculated is a fixed-point number, and the output data bit width Q is determined based on the error range of the output data. The output data bit width Q is less than or equal to the hardware bit width supported by the hardware; Based on the data x to be calculated and the output data bit width Q, determine the initial values of multiple parameters participating in the iterative calculation. Among them, the multiple parameters include a first parameter a, a second parameter min, and a third parameter max that change with the iterative calculation, and a fourth parameter pow2Q that does not change with the iterative calculation; Determine whether the current iteration count is less than the value of the output data bit width Q; When the current iteration count is less than the value of the output data bit width Q, determine the product of the first parameter a obtained from the previous iterative calculation and the data x to be calculated as a fifth parameter b; When b = pow2Q or max - min ≤ 1 or min > max, keep the values of the second parameter min, the third parameter max, and the first parameter a obtained from the previous iterative calculation unchanged; When b > pow2Q and max - min > 1 and min ≤ max, update the value of the third parameter max using the first parameter a obtained from the previous iterative calculation, and then update the value of the first parameter a based on the updated third parameter max; When b < pow2Q and max - min > 1 and min ≤ max, update the value of the second parameter min using the first parameter a obtained from the previous iterative calculation, and then update the value of the first parameter a based on the updated second parameter min; Substitute the newly determined second parameter min, third parameter max, and first parameter a into the next iterative calculation. When the current iteration count reaches the value of the output data bit width Q, output the finally calculated first parameter a as the calculation result.

[0007] Optionally, the determining the initial values of multiple parameters participating in the iterative calculation based on the data x to be calculated and the output data bit width Q includes: Calculate the difference between the output data bit width Q and a first value, obtain the maximum value between the difference and the value 0, and shift the value 1 to the left by the number of bits corresponding to the maximum value to obtain the initial value of the first parameter a. Among them, the first value is the number of bits corresponding to the binary value 1 of the highest bit in the data x to be calculated; Shift the initial value of the first parameter a one bit to the right to obtain the initial value of the second parameter min; Shift the initial value of the first parameter a to the left by one position to obtain the initial value of the third parameter max; The value 1 is shifted left by the number of bits corresponding to the output data bit width Q to obtain the value of the fourth parameter pow2Q.

[0008] Optionally, updating the value of the first parameter a based on the updated third parameter max includes: Summing the updated third parameter max, the second parameter min calculated in the last iteration, and the value 1 to obtain a first summation result; The numerical value corresponding to the first summation result is shifted left by 1 bit, and the value of the first parameter a is updated based on the left-shifted numerical value.

[0009] Optionally, updating the value of the first parameter a based on the updated second parameter min includes: The updated second parameter min, the third parameter max calculated in the last iteration, and the value 1 are summed to obtain a second summation result; The numerical value corresponding to the second summation result is shifted left by 1 bit, and the value of the first parameter a is updated based on the left-shifted numerical value.

[0010] Optionally, before determining initial values ​​of a plurality of parameters involved in iterative calculation based on the data to be calculated x and the output data bit width Q, the method further includes: Determine whether the data x to be calculated is a value of 0; When the data x to be calculated is a value of 0, a second value is output as a calculation result, wherein the second value is a maximum value that can be represented under a hardware bit width supported by the hardware.

[0011] In a second aspect, an embodiment of the present application further provides a division calculation device based on hardware implementation, the device comprising: An acquisition module, used to acquire the data to be calculated x and a preset output data bit width Q, wherein the data to be calculated x is a fixed-point number, the output data bit width Q is determined based on an error range of the output data, and the output data bit width Q is less than or equal to a hardware bit width supported by the hardware; A first determination module is used to determine initial values ​​of multiple parameters involved in iterative calculation based on the data to be calculated x and the output data bit width Q, wherein the multiple parameters include a first parameter a, a second parameter min and a third parameter max that vary with the iterative calculation, and a fourth parameter pow2Q that does not vary with the iterative calculation; A first judgment module is used to judge whether the current number of iterations is less than the value of the output data bit width Q; A second determination module, configured to determine a fifth parameter b as the product of a first parameter a obtained by the previous iteration calculation and the data x to be calculated when the current iteration count is less than the value of the output data bit width Q; A holding module, configured to keep the values of a second parameter min, a third parameter max, and a first parameter a obtained by the previous iteration calculation unchanged when b = pow2Q or max - min ≤ 1 or min > max; A first update module, configured to update the value of the third parameter max by using the first parameter a obtained by the previous iteration calculation and then update the value of the first parameter a based on the updated third parameter max when b > pow2Q and max - min > 1 and min ≤ max; A second update module, configured to update the value of the second parameter min by using the first parameter a obtained by the previous iteration calculation and then update the value of the first parameter a based on the updated second parameter min when b < pow2Q and max - min > 1 and min ≤ max; A first output module, configured to substitute the re - determined second parameter min, third parameter max, and first parameter a into the next iteration calculation, and output the finally calculated first parameter a as the calculation result until the current iteration count reaches the value of the output data bit width Q.

[0012] In a third aspect, an embodiment of the present application further provides an electronic device, including a processor, a communication interface, a memory, and a communication bus. Among them, the processor, the communication interface, and the memory complete communication with each other through the communication bus; The memory is used to store a computer program; The processor is configured to implement the division calculation method based on hardware implementation described in the first aspect when executing the program stored on the memory.

[0013] In a fourth aspect, an embodiment of the present application further provides a computer - readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, it implements the division calculation method based on hardware implementation described in the first aspect.

[0014] The above technical solution provided by the embodiments of the present application has the following advantages compared with the prior art: In the method provided by the embodiments of the present application, by obtaining the data x to be calculated and the preset output data bit width Q, wherein the data x to be calculated is a fixed-point number, and the output data bit width Q is determined based on the error range of the output data, and the output data bit width Q is less than or equal to the hardware bit width supported by the hardware; based on the data x to be calculated and the output data bit width Q, the initial values of multiple parameters participating in the iterative calculation are determined, wherein the multiple parameters include a first parameter a, a second parameter min, and a third parameter max that change with the iterative calculation, and a fourth parameter pow2Q that does not change with the iterative calculation; determine whether the current iteration count is less than the value of the output data bit width Q; when the current iteration count is less than the value of the output data bit width Q, determine the product of the first parameter a obtained from the previous iterative calculation and the data x to be calculated as a fifth parameter b; when b = pow2Q or max - min ≤ 1 or min > max, keep the values of the second parameter min, the third parameter max, and the first parameter a obtained from the previous iterative calculation unchanged; when b > pow2Q and max - min > 1 and min ≤ max, update the value of the third parameter max using the first parameter a obtained from the previous iterative calculation, and then update the value of the first parameter a based on the updated third parameter max; when b < pow2Q and max - min > 1 and min ≤ max, update the value of the second parameter min using the first parameter a obtained from the previous iterative calculation, and then update the value of the first parameter a based on the updated second parameter min; substitute the re-determined second parameter min, third parameter max, and first parameter a into the next iterative calculation until the current iteration count reaches the value of the output data bit width Q, and then output the finally calculated first parameter a as the calculation result. Through the above method, the output data bit width can be determined based on the error range of the output data. , and based on the data x to be calculated and the output data bit width Q, the initial values of multiple parameters participating in the iterative calculation are determined, and then iterative calculation is performed based on the initial values of these multiple parameters to obtain the division calculation result of the data x to be calculated. Since the final division calculation result is a fixed-point number that meets the output data bit width supported by the hardware , it is actually the fixed-point number representation in the hardware of a floating-point number with an error range of . Therefore, there is no need to perform the conversion from the fixed-point number to the floating-point number on the basis of the division calculation result, thereby improving the calculation efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.

[0016] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0017] Figure 1 A flowchart of a division calculation method based on hardware implementation provided in an embodiment of the present application; Figure 2 A flowchart of another division calculation method based on hardware implementation provided in an embodiment of the present application; Figure 3 A schematic diagram of the structure of a root mean square calculation device based on hardware implementation provided in an embodiment of the present application; Figure 4 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0018] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0019] Considering a division calculation Can be converted to , and the multiplication operation can be simply implemented by the AND gate, so the division operation can be converted to obtain Furthermore, in the conversion from fixed-point to floating-point, the following relationship exists: , that is, the floating point number y can be expressed as Therefore, the division calculation can be converted to obtain The Q value can determine the error of the division calculation result. The specific error range is .

[0020] See also Figure 1 , Figure 1 The following is a flowchart of a division calculation method based on hardware implementation provided in an embodiment of the present application. Figure 1As shown, the division calculation method based on hardware implementation may include the following steps: Step S102: Obtain the data to be calculated x and the preset output data bit width Q, wherein the data to be calculated x is a fixed-point number and the output data bit width Q is based on the error range of the output data. It is determined that the output data bit width Q is less than or equal to the hardware bit width supported by the hardware.

[0021] Specifically, the data x to be calculated refers to the data that needs to be divided. The data x to be calculated can be represented as a fixed-point data in the hardware, or it can be pre-converted from any floating-point data. The output data bit width Q is the bit width determined based on the error range of the output data. The larger the output data bit width Q, the smaller the error range of the output data, that is, the higher the accuracy, the better the algorithm performance, but the greater the hardware area and power consumption loss; the smaller the output data bit width Q, the larger the error range of the output data, that is, the lower the accuracy, the worse the algorithm performance, but the smaller the hardware area and power consumption loss. Of course, the output data bit width Q needs to be less than or equal to the hardware bit width supported by the hardware. For example, when the hardware bit width supported by the hardware is 22 bits, the output data bit width Q cannot exceed 22 bits.

[0022] It should be noted that the letter x here represents the data to be calculated in this application. Of course, other letters can also be used to represent the data to be calculated, which does not constitute a limitation on this application. The letter Q here represents the output data bit width in this application. Of course, other letters can also be used to represent the output data bit width, which does not constitute a limitation on this application.

[0023] Step S104: Based on the data to be calculated x and the output data bit width Q, determine the initial values ​​of multiple parameters involved in the iterative calculation, wherein the multiple parameters include a first parameter a, a second parameter min and a third parameter max that change with the iterative calculation, and a fourth parameter pow2Q that does not change with the iterative calculation.

[0024] Specifically, the above-mentioned first parameter a, second parameter min, third parameter max and fourth parameter pow2Q are related parameters that need to be used in the division calculation process based on hardware implementation, so before performing iterative calculation, it is necessary to determine their initial values. Among them, the value of the first parameter a will change with the iterative calculation, and its initial value can be determined based on the numerical distribution of each bit in the data to be calculated x and the output data bit width. The values ​​of the second parameter min and the third parameter max will change with the iterative calculation, and their initial values ​​are determined based on the initial value of the first parameter a. The value of the fourth parameter pow2Q will not change with the iterative calculation, and its initial value is determined based on the output data bit width Q.

[0025] It should be noted that a, min, max and pow2Q here represent the first parameter, the second parameter, the third parameter and the fourth parameter respectively in this application. Of course, other English words can also be used to represent the first parameter, the second parameter, the third parameter and the fourth parameter, which does not constitute a limitation to this application.

[0026] Step S106: Determine whether the current number of iterations is less than the value of the output data bit width Q.

[0027] During the loop iterative calculation process, it is necessary to determine whether the current number of iterations is less than the value of the output data bit width Q before each iterative calculation. If the current number of iterations is greater than or equal to the value of the output data bit width Q, it means that the division calculation result has been calculated and the iterative calculation can be stopped; if the current number of iterations is less than the value of the output data bit width Q, it means that the division calculation result has not been calculated and the iterative calculation needs to continue.

[0028] Step S108: When the current number of iterations is less than the value of the output data bit width Q, the product of the first parameter a obtained by the previous iteration calculation and the data to be calculated x is determined as the fifth parameter b.

[0029] In each iterative calculation process, it is necessary to calculate the product of the first parameter a obtained in the previous iterative calculation and the data x to be calculated, and then determine the product of the first parameter a obtained in the previous iterative calculation and the data x to be calculated as the fifth parameter b, so as to facilitate the subsequent judgment based on the fifth parameter b and the second parameter min and the third parameter max obtained in the previous iterative calculation whether the first parameter a, the second parameter min, and the third parameter max need to be updated in the current iterative calculation process.

[0030] It should be noted that the letter b here represents the fifth parameter in this application. Of course, other letters can also be used to represent the fifth parameter, which does not constitute a limitation to this application.

[0031] Step S110: When b = pow2Q or max-min ≤ 1 or min>max is satisfied, the values ​​of the second parameter min, the third parameter max and the first parameter a obtained by the previous iterative calculation are kept unchanged.

[0032] Specifically, the reason why the fifth parameter b is compared with the fourth parameter pow2Q is to determine whether the fifth parameter b obtained by this iteration calculation exceeds the fourth parameter pow2Q. If the fifth parameter b obtained by this iteration calculation exceeds the fourth parameter pow2Q, it means that the fifth parameter b obtained by this iteration calculation has exceeded the maximum value that can be represented by the Q bit, and there is a data overflow problem, so it is necessary to reduce the first parameter a participating in the next iteration calculation; if the fifth parameter b obtained by this iteration calculation is equal to the fourth parameter pow2Q, it means that the first parameter a has been iterated to the optimal value and does not need to continue to update its value; if the fifth parameter b obtained by this iteration calculation is less than the fourth parameter pow2Q, it means that the fifth parameter b obtained by this iteration calculation does not exceed the maximum value that can be represented by the Q bit, and the first parameter a participating in the next iteration calculation can be increased. The reason why the second parameter min obtained by the previous iteration calculation is compared with the third parameter max obtained by the previous iteration calculation is to ensure that min<max. Once max-min<= 1 or min>max, it means that the first parameter a has been iterated to the optimal value and does not need to continue to update its value.

[0033] Therefore, when the fifth parameter b is equal to the initial value of the fourth parameter pow2Q, or the difference between the third parameter max calculated in the previous iteration and the second parameter min calculated in the previous iteration is less than or equal to the value 1 (i.e., max and min are very close), or the second parameter min calculated in the previous iteration is greater than the third parameter max calculated in the previous iteration (i.e., max-min is a negative number, which is represented as an overflowed extremely large number in hardware), the first parameter a calculated in the previous iteration, the second parameter min calculated in the previous iteration, and the third parameter max calculated in the previous iteration can be kept unchanged, and they are used as the first parameter a, the second parameter min, and the third parameter max participating in the next iteration. In other words, as long as the above conditions are met, regardless of whether the number of iterations reaches the value of the output data bit width Q, the value of the first parameter a does not change in the subsequent iteration calculation process.

[0034] Step S112: When b>pow2Q and max-min>1 and min ≤ max are satisfied, the value of the third parameter max is updated using the first parameter a calculated in the previous iteration, and the value of the first parameter a is updated again based on the updated third parameter max.

[0035] Specifically, when the fifth parameter b is greater than the initial value of the fourth parameter pow2Q, and the difference between the third parameter max obtained from the previous iteration calculation and the second parameter min obtained from the previous iteration calculation is greater than the value 1, and the second parameter min obtained from the previous iteration calculation is less than the third parameter max obtained from the previous iteration calculation, the second parameter min obtained from the previous iteration calculation can be kept unchanged, the value of the third parameter max obtained from the previous iteration calculation is updated using the first parameter a obtained from the previous iteration calculation, and the value of the first parameter a is updated based on the updated third parameter max, so as to determine the first parameter a, the second parameter min, and the third parameter max participating in the next iteration calculation. Since the updated third parameter max decreases, the first parameter a updated based on the updated third parameter max and the second parameter min obtained from the previous iteration calculation also decreases accordingly, making the first parameter a gradually approach the optimal value.

[0036] Step S114: When b < pow2Q and max - min > 1 and min ≤ max, the value of the second parameter min is updated using the first parameter a obtained from the previous iteration calculation, and the value of the first parameter a is updated again based on the updated second parameter min.

[0037] Specifically, when the fifth parameter b is less than the initial value of the fourth parameter pow2Q, and the difference between the third parameter max obtained from the previous iteration calculation and the second parameter min obtained from the previous iteration calculation is greater than the value 1, and the second parameter min obtained from the previous iteration calculation is less than the third parameter max obtained from the previous iteration calculation, the third parameter max obtained from the previous iteration calculation is kept unchanged, the value of the second parameter min obtained from the previous iteration calculation is updated using the first parameter a obtained from the previous iteration calculation, and the value of the first parameter a is updated again based on the updated second parameter min, so as to determine the first parameter a, the second parameter min, and the third parameter max participating in the next iteration calculation. Since the updated second parameter min increases, the first parameter a updated based on the updated second parameter min and the third parameter max obtained from the previous iteration calculation also increases accordingly, making the first parameter a gradually approach the optimal value.

[0038] Step S116: Substitute the newly determined second parameter min, third parameter max, and first parameter a into the next iteration calculation. When the current iteration count reaches the value of the output data width Q, the finally calculated first parameter a is output as the calculation result.

[0039] In this step, the second parameter min, the third parameter max and the first parameter a determined according to the above step S110, the above step S112 or the above step S114 can be used for the next iterative calculation until the current number of iterations reaches the value of the output data bit width Q, and the first parameter a finally calculated is output as the calculation result to obtain the division calculation result of the data x to be calculated.

[0040] In the embodiment of the present application, the error range of the output data can be based on , determine the output data bit width , and then based on the data to be calculated x and the output data bit width Q, determine the initial values ​​of multiple parameters involved in the iterative calculation, and then perform iterative calculation based on the initial values ​​of these multiple parameters to obtain the division calculation result of the data to be calculated x These parameter values ​​ensure that the first parameter a calculated in each iterative calculation process will not overflow the output data bit width. , that is, it does not exceed its corresponding precision range, thereby ensuring that the final division calculation result satisfies the output data bit width The fixed-point number is actually to meet the error range of A floating-point number is represented as a fixed-point number in the hardware, so there is no need to convert the fixed-point number to a floating-point number based on the division calculation result, thereby improving the calculation efficiency.

[0041] In an optional embodiment, the above step S104, based on the data to be calculated x and the output data bit width Q, determines the initial values ​​of multiple parameters involved in the iterative calculation, including: Calculate the difference between the output data bit width Q and the first value, obtain the maximum value of the difference and the value 0, and shift the value 1 left by the number of bits corresponding to the maximum value, so as to obtain the initial value of the first parameter a, wherein the first value is the number of bits corresponding to the highest binary value 1 in the data to be calculated x; Shift the initial value of the first parameter a right by one position to obtain the initial value of the second parameter min; Shift the initial value of the first parameter a left by one position to obtain the initial value of the third parameter max; Shift the value 1 left by the number of bits corresponding to the output data bit width Q to obtain the value of the fourth parameter pow2Q.

[0042] Specifically, when calculating the initial value of the first parameter a, the difference tmp between the output data bit width Q and the first value can be calculated first, and then the difference tmp is compared with the value 0 (which is a binary fixed-point number 0) to obtain the maximum value between the difference tmp and the value 0, and then the value 1 is shifted left by the number of bits corresponding to the maximum value. In other words, if the difference tmp is a positive number, the initial value of the first parameter a is 2^tmp (2 to the power of tmp); if the difference tmp is a negative number or 0, the initial value of the first parameter a is 1.

[0043] When calculating the initial value of the second parameter min, the initial value of the first parameter a may be shifted right by one position, that is, the initial value of the first parameter a may be divided by 2 to obtain the initial value of the second parameter min.

[0044] When calculating the initial value of the third parameter max, the initial value of the first parameter a may be shifted left by one position, that is, the initial value of the first parameter a may be multiplied by 2 to obtain the initial value of the third parameter max.

[0045] When calculating the value of the fourth parameter pow2Q, the value 1 may be left-shifted by the number of bits corresponding to the output data bit width Q, that is, 2^Q (2 to the power of Q), to obtain the value of the fourth parameter pow2Q.

[0046] Through the above method, the initial values ​​of multiple parameters involved in iterative calculation can be accurately determined based on the data to be calculated x and the output data bit width Q, so as to facilitate subsequent iterative calculation based on the initial values ​​of each parameter.

[0047] In an optional embodiment, the above step of updating the value of the first parameter a based on the updated third parameter max includes: Summing the updated third parameter max, the second parameter min calculated in the last iteration, and the value 1 to obtain a first summation result; The value corresponding to the first summation result is shifted left by 1 bit, and the value of the first parameter a is updated based on the left-shifted value.

[0048] Specifically, when the value of the first parameter a is updated based on the updated third parameter max, the updated third parameter max, the second parameter min obtained by the last iteration calculation, and the value 1 may be summed to obtain a first summation result, and then the value corresponding to the first summation result is shifted left by 1 bit, and the value of the first parameter a is updated based on the left-shifted value. In this way, the value of the first parameter a may be updated based on the updated third parameter max.

[0049] In an optional embodiment, the above step of updating the value of the first parameter a based on the updated second parameter min includes: The updated second parameter min, the third parameter max calculated in the last iteration, and the value 1 are summed to obtain a second summation result; The value corresponding to the second summation result is shifted left by 1 bit, and the value of the first parameter a is updated based on the left-shifted value.

[0050] Specifically, when the value of the first parameter a is updated based on the updated second parameter min, the updated second parameter min, the third parameter max obtained by the last iteration calculation, and the value 1 may be summed to obtain a second summation result, and then the value corresponding to the second summation result is shifted left by 1 bit, and the value of the first parameter a is updated based on the left-shifted value. In this way, the value of the first parameter a may be updated based on the updated second parameter min.

[0051] In an optional embodiment, before the above step S104, determining the initial values ​​of multiple parameters involved in the iterative calculation based on the data to be calculated x and the output data bit width Q, the method further includes: Determine whether the data x to be calculated is a value of 0; When the data x to be calculated is a value of 0, the second value is output as the calculation result, wherein the second value is the maximum value that can be represented under the hardware bit width supported by the hardware.

[0052] Since the division calculation actually calculates the reciprocal value of the data to be calculated x, it is necessary to determine whether the data to be calculated x is a value of 0 before performing the division calculation. When the data to be calculated x is 0, the reciprocal value of the data to be calculated x can actually be understood as a positive infinite value. In hardware representation, the positive infinite value can be represented according to the hardware bit width N. Specifically, it can be represented by 2^(N+1)-1, where 2^(N+1)-1 represents a binary value in which N bits are all 1. When the data to be calculated x is not a value of 0, the above step S104 is executed, and based on the data to be calculated x and the output data bit width Q, the initial values ​​of multiple parameters involved in the iterative calculation are determined, and the division calculation is performed.

[0053] Through the above method, the values ​​that do not meet the division calculation conditions can be excluded, and the values ​​that meet the division calculation conditions can participate in the division calculation.

[0054] In an optional embodiment, the process of the division calculation method based on hardware implementation provided in the embodiment of the present application is as follows: Figure 2As shown, all the calculations here are implemented according to the hardware characteristics. Specifically, first, the data x to be calculated is determined. The purpose of the division calculation is to obtain 1 / x, and based on the current hardware bit width N and the error range, the output data bit width Q is determined. Then, it is judged whether the data x to be calculated is 0. If the data x to be calculated is 0, the value 2^(N + 1) - 1 is directly output; if the data x to be calculated is not 0, based on the data x to be calculated and the output data bit width Q, the initial values of the first parameter a, the second parameter min, the third parameter max, and the fourth parameter Pow2Q for the iterative calculation are determined.

[0055] Then, the iterative calculation is carried out. First, it is judged whether the current iteration count is less than the total number of iterative calculations (i.e., the value corresponding to the output data bit width Q). If the current iteration count is less than the total number of iterative calculations, the product of the first parameter a and the data x to be calculated is calculated to obtain the fifth parameter b. Then, the fifth parameter b is compared with the fourth parameter pow2Q, and the second parameter min obtained from the previous iterative calculation is compared with the third parameter max obtained from the previous iterative calculation. According to the comparison results, the first parameter a, the second parameter min, and the third parameter max for the next iterative calculation are determined, and the next iterative calculation is carried out until the current iteration count is equal to the total number of iterative calculations. The first parameter a obtained from the last iterative calculation is output as the calculation result, and the division calculation result of the data x to be calculated is obtained. The specific execution pseudo-code of the hardware can be expressed as: if (x == 0): output = 2^(N + 1) - 1; (Judge whether x is 0. If x is 0, it is not applicable to the algorithm and is directly assigned, and the value assigned is the maximum value supported by the current hardware bit width) else: (Enter the calculation of the effective division) tmp = Q – (the number of bits corresponding to the highest 1 in x); a = (1 << max(tmp, 0)); (If tmp is a positive number, a takes 2^tmp, otherwise, a is 1) min = a >> 1; max = a << 1; pow2Q = (1 << Q) (pow2Q is 2^Q) iterindex = 0 / / The iteration starts from 0 for (int iterindex = 0; iterindex < Q; iterindex ++) { b = a * x; (The parameter b for this iteration) if ((b == pow2Q) || (max-min<= 1) || (min>max)) a = a; (If any of the above three conditions is met, the value of a remains unchanged) if (b>pow2Q) max = a; else min = a; a = (min + max + 1)>>1; (update the value of a based on the value of max / min) } Output = a (output the value of a after iteration) To facilitate understanding of the calculation process, an example is given here. If the data to be calculated x is 3, the hardware bit width N is 16, and the output data bit width Q is 12, then the initial values ​​of the parameters can be calculated as follows: the initial value of the first parameter a is 2048, the initial value of the second parameter min is 1024, the initial value of the third parameter max is 40963, and the initial value of the fourth parameter pow2Q is 4096. It should be noted that when calculating the initial value of the first parameter a, the parameter tmp is calculated first. Since the value of x is 3, the binary fixed-point number is represented as 0011 (the binary fixed-point number 0011 corresponds to the 0th, 1st, 2nd and 3rd bits from right to left respectively), then it can be seen that the number of bits corresponding to the highest bit 1 of x is 1, so the parameter tmp=Q-1=12-1=11. Then max(tmp,0)=max(11,0)=11. Therefore, the value 1 needs to be shifted left by 11 bits to get the binary fixed-point number 1000 0000 0000, which is 2048. When calculating the initial value of the second parameter min, the binary fixed-point number 1000 0000 0000 needs to be shifted right by one bit, which is 2048 / 2=1024. When calculating the initial value of the third parameter max, the binary fixed-point number 1000 0000000 needs to be shifted left by one bit, which is 2048×2=4096. When calculating the initial value of the fourth parameter pow2Q, the value 1 needs to be shifted left by 12 bits to get 2^12 = 4096. In the first iterative calculation process, since the first parameter a is 2048, the fifth parameter b=a*x=2048*3=6144, since the fifth parameter b = 6144, the fourth parameter pow2Q=4096, after comparison, it can be known that the fifth parameter b> the fourth parameter pow2Q, at this time the third parameter max=2048, then the first parameter a is calculated and updated, since at this time min+max+1= 2048+1024+1=3073, it is right-shifted by one bit, that is, 3073 / 2 and rounded to 1536. Therefore, the result of the first iterative calculation is: the third parameter max is 2048, the second parameter min is 1024, and the updated first parameter a is 1536.

[0056] In the second iterative calculation process, since the first parameter a is 1536 and the fifth parameter b=a*x=4608, after comparison, it can be obtained that the third parameter max is 1536, the second parameter min is 1024, and the updated first parameter a is 1280 (the logic in the subsequent iterative calculation process is the same as that in the first iterative calculation process, which will not be repeated here).

[0057] During the third iterative calculation process, since the first parameter a is 1280 and the fifth parameter b=a*x=3840, after comparison, it can be obtained that the third parameter max is 1536, the second parameter min is 1280, and the updated first parameter a is 1408.

[0058] In the fourth iterative calculation process, since the first parameter a is 1408 and the fifth parameter b=a*x=4224, after comparison, it can be obtained that the third parameter max is 1408, the second parameter min is 1280, and the updated first parameter a is 1344.

[0059] During the fifth iterative calculation process, since the first parameter a is 1344 and the fifth parameter b=a*x=4032, after comparison, it can be obtained that the third parameter max is 1408, the second parameter min is 1344, and the updated first parameter a is 1376.

[0060] During the sixth iterative calculation, since the first parameter a is 1376 and the fifth parameter b=a*x=4128, after comparison, it can be obtained that the third parameter max is 1376, the second parameter min is 1344, and the updated first parameter a is 1360.

[0061] During the seventh iterative calculation process, since the first parameter a is 1360 and the fifth parameter b=a*x=4080, after comparison, it can be obtained that the third parameter max is 1376, the second parameter min is 1360, and the updated first parameter a is 1368.

[0062] During the eighth iterative calculation process, since the first parameter a is 1368 and the fifth parameter b=a*x=4104, after comparison, it can be obtained that the third parameter max is 1368, the second parameter min is 1360, and the updated first parameter a is 1364.

[0063] During the ninth iterative calculation process, since the first parameter a is 1364 and the fifth parameter b=a*x=4092, after comparison, it can be obtained that the third parameter max is 1368, the second parameter min is 1364, and the updated first parameter a is 1366.

[0064] During the tenth iterative calculation process, since the first parameter a is 1366 and the fifth parameter b=a*x=4098, after comparison, it can be obtained that the third parameter max is 1366, the second parameter min is 1364, and the updated first parameter a is 1365.

[0065] During the eleventh iterative calculation process, since the first parameter a is 1365 and the fifth parameter b=a*x=4095, after comparison, it can be obtained that the third parameter max is 1366, the second parameter min is 1365, and the updated first parameter a is 1366.

[0066] During the twelfth iterative calculation process, since the number of iterations is equal to the output data bit width, the iteration ends, and the value of the first parameter a finally calculated, 1366, is output as the calculation result.

[0067] For ease of understanding and comparison of accuracy, the fixed-point number 1366 is converted to a floating-point number, that is, 1366*2^(-12)=0.3335 (the value of the calculated result after fixed-point-floating-point conversion). Since 1 / 3=0.3333 (theoretical value), it can be seen that the result calculated using this hardware implementation has a very small error.

[0068] The hardware-based division calculation method provided in the embodiment of the present application does not require fixed-point to floating-point conversion. All data is processed in hardware format. The solution does not have complex conditions and hardware modules. All hardware operations are only addition, multiplication, comparator and shifter. The corresponding division calculation can be completed through iteration. Compared with the traditional hardware divider, the division calculation result that meets the error condition can be directly obtained based on the acceptable error range, thereby improving the calculation efficiency.

[0069] See also Figure 3 , Figure 3 The following is a schematic diagram of a hardware-based division calculation device provided in an embodiment of the present application. Figure 3 As shown, the division calculation device 300 based on hardware implementation includes: An acquisition module 302 is used to acquire the data to be calculated x and a preset output data bit width Q, wherein the data to be calculated x is a fixed-point number, the output data bit width Q is determined based on an error range of the output data, and the output data bit width Q is less than or equal to a hardware bit width supported by the hardware; A first determination module 304 is used to determine initial values ​​of multiple parameters involved in iterative calculation based on the data to be calculated x and the output data bit width Q, wherein the multiple parameters include a first parameter a, a second parameter min, and a third parameter max that vary with the iterative calculation, and a fourth parameter pow2Q that does not vary with the iterative calculation; A first judgment module 306 is used to judge whether the current number of iterations is less than the value of the output data bit width Q; A second determination module 308 is configured to determine the product of the first parameter a obtained by the previous iteration calculation and the data x to be calculated as the fifth parameter b when the current iteration number is less than the value of the output data bit width Q; A keeping module 310, used to keep the values ​​of the second parameter min, the third parameter max and the first parameter a obtained by the previous iteration calculation unchanged when b = pow2Q or max-min ≤ 1 or min>max; The first update module 312 is used to update the value of the third parameter max using the first parameter a calculated in the previous iteration when b > pow2Q, max - min > 1, and min ≤ max, and then update the value of the first parameter a based on the updated third parameter max; The second update module 314 is used to update the value of the second parameter min using the first parameter a calculated in the previous iteration when b < pow2Q, max - min > 1, and min ≤ max, and then update the value of the first parameter a based on the updated second parameter min; The first output module 316 is used to substitute the re - determined second parameter min, third parameter max, and first parameter a into the next iteration calculation. When the current iteration count reaches the value of the output data width Q, the finally calculated first parameter a is output as the calculation result.

[0070] Further, the first determination module 304 includes: A calculation sub - module, used to calculate the difference between the output data width Q and the first value, obtain the maximum value between the difference and the value 0, and shift the value 1 to the left by the number of bits corresponding to the maximum value to obtain the initial value of the first parameter a, where the first value is the number of bits corresponding to the binary value 1 of the highest bit in the data x to be calculated; A right - shift sub - module, used to right - shift the initial value of the first parameter a by one bit to obtain the initial value of the second parameter min; A first left - shift sub - module, used to left - shift the initial value of the first parameter a by one bit to obtain the initial value of the third parameter max; A second left - shift sub - module, used to left - shift the value 1 by the number of bits corresponding to the output data width Q to obtain the value of the fourth parameter pow2Q.

[0071] Further, the first update module 312 includes: A first summation sub - module, used to sum the updated third parameter max, the second parameter min calculated in the previous iteration, and the value 1 to obtain a first summation result; A third left - shift sub - module, used to left - shift the value corresponding to the first summation result by 1 bit, and update the value of the first parameter a based on the left - shifted value.

[0072] Further, the second update module 314 includes: A second summation sub - module, used to sum the updated second parameter min, the third parameter max calculated in the previous iteration, and the value 1 to obtain a second summation result; The fourth left-shift submodule is used to shift the numerical value corresponding to the second summation result to the left by 1 bit, and update the value of the first parameter a based on the left-shifted numerical value.

[0073] Furthermore, the hardware-based division calculation device 300 further includes: The second judgment module is used to judge whether the data x to be calculated is a value of 0; The second output module is used to output a second value as a calculation result when the data x to be calculated is a value of 0, wherein the second value is a maximum value that can be represented under the hardware bit width supported by the hardware. It should be noted that the hardware-based division calculation device 300 can implement the steps of the hardware-based division calculation method provided by any of the aforementioned method embodiments, and can achieve the same technical effect, which will not be repeated here one by one.

[0074] like Figure 4 As shown, the embodiment of the present application further provides an electronic device, including a processor 411, a communication interface 412, a memory 413 and a communication bus 414, wherein the processor 411, the communication interface 412, and the memory 413 communicate with each other through the communication bus 414. Memory 413, used for storing computer programs; In one embodiment of the present application, the processor 411 is used to implement the steps of the hardware-based division calculation method provided by any of the aforementioned method embodiments when executing the program stored in the memory 413.

[0075] The electronic device provided in the embodiment of the present application may specifically be a module capable of realizing a communication function or a terminal device including the module, etc. The terminal device may be a mobile terminal or a smart terminal. The mobile terminal may specifically be at least one of a mobile phone, a tablet computer, a laptop computer, etc.; the smart terminal may specifically be a terminal including a wireless communication module such as a smart car, a smart watch, a shared bicycle, a smart cabinet, etc.; the module may specifically be a wireless communication module, such as any one of a 2G communication module, a 3G communication module, a 4G communication module, a 5G communication module, and a NB-IOT communication module.

[0076] An embodiment of the present application also provides a computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, the steps of the hardware-based division calculation method provided in any of the aforementioned method embodiments are implemented.

[0077] The embodiment of the present application also provides a computer program product or a computer program, which includes a computer instruction stored in a computer-readable storage medium. The processor of the computer device reads the computer instruction from the computer-readable storage medium, and the processor executes the computer instruction, so that the computer device performs the steps of the above-mentioned division calculation method based on hardware implementation.

[0078] It should be noted that, in this article, relational terms such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.

[0079] The above description is only a specific implementation of the present application, so that those skilled in the art can understand or implement the present application. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to the embodiments shown herein, but will conform to the widest range consistent with the principles and novel features applied for herein.

Claims

1. A division calculation method based on hardware implementation, characterized in that: The method comprises: Obtaining the data to be calculated x and the preset output data bit width Q, wherein the data to be calculated x is a fixed-point number, the output data bit width Q is determined based on the error range of the output data, and the output data bit width Q is less than or equal to the hardware bit width supported by the hardware; Based on the data to be calculated x and the output data bit width Q, determining initial values ​​of multiple parameters involved in iterative calculation, wherein the multiple parameters include a first parameter a, a second parameter min, and a third parameter max that vary with iterative calculation, and a fourth parameter pow2Q that does not vary with iterative calculation; Determine whether the current number of iterations is less than the value of the output data bit width Q; When the current number of iterations is less than the value of the output data bit width Q, the product of the first parameter a obtained by the previous iteration calculation and the data to be calculated x is determined as the fifth parameter b; When b = pow2Q or max-min ≤ 1 or min > max, keep the values ​​of the second parameter min, the third parameter max and the first parameter a obtained in the previous iteration unchanged; When b > pow2Q and max-min > 1 and min ≤ max are satisfied, the value of the third parameter max is updated using the first parameter a calculated in the previous iteration, and the value of the first parameter a is updated again based on the updated third parameter max; When b < pow2Q and max-min > 1 and min ≤ max are satisfied, the value of the second parameter min is updated using the first parameter a calculated in the previous iteration, and the value of the first parameter a is updated again based on the updated second parameter min; The re-determined second parameter min, third parameter max and first parameter a are substituted into the next iterative calculation until the current iteration number reaches the value of the output data bit width Q, and the finally calculated first parameter a is output as the calculation result.

2. The division calculation method based on hardware implementation according to claim 1, characterized in that: The step of determining initial values ​​of multiple parameters involved in iterative calculation based on the data to be calculated x and the output data bit width Q includes: Calculate the difference between the output data bit width Q and the first value, obtain the maximum value of the difference and the value 0, and shift the value 1 left by the number of bits corresponding to the maximum value, so as to obtain the initial value of the first parameter a, wherein the first value is the number of bits corresponding to the highest binary value 1 in the data to be calculated x; Shift the initial value of the first parameter a right by one position to obtain the initial value of the second parameter min; Shift the initial value of the first parameter a to the left by one position to obtain the initial value of the third parameter max; The value 1 is shifted left by the number of bits corresponding to the output data bit width Q to obtain the value of the fourth parameter pow2Q.

3. The division calculation method based on hardware implementation according to claim 1, characterized in that: The updating of the value of the first parameter a based on the updated third parameter max includes: Summing the updated third parameter max, the second parameter min calculated in the last iteration, and the value 1 to obtain a first summation result; The numerical value corresponding to the first summation result is shifted left by 1 bit, and the value of the first parameter a is updated based on the left-shifted numerical value.

4. The division calculation method based on hardware implementation according to claim 1, characterized in that: The updating of the value of the first parameter a based on the updated second parameter min comprises: The updated second parameter min, the third parameter max calculated in the last iteration, and the value 1 are summed to obtain a second summation result; The numerical value corresponding to the second summation result is shifted left by 1 bit, and the value of the first parameter a is updated based on the left-shifted numerical value.

5. The division calculation method based on hardware implementation according to claim 1, characterized in that: Before determining the initial values ​​of a plurality of parameters involved in iterative calculation based on the data to be calculated x and the output data bit width Q, the method further includes: Determine whether the data x to be calculated is a value of 0; When the data x to be calculated is a value of 0, a second value is output as a calculation result, wherein the second value is a maximum value that can be represented under a hardware bit width supported by the hardware.

6. A division calculation device based on hardware implementation, characterized in that: The device comprises: An acquisition module, used to acquire the data to be calculated x and a preset output data bit width Q, wherein the data to be calculated x is a fixed-point number, the output data bit width Q is determined based on an error range of the output data, and the output data bit width Q is less than or equal to a hardware bit width supported by the hardware; A first determination module is used to determine initial values ​​of multiple parameters involved in iterative calculation based on the data to be calculated x and the output data bit width Q, wherein the multiple parameters include a first parameter a, a second parameter min and a third parameter max that vary with the iterative calculation, and a fourth parameter pow2Q that does not vary with the iterative calculation; A first judgment module is used to judge whether the current number of iterations is less than the value of the output data bit width Q; A second determination module is used to determine the product of the first parameter a calculated in the previous iteration and the data x to be calculated as the fifth parameter b when the current iteration number is less than the value of the output data bit width Q; A holding module, used to keep the values ​​of the second parameter min, the third parameter max and the first parameter a obtained by the previous iteration unchanged when b = pow2Q or max-min ≤ 1 or min > max; A first updating module, configured to update the value of the third parameter max by using the first parameter a calculated in the last iteration, and to update the value of the first parameter a again based on the updated third parameter max, when b > pow2Q, max-min > 1, and min ≤ max; A second updating module, configured to update the value of the second parameter min using the first parameter a calculated in the previous iteration, and to update the value of the first parameter a based on the updated second parameter min, when b < pow2Q and max-min > 1 and min ≤ max; The first output module is used to substitute the re-determined second parameter min, third parameter max and first parameter a into the next iterative calculation until the current iteration number reaches the value of the output data bit width Q, and then output the finally calculated first parameter a as the calculation result.

7. An electronic device, characterized in that: It includes a processor, a communication interface, a memory and a communication bus, wherein the processor, the communication interface and the memory communicate with each other through the communication bus; Memory, used to store computer programs; A processor is used to implement the hardware-based division calculation method described in any one of claims 1 to 5 when executing a program stored in a memory.

8. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the hardware-based division calculation method according to any one of claims 1 to 5 is implemented.

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