A method and circuit for automatically upgrading BIOS on an Intel platform computer

Abstract

The application relates to a full-automatic BIOS upgrading method and circuit on an Intel platform computer, and the full-automatic BIOS upgrading method on the Intel platform computer comprises the following steps: obtaining a BIOS updating mode in a system application program; generating a communication instruction for controlling an MCU to enter an ME shutdown state and / or a BIOS write protection state; if it is detected that the computer has been shut down, obtaining first state information of the MCU, generating a state control instruction according to the first state information, and the state control instruction is used for controlling the ME to be placed in a shutdown state and / or the BIOS write protection state to be closed in a power-on self-test process of controlling the computer to be started; when the system detects that the computer is shut down, corresponding control instructions are generated, and the ME and the BIOS write protection are ensured to be closed in the power-on self-test process. The system then controls the computer to be restarted, automatically calls an upgrading tool, and completes BIOS or ME upgrading operation; the dependence on professional knowledge of a user is reduced, the operation convenience and safety are improved, and the maintenance cost and time consumption are reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of fully automatic BIOS upgrade on an Intel platform computer, and in particular to a fully automatic BIOS upgrade method and circuit thereof on an Intel platform computer. Background Art

[0002] Intel-based computers have ME firmware in their BIOS. This firmware is used to drive the ME. ME (Intel Management Engine) is a microprocessor embedded in the Intel chipset that is designed to provide remote management, security, and system monitoring functions.

[0003] During the computer BIOS update process, there are three operation requirements according to different update situations: the first situation is to update only the BIOS part without updating the ME part, in which case the BIOS write protection needs to be disabled; the second situation is to update both the BIOS and ME parts at the same time, in which case both the BIOS write protection and ME need to be disabled; the third situation is to update only the ME part without updating the BIOS part, in which case the BIOS write protection and ME need to be disabled;

[0004] However, shutting down the ME can only be accomplished through hardware intervention, requiring the user to manually open the chassis. This is unavailable in most industrial environments, increasing the time and labor costs of returning the computer to the factory for repair. Furthermore, updating the BIOS and ME requires a high level of skill from the end user, making the operation complex and difficult, especially for users without computer knowledge. Summary of the Invention

[0005] In order to solve the problem of how to shut down the ME and turn off the BIOS write protection without disassembling the chassis, simplify the process of updating the BIOS and ME, and reduce the skill requirements for end users, this application provides a fully automatic BIOS upgrade method and circuit on an Intel platform computer.

[0006] A method for fully automatically upgrading the BIOS on an Intel platform computer, comprising:

[0007] Get the BIOS update mode in the system application;

[0008] According to the BIOS update mode, a communication instruction, a first computer control instruction and a first execution sequence instruction are generated, the communication instruction is used to control the MCU to enter an ME standby-off state and / or a BIOS write-protection state, the first computer control instruction is used to control the computer to shut down and automatically run a system application program when the computer is next started, and the first execution sequence instruction is used to determine the execution sequence of the steps of the communication instruction and the first computer control instruction.

[0009] If it is detected that the computer has been shut down, first state information of the MCU is acquired, state control instructions, second computer control instructions and second execution sequence instructions are generated according to the first state information, the second computer control instructions are used to control the computer to start up, the state control instructions are used to control the ME to be placed in an off state and / or the BIOS write-protection state to be turned off during a power-on self-test process of the computer starting up, and the second execution sequence instructions are used to determine the execution sequence of the steps of the state control instructions and the second computer control instructions.

[0010] Based on the first computer control instructions and the first execution sequence instructions, the system application program is automatically run, second state information of the ME and / or the BIOS is acquired, and according to the second state information, the system application program is controlled to call a corresponding upgrade tool to perform a corresponding upgrade operation.

[0011] By using the above technical solution, the BIOS update mode in the system application program is acquired, the communication instruction and the computer control instruction are generated according to different update requirements, and the MCU is instructed to automatically enter the ME standby-off state and / or the BIOS write-protection state. Subsequently, the system automatically controls the computer to shut down and sets the system application program to be automatically run next time the computer is started, without the need for manual intervention by the user. When the system detects that the computer has been shut down, the state information of the current ME and the BIOS is acquired through the MCU, the corresponding control instruction is automatically generated, and the ME and the BIOS write-protection are ensured to be turned off during the power-on self-test process. The system then controls the computer to start up again, automatically calls the upgrade tool, and completes the BIOS or ME upgrade operation according to the real-time state information.

[0012] The complex operation of the user needing to disassemble the case and manually set the hardware to turn off the ME in the traditional method is avoided, all the ME turning-off and BIOS write-protection turning-off operations are automatically completed by the MCU and the system, and the update process is greatly simplified. At the same time, the system can autonomously judge the state of the ME and the BIOS and perform the corresponding upgrade operation, reduces the dependence on the user's professional knowledge, avoids the risk in manual operation, reduces the need for factory repair, and ultimately improves the convenience and safety of operation, reduces the maintenance cost and time consumption.

[0013] Preferably, a PWRLED light is provided on the computer, and the PWRLED light is used to obtain key information to perform corresponding instruction operations, wherein the step of obtaining key information to perform corresponding instruction operations includes:

[0014] Determine the current brightness status of the PWRLED light;

[0015] Key information is acquired in real time, where the key information includes at least the second status information and upgrade operation information after the corresponding upgrade operation is completed.

[0016] Determine indication parameters according to the key instruction, wherein the indication parameters include a flicker frequency parameter, a flicker brightness parameter, and a brightness cycle parameter;

[0017] According to the current brightness state, determine the interference point of the PWRLED lamp, and filter out the corresponding key parameters from the indication parameters based on the interference point;

[0018] According to the key parameters, corresponding indicated operations are performed.

[0019] By employing this technical solution, the PWRLED, configured on a computer, acquires key information and performs indication operations. This provides users with real-time information on system status through simple visual feedback, thereby enhancing their understanding of system operation. Based on the brightness status and key information, the PWRLED's indication parameters (such as flashing frequency and brightness) can be precisely adjusted, improving the accuracy of indication information and the real-time nature of system feedback. Filtering key parameters based on interference points reduces unnecessary errors, thereby improving the stability and reliability of indication operations.

[0020] Preferably, the step of controlling the control system application to call a corresponding upgrade tool to perform a corresponding upgrade operation according to the second status information includes:

[0021] Determining whether the ME is turned off and whether the BIOS write protection state is turned off according to the second status information;

[0022] If it is detected that the ME is shut down, the previous version of the ME is stored, and the ME upgrade tool is called to perform the ME upgrade operation, the first fault detection information during the ME upgrade operation is monitored in real time, and according to the priority of the first fault detection information, it is determined whether to interrupt the upgrade operation and restore the previous version of the ME;

[0023] If it is detected that the BIOS write protection status is turned off, the previous BIOS version is stored, and the BIOS upgrade tool is called to perform the BIOS upgrade operation. The second fault detection information in the BIOS upgrade operation is monitored in real time. According to the priority of the second fault detection information, it is determined whether to interrupt the upgrade operation and restore the previous BIOS version.

[0024] By adopting the above technical solution, by determining whether the ME is powered off and whether the BIOS write protection is off based on the second status information, it is possible to ensure that the system is in an upgradeable state before the upgrade, thereby improving the success rate of the upgrade operation. By detecting the shutdown status of the ME and BIOS, a corresponding fault detection mechanism can be implemented during the upgrade process, and the operation can be interrupted and the previous version restored based on the fault information, thereby improving the system's fault tolerance and security, and avoiding system damage caused by upgrade failures.

[0025] A fully automatic BIOS upgrade circuit on an Intel platform computer comprises an MCU module, a communication module, a computer startup control module, a computer status detection module, and an ME status control module. The data transmission end of the MCU module is connected to the data transmission end of the communication module, which is connected to the data transmission end of the computer. The signal acquisition end of the computer status detection module is connected to the power signal output end of a power supply. The signal output end of the computer status detection module is connected to the signal input end of the MCU module. The first signal output end of the MCU module is connected to the signal input end of the computer startup control module, which is connected to the computer. The second signal output end of the MCU module is connected to the signal input end of the ME status control module. The signal output end of the ME status control module is connected to the ME Strap circuit of a chipset for disabling or enabling the ME. The MCU communicates with the computer via the communication module, and a BIOS program enables or disables a write protection register of the BIOS.

[0026] By adopting the above technical solution and designing the ME state control module, including MOS transistors Q4 and Q6 and a voltage acquisition network, it is possible to monitor the ME voltage state in real time and control the ME state by turning MOS transistor Q6 on or off, thereby improving the detection accuracy and control capability of the ME shutdown state. The combination of the voltage acquisition network and the MCU module ensures that changes in the ME state can be quickly responded to, thereby improving the system's feedback speed.

[0027] Preferably, the ME state control module includes a MOS transistor Q4, a MOS transistor Q6, and a voltage acquisition network, wherein the power input terminal of the voltage acquisition network is connected to the power supply, the power output terminal of the voltage acquisition network is connected to the first conductive terminal of the MOS transistor Q6, the second conductive terminal of the MOS transistor Q6 is grounded, the controlled terminal of the MOS transistor Q6 is connected to the second signal output terminal of the MCU module, the first conductive terminal of the MOS transistor Q4 is connected to the power supply, the second conductive terminal of the MOS transistor Q4 is connected to the ME Strap circuit of the chipset, and the controlled terminal of the MOS transistor Q4 is connected to the power signal output terminal of the voltage acquisition network.

[0028] By adopting the above technical solution and designing the ME state control module, including MOS transistors Q4 and Q6 and a voltage acquisition network, it is possible to monitor the ME voltage state in real time and control the ME state by turning MOS transistor Q6 on or off, thereby improving the detection accuracy and control capability of the ME shutdown state. The combination of the voltage acquisition network and the MCU module ensures that changes in the ME state can be quickly responded to, thereby improving the system's feedback speed.

[0029] Preferably, the voltage acquisition network includes a resistor R27 and a resistor R29, a first end of the resistor R27 is connected to a power supply, a second end of the resistor R27 is connected to a first end of the resistor R29, a second end of the resistor R29 is connected to the first conduction end of the MOS transistor Q6, and a common node between the second end of the resistor R27 and the first end of the resistor R29 is connected to the controlled end of the MOS transistor Q4.

[0030] By adopting the above technical solution and the design of resistors R27 and R29 in the voltage acquisition network, the voltage signal of the ME state can be stably acquired, thereby improving the detection accuracy of the ME off state. The combination of the controlled terminal of MOS transistor Q4 and the voltage acquisition network can ensure that the voltage change when the ME is off can be accurately captured, thereby improving the stability and reliability of the circuit.

[0031] Preferably, the computer status detection circuit includes a MOS transistor Q5 and a resistor R28, the first conduction end of the MOS transistor Q5 is connected to the first end of the resistor R28, the second end of the resistor R28 is connected to the power supply, the common node between the second end of the resistor R28 and the power supply is connected to the signal input end of the MCU module, and the controlled end of the MOS transistor Q5 is connected to the power signal output end of the power supply.

[0032] By adopting the above technical solution and the design of MOS transistor Q5 and resistor R28 in the computer status detection circuit, the computer's on / off state can be effectively detected and fed back to the MCU via voltage changes, thereby improving the system's detection accuracy of the computer's on / off state. The connection between the MCU and the computer status detection circuit ensures that the MCU can respond promptly to the computer's on / off state, thereby improving the system's response speed and operational accuracy.

[0033] Preferably, the computer switch control module includes a MOS transistor Q1 and a resistor R1, the first conduction end of the MOS transistor Q1 is connected to the first end of the resistor R1, the second end of the resistor R1 is connected to the power supply, the common node between the second end of the resistor R1 and the power supply is connected to the computer power-on signal control circuit, and the controlled end of the MOS transistor Q1 is connected to the first signal output end of the MCU module.

[0034] By adopting the above technical solution, the design of the computer switch control module, including MOS transistor Q1 and resistor R1, enables the MCU to precisely control the computer power supply. The controlled terminal of MOS transistor Q1 is connected to the first signal output terminal of the MCU module. When the MCU sends a signal, MOS transistor Q1 turns on, and current flows through R1, thereby controlling the computer power supply.

[0035] Preferably, the communication module includes a dual N-channel MOS transistor Q3, a resistor R19, and a resistor R20. A first end of the resistor R19 is connected to a power supply, a second end of the resistor R19 is connected to a first controlled end of the dual N-channel MOS transistor Q3, a first end of the resistor R20 is connected to a power supply, a second end of the resistor R20 is connected to a second controlled end of the dual N-channel MOS transistor Q3, a first conductive end of the dual N-channel MOS transistor Q3 is connected to a clock line for SMBUS communication, a second conductive end of the dual N-channel MOS transistor Q3 is connected to a first data communication port of the MCU module, a third conductive end of the dual N-channel MOS transistor Q3 is connected to a data line for SMBUS communication, and a fourth conductive end of the dual N-channel MOS transistor Q3 is connected to a second data communication port of the MCU module.

[0036] By adopting the above technical solution and the design of the dual N-channel MOS transistor Q3 and resistors R19 and R20 in the communication module, independent control of the SMBUS communication clock and data lines can be achieved, thereby improving the stability and communication efficiency of the communication module. The dual N-channel MOS transistor design can reduce power consumption while maintaining efficient communication, thereby improving the overall energy efficiency and reliability of the system.

[0037] Preferably, the circuit for fully automatically upgrading the BIOS on an Intel platform computer further includes a status indication module, which includes a MOS transistor Q2, a resistor R7, and an indicator light. The first conducting end of the MOS transistor Q2 is connected to the first end of the resistor R7, the second end of the resistor R7 is connected to the power supply, the common node between the second end of the resistor R7 and the power supply is connected to the indicator light, and the controlled end of the MOS transistor Q2 is connected to the third signal output end of the MCU module.

[0038] By adopting the above technical solution and designing the status indicator module, visual feedback of the system status can be achieved through MOS transistor Q2, resistor R7, and indicator light. When the MCU's third signal output terminal outputs a signal, the controlled terminal of MOS transistor Q2 conducts, and the indicator light illuminates, intuitively displaying the current system status changes to the user. This simple and reliable circuit structure can effectively reflect the system's operating status or important information during the upgrade process, thereby improving the user's perception of system status. In addition, the design of resistor R7 ensures current stability in the indicator circuit, preventing overcurrent from damaging the indicator light or affecting the normal operation of other system modules, thereby improving system reliability and durability.

[0039] In summary, this application includes at least one of the following beneficial technical effects:

[0040] This application obtains the BIOS update mode in the system application, generates communication instructions and computer control instructions according to different update requirements, and instructs the MCU to automatically enter the ME standby state and / or BIOS write protection state. Subsequently, the system automatically controls the computer to shut down and sets it to automatically run the system application at the next startup without manual user intervention. When the system detects that the computer is shut down, it obtains the current ME and BIOS status information through the MCU, and automatically generates corresponding control instructions to ensure that the ME and BIOS write protection are turned off during the power-on self-test process. The system then controls the computer to restart, automatically calls the upgrade tool, and completes the BIOS or ME upgrade operation based on the real-time status information;

[0041] This eliminates the traditional complex process of dismantling the chassis and manually configuring hardware to shut down the ME. All ME shutdown and BIOS write-protection operations are automatically performed by the MCU and the system, greatly simplifying the update process. Furthermore, the system can independently determine the status of the ME and BIOS and perform the corresponding upgrade operations, reducing reliance on user expertise, avoiding the risks of manual operation, and reducing the need for factory repairs. Ultimately, this improves operational convenience and safety, while reducing maintenance costs and time. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] Figure 1 is a flow chart of a method for automatically upgrading BIOS on an Intel platform computer according to an embodiment of the present application.

[0043] Figure 2 is another implementation flow chart of a method for automatically upgrading BIOS on an Intel platform computer according to an embodiment of the present application.

[0044] Figure 3 is an implementation flow chart of step S40 in a method for automatically upgrading BIOS on an Intel platform computer according to an embodiment of the present application.

[0045] Figure 4 is a flow chart of a circuit for automatically upgrading BIOS on an Intel platform computer according to an embodiment of the present application.

[0046] Figure 5 is a partial circuit diagram of an MCU module in a circuit for automatically upgrading BIOS on an Intel platform computer according to an embodiment of the present application.

[0047] Figure 6 is a partial circuit diagram of an ME state control module in a circuit for automatically upgrading BIOS on an Intel platform computer according to an embodiment of the present application.

[0048] Figure 7 is a partial circuit diagram of a computer state detection module in a circuit for automatically upgrading BIOS on an Intel platform computer according to an embodiment of the present application.

[0049] Figure 8 is a partial circuit diagram of a computer power-on control module in a circuit for automatically upgrading BIOS on an Intel platform computer according to an embodiment of the present application.

[0050] Figure 9 is a partial circuit diagram of a state indication module in a circuit for automatically upgrading BIOS on an Intel platform computer according to an embodiment of the present application.

[0051] Figure 10 is a partial circuit diagram of a communication module in a circuit for automatically upgrading BIOS on an Intel platform computer according to an embodiment of the present application. DETAILED DESCRIPTION

[0052] The present application will be further described below in conjunction with the accompanying drawings.

[0053] In an embodiment, as shown in Figure 1As shown, this application discloses a method for fully automatically upgrading the BIOS on an Intel platform computer, which specifically includes the following steps:

[0054] A method for fully automatically upgrading the BIOS on an Intel platform computer, comprising:

[0055] S10, obtaining a BIOS update mode in a system application;

[0056] In this embodiment, the update is implemented through user interaction with the system interface. Within the update tool interface, the user can select a suitable BIOS update mode, such as updating only the BIOS, updating both the BIOS and the ME, or updating only the ME. The system application generates corresponding update instructions based on the user's selected mode. This ensures flexible system updates based on specific needs, avoiding unnecessary update operations, thereby improving update efficiency and reducing system resource consumption. A practical example is a user choosing to update only the BIOS without updating the ME. This avoids additional operations associated with updating the ME while ensuring that the system can perform minimal updates as needed.

[0057] S20. Generate, based on the BIOS update mode, a communication instruction, a first computer control instruction, and a first execution sequence instruction, wherein the communication instruction is used to control the MCU to enter an ME standby shutdown state and / or a BIOS write-protect state; the first computer control instruction is used to control the computer to shut down and automatically run a system application when the computer is next started; and the first execution sequence instruction is used to determine the execution order of the communication instruction and the first computer control instruction;

[0058] In this embodiment, it is implemented through a communication protocol between the application and the MCU. The communication instruction is used to instruct the MCU to enter the ME to be shut down state or to turn off the BIOS write protection state, which is to ensure that the write operation can be carried out smoothly during the update process. The first computer control instruction is used to control the shutdown of the system and automatically run the application when it is turned on next time. This ensures that the update operation is carried out in a safe state and avoids the risk of data loss or system crash. The execution sequence instruction is used to determine the execution order of the communication instruction and the shutdown instruction to ensure that all operations are completed according to the specified timing. This design improves the reliability and accuracy of the operation and avoids the conflict problems that may be caused by simultaneous execution. A practical example is that when the system is updating the BIOS, the ME must be turned off first to avoid conflicts with the BIOS write protection.

[0059] S30: If it is detected that the computer is powered off, first status information of the MCU is obtained, and a status control instruction, a second computer control instruction, and a second execution sequence instruction are generated based on the first status information, wherein the second computer control instruction is used to control the computer to power on, the status control instruction is used to control the ME to be in a power-off state, and / or to disable the BIOS write protection state during a power-on self-test process when controlling the computer to power on, and the second execution sequence instruction is used to determine the execution order of the status control instruction and the second computer control instruction;

[0060] In this embodiment, this is achieved through the internal status detection module of the MCU and the power management module of the system. When the system detects that the system has been shut down, the MCU will read the current hardware status through its status detection module, especially the status information related to the ME and BIOS. Based on this status information, the system generates corresponding control instructions to ensure that the ME is shut down, or disable the write protection function of the BIOS when necessary. At the same time, the second computer control instruction will instruct the computer to restart in order to continue the update operation. The execution sequence instructions ensure that operations such as shutdown, status detection, and startup are performed according to the predetermined time sequence, avoiding errors caused by simultaneous execution. For example, after shutdown, the system must first ensure that the ME is shut down before executing the BIOS write protection to ensure the safety of the update operation.

[0061] S40. Based on the first computer control instruction and the first execution sequence instruction, automatically run the system application, obtain the second status information of the ME and / or BIOS, and control the system application to call the corresponding upgrade tool to perform the corresponding upgrade operation according to the second status information.

[0062] In this embodiment, this is achieved through an application that automatically runs after the system is powered on. Based on the ME and BIOS status information obtained after power-on, the application automatically determines whether the upgrade operation needs to continue. The system uses the second status information to confirm whether the ME has been successfully shut down or whether the BIOS write-protection status has been removed. If these conditions are met, the application automatically invokes the corresponding upgrade tool to perform the BIOS or ME update operation. This design ensures a fully automated upgrade process, reducing the possibility of manual intervention and the risk of operational errors. For example, if the BIOS write-protection status is detected as off, the system automatically launches the BIOS upgrade tool to complete the firmware update, eliminating the need for manual user intervention.

[0063] That is, the user runs the system application and sets the BIOS update mode through the menu. The system application communicates with the MCU through the communication interface, causing the MCU to enter the ME shutdown or BIOS write protection state. The system application then automatically shuts down the computer and sets it to run automatically the next time it is turned on.

[0064] MCU detects that the computer enters the shutdown state through the computer state detection module, puts the ME into the closed state through the ME state control module, then controls the computer to start through the computer startup control module, and realizes the ME closing. In the POST process, the MCU communicates with the computer to make the computer close the BIOS, and realizes the BIOS write protection closing. The MCU records the current ME closing or BIOS write protection closing state, and indicates the corresponding state through the state indication module. After the computer successfully enters the operating system, the system application program is automatically started, the system application program communicates with the MCU, detects the ME closing or BIOS write protection closing state, and automatically calls the tool to upgrade the BIOS or ME.

[0065] In summary, by obtaining the BIOS update mode in the system application program, the communication instruction and the computer control instruction are generated according to different update requirements, the MCU is instructed to automatically enter the ME closing state and / or the BIOS write protection state. Subsequently, the system automatically controls the computer to shut down, and sets the system application program to automatically run at the next startup without manual intervention. When the system detects that the computer is shut down, the current state information of the ME and the BIOS is obtained through the MCU, and the corresponding control instruction is automatically generated to ensure that the ME and the BIOS write protection are closed during the power-on self-test process. The system then controls the computer to restart, automatically calls the upgrade tool, and completes the BIOS or ME upgrade operation according to the real-time state information;

[0066] The complex operation of the user needing to disassemble the case and manually set the hardware to close the ME in the traditional method is avoided, and all the ME closing and BIOS write protection closing operations are automatically completed by the MCU and the system, greatly simplifying the update process. At the same time, the system can independently judge the state of the ME and the BIOS and perform the corresponding upgrade operation, reducing the dependence on the user's professional knowledge, avoiding the risk in manual operation, reducing the need for factory repair, and ultimately improving the convenience and safety of operation, reducing maintenance cost and time consumption.

[0067] Specifically, as shown in Figure 2 The computer is provided with a PWRLED lamp, which is used to obtain key information to perform corresponding indication operations, wherein the step of obtaining key information to perform corresponding indication operations comprises:

[0068] S501, determine the current brightness state of the PWRLED lamp;

[0069] In this embodiment, this is achieved by the system monitoring the current and voltage signals of the PWR LED in real time. The brightness of the PWR LED reflects the current system status, such as whether the system is performing an upgrade or whether the upgrade has been completed. The MCU determines the system's current state based on the brightness changes, ensuring timely feedback to the user. For example, when the system is operating normally, the PWR LED may be permanently on. However, when the system enters BIOS or ME upgrade mode, the brightness of the light may change, becoming brighter or beginning to flash, to inform the user of the current operating status.

[0070] S502: Acquire key information in real time, where the key information at least includes the second status information and upgrade operation information after the corresponding upgrade operation is completed.

[0071] In this embodiment, this is achieved through communication between the MCU and the system application. When the system is performing a BIOS or ME upgrade, the MCU will continuously obtain real-time status information of the upgrade from the application. This key information includes secondary status information, such as whether the BIOS write protection has been successfully disabled, whether the ME has been shut down, etc., as well as status feedback after the upgrade operation is completed. This information is crucial for the subsequent operation of the system and can ensure that each operation step can be carried out smoothly. For example, if the system detects that the ME has been successfully shut down, the MCU will continue to execute the BIOS upgrade. If it detects that the upgrade operation has been successfully completed, the system will accordingly end the current task and indicate this through the PWR LED light.

[0072] S503, determining indication parameters according to the key instruction, wherein the indication parameters include a flicker frequency parameter, a flicker brightness parameter, and a brightness cycle parameter;

[0073] In this embodiment, this is achieved by the MCU parsing instructions received from the system application. Indicator parameters determine the specific behavior of the PWR LED. For example, the flashing frequency indicates the current operating mode, the flashing brightness reflects the system priority, and the brightness cycle parameter controls the periodicity of the light changes. By combining these parameters, the MCU can generate corresponding control signals based on the current system status and operational requirements, ensuring that the PWR LED provides accurate feedback to the user. For example, when the system enters upgrade mode, the PWR LED may flash at a high frequency to indicate that an important operation is in progress. After the upgrade is complete, the light may return to a low-frequency flashing state or remain on.

[0074] S504: Determine the interference point of the PWRLED lamp according to the current brightness state, and select the corresponding key parameters from the indication parameters based on the interference point;

[0075] In this embodiment, the MCU performs real-time analysis of the current brightness signal. Interference points refer to the critical brightness values ​​or abnormal brightness characteristics of the PWRLED lamp under different operating conditions. By detecting these interference points, the MCU can determine whether the current system is in a normal state or an abnormal situation has occurred. Based on these interference points, the MCU will filter out the key parameters suitable for the current situation from the indication parameters. For example, when it detects a sudden drop in the brightness of the light or an abnormal flashing frequency, the MCU will automatically adjust the relevant parameters to ensure the accuracy of the indication operation. For example, during a system update, if the brightness of the light does not match expectations, it may indicate a system failure. The MCU will adjust the operation or issue an alarm based on this information.

[0076] S505: Execute corresponding instruction operations according to the key parameters.

[0077] In this embodiment, the switching and brightness changes of the PWRLED lamp are controlled by the MCU. Depending on the current operating status of the system, the MCU will perform different operations according to pre-set indication parameters, such as adjusting the flashing frequency, brightness or on-off cycle of the PWRLED lamp, so as to feedback the system status information to the user. These indication operations may include a constant light mode under normal conditions, a fast flashing mode during an upgrade operation, or a frequent flashing mode under a fault condition. Through these intuitive light feedbacks, the user can quickly judge the current status of the system and make corresponding operational decisions. For example, when the upgrade operation is completed, the PWRLED lamp will quickly switch from the initial high-frequency flashing mode to the low-frequency flashing mode due to the interference point, promptly reminding the user that the upgrade has been successful and the system is in a safe state.

[0078] This notifies the MCU to flash its indicator light rapidly, indicating that the BIOS update is in progress. Once the BIOS update is complete, the system application notifies the MCU that the update is complete. It also prompts the user to shut down the computer, remove the power cord, and then reconnect it. The update is complete after restarting the computer.

[0079] The existing PWR LED needs to be reused to indicate various states. For example, when the ME is turned off or the BIOS is write-protected, the PWR LED flashes at 1 Hz; when the BIOS is being updated, the PWR LED flashes at 3 Hz; and in normal state, the PWR LED is always on.

[0080] In summary, by configuring the PWRLED on a computer to obtain key information and perform indication operations, simple visual feedback provides users with real-time information on system status, improving their understanding of system operation. Based on the brightness status and key information, the PWRLED's indication parameters (such as flashing frequency and brightness) can be precisely controlled, improving the accuracy of indication information and the real-time nature of system feedback. Selecting key parameters based on interference points reduces unnecessary errors, thereby improving the stability and reliability of indication operations.

[0081] Specifically, if Figure 3 As shown, the step of controlling the system application to call the corresponding upgrade tool to perform the corresponding upgrade operation according to the second status information includes:

[0082] S401. Determine whether the ME is shut down and whether the BIOS write protection state is shut down according to the second status information.

[0083] In this embodiment, this is achieved through communication between the MCU and the system application. The system determines whether the ME has been successfully shut down by checking the relevant registers or status signals of the ME. At the same time, the determination of the BIOS write protection status is completed by reading the BIOS control register. After the system obtains these two pieces of status information, it can further determine whether the upgrade operation can be performed safely. The technical effect of this step is that it ensures that the write protection status of the ME and BIOS is turned off, thereby avoiding the upgrade when the status is not fully prepared and reducing the possibility of errors. For example, before performing an upgrade, the system will first ensure that the BIOS write protection is turned off. Otherwise, the new BIOS data cannot be written during the upgrade process, resulting in upgrade failure.

[0084] S402: If it is detected that the ME is shut down, the previous version of the ME is stored, and the ME upgrade tool is called to perform the ME upgrade operation, and first fault detection information during the ME upgrade operation is monitored in real time. Based on the priority of the first fault detection information, it is determined whether to interrupt the upgrade operation and restore the previous version of the ME;

[0085] In this embodiment, the system automatically completes the process. When the ME is detected to have been closed, the system first backs up the current ME firmware version to prevent the system from failing to recover to a stable version in the event of an upgrade failure. Subsequently, the system calls a dedicated ME upgrade tool to begin updating the ME firmware. During the upgrade process, the system monitors the running state of the ME upgrade tool in real time, and in particular, the fault detection module monitors for possible errors. Each fault is assigned a priority, and the system determines whether to immediately interrupt the operation and restore the previously backed up ME version according to the severity of the fault. The advantage of this design is that even if a fault occurs during the upgrade process, the system can take timely remedial measures to prevent irreversible damage to the ME. For example, if it is detected that the upgrade tool is unresponsive or that the ME firmware is damaged, the system automatically aborts the upgrade and restores to the safe backup version, ensuring stable operation of the system.

[0086] S403, if it is detected that the BIOS write protection state has been closed, storing a previous version of the BIOS and calling a BIOS upgrade tool to perform a BIOS upgrade operation, monitoring second fault detection information in the BIOS upgrade operation in real time, and determining whether to interrupt the upgrade operation and restore the previous version of the BIOS according to a priority of the second fault detection information.

[0087] In this embodiment, the BIOS upgrade process is automatically managed. After the system confirms that the BIOS write protection has been removed, the system first saves the current BIOS version to ensure that the system can be quickly restored in the event of a problem. Then, the system starts the BIOS upgrade tool and monitors its running state in real time. During this process, the fault detection information is an important part of the system monitoring. If an abnormal situation (such as a write failure, BIOS damage, etc.) is detected during the BIOS upgrade process, the system automatically determines whether to abort the operation and restore the backed up BIOS version according to the priority of the fault. This process ensures that the system can be rolled back in a timely manner when a serious problem is encountered, thereby avoiding a situation in which the system cannot be started.

[0088] In summary, by determining whether the ME is closed and whether the BIOS write protection state is closed according to the second state information, it can be ensured that the system is in an upgradable state before upgrading, thereby improving the success rate of the upgrade operation. By detecting the closed state of the ME and the BIOS, a corresponding fault detection mechanism can be implemented during the upgrade process, and the operation can be interrupted and the previous version can be restored according to the fault information, thereby improving the fault tolerance and security of the system and avoiding damage to the system due to an upgrade failure.

[0089] Specifically, as Figure 4-5As shown, a fully automatic BIOS upgrade circuit on an Intel platform computer includes an MCU module, a communication module, a computer startup control module, a computer status detection module, and an ME status control module. The data transmission end of the MCU module is connected to the data transmission end of the communication module, the data transmission end of the communication module is connected to the data transmission end of the computer, the signal acquisition end of the computer status detection module is connected to the power signal output end of the power supply, the signal output end of the computer status detection module is connected to the signal input end of the MCU module, the first signal output end of the MCU module is connected to the signal input end of the computer startup control module, the signal output end of the computer startup control module is connected to the computer, the second signal output end of the MCU module is connected to the signal input end of the ME status control module, and the signal output end of the ME status control module is connected to the ME Strap circuit of the chipset for disabling or enabling the ME. The MCU communicates with the computer through the communication module, and the BIOS program opens or closes the BIOS write protection register.

[0090] In this embodiment, the MCU module serves as the main control unit, responsible for managing the entire system's status and update process. The communication module acts as a bridge between the MCU and the computer's internal registers. Through the communication module, the MCU can exchange data with the computer's internal registers, transmitting status information and control instructions. This communication module communicates with the computer's internal registers via the computer's data bus, typically using protocols such as I2C or SMBUS. This allows the communication module to read the computer's internal register status, obtain the current BIOS write protection setting, and the operating status of the ME. Through this connection, the communication module can transmit instructions issued by the MCU to the computer and relay status information from the computer back to the MCU. This connection ensures that the system can monitor and control the computer's key hardware status, enabling it to disable BIOS write protection or the ME when necessary. The computer status detection module is responsible for monitoring the computer's power supply status, particularly the power on / off signals. By monitoring the high and low level signals of the power supply, the status detection module can determine whether the computer is on or off. If the computer is detected to be off, the status detection module transmits this information to the MCU, which then issues appropriate instructions to control the computer's startup or continue the update process. The status detection module transmits the detected power supply status to the MCU via a signal output terminal. After receiving this signal, the MCU module determines whether to disable ME or BIOS write protection based on the current system state and pre-set execution logic, and issues corresponding control instructions. This connection ensures that the MCU can monitor the computer's power status in real time, enabling it to initiate or terminate relevant operational processes as needed. For example, if the MCU detects that the computer has been shut down, it can immediately initiate ME shutdown operations to ensure a smooth BIOS or ME update the next time the computer is turned on. The MCU controls the computer's power on and off via the first signal output terminal. When the MCU determines that the computer needs to be restarted to continue the update process, it sends a control signal via this output terminal, instructing the power-on control module to restart the computer. This connection ensures that the MCU fully controls the computer's power supply throughout the update process, especially when the ME and BIOS states require adjustment, where a restart is crucial. For example, if BIOS write protection has been disabled, the MCU will restart the computer through the power-on control module to ensure a smooth update process. The power-on control module is responsible for converting the power-on signal from the MCU into actual power-on and power-off operations, directly controlling the computer's power-on and power-off status. This signal output is connected to the computer's power supply system, allowing the system to automatically power on and off the computer based on signals from the MCU, without requiring manual user intervention. This design simplifies the BIOS and ME update process, ensuring that the system can automatically complete multiple reboots during the update process and continue executing the update instructions after each reboot.For example, after the ME is successfully closed, the MCU starts the computer through the module to enter the BIOS update process, and sends a control instruction to the ME state control module through the signal output end, which is used to close or enable the ME. The ME state control module executes specific control operations by receiving signals from the MCU, such as closing the ME before BIOS update to ensure that the ME does not interfere with the update operation. This connection relationship ensures that the MCU can directly control the ME to be closed through hardware, rather than relying on complex software commands, thereby greatly improving the reliability and timeliness of the operation. For example, before the update starts, the MCU will issue an instruction to close the ME to ensure that the ME is in a non-interference state, and then the BIOS write protection will be released and the update operation will be performed. The MCU sends an instruction to the computer register through the communication module to modify the BIOS write protection state. When the BIOS is in the write protection state, the system cannot write new BIOS data, therefore, the MCU needs to send an instruction to the register through the communication module to release this protection function. After the write protection is released, the MCU can instruct the system to update the BIOS. Through this design, the MCU can automatically close the write protection without the need for the user to manually enter the BIOS setting interface, simplifying the complexity of BIOS update and improving the degree of automation of the operation.

[0091] In summary, through the design of the ME state control module, including MOS tubes Q4, Q6 and voltage acquisition network, the voltage state of the ME can be monitored in real time, and the state of the ME can be controlled through the conduction or shutdown of MOS tube Q6, thereby improving the detection accuracy and control ability of the ME closed state. Through the combination of the voltage acquisition network and the MCU module, the state change of the ME can be quickly responded, thereby improving the feedback speed of the system.

[0092] Specifically, as shown in Figure 6 the ME state control module includes MOS tube Q4, MOS tube Q6 and voltage acquisition network, the power input end of the voltage acquisition network is connected with the power supply, the power output end of the voltage acquisition network is connected with the first conduction end of the MOS tube Q6, the second conduction end of the MOS tube Q6 is grounded, the controlled end of the MOS tube Q6 is connected with the second signal output end of the MCU module, the first conduction end of the MOS tube Q4 is connected with the power supply, the second conduction end of the MOS tube Q4 is connected with the ME Strap circuit of the chip set, and the controlled end of the MOS tube Q4 is connected with the power signal output end of the voltage acquisition network.

[0093] In this embodiment, the ME (Management Engine) is started and stopped through MOSFET switching. A voltage acquisition network monitors the power supply voltage and provides a reference signal to the control circuit, enabling the MCU to accurately control the ME's state. Specifically, MOSFETs Q4 and Q6 are responsible for controlling the ME's start and stop, respectively, while the voltage acquisition network ensures the stability of the control signal. This design allows precise hardware-level control of ME startup and shutdown, preventing ME startup or shutdown at inappropriate times, ensuring system update stability, and enabling the acquisition network to acquire power supply voltage signals in real time. The voltage acquisition network collects the power supply voltage to provide a reference voltage for turning the MOSFET on and off. The voltage acquisition network controls the conduction state of MOSFET Q6. The power supply voltage signal collected by the voltage acquisition network is transmitted through its output terminal to the first conducting terminal of MOSFET Q6, ensuring that Q6 is correctly turned on or off based on the current power supply state. This connection ensures that the ME state control module executes startup and shutdown operations under the correct power supply conditions, preventing erroneous triggering of ME state changes due to unstable power supply conditions. For example, when the voltage acquisition network detects that the power supply voltage is stable, MOS transistor Q6 turns on or off as instructed, thereby controlling the ME state. The MCU directly controls Q6's on / off state through its signal output. The MCU monitors and communicates with the computer to obtain status information and sends signals to control the ME's start and stop as needed. This control logic ensures that the MCU can precisely control the ME's state based on current system requirements. For example, it can shut down the ME before a BIOS update to ensure the update process is not disrupted. When the MCU issues a shutdown command for the ME, the signal reaches the controlled terminal of MOS transistor Q6 through this connection, turning Q6 on or off, thereby shutting down the ME. The voltage acquisition network provides a reference voltage for Q4's conduction state. The voltage acquisition network uses the collected power supply signal to provide a stable control voltage to Q4's controlled terminal, ensuring that Q4 can turn on or off under appropriate voltage conditions. This design ensures that Q4 can effectively control the ME's state under stable voltage conditions and prevents malfunction of the ME during power supply voltage fluctuations.

[0094] In summary, the design of the ME state control module, including MOS transistors Q4 and Q6 and the voltage acquisition network, enables real-time monitoring of the ME's voltage state and controls the ME's state by turning MOS transistor Q6 on or off, thereby improving the detection accuracy and control capability of the ME's shutdown state. The combination of the voltage acquisition network and the MCU module ensures a rapid response to ME state changes, thereby improving the system's feedback speed.

[0095] Specifically, if Figure 6As shown, the voltage acquisition network includes a resistor R27 and a resistor R29. The first end of the resistor R27 is connected to the power supply, the second end of the resistor R27 is connected to the first end of the resistor R29, the second end of the resistor R29 is connected to the first conduction end of the MOS transistor Q6, and the common node between the second end of the resistor R27 and the first end of the resistor R29 is connected to the controlled end of the MOS transistor Q4.

[0096] In this embodiment, voltage signal acquisition and processing are achieved through the principle of resistor voltage division. The first end of resistor R27 is connected to the power supply to obtain a stable voltage signal from the power supply, while the connection between R29 and R27 forms a voltage divider network. This network is designed to accurately sample the voltage by rationally distributing the resistor values. The voltage signal is then transmitted to the control terminal of the corresponding MOS transistor to control its on / off state. The common node provides a stable control voltage signal to Q4 through the voltage divider network. The voltage signal at this common node, the result of the resistor voltage division process, provides sufficient voltage to the controlled terminal of Q4 to control its on / off state. When the voltage at this common node reaches a certain threshold, the controlled terminal of Q4 receives the on / off signal, thereby controlling the start / stop state of the ME. This connection ensures that the control of Q4 and Q6 is synchronized and controlled by the stable signal from the voltage acquisition network, making the control of the ME more precise and stable. Through this design, the voltage acquisition network can flexibly adjust the control of Q4 and Q6 according to the voltage fluctuation of the power supply, thereby ensuring that the system can work normally under different power supply states and will not cause ME to malfunction or lose control due to voltage fluctuations.

[0097] In summary, the design of resistors R27 and R29 in the voltage acquisition network enables stable acquisition of the ME state voltage signal, thereby improving the accuracy of ME off state detection. The combination of the controlled terminal of MOS transistor Q4 and the voltage acquisition network ensures that the voltage change when the ME is off can be accurately captured, thereby improving the stability and reliability of the circuit.

[0098] Specifically, if Figure 7 As shown, the computer status detection circuit includes a MOS transistor Q5 and a resistor R28. The first conducting end of the MOS transistor Q5 is connected to the first end of the resistor R28, the second end of the resistor R28 is connected to the power supply, the common node between the second end of the resistor R28 and the power supply is connected to the signal input end of the MCU module, and the controlled end of the MOS transistor Q5 is connected to the power signal output end of the power supply.

[0099] In this embodiment, the core logic uses the synergistic effect of MOS transistors and resistors to monitor the computer's power status in real time and provide feedback to the MCU module. The first conducting end of MOS transistor Q5 is connected to the first end of resistor R28, ensuring that when Q5 is conducting, current can flow through R28 to the power supply, forming a complete current loop. This connection allows current changes when the computer is in a specific state (such as power on or off) to be reflected by the MOS transistor's conduction or shutdown, thereby controlling the current signal in the circuit. The second end of resistor R28 is connected to the power supply, ensuring power supply stability in the current loop and providing appropriate control voltage for subsequent circuits through resistor voltage division. This connection not only stabilizes the current in the circuit but also ensures accurate voltage feedback to subsequent circuit components. The common node between the second end of resistor R28 and the power supply is connected to the signal input of the MCU module, ensuring that when MOS transistor Q5 is conducting, the voltage signal divided by resistor R28 can be received by the MCU module. The MCU determines the current power state of the computer by detecting the high and low levels of this signal, thereby triggering corresponding operations, such as starting the update process or entering standby mode. The controlled end of MOS tube Q5 is connected to the power signal output end, which means that the on and off of Q5 is directly controlled by the power status signal. When the power signal changes, the on state of Q5 will also change accordingly, thereby controlling the operating state of the entire circuit. The purpose of this design is to ensure that the system can accurately detect the power switch status of the computer and perform corresponding processing operations through the MCU. For example, when it is detected that the computer is shut down, the MCU can initiate a system restart operation through this circuit to continue the BIOS or ME update operation.

[0100] In summary, the design of MOS transistor Q5 and resistor R28 in the computer status detection circuit effectively detects the computer's on / off state and feeds back voltage changes to the MCU, thereby improving the system's detection accuracy. The connection between the MCU and the computer status detection circuit ensures that the MCU can respond promptly to the computer's on / off state, thereby improving the system's response speed and operational accuracy.

[0101] Specifically, if Figure 8 As shown, the computer switch control module includes a MOS transistor Q1 and a resistor R1. The first conducting end of the MOS transistor Q1 is connected to the first end of the resistor R1, the second end of the resistor R1 is connected to the power supply, the common node between the second end of the resistor R1 and the power supply is connected to the computer power-on signal control circuit, and the controlled end of the MOS transistor Q1 is connected to the first signal output end of the MCU module.

[0102] In this embodiment, the combination of MOS transistor Q1 and resistor R1 effectively controls the computer's power supply. The first conducting terminal of MOS transistor Q1 is connected to the first terminal of resistor R1. When Q1 is conducting, current flows through resistor R1 to the power supply, forming a stable current loop. This connection ensures that when the system needs to control the computer's power on / off operation, the current flow can be used to start or shut down the computer. The second terminal of resistor R1 is connected to the power supply, ensuring that the entire control circuit receives a stable current supply from the power supply, ensuring the reliability and stability of the switching operation. Furthermore, the common node between the second terminal of resistor R1 and the power supply is connected to the computer. This connection ensures that when MOS transistor Q1 is conducting, current is transferred through this node to the computer's power control terminal, thereby turning the computer on and off. The controlled terminal of MOS transistor Q1 is connected to the first signal output terminal of the MCU module, indicating that the MCU controls the conduction and shutdown of Q1 by outputting a control signal. When the MCU detects that the system needs to be restarted or shut down, it issues a command through the signal output terminal to control the conduction or shutdown of Q1, thereby controlling the computer's power state. This design logic ensures that the MCU can precisely control the computer's power on / off state through Q1, eliminating the need for manual user intervention. For example, after a BIOS or ME update is complete, the MCU can shut down the computer by controlling Q1 to turn it off, or turn it on to restart the computer when a reboot is required. This fully automates the entire BIOS or ME update process, eliminating manual intervention and improving the efficiency and reliability of the update operation.

[0103] In summary, the design of the computer switch control module, including MOS transistor Q1 and resistor R1, enables the MCU to precisely control the computer power supply. The controlled terminal of MOS transistor Q1 is connected to the first signal output terminal of the MCU module. When the MCU sends a signal, MOS transistor Q1 turns on, and current flows through R1, thereby controlling the computer power supply.

[0104] Specifically, if Figure 10As shown, the communication module includes a dual N-channel MOS transistor Q3, a resistor R19, and a resistor R20. A first end of the resistor R19 is connected to a power supply, and a second end of the resistor R19 is connected to the first controlled end of the dual N-channel MOS transistor Q3. A first end of the resistor R20 is connected to a power supply, and a second end of the resistor R20 is connected to the second controlled end of the dual N-channel MOS transistor Q3. A first conductive end of the dual N-channel MOS transistor Q3 is connected to a clock line for SMBUS communication, a second conductive end of the dual N-channel MOS transistor Q3 is connected to a first data communication port of the MCU module, a third conductive end of the dual N-channel MOS transistor Q3 is connected to a data line for SMBUS communication, and a fourth conductive end of the dual N-channel MOS transistor Q3 is connected to a second data communication port of the MCU module.

[0105] In this embodiment, the design logic utilizes two sets of MOS transistors and resistors to achieve bidirectional communication control of data and clock signals. The first end of resistor R19 is connected to the power supply, ensuring a stable voltage supply. This resistor, through R19, provides a control voltage to the first controlled terminal of Q3. This resistor, connected to the first controlled terminal of the dual N-channel MOS transistor Q3, controls Q3's conduction state at a specific voltage. Similarly, the first end of resistor R20 is connected to the power supply, providing a voltage to the second controlled terminal of Q3. These two resistors control Q3's two controlled terminals, enabling them to be turned on or off based on varying input voltage conditions. The first conductive terminal of MOS transistor Q3 is connected to the SMBUS clock line, ensuring that when Q3 is on, the clock signal can be transmitted to the system through Q3. This design ensures that the system can synchronously receive and transmit clock signals for coordinated communication operations. The second conductive terminal of Q3 is connected to the first data communication port of the MCU, ensuring that the MCU can receive the clock signal from the SMBUS through this conductive terminal and respond as needed. Similarly, Q3's third conductive end is connected to the SMBUS communication data line, ensuring that when Q3 is turned on, data signals can be transmitted between the SMBUS and the MCU. Q3's fourth conductive end is connected to the MCU's second data communication port, further ensuring that the MCU can exchange data with external systems through this channel, forming a bidirectional communication link. This design allows the dual N-channel MOS transistor Q3 to accurately turn on or off the clock and data signals upon receiving control signals, enabling effective SMBUS communication between the MCU and the computer. For example, when the MCU needs to obtain the BIOS write-protect status or send a command to shut down the ME, the communication module completes the data transmission via the SMBUS clock and data lines, achieving bidirectional status control and information exchange. This design enables the entire system to maintain stable communication in different states, ensuring accurate and synchronized operation.

[0106] In summary, the design of the dual N-channel MOS transistor Q3 and resistors R19 and R20 in the communication module enables independent control of the SMBUS communication clock and data lines, thereby improving the stability and communication efficiency of the communication module. The dual N-channel MOS transistor design reduces power consumption while maintaining efficient communication, thereby improving the overall energy efficiency and reliability of the system.

[0107] Specifically, if Figure 9 As shown, the circuit for fully automatically upgrading the BIOS on an Intel platform computer further includes a status indication module, which includes a MOS transistor Q2, a resistor R7, and an indicator light. The first conducting end of the MOS transistor Q2 is connected to the first end of the resistor R7, the second end of the resistor R7 is connected to a power supply, a common node between the second end of the resistor R7 and the power supply is connected to the indicator light, and the controlled end of the MOS transistor Q2 is connected to the third signal output end of the MCU module.

[0108] In this embodiment, the design logic relies on controlling the indicator light's state through a combination of a MOS transistor and a resistor, thereby providing user feedback on the system's current status. The first conducting terminal of MOS transistor Q2 is connected to the first terminal of resistor R7. This connection ensures that when Q2 is conducting, current can flow through resistor R7 to the power supply, forming a complete current loop. Resistor R7 limits the current flowing through the indicator light, ensuring that it operates within the appropriate current range and preventing damage from excessive current. The second terminal of resistor R7 is connected to the power supply, ensuring a stable power supply when the indicator light is on. This design provides the energy source required by the circuit and, through the resistor, limits the current, thereby controlling the indicator light's brightness. The common node between the second terminal of resistor R7 and the power supply is connected to the indicator light. This ensures that when current flows through R7, the indicator light illuminates when Q2 is conducting, providing visual feedback to the user and indicating the system's status. The controlled terminal of MOS transistor Q2 is connected to the third signal output terminal of the MCU module. This connection ensures that the MCU can control the on and off of Q2 according to system operational requirements. When the MCU detects that the system is in a specific state (such as BIOS update completion, ME shutdown, etc.), it sends a signal through the third signal output terminal to control Q2 to conduct, causing the indicator to illuminate, thereby providing real-time status feedback to the user. This design ensures that the indicator operation is synchronized with the system status, not only improving the user's perception of system operation but also ensuring transparency of the system's runtime status. For example, when the MCU detects that an update operation is in progress, Q2 turns on, and the indicator begins to flash to notify the user that the system is performing the upgrade. When the upgrade is complete, the MCU can control the indicator to return to a steady state or turn off. With this design, the entire status indicator system can reflect the system's operating status in real time, helping users understand whether the current operation has been successfully completed and avoiding the trouble of manually checking the system status.

[0109] In summary, the design of the status indicator module enables visual feedback of system status through MOS transistor Q2, resistor R7, and the indicator light. When the MCU's third signal output terminal outputs a signal, the controlled terminal of MOS transistor Q2 conducts, and the indicator light illuminates, intuitively displaying the current system status changes to the user. This simple and reliable circuit structure effectively reflects the system's operating status or important information during the upgrade process, thereby improving the user's perception of system status. Furthermore, the design of resistor R7 ensures current stability in the indicator circuit, preventing overcurrent from damaging the indicator light or affecting the normal operation of other system modules, thereby improving system reliability and durability.

[0110] Those skilled in the art will clearly understand that for the sake of convenience and brevity of description, only the division of the above-mentioned functional units and modules is used as an example. In actual applications, the above-mentioned functions can be distributed and completed by different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above.

[0111] The above-described embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present application, and should all be included in the scope of protection of the present application.

Claims

1. A method for fully automatic BIOS upgrade on an Intel platform computer, characterized in that: The method for fully automatically upgrading BIOS on an Intel platform computer comprises: Get the BIOS update mode in the system application; Generate, according to the BIOS update mode, a communication instruction, a first computer control instruction, and a first execution sequence instruction, wherein the communication instruction is used to control the MCU to enter an ME standby shutdown state and / or a BIOS write-protected state, the first computer control instruction is used to control the computer to shut down and automatically run a system application when the computer is next started, and the first execution sequence instruction is used to determine the execution order of the communication instruction and the first computer control instruction; If it is detected that the computer is powered off, first status information of the MCU is obtained, and a status control instruction, a second computer control instruction, and a second execution sequence instruction are generated according to the first status information, wherein the second computer control instruction is used to control the computer to power on, the status control instruction is used to control the ME to be in a power-off state, and / or to disable the BIOS write protection state during a power-on self-test process when controlling the computer to power on, and the second execution sequence instruction is used to determine the execution order of the steps of the status control instruction and the second computer control instruction; Based on the first computer control instruction and the first execution sequence instruction, the system application is automatically run to obtain the second status information of the ME and / or BIOS. According to the second status information, the system application calls the corresponding upgrade tool to perform the corresponding upgrade operation.

2. The method for fully automatically upgrading BIOS on an Intel platform computer according to claim 1, wherein: The computer is provided with a PWRLED light, which is used to obtain key information to perform corresponding instruction operations, wherein the step of obtaining key information to perform corresponding instruction operations includes: Determine the current brightness status of the PWRLED light; Acquire key information in real time, the key information including at least the second status information and upgrade operation information after completing the corresponding upgrade operation; Determine indication parameters according to the key instruction, wherein the indication parameters include a flicker frequency parameter, a flicker brightness parameter, and a brightness cycle parameter; According to the current brightness state, determine the interference point of the PWRLED lamp, and filter out the corresponding key parameters from the indication parameters based on the interference point; According to the key parameters, corresponding indicated operations are performed.

3. The method for fully automatically upgrading BIOS on an Intel platform computer according to claim 1, wherein: The step of controlling the system application to call a corresponding upgrade tool to perform a corresponding upgrade operation according to the second status information includes: Determining, based on the second status information, whether the ME has been shut down and whether the BIOS write protection state has been shut down; If it is detected that the ME is shut down, the previous version of the ME is stored, and the ME upgrade tool is called to perform the ME upgrade operation, the first fault detection information during the ME upgrade operation is monitored in real time, and according to the priority of the first fault detection information, it is determined whether to interrupt the upgrade operation and restore the previous version of the ME; If it is detected that the BIOS write protection status is turned off, the previous BIOS version is stored, and the BIOS upgrade tool is called to perform the BIOS upgrade operation. The second fault detection information in the BIOS upgrade operation is monitored in real time. According to the priority of the second fault detection information, it is determined whether to interrupt the upgrade operation and restore the previous BIOS version.

4. A fully automatic BIOS upgrade circuit on an Intel platform computer, characterized in that: The invention comprises an MCU module, a communication module, a computer startup control module, a computer status detection module and an ME status control module. The data transmission end of the MCU module is connected to the data transmission end of the communication module, the data transmission end of the communication module is connected to the data transmission end of the computer, the signal acquisition end of the computer status detection module is connected to the power signal output end of the power supply, the signal output end of the computer status detection module is connected to the signal input end of the MCU module, the first signal output end of the MCU module is connected to the signal input end of the computer startup control module, the signal output end of the computer startup control module is connected to the computer, the second signal output end of the MCU module is connected to the signal input end of the ME status control module, the signal output end of the ME status control module is connected to the ME Strap circuit of the chipset for shutting down or enabling the ME, the MCU communicates with the computer through the communication module, and the BIOS program turns on or off the write protection register of the BIOS.

5. The circuit for fully automatically upgrading BIOS on an Intel platform computer according to claim 4, characterized in that: The ME state control module includes a MOS transistor Q4, a MOS transistor Q6, and a voltage acquisition network. The power input end of the voltage acquisition network is connected to the power supply, the power output end of the voltage acquisition network is connected to the first conductive end of the MOS transistor Q6, the second conductive end of the MOS transistor Q6 is grounded, the controlled end of the MOS transistor Q6 is connected to the second signal output end of the MCU module, the first conductive end of the MOS transistor Q4 is connected to the power supply, the second conductive end of the MOS transistor Q4 is connected to the MEStrap circuit of the chipset, and the controlled end of the MOS transistor Q4 is connected to the power signal output end of the voltage acquisition network.

6. The circuit for fully automatically upgrading BIOS on an Intel platform computer according to claim 5, characterized in that: The voltage acquisition network includes a resistor R27 and a resistor R29. A first end of the resistor R27 is connected to a power supply, a second end of the resistor R27 is connected to a first end of the resistor R29, a second end of the resistor R29 is connected to the first conduction end of the MOS transistor Q6, and a common node between the second end of the resistor R27 and the first end of the resistor R29 is connected to the controlled end of the MOS transistor Q4.

7. The circuit for fully automatically upgrading BIOS on an Intel platform computer according to claim 4, characterized in that: The computer status detection module includes a MOS transistor Q5 and a resistor R28. The first conductive end of the MOS transistor Q5 is connected to the first end of the resistor R28, the second end of the resistor R28 is connected to the power supply, the common node between the second end of the resistor R28 and the power supply is connected to the signal input end of the MCU module, and the controlled end of the MOS transistor Q5 is connected to the power signal output end of the power supply.

8. The circuit for fully automatically upgrading BIOS on an Intel platform computer according to claim 4, wherein: The computer switch control module includes a MOS transistor Q1 and a resistor R1. The first conducting end of the MOS transistor Q1 is connected to the first end of the resistor R1, the second end of the resistor R1 is connected to the power supply, the common node between the second end of the resistor R1 and the power supply is connected to the computer power-on signal control circuit, and the controlled end of the MOS transistor Q1 is connected to the first signal output end of the MCU module.

9. The circuit for fully automatically upgrading BIOS on an Intel platform computer according to claim 4, wherein: The communication module includes a dual N-channel MOS transistor Q3, a resistor R19, and a resistor R20. A first end of the resistor R19 is connected to a power supply, and a second end of the resistor R19 is connected to a first controlled end of the dual N-channel MOS transistor Q3. A first end of the resistor R20 is connected to a power supply, and a second end of the resistor R20 is connected to a second controlled end of the dual N-channel MOS transistor Q3. A first conductive end of the dual N-channel MOS transistor Q3 is connected to a clock line for SMBUS communication, a second conductive end of the dual N-channel MOS transistor Q3 is connected to a first data communication port of the MCU module, a third conductive end of the dual N-channel MOS transistor Q3 is connected to a data line for SMBUS communication, and a fourth conductive end of the dual N-channel MOS transistor Q3 is connected to a second data communication port of the MCU module.

10. The circuit for fully automatically upgrading BIOS on an Intel platform computer according to claim 4, characterized in that: The circuit for fully automatically upgrading the BIOS on an Intel platform computer further includes a status indication module, which includes a MOS transistor Q2, a resistor R7, and an indicator light. The first conducting end of the MOS transistor Q2 is connected to the first end of the resistor R7, the second end of the resistor R7 is connected to a power supply, a common node between the second end of the resistor R7 and the power supply is connected to the indicator light, and the controlled end of the MOS transistor Q2 is connected to the third signal output end of the MCU module.

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