Data access method and related device

Abstract

The invention discloses a data access method and a related device. The method comprises the following steps: receiving a data access request of an access party; if a first access strategy is adopted in the current period, searching and reading target data from a target memory and a cache at the same time at least according to the access request, and feeding back the target data to the access party; if a second access strategy is adopted in the current period, querying the target data in a cache at least according to the access request, and feeding back the target data to the access party; wherein the access strategy selection of the current period is determined based on the cache hit parameter of the previous period.

Description

Technical Field

[0001] The present application relates to the field of information processing, and in particular to a data access method and related devices. Background Art

[0002] SLC (System Level Cache) is upstream of DRAM (Dynamic Random Access Memory) in the SOC (System-on-a-Chip) architecture. All requests to access DRAM main memory will pass through SLC. In addition, the types and characteristics of request services (Transactions) issued by many different types of requesters in the SOC system are different, so the memory access scenarios faced by SLC are very complex.

[0003] Especially for the CPU (central processing unit) which is a requester that is very sensitive to memory access latency, when accessing the main memory through the SLC, it will be affected by the memory access requests issued by other requesters, which may cause a decrease in the CPU memory access performance. Summary of the invention

[0004] The first aspect of the present application provides a data access method, comprising:

[0005] Receiving a data access request from an accessing party;

[0006] If the first access strategy is adopted in the current cycle, at least according to the access request, the target data is searched and read from the target memory and the cache at the same time, and the target data is fed back to the accessing party;

[0007] If the second access strategy is adopted in the current cycle, the target data is searched in the cache at least according to the access request, and the target data is fed back to the accessing party;

[0008] The access strategy selection of the current cycle is determined based on the cache hit parameters of the previous cycle.

[0009] In a possible implementation, searching and reading target data from a target memory and a cache at least according to the access request, and feeding back the target data to the accessing party, includes:

[0010] According to the access request, the target data is read from the target memory and whether the target data exists is checked in the cache;

[0011] If the target data is hit in the cache, the target data read from the cache is fed back to the accessing party; the hit indicates that the target data exists in the cache;

[0012] If there is a miss in the cache, the target data read from the target memory is fed back to the accessing party, and the miss indicates that the target data does not exist in the cache.

[0013] In a possible implementation, querying whether the target data exists in the cache includes:

[0014] Parsing the access request to obtain physical address information of the target data in the target memory;

[0015] Querying in a preset storage directory whether there is a target tag corresponding to the physical address information, obtaining a query result, wherein a cache hit parameter of a current cycle is related to the query result, wherein the preset storage directory includes at least two tag groups, each tag group includes a specific number of tags, and each tag corresponds to a physical address information of a target memory;

[0016] Based on the query result indicating that a target tag corresponding to the physical address information exists in the preset storage directory, determining that the target data exists in the cache;

[0017] Based on the query result indicating that the target tag corresponding to the physical address information does not exist in the preset storage directory, it is determined that the target data does not exist in the cache.

[0018] In a possible implementation, the method further includes:

[0019] Based on the query result indicating that a target tag corresponding to the physical address information exists in the preset storage directory, a count value corresponding to the accessing party is controlled to increase by one, wherein the count value indicates the number of times the target tag corresponding to the physical address information in the access request is queried.

[0020] In a possible implementation, the method further includes:

[0021] Based on the query result indicating that a target tag corresponding to the physical address information exists in the preset storage directory, determining a first category to which the target tag belongs;

[0022] Determine a first count value corresponding to the first category from at least two category count values, the first count value being the number of times each tag in the first category is accessed and hit in the current cycle;

[0023] The first count value and the total value are controlled to increase. The total value is a record of the number of accesses of the access party in the current cycle. The first count value and the total value are used to determine the access hit rate of the cache in the current cycle at the end of the current cycle.

[0024] In a possible implementation, if the first access strategy is adopted in the current cycle, at least according to the access request, the target data is searched and read from the target memory and the cache at the same time, and the target data is fed back to the accessing party, further comprising:

[0025] Update the number of cache access hits in the current cycle and the number of accesses in the current cycle. The number of access hits in the current cycle and the number of accesses in the current cycle are used to determine the access hit rate of the cache in the current cycle at the end of the current cycle. The access hit rate of the cache in the current cycle is used to determine the access strategy adopted in the next cycle.

[0026] In a possible implementation, before receiving the data access request from the accessing party, the method further includes:

[0027] Based on reaching the cycle switching time, obtaining a cache hit parameter of a historical cycle, the historical cycle at least including the previous cycle;

[0028] If the cache hit parameter of the historical cycle is less than the preset threshold, the first access strategy is adopted in the current cycle;

[0029] If the cache hit parameter of the historical cycle is not less than the preset threshold, the second access strategy is adopted in the current cycle.

[0030] A second aspect of the present application provides a data access system, comprising:

[0031] A target memory for storing data;

[0032] A cache is used to store data and can query target data based on a data access request received by the access party;

[0033] A control module, used for controlling the simultaneous search and reading of target data from the target memory and the cache, and feeding back the target data to the accessing party, when the first access strategy is adopted in the current cycle, at least based on the access request; and controlling the query of the target data in the cache, and feeding back the target data to the accessing party, when the second access strategy is adopted in the current cycle, at least based on the access request; wherein the access strategy selection of the current cycle is determined based on the cache hit parameters of the previous cycle.

[0034] In a possible implementation, the control module includes:

[0035] A control unit, for determining an access strategy for a current cycle according to a cache hit parameter of a previous cycle, and when receiving a data access request from an access party, when the access strategy of the current cycle is a first access strategy, controlling an access path between the access party and the target memory to search and read the target data from the target memory, and searching and reading the target data from the cache; when the access strategy of the current cycle is a second access strategy, controlling an access path between the access party and the target memory to bypass, and searching and reading the target data from the cache;

[0036] A counter set is used to record the number of times the target data is found in the cache when the first access strategy is adopted, each counter corresponds to a tag group, each tag group contains a specific number of tags, and each tag corresponds to a physical address information in the target memory.

[0037] In a possible implementation, the cache includes:

[0038] A directory storage unit, used to store a preset storage directory, wherein the preset storage directory includes at least two tag groups,

[0039] A data storage unit, used for storing data;

[0040] A temporary storage unit, used for temporarily storing target data read from the data storage unit;

[0041] A selection unit, configured to, when the first access strategy is adopted in the current cycle, feed back the target data read from the target memory to the access party based on the query result of querying the target data in the cache indicating that the target data does not exist in the cache, and feed back the target data read from the cache to the access party based on the query result of querying the target data in the cache indicating that the target data exists in the cache;

[0042] The control module also includes:

[0043] A result storage unit is used to receive a query result of the cache query target data when the first access strategy is adopted in the current cycle, and based on the query result representing the existence of the target data in the cache, trigger the counter count of the tag group corresponding to the physical address information in the access request in the counter set to increase by one.

[0044] A third aspect of the present application provides a computer program product, comprising computer-readable instructions. When the computer-readable instructions are executed on an electronic device, the electronic device implements the data access method of the first aspect or any implementation of the first aspect.

[0045] A fourth aspect of the present application provides an electronic device, comprising at least one processor and a memory connected to the processor, wherein:

[0046] The memory is used to store computer programs;

[0047] The processor is used to execute the computer program so that the electronic device can implement the data access method of the first aspect or any implementation manner of the first aspect.

[0048] A fifth aspect of the present application provides a computer storage medium, which carries one or more computer programs. When the one or more computer programs are executed by an electronic device, the electronic device can access the data of the first aspect or any implementation method of the first aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] The above and other features, advantages and aspects of the embodiments of the present disclosure will become more apparent with reference to the following detailed description in conjunction with the accompanying drawings. Throughout the accompanying drawings, the same or similar reference numerals represent the same or similar elements. It should be understood that the drawings are schematic and the originals and elements are not necessarily drawn to scale.

[0050] Figure 1 is a schematic diagram of the architecture of a SOC in an implementation mode;

[0051] Figure 2 It is a flowchart of a data access method provided by an embodiment of the present application;

[0052] Figure 3 It is a schematic diagram of the architecture of the SOC provided in the embodiment of the present application;

[0053] Figure 4 A flowchart of searching and reading target data from a target memory and a cache at the same time, and feeding back the target data to the accessing party, provided by an embodiment of the present application at least according to the access request;

[0054] Figure 5 It is a schematic diagram of a process of querying whether the target data exists in the cache provided by an embodiment of the present application;

[0055] Figure 6 It is a flowchart of query results of statistical access requests provided by an embodiment of the present application;

[0056] Figure 7 is a schematic diagram of a preset storage directory provided in an embodiment of the present application;

[0057] Figure 8 It is a flowchart of a process for determining an access policy for a current cycle provided by an embodiment of the present application;

[0058] Fig. 9 It is a structural diagram of a data access system provided in an embodiment of the present application;

[0059] Fig.10 is a schematic diagram of the structure of a control module provided in an embodiment of the present application;

[0060] Fig.11 It is a schematic diagram of the structure of the cache provided in the embodiment of the present application;

[0061] Fig.12 It is a schematic diagram of an application scenario of a data access system provided by this application;

[0062] Fig.13 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0063] The following describes the embodiments of the present application in conjunction with the drawings in the embodiments of the present application. The terms used in the implementation method section of the present application are only used to explain the specific embodiments of the present application, and are not intended to limit the present application.

[0064] The embodiments of the present application are described below in conjunction with the accompanying drawings. Those skilled in the art will appreciate that, with the development of technology and the emergence of new scenarios, the technical solutions provided in the embodiments of the present application are also applicable to similar technical problems.

[0065] The terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and need not be used to describe a specific order or sequential order. It should be understood that the terms used in this way can be interchangeable under appropriate circumstances, which is only to describe the distinction mode adopted by the objects of the same attributes when describing in the embodiments of the present application. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, so that the process, method, system, product or equipment comprising a series of units need not be limited to those units, but may include other units that are not clearly listed or inherent to these processes, methods, products or equipment.

[0066] Figure 1 The present invention is a schematic diagram of the architecture of a SOC in an implementation method, and the architecture includes a CPU, an SLC, and a DRAM. The CPU sends an access request to the SLC to request data from the DRAM through the SLC. There is data in the cache of the SLC, and the data is a copy of part of the data in the DRAM. The SLC determines whether there is a copy of the data requested by the access request. If there is a corresponding copy in the cache, the request is not sent to the DRAM, but the requested data is directly obtained from the copy in the local cache and fed back to the CPU; if there is no corresponding copy, the request is sent to the DRAM, requesting to obtain the corresponding data from the DRAM, and then fed back to the CPU through the SLC.

[0067] Among them, the SLC stores the DRAM data storage address corresponding to each copy in the form of an address directory table, and the access request also carries the data storage address of the requested data in the DRAM. In this implementation method, the method of querying whether there is a data storage address of the access request in the address directory table is used to determine whether there is a copy in the SLC.

[0068] However, due to the limited cache space in the SLC, the number of data copies it stores is small, and each time an access request is received, a query process is required. However, most of the requests will be sent to the DRAM after the query, and the DRAM will feedback data. The query process causes delays. Moreover, since the SLC can respond to requests from multiple access parties, after receiving multiple access requests, it queries each access request in sequence. The query delay in this process will be longer, which will reduce the memory access performance of access parties such as the CPU that are sensitive to memory access delay requirements.

[0069] To solve the above problems, the present application provides a data access method, which selects an access strategy according to a cycle. The selection of the access strategy is based on the cache hit parameters of the previous cycle. The access strategy of the current cycle can be determined according to the cache hit parameters of the SLC in the recent period, so as to directly query the target data in the SLC cache, or simultaneously trigger the search and reading of data in the DRAM and SLC caches respectively, thereby reducing the delay caused by the query and improving the memory access performance of the requester.

[0070] Figure 2 It is a flowchart of a data access method provided in an embodiment of the present application, which may include steps 201 to 203. These steps are described in detail below.

[0071] 201. Receive a data access request from an accessing party;

[0072] The access party may be any structure set in the SOC that can make a data access request to the target memory. As an example, the access party may be a CPU, a GPU (Graphics Processing Unit), an NPU (Neural Processing Unit), etc., and this application does not limit the access party.

[0073] In a possible implementation, the access request carries the data storage address of the target data in the target memory.

[0074] The target memory may be a DRAM, which stores a large amount of data, and the corresponding data can be queried through the data storage address.

[0075] When an access request from an accessing party to access data is received, the access process is executed according to the access policy adopted in the current cycle.

[0076] The access strategy selection of the current cycle is determined based on the cache hit parameters of the previous cycle.

[0077] The cache hit parameter is related to the number of times the data stored in the cache is hit by access requests within one cycle.

[0078] If the current cycle adopts the first access strategy, execute step 202; if the current cycle adopts the second access strategy, execute step 203.

[0079] In a possible implementation, at each cycle switching moment (the end of the previous cycle and the beginning of the next cycle), the cache hit parameter of the previous cycle is obtained to determine the access strategy adopted in the current cycle based on the cache hit parameter of the previous cycle. Figure 8 The process of determining the access policy for the current cycle is described in detail.

[0080] 202. If the first access strategy is adopted in the current cycle, at least according to the access request, the target data is searched and read from the target memory and the cache at the same time, and the target data is fed back to the access party;

[0081] If the first access strategy is adopted in the current cycle, the access strategy is to simultaneously request to search for target data in the target memory and the cache, and feed back the found target data to the accessing party.

[0082] The cache is specifically a storage space in the SLC used to cache DRAM data copies.

[0083] In a possible implementation, the target data can be searched and read in the target memory and cache at the same time according to the access request, and one of the read target data is fed back to the access party. Figure 4 This process is described in detail in .

[0084] 203. If the second access strategy is adopted in the current cycle, the target data is searched in the cache at least according to the access request, and the target data is fed back to the accessing party;

[0085] The access strategy selection of the current cycle is determined based on the cache hit parameters of the previous cycle.

[0086] Among them, if the second access strategy is adopted in the current cycle, which is to request to find the target data in the cache and feed back the found target data to the accessing party, it is only necessary to query the target data in the local cache of the SLC based on the access request and feed back the queried target data to the accessing party.

[0087] In a possible implementation, an address directory table is pre-stored in the SLC, the data stored in the cache of the SLC is a copy of the corresponding data in the target memory, and the address directory table records the data storage address of the data in the target memory.

[0088] Among them, by querying the address directory table, it can be determined whether the data requested by the access request has a data copy in the cache. If so, the data copy is read from the cache and fed back to the accessing party as the target data; if not, based on the access request, the SLC again requests the target memory to read the target data, and feeds back the data read from the target memory to the accessing party.

[0089] In a possible implementation, a copy of the target data read from the target memory may be retained in the cache of the SLC, and the data storage address of the target data in the target memory may be added to the address directory table.

[0090] Figure 3 It is a schematic diagram of the architecture of the SOC provided in an embodiment of the present application, wherein the architecture includes an accessor 301, a cache 302, a predictor 303 and a DRAM 304, wherein the cache 302 has a data storage unit 3021, and the data storage unit 3021 is used to store a data copy of part of the data in the DRAM, and a separate memory access path 305 that can bypass the cache is set between the accessor 301 and the DRAM.

[0091] The predictor is used to monitor the cache hit parameters in the cache when the access request initiated by the visitor hits the cache, and the cache determines the access strategy of the current cycle based on the cache hit parameters of the previous cycle.

[0092] If the access strategy of the current cycle is the first access strategy, the DRAM is directly requested to read data through the memory access path that can bypass the cache. After receiving the data access request sent by the visitor, the cache simultaneously searches and reads the target data from the DRAM and the data storage unit 3021, and feeds the target data back to the visitor. Specifically, the DRAM is requested to read data through the memory access path that bypasses the cache, and the target data is searched and read in the cache.

[0093] If the access strategy of the current cycle is the second access strategy, the memory access path that can bypass the cache is closed, and after receiving the data access request sent by the visitor, the target data is only queried and read in the local cache.

[0094] Corresponding access policies are set for different access parties. In the same cycle, the access policies adopted for different access parties may be the same or different.

[0095] In this embodiment, the access strategy used in the current cycle is determined based on the cache hit parameters of the previous cycle. When a data access request from the accessing party is received, if the current cycle adopts the first access strategy, the target data is searched and read from the target memory and the buffer at least according to the access request, and the target data is fed back to the data accessing party. If the current cycle adopts the second access strategy, the target data is searched in the cache and fed back to the accessing party. The access strategy used is determined in combination with the cache hit parameters in the recent period of time, and the response to the data access request is realized through different strategies, so as to reduce the delay caused by the query in the SLC and improve the memory access performance of the requesting party.

[0096] Figure 4 The flowchart provided by the embodiment of the present application is to search and read the target data from the target memory and the cache at the same time at least based on the access request, and feed back the target data to the accessing party, which may include steps 401 to 403, and these steps are described in detail below.

[0097] 401. Read the target data from the target memory and query whether the target data exists in the cache according to the access request;

[0098] When the first access strategy is adopted in the current cycle, the target data is queried from the target memory and the cache at the same time.

[0099] The cache is used to store a copy of the data obtained from the target memory.

[0100] After receiving the access request, the target memory is requested to read the target data directly according to the data storage address in the access request, and at the same time, the cache is queried whether the target data exists.

[0101] In a possible implementation, a separate memory access path that can bypass the cache is set between the accessor and the target memory, and a request is made to read the target data from the target memory through the memory access path. At the same time, a query is made in the cache whether the target data exists.

[0102] The memory access path is tightly coupled with the cache, which can ensure that the data in the cache is consistent with the corresponding data in the target memory.

[0103] If the target data is stored in the cache, it is determined that the access request hits the cache, and step 402 is executed; if the target data is not stored in the cache, it is determined that the access request does not hit the cache, and step 403 is executed.

[0104] In a possible implementation, the access request carries the data storage address of the requested data in the target memory, and the target data can be directly requested in the target memory through the memory access path according to the access request.

[0105] 402. If the target data is hit in the cache, the target data read from the cache is fed back to the accessing party; the hit indicates that the target data exists in the cache;

[0106] If the cache is hit, indicating that the target data exists in the cache, the target data is directly read from the cache.

[0107] Furthermore, the target data must exist in the target memory, and after the target data is read from the target memory, the data read from the target memory is discarded.

[0108] Among them, since the delay of querying and reading target data in the cache is generally shorter than the delay of reading target data from the target memory, the target data read from the cache can be fed back to the visitor, and the target data read from the target memory can be discarded.

[0109] Moreover, in a specific implementation process, since the data in the target memory may be tampered with, while the copy in the cache retains the original data, the target data read in the cache can be fed back to the visitor.

[0110] In one possible implementation, when a hit occurs in the cache, the number of cache access hits in the current cycle and the number of accesses in the current cycle are also updated. The number of cache access hits in the current cycle and the number of accesses in the current cycle are used to determine the access hit rate of the cache in the current cycle at the end of the current cycle. The access hit rate of the cache in the current cycle is used to determine the access strategy to be adopted in the next cycle.

[0111] Among them, if there is a hit in the cache, the number of access hits of the cache is increased by one, and the number of accesses in the current access cycle is also increased by one. When the current cycle ends, the access hit rate of the cache in the current cycle can be calculated, providing a judgment basis for determining the access strategy adopted in the next cycle.

[0112] 403. If there is a miss in the cache, the target data read from the target memory is fed back to the accessing party. The miss indicates that the target data does not exist in the cache.

[0113] If there is a miss in the cache, it indicates that the target data does not exist in the cache. After receiving the target data read from the target memory, the target data read from the target memory is fed back to the accessing party.

[0114] In a possible implementation, the target data read from the target memory may also be stored in the cache.

[0115] In a possible implementation, when a cache miss occurs, only the number of accesses in the current cycle is updated, and the number of accesses in the current cycle is increased by one.

[0116] Among them, since the target data is queried in the cache and read from the target memory at the same time, even if it misses in the cache, the target data is directly read from the target memory, reducing the delay of waiting for SLC misses and then querying the data in the target memory, thereby accelerating the execution of memory access requests on the CPU side.

[0117] In this embodiment, according to the access request, the target data is read from the target memory and the query whether the target data exists in the cache is performed; if there is a hit in the cache, it indicates that the target data exists in the cache, and the target data read from the cache is fed back to the accessing party; if there is a miss in the cache, it indicates that the target data does not exist in the cache, and the target data read from the target memory is fed back to the accessing party. According to different hit situations in the cache, the target data read from different places are fed back to the accessing party to reduce latency and improve the memory access performance of the requesting party.

[0118] Figure 5 This is a flowchart of querying whether the target data exists in the cache provided by an embodiment of the present application, which may include steps 501 to 504. These steps are described in detail below.

[0119] 501. Parse the access request to obtain physical address information of the target data in the target memory;

[0120] The access request carries the physical address information of the requested target data in the target memory.

[0121] The received access request is parsed to obtain the physical address information of the target data in the target memory.

[0122] 502. Query whether there is a target tag corresponding to the physical address information in a preset storage directory, and obtain a query result. The cache hit parameter of the current cycle is related to the query result. The preset storage directory includes at least two tag groups, each tag group includes a specific number of tags, and each tag corresponds to a physical address information of the target memory.

[0123] The data cached in the cache stores its physical address information in the target memory in the form of tags.

[0124] Moreover, in the structure for executing cache hit parameter statistics, there is also the preset tag directory, through which cache parameter records are realized. The same preset tag directory is set in this structure and the cache, respectively, to realize a duplicate tag directory (Duplicated Tag Directory) with the same association degree, so as to record the hit rate of the access request of the accessing party in the cache during access.

[0125] The tag is the index information of the address block, and the corresponding data copy can be found in the cache through the tag. The tag also corresponds to the physical address information of the data in the target memory.

[0126] There is a preset storage directory in the SLC, which may be a duplicating tag. A plurality of tags are stored in the preset storage directory, and each tag corresponds to a physical address information in the target memory.

[0127] After obtaining the physical address information of the target data in the target memory, it is determined whether the target data requested by the access request is stored in the cache by searching the preset storage directory for the target tag corresponding to the physical address information.

[0128] The query result may include whether the target tag exists in the preset storage directory or not.

[0129] The preset storage directory includes a plurality of tag groups, each tag group includes a specific number of tags, and the tags correspond one-to-one to the physical address information of the target storage.

[0130] It should be noted that in the embodiment of the present application, multiple tags with similar address characteristics are taken as a group of tags, and only a few groups of tags need to be set.

[0131] When statistics are subsequently collected for cache hit parameters, the hit parameters of multiple tags in the group can be collected together based on the group, without collecting statistics for each tag, thereby reducing the complexity of the statistics.

[0132] In one possible implementation, the process of querying in the cache may be to query each tag in the preset storage directory. When the tag corresponding to the physical address information of the target data in the target memory is queried, it is determined that the target data exists in the cache. Otherwise, the target data does not exist in the cache.

[0133] 503. Determine that the target data exists in the cache based on the query result indicating that the target tag corresponding to the physical address information exists in the preset storage directory;

[0134] If the query result indicates that the target tag is found in the preset storage directory, it is determined that the target data exists in the cache, and the target data accessed by the access request is hit in the cache.

[0135] Accordingly, the target data can be read from the cache later and fed back to the accessing party.

[0136] 504. Based on the query result indicating that the target tag corresponding to the physical address information does not exist in the preset storage directory, it is determined that the target data does not exist in the cache.

[0137] If the query result indicates that the target tag is not found in the preset storage directory, it is determined that the target data does not exist in the cache, and the target data accessed by the access request is not hit in the cache.

[0138] Accordingly, the target data read from the target memory may be fed back to the accessing party subsequently.

[0139] In a possible implementation, each time an access is performed using the first access strategy, statistics are collected based on the query results to provide a basis for subsequent statistics on the access hit rate of this cycle. Figure 6 The process of collecting statistics on query results of access requests is described in detail.

[0140] In a possible implementation, the method further includes:

[0141] Based on the query result indicating that the target tag corresponding to the physical address information exists in the preset storage directory, the count value corresponding to the access party is controlled to increase by one, and the count value indicates the number of times the target tag corresponding to the physical address information in the access request is queried.

[0142] When there are multiple access parties, statistics are performed on the access query results of different access parties respectively.

[0143] The count value represents the number of times the target tag corresponding to the physical address information in the access request is queried, and the count value also represents the number of times the access request of the access party in this cycle hits the cache.

[0144] As an example, when the access party is a CPU, the access request statistics query result for the CPU is obtained to obtain a count value corresponding to the CPU; when the access party is a GPU, the access request statistics query result for the GPU is obtained to obtain a count value corresponding to the GPU.

[0145] In this embodiment, the preset storage directory includes at least two tag groups, each tag group includes a specific number of tags, each tag corresponds to a physical address information of the target memory, and the data in the cache is recorded in the preset storage directory in the form of tags. By parsing the access request, the physical address information of the target data requested by the access request in the target memory is obtained, and the preset storage directory is queried whether there is a target tag corresponding to the physical address information to obtain a query result, and the cache hit parameter of the current cycle is related to the query result. Based on the query result, it is characterized that the target tag corresponding to the physical address information exists in the preset storage directory, and it is determined that the target data exists in the cache, and the cache is hit; based on the query result, it is characterized that the target tag corresponding to the physical address information does not exist in the preset storage directory, and it is determined that the target data does not exist in the cache, and the cache is not hit, and the preset storage directory is queried to determine whether the target data exists in the cache.

[0146] Figure 6 This is a flowchart of query results of statistical access requests provided in an embodiment of the present application, which may include steps 601 to 603. These steps are described in detail below.

[0147] 601. Determine, based on the query result indicating that a target tag corresponding to the physical address information exists in the preset storage directory, a first category to which the target tag belongs;

[0148] The preset storage directory includes multiple tag groups, each tag group includes a specific number of tags, and the tags in each tag group may belong to the same category.

[0149] In a possible implementation, the classification is represented by the same way.

[0150] Figure 7 This is a schematic diagram of a preset storage directory provided in an embodiment of the present application. The schematic diagram includes 4 tag groups (way0 to way3), and each tag group includes 32 tags (set0 to set31).

[0151] Figure 7 The square box indicates the label entry marked in the duplicate label directory, the circle indicates the counter of the nearest position, and the arrow indicates the association between the nearest position and the counter. The nearest position is the position corresponding to the label of the same category.

[0152] refer to Figure 7 The 32 labels under way0 are considered as the same category, the 32 labels under way1 are considered as the same category, and so on. Figure 7 There are 4 categories of tags in the preset storage directory.

[0153] In a possible implementation, in a tag group of the same category, the physical address information corresponding to each tag is associated.

[0154] As an example, the physical address information is a 42-bit address, and the physical address information with similar / identical address characteristics of 18 to 22 bits are placed in the same tag group.

[0155] Among them, when the corresponding target tag is set12 of way0 according to the query in the preset storage directory based on the physical address information, it can be determined that the target tag belongs to the category of way0.

[0156] 602. Determine a first count value corresponding to the first category from among at least two category count values, where the first count value is the number of times each tag in the first category is accessed and hit in the current cycle;

[0157] Here, each category is counted to obtain the count value of each category.

[0158] Correspondingly, when it is determined that the query result is that the target tag corresponding to the physical address information exists in the preset storage directory, the count value of the classification for the target tag is determined.

[0159] The count value of each category represents the total number of times each tag in the category is accessed and hit in the current cycle.

[0160] As an example, there are 4 categories, and the target label obtained in this query belongs to way0. Determine the count value corresponding to way0.

[0161] 603. Control the first count value and the total value to increase. The total value records the number of accesses of the access party in the current cycle. The first count value and the total value are used to determine the access hit rate of the cache in the current cycle at the end of the current cycle.

[0162] The number of times the access party accesses the target memory in the current cycle is recorded, and the record is recorded as the total value of the access in this cycle.

[0163] When an access request of the access party in this cycle hits the first category, the first count value of the first category is increased, and the total count value is also increased.

[0164] If the query result indicates that the target tag corresponding to the physical address information does not exist in the preset storage directory, and accordingly, the target tag corresponding to the physical address does not exist in the preset storage target, the count value of the total counter is increased by one.

[0165] The hit rate of the access party is the ratio of the sum of the count values ​​of each category of the access party in this cycle to the total value.

[0166] As an example, the preset storage directory includes 4 categories. The count values ​​obtained from the CPU statistics in this cycle are 230, 300, 400 and 70 respectively, and the total value is 1600. Then the hit rate of the CPU is (230+300+400+70) / 1600=0.625.

[0167] It should be noted that, if there are different access parties, the hit count values ​​and the total number of accesses are statistically classified for the different access parties.

[0168] In one possible implementation, a corresponding counter is set for each category, and a counter is also set for the total number of visits. Each category can be set with an entry corresponding to the number of tags in the category. The tags are queried through the entry. If the target tag is obtained in a certain category, the corresponding counter is triggered to add one, otherwise, the corresponding counter is not triggered.

[0169] In this embodiment, based on the query result characterizing the presence of a target tag corresponding to the physical address information in a preset storage directory, the first category to which the target tag belongs is determined; a first count value corresponding to the first category is determined from at least two category count values, the first count value being the number of access hits of each tag in the first category in the current cycle; the first count value and the total count value are controlled to increase, the total count value being a record of the number of accesses of the access party in the current cycle, the first count value and the total count value being used to determine the access hit rate of the cache in the current cycle at the end of the current cycle, thereby realizing the joint statistics of the hits for the same category tag in the current cycle, and counting the number of accesses of the access party in the current cycle, so as to realize the statistics of the access hit rate of the cache by the access party in this cycle, and provide a basis for the subsequent selection of access strategies.

[0170] Figure 8 It is a flowchart of the process of determining the access policy of the current cycle provided by an embodiment of the present application, which may include steps 801 to 803. These steps are described in detail below.

[0171] 801. Based on reaching the cycle switching time, obtain a cache hit parameter of a historical cycle, where the historical cycle at least includes a previous cycle;

[0172] The cache hit parameter may be a cache hit rate.

[0173] When the switching time of each cycle is reached and the switching cycle is completed, the access strategy of the current cycle can be determined according to the cache hit rate of the previous cycle.

[0174] Among them, for the same access party, after determining its cache hit rate in the previous cycle, a corresponding access strategy can be selected according to the cache hit rate of the access party.

[0175] In order to improve the continuity of the access strategy, the cache hit rates of multiple consecutive historical cycles can be combined to determine the access strategy of the current cycle. Specifically, the cache hit rates of the historical cycles can be weighted to obtain a hit rate, which is used to determine the access strategy of the current cycle.

[0176] Generally, when setting weights, the weight of the previous period is greater than the weight of the previous period.

[0177] Moreover, the historical period is one or more periods that are continuous with the current period and precede the current period in time.

[0178] As an example, the current cycle is T, the weight of the previous cycle is T' is set to 0.6, the hit rate is 85%, the previous cycle is T", the weight of T' is set to 0.6, the hit rate is 85%, the weight of T" is set to 0.4, the hit rate is 80%, then the hit rate can be obtained to be 83%.

[0179] A threshold may be preset, and the cache hit parameter of the previous cycle is compared with the preset threshold. If the cache hit parameter is less than the preset threshold, step 802 is executed, otherwise step 803 is executed.

[0180] If the cache hit rates of a plurality of consecutive cycles are used to perform weighted calculation of the hit rate, the hit rate obtained by the weighted calculation may be compared with a preset threshold to determine the access strategy.

[0181] 802. If the cache hit parameter of the historical cycle is less than the preset threshold, the first access strategy is adopted in the current cycle;

[0182] Among them, if it is determined that the cache hit parameter is less than the preset threshold, it means that in the previous historical cycle, the target parameter of the access request has no copy in the cache many times and needs to be obtained from the target memory. Therefore, the first access strategy is adopted in the current cycle, and data is queried and read from the cache and the target memory at the same time.

[0183] 803. If the cache hit parameter of the historical cycle is not less than a preset threshold, the second access strategy is adopted in the current cycle.

[0184] Among them, if it is determined that the cache hit parameter is not less than the preset threshold, it means that in the previous historical cycle, the target data of the access request that occurred less frequently had no copy in the cache and needed to be obtained from the target memory, and the target data of most access requests had a copy in the cache. Therefore, the second access strategy is adopted in the current cycle to directly query and read data from the cache to reduce the processing burden of the device.

[0185] In this embodiment, when the cycle switching time is reached, the historical cache hit parameter is obtained. If the cache hit parameter of the historical cycle is less than the preset threshold, the first access strategy is adopted in the current cycle, and the historical cycle at least includes the previous cycle; if the cache hit parameter of the historical cycle is not less than the preset threshold, the second access strategy is adopted in the current cycle. When the cycle switches, the access strategy of the current cycle is determined based on the historical cache hit parameter, and a decision is made whether the current cycle needs to read data from the target memory at the same time.

[0186] A data access method provided by an embodiment of the present application is introduced above, and a system for executing the above data access method will be introduced below.

[0187] Fig. 9 Schematic diagram of a data access system provided by an embodiment of the present application. Fig. 9 As shown, the data access system comprises:

[0188] Target memory 901, used for storing data;

[0189] In one possible implementation, the target memory may be a DRAM.

[0190] Cache 902, used to store data, capable of querying target data based on a data access request received by an access party;

[0191] In a possible implementation, the cache may be an SLC, in which a storage structure data RAM is provided, and the data RAM can store data copies.

[0192] Control module 903 is used to control the simultaneous search and reading of target data from the target memory and the cache, and feed back the target data to the accessing party, at least based on the access request, when the first access strategy is adopted in the current cycle; and to control the query of the target data in the cache, and feed back the target data to the accessing party, at least based on the access request, when the second access strategy is adopted in the current cycle; wherein the access strategy selection of the current cycle is determined based on the cache hit parameters of the previous cycle.

[0193] The control module can control whether to query and read the target data in the cache or in the cache and the target memory based on the access strategy adopted in the current cycle.

[0194] In a possible implementation, when the target data is searched and read from the target memory and the cache at the same time, the target data searched from the cache is fed back to the accessing party, and the target data read from the target memory is discarded.

[0195] Fig.10is a schematic diagram of the structure of the control module provided in the embodiment of the present application, such as Fig.10 As shown, the control module includes:

[0196] The control unit 1001 is used to determine the access strategy of the current cycle according to the cache hit parameter of the previous cycle, and when receiving a data access request from the access party, when the access strategy of the current cycle is the first access strategy, control the access path between the access party and the target memory to search and read the target data from the target memory, and search and read the target data from the cache; when the access strategy of the current cycle is the second access strategy, control the access path between the bypass access party and the target memory to search and read the target data from the cache;

[0197] The counter set 1002 is used to record the number of times the target data is found in the cache when the first access strategy is adopted. Each counter corresponds to a tag group, each tag group contains a specific number of tags, and each tag corresponds to a physical address information in the target memory.

[0198] Among them, the control unit can control to enable an access path between the access party and the target memory. Through this access path, the access request can directly access the target memory to read the target data in the target memory; at the same time, the access party also requests the cache to query and read the target data, so as to realize the simultaneous search and reading of data in the target memory and the cache.

[0199] Moreover, the control module also has a preset tag directory, and the counter set realizes the cache hit record through the preset tag directory. The control module and the cache are respectively provided with the same preset tag directory, realizing a duplicate tag directory (Duplicated Tag Directory) with the same association degree to record the hit rate of the access request of the accessing party in the cache during access.

[0200] Among them, the control unit specifically selects whether to enable the access path according to the access strategy of the current cycle. If the current cycle adopts the first access strategy, the access path is enabled to simultaneously search and read data in the target memory and the cache; if the current cycle adopts the second access strategy, the access path is not enabled, and data is only searched and read in the cache.

[0201] Among them, for the same access party, the control module also sets a set of counters, which includes a total counter and a classification counter, each classification counter corresponds to a tag group, each tag group includes multiple tags, and one tag corresponds to a physical address information in the target memory.

[0202] Correspondingly, when the physical address information corresponding to each tag in the same tag group is accessed, it is determined that the access request of the physical address information hits the cache, then the classification counter count of the tag group to which the tag corresponding to the physical address information belongs is increased by one, and the total counter count is increased by one. In combination with the counts of each counter, the access hit parameters of the visitor to the cache are counted at the end of this cycle, and then the access strategy for the next cycle is determined in combination with the access hit parameters.

[0203] Fig.11 is a schematic diagram of the structure of the cache provided in the embodiment of the present application, such as Fig.11 As shown, the cache includes:

[0204] A directory storage unit 1101 is used to store a preset storage directory, where the preset storage directory includes at least two tag groups;

[0205] A data storage unit 1102, used for storing data;

[0206] A temporary storage unit 1103, used for temporarily storing target data read from the data storage unit;

[0207] The selection unit 1104 is used to feed back the target data read from the target memory to the access party when the first access strategy is adopted in the current cycle based on the fact that the query result of querying the target data in the cache indicates that the target data does not exist in the cache, and to feed back the target data read from the cache to the access party based on the fact that the query result of querying the target data in the cache indicates that the target data exists in the cache.

[0208] The data storage unit may be a data RAM in the SLC, which can store data copies.

[0209] The tag group may be represented by a tag way, and the corresponding parts of the address features in the physical address information corresponding to the tags in the same way are the same / similar, so that the tags corresponding to each physical address information can be classified for easy query.

[0210] Accordingly, the control module also includes:

[0211] A result storage unit is used to receive a query result of the cache query target data when the first access strategy is adopted in the current cycle, and based on the query result representing the existence of the target data in the cache, trigger the counter count of the tag group corresponding to the physical address information in the access request in the counter set to increase by one.

[0212] When the first access strategy is adopted, the result storage unit is enabled, and when the second access strategy is adopted, the result storage unit is disabled.

[0213] Among them, after the result storage unit receives the query result of the cache query template data, if the query result indicates the existence of the target data, this cache hit corresponds to the physical address information in the access request to the entry with the same address in the preset storage directory, so that the count of the counter of the tag group corresponding to the physical address information in the access request is increased by one.

[0214] Among them, the result storage unit can also be used to save the target data read by the target memory when the first access strategy is adopted in the current cycle, and based on the query result of the cache query target data indicating that the target data does not exist in the cache, feed back the saved target data to the accessing party, and discard the saved target data based on the query result of the cache query target data indicating that the target data exists in the cache.

[0215] The access path between the target memory and the access party is enabled by enabling the result storage unit; conversely, the access path between the target memory and the access party is disabled by disabling the result storage unit.

[0216] It should be noted that the specific functional explanation of each structure in the data access system provided in this embodiment can refer to the description in the aforementioned method embodiment, and will not be described in detail in this embodiment.

[0217] In this embodiment, the target memory, cache and control module are included. The control module determines the access strategy adopted in the current cycle according to the cache hit parameter of the previous cycle. When receiving the data access request of the access party, if the current cycle adopts the first access strategy, the target data is searched and read from the target memory and the cache at least according to the access request, and the target data is fed back to the data access party. If the current cycle adopts the second access strategy, the target data is queried in the cache and the target data is fed back to the access party. The access strategy adopted is determined in combination with the cache hit parameter in the recent period, and the response to the data access request is realized through different strategies, so as to reduce the delay caused by the query in the SLC and improve the memory access performance of the requesting party.

[0218] Fig.12 This is a schematic diagram of an application scenario of a data access system provided by the present application. In this application scenario, SLC is used as a buffer and DRAM is used as a target memory. The scenario includes a hit rate predictor 1201, an accessor 1202, SLC 1203 and DRAM 1204.

[0219] This scenario describes the access of a single visitor CPU.

[0220] The hit rate predictor 1201 includes 4 duplicate directory categories (Duplicated tag way 0~3), counters 12011~12014 and a total counter 12015 corresponding to each category, a periodic interval timer 12016, a request result buffer 12017 and a filter 12018. 32 entries are set for the 4 directory categories, and the periodic interval timer is used to implement the periodic interval. The filter is used to filter all requests sent by the visitor to the SLC with index 0, 33, 66, 99...1023. The total counter counts the requests with index 0, 33, 66, 99...1023 in the requests transmitted through the filter. Miss

[0221] The SLC 1203 includes a preset storage directory (tag way 0-4) 12031, a storage module (data RAM) 12032, an access temporary storage module 12033, and a selection module 12034. The storage module 12032 is a storage area for storing data copies in the SLC. The access temporary storage module 12033 is used to store data read from the storage module. The selection module 12034 is used to determine the data to be fed back to the visitor based on the request result cache and the data of the access temporary storage module.

[0222] Among them, the hit rate predictor adopts 4-way and realizes a duplicate tag directory (Duplicated Tag Directory) with the same association as SLC, which reduces the hardware overhead of the hit rate predictor and only needs to set statistical counters for each way.

[0223] In this application scenario, only 32 set function tags are set. Each way corresponds to a 32-bit counter to record the 32 set tags for the way.

[0224] Among them, when the first access strategy is adopted, the access request sent from the CPU to the SLC is sent to the request result buffer 12017 of the hit rate predictor and the SLC at the same time, and the query result of the CPU request in the SLC preset storage directory will be sent to the request result buffer for record and correspond to the entry with the same address to trigger the corresponding counter to increase the count.

[0225] If the query result is a hit, the SLC sends the request to the storage module to obtain data and returns it to the CPU. If the query result is a miss, the miss result is recorded in the request result buffer 12017, but will not be sent to the access temporary storage module 12033.

[0226] Among them, when the access request is sent to the request result buffer 12017, it is directly sent to the DRAM. Before the query result is generated by querying in the SLC preset storage directory, the access request has been sent to the DRAM, and the read data is returned to the selection module. The selection module determines whether the data read from the DRAM is returned to the CPU based on whether it is hit or miss in the query result. If the query result is a miss, the data read from the DRAM is directly returned to the CPU. If the query result is a hit, the data read from the DRAM is discarded.

[0227] In the access request processing process, until the timing of the cycle interval timer ends, the count values ​​of each counter are read to determine whether the first access strategy needs to be adopted in the next cycle, and whether to enable the request result buffer 12017 and the access temporary storage module 12033. If the first access strategy is adopted, the request result buffer 12017 and the access temporary storage module 12033 need to be enabled. If the second access strategy is adopted, the request result buffer 12017 and the access temporary storage module 12033 are not enabled. After receiving the access request, the SLC directly reads data from the storage module and feeds it back to the CPU.

[0228] The present application also provides an electronic device in an embodiment. Fig.13 As shown, it shows a schematic diagram of the structure of an electronic device suitable for implementing the embodiments of the present application. The electronic device in the embodiments of the present application may include but is not limited to fixed terminals such as mobile phones, notebook computers, PDAs (personal digital assistants), PADs (tablet computers), desktop computers, etc. Fig.13 The electronic device shown is merely an example and should not bring any limitation to the functions and scope of use of the embodiments of the present application.

[0229] like Fig.13 As shown, the electronic device may include a processing device (e.g., a central processing unit, a graphics processing unit, etc.) 1301, which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM) 1302 or a program loaded from a storage device 1308 to a random access memory (RAM) 1303. When the electronic device is powered on, various programs and data required for the operation of the electronic device are also stored in the RAM 1303. The processing device 1301, the ROM 1302, and the RAM 1303 are connected to each other via a bus 1304. An input / output (I / O) interface 1305 is also connected to the bus 1304.

[0230] Typically, the following devices may be connected to the I / O interface 1305: an input device 1306 including, for example, a touch screen, a touch pad, a keyboard, a mouse, a camera, a microphone, an accelerometer, a gyroscope, etc.; an output device 1307 including, for example, a liquid crystal display (LCD), a speaker, a vibrator, etc.; a storage device 1308 including, for example, a memory card, a hard disk, etc.; and a communication device 1309. The communication device 1309 may allow the electronic device to communicate with other devices wirelessly or by wire to exchange data. Although Fig.13 An electronic device having various devices is shown, but it should be understood that it is not required to implement or possess all the devices shown. More or fewer devices may be implemented or possessed instead.

[0231] An embodiment of the present application also provides a computer program product including computer-readable instructions. When the computer-readable instructions are executed on an electronic device, the electronic device implements any data access method provided in the embodiment of the present application.

[0232] A computer-readable storage medium is also provided in an embodiment of the present application. The storage medium carries one or more computer programs. When the one or more computer programs are executed by an electronic device, the electronic device can implement any data access method provided in an embodiment of the present application.

[0233] It should also be noted that the device embodiments described above are merely schematic, wherein the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed over multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the scheme of this embodiment. In addition, in the drawings of the device embodiments provided by the present application, the connection relationship between the modules indicates that there is a communication connection between them, which may be specifically implemented as one or more communication buses or signal lines.

[0234] Through the description of the above implementation mode, the technicians in the field can clearly understand that the present application can be implemented by means of software plus necessary general hardware, and of course, it can also be implemented by special hardware including special integrated circuits, special CPUs, special memories, special components, etc. In general, all functions completed by computer programs can be easily implemented by corresponding hardware, and the specific hardware structure used to implement the same function can also be various, such as analog circuits, digital circuits or special circuits. However, for the present application, software program implementation is a better implementation mode in more cases. Based on such an understanding, the technical solution of the present application is essentially or the part that contributes to the prior art can be embodied in the form of a software product, which is stored in a readable storage medium, such as a computer floppy disk, a U disk, a mobile hard disk, a ROM, a RAM, a disk or an optical disk, etc., including a number of instructions to enable a computer device (which can be a personal computer, a training device, or a network device, etc.) to execute the method of each embodiment of the present application.

[0235] In the above embodiments, all or part of the embodiments may be implemented by software, hardware, firmware or any combination thereof. When implemented by software, all or part of the embodiments may be implemented in the form of a computer program product.

[0236] The computer program product includes one or more computer instructions. When the computer program instruction is loaded and executed on a computer, the process or function according to the embodiment of the present application is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices. The computer instruction can be stored in a computer-readable storage medium, or transmitted from a computer-readable storage medium to another computer-readable storage medium. For example, the computer instruction can be transmitted from a website site, a computer, a training device, or a data center by wired (e.g., coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) mode to another website site, computer, training device, or data center. The computer-readable storage medium can be any available medium that a computer can store or a data storage device such as a training device, a data center, etc. that includes one or more available media integration. The available medium can be a magnetic medium, (e.g., a floppy disk, a hard disk, a tape), an optical medium (e.g., a DVD), or a semiconductor medium (e.g., a solid-state drive (SSD)), etc.

Claims

1. A data access method, comprising: Receiving a data access request from an accessing party; If the first access strategy is adopted in the current cycle, at least according to the access request, the target data is searched and read from the target memory and the cache at the same time, and the target data is fed back to the accessing party; If the second access strategy is adopted in the current cycle, the target data is searched in the cache at least according to the access request, and the target data is fed back to the accessing party; The access strategy selection of the current cycle is determined based on the cache hit parameters of the previous cycle.

2. The data access method according to claim 1, wherein at least according to the access request, searching and reading the target data from the target memory and the cache at the same time, and feeding back the target data to the accessing party, comprises: According to the access request, the target data is read from the target memory and whether the target data exists is checked in the cache; If the target data is hit in the cache, the target data read from the cache is fed back to the accessing party; The hit indicates that the target data exists in the cache; If there is a miss in the cache, the target data read from the target memory is fed back to the accessing party, and the miss indicates that the target data does not exist in the cache.

3. The data access method according to claim 2, wherein the querying whether the target data exists in the cache comprises: Parsing the access request to obtain physical address information of the target data in the target memory; Querying in a preset storage directory whether there is a target tag corresponding to the physical address information, obtaining a query result, wherein a cache hit parameter of a current cycle is related to the query result, wherein the preset storage directory includes at least two tag groups, each tag group includes a specific number of tags, and each tag corresponds to a physical address information of a target memory; Based on the query result indicating that a target tag corresponding to the physical address information exists in the preset storage directory, determining that the target data exists in the cache; Based on the query result indicating that the target tag corresponding to the physical address information does not exist in the preset storage directory, it is determined that the target data does not exist in the cache.

4. The data access method according to claim 3, further comprising: Based on the query result indicating that a target tag corresponding to the physical address information exists in the preset storage directory, a count value corresponding to the accessing party is controlled to increase by one, wherein the count value indicates the number of times the target tag corresponding to the physical address information in the access request is queried.

5. The data access method according to claim 3, further comprising: Based on the query result indicating that a target tag corresponding to the physical address information exists in the preset storage directory, determining a first category to which the target tag belongs; Determine a first count value corresponding to the first category from at least two category count values, the first count value being the number of times each tag in the first category is accessed and hit in the current cycle; The first count value and the total value are controlled to increase. The total value is a record of the number of accesses of the access party in the current cycle. The first count value and the total value are used to determine the access hit rate of the cache in the current cycle at the end of the current cycle.

6. The data access method according to claim 2, wherein if the first access strategy is adopted in the current cycle, at least according to the access request, the target data is searched and read from the target memory and the cache at the same time, and the target data is fed back to the accessing party, the method further comprises: Update the number of cache access hits in the current cycle and the number of accesses in the current cycle. The number of access hits in the current cycle and the number of accesses in the current cycle are used to determine the access hit rate of the cache in the current cycle at the end of the current cycle. The access hit rate of the cache in the current cycle is used to determine the access strategy adopted in the next cycle.

7. The data access method according to claim 1, before receiving the data access request from the accessing party, further comprising: Based on reaching the cycle switching time, obtaining a cache hit parameter of a historical cycle, the historical cycle at least including the previous cycle; If the cache hit parameter of the historical cycle is less than the preset threshold, the first access strategy is adopted in the current cycle; If the cache hit parameter of the historical cycle is not less than the preset threshold, the second access strategy is adopted in the current cycle.

8. A data access system comprising: A target memory for storing data; A cache is used to store data and can query target data based on a data access request received by the access party; A control module, configured to control searching and reading target data from a target memory and a cache at the same time according to at least the access request when the first access strategy is adopted in the current cycle, and to feed back the target data to the accessing party; When the second access strategy is adopted in the current cycle, the query of the target data in the cache is controlled at least according to the access request, and the target data is fed back to the accessing party; wherein the access strategy selection of the current cycle is determined based on the cache hit parameters of the previous cycle.

9. The data access system according to claim 8, wherein the control module comprises: A control unit, for determining an access strategy for a current cycle according to a cache hit parameter of a previous cycle, and when receiving a data access request from an access party, when the access strategy of the current cycle is a first access strategy, controlling an access path between the access party and the target memory to search and read the target data from the target memory, and searching and reading the target data from the cache; when the access strategy of the current cycle is a second access strategy, controlling an access path between the access party and the target memory to bypass, and searching and reading the target data from the cache; A counter set is used to record the number of times the target data is found in the cache when the first access strategy is adopted, each counter corresponds to a tag group, each tag group contains a specific number of tags, and each tag corresponds to a physical address information in the target memory.

10. The data access system according to claim 9, wherein the cache comprises: A directory storage unit, used to store a preset storage directory, wherein the preset storage directory includes at least two tag groups, A data storage unit, used for storing data; A temporary storage unit, used for temporarily storing target data read from the data storage unit; A selection unit, configured to, when the first access strategy is adopted in the current cycle, feed back the target data read from the target memory to the access party based on the query result of querying the target data in the cache indicating that the target data does not exist in the cache, and feed back the target data read from the cache to the access party based on the query result of querying the target data in the cache indicating that the target data exists in the cache; The control module also includes: A result storage unit is used to receive a query result of the cache query target data when the first access strategy is adopted in the current cycle, and based on the query result representing the existence of the target data in the cache, trigger the counter count of the tag group corresponding to the physical address information in the access request in the counter set to increase by one.

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