Approximate circuit optimization method based on heredity and hill climbing algorithm

Abstract

The invention discloses an approximate circuit optimization method based on genetic and hill climbing algorithms, and belongs to the technical field of integrated circuit design automation. The method comprises the following steps: firstly, performing chromosome coding on graph structure members converted from a netlist, and then performing crossing, compiling and filial generation fitness calculation and selection on gene segments of chromosomes by utilizing a genetic algorithm; and arranging, crossing and inheriting the filial generations according to the fitness by using a hill climbing algorithm until the fitness requirement is met. According to the method, optimization of circuit area and time delay is realized while an approximation circuit is ensured to meet a given fault-tolerant rate, the problem that a large amount of storage resources are consumed in circuit optimization is solved by utilizing respective advantages of heredity and a hill climbing algorithm, and the optimization efficiency is greatly improved at the same time; moreover, by using heuristic algorithms such as a genetic algorithm and a hill climbing algorithm, the problem that the coverage in a structure library cannot be calculated in advance can be solved, and the capability of solving a redundant circuit by the approximate circuit optimization method is further improved.

Description

Technical Field

[0001] The invention relates to an approximate circuit optimization method based on genetic and hill climbing algorithms, and belongs to the technical field of integrated circuit design automation. Background Art

[0002] In the front-end design of digital integrated circuits, logic synthesis is a crucial link. Its process is to convert the circuit described by behavior and RTL-level circuit into gate-level circuit. Common representation methods in the conversion process include Boolean algebra, truth table and graph, among which graph is an efficient and clear representation method and is the mainstream representation form of logic synthesis software at this stage.

[0003] Approximate logic synthesis is a very important part of the logic synthesis category. It is a method of converting an approximate circuit netlist into a graph and then optimizing it. The specific principle is to reduce the resource consumption of the circuit, such as the number of logic gates, chip area or power consumption, by intentionally introducing controllable errors in the design process, while trying to maintain the functional correctness of the circuit. This method takes advantage of the application's tolerance for computational accuracy and sacrifices minimal output quality in exchange for significant resource savings. It is widely used in many fields such as machine learning, computer vision, signal processing, data mining, multimedia processing, etc., especially in scenarios that require high computational efficiency but relatively loose requirements on result accuracy.

[0004] However, after the approximate circuit gate-level netlist is converted into a graph, there will always be various redundancies. These redundancies may come from the previous gate-level netlist or from the redundancy after conversion into a graph. The existence of redundancy will bring about various adverse consequences such as increasing the circuit area, power consumption, delay and reducing performance. Therefore, it is a very meaningful task to eliminate redundancy and optimize the approximate circuit.

[0005] The current method for optimizing redundant nodes in approximate circuit logic synthesis is to use pre-stored optimized structures to replace redundant graph structures. This method runs faster, but pre-storing structures consumes a lot of storage resources, especially when dealing with large-scale circuit designs, where storage requirements increase dramatically. On the other hand, circuit structures are complex and changeable, and the method of pre-storing structures to replace redundancy cannot fully cover all redundant situations, which limits the applicability and effectiveness of the optimization method.

[0006] Therefore, it is very important to choose a method that can automatically search and autonomously optimize redundancy. Such a method can dynamically adapt to different circuit structures and design requirements, provide a more flexible and comprehensive optimization strategy, thereby reducing dependence on storage resources without sacrificing optimization effects, and improving the universality and practicality of the optimization algorithm. Summary of the invention

[0007] In order to reduce the dependence on storage resources and improve the applicability and effectiveness of approximate circuit optimization, the present invention provides an approximate circuit optimization method based on genetic and hill climbing algorithms. The technical solution is as follows:

[0008] The approximate circuit optimization method of the present invention comprises:

[0009] Step 1: Convert the original netlist of the circuit to be optimized into a graph structure;

[0010] Step 2: Divide the graph structure into a plurality of sub-circuit graphs;

[0011] Step 3: performing chromosome encoding, crossover, and mutation operations on the sub-circuit diagram to generate offspring;

[0012] Step 4: Calculate the fitness of the offspring. If the fitness of the offspring meets the requirements, the optimization of the current subcircuit is completed, and continue to perform the crossover and mutation operations of step 3 on the next subcircuit;

[0013] If the fitness of the offspring does not meet the requirements, first record the fitness of the current offspring to be optimized and the position of the previous chromosome crossover, and proceed to step 5;

[0014] Step 5: If the fitness of the offspring does not meet the requirement within the number of iterations, continue the chromosome random crossover and mutation operations in step 3; if the fitness does not meet the requirement outside the number of iterations, first arrange the current offspring to be optimized according to the fitness;

[0015] Step 6: After the fitness ranking is completed, the offspring to be optimized are cross-ranked;

[0016] Step 7: Use the hill climbing algorithm to guide the fitness of the offspring to be optimized to continuously improve until the preset fitness requirements are met;

[0017] Step 8: If all sub-circuits are optimized, all sub-circuits are spliced ​​into a complete circuit diagram to obtain an optimized circuit.

[0018] Optionally, the fitness of the offspring i The calculation method is:

[0019]

[0020] Among them, error_rate i area_ratio represents the error rate of the subcircuit, which is obtained by weighting the error rate of the entire circuit diagram structure total_error_rate according to the importance and sensitivity of the subcircuit; i represents the area ratio of the subcircuit before and after optimization, we represents the weight of the error rate, w a represents the weight of the area ratio.

[0021] Optionally, the error rate is expressed as:

[0022]

[0023] Among them, O approx_i Represents the input set that causes the subcircuit output error, Input i Represents the input set of the subcircuit, and Number_of represents the number of elements in the set.

[0024] Optionally, the process of chromosome crossover in step 3 includes:

[0025] Parent s1 and s rand1 Perform chromosome crossover at a randomly selected crossover point c, expressed as:

[0026] s1=(s1[1:c-1],s rand1 [c],s1[c+1:end])

[0027] s rand1 =(s rand1 [1:c-1],s1[c],s rand1 [c+1:end])

[0028] Where s1 is a sequentially numbered sub-circuit diagram derived from the diagram structure, s rand1 is a random subcircuit graph derived from the graph structure.

[0029] Optionally, the parent of the chromosome mutation in step 3 is derived from the sub-circuit diagram with randomly numbered numbers in the graph structure, and the chromosome mutation may occur in each gene segment of the parent chromosome.

[0030] Optionally, the mutation rate of the chromosome in step 3 is:

[0031] g' i =1-g i X(mut_rate)

[0032] Among them, X(mut_rate) means that X follows Bernoulli distribution, and the mutated i-th gene g' i From the i-th gene g before mutation i The chromosome mutation operation is performed with the mutation rate mut_rate.

[0033] Optionally, the chromosome encoding process in step 3 includes: encoding layer by layer from the main input of the subcircuit in the order of the figure number upwards, a single gene fragment consists of a node and its two inputs, if the input of the single gene fragment is the inverted output of its previous level, an inverted mark is added after the previous level figure number.

[0034] Optionally, the process of cross-arrangement in step 6 includes:

[0035] After sorting all the offspring to be optimized by fitness, first sort the offspring to be optimized s u1 As parent 1, and other random chromosomes rand1 In the offspring to be optimized u2 Crossover is performed at the crossover position of the two, and the offspring s generated by the two are compared. r1 Whether the fitness meets the requirements;

[0036] If the offspring s r1 If the fitness of the offspring s meets the requirement, then stop the crossover according to the arrangement; if the offspring s r1 If the fitness of the offspring s does not meet the requirements, r1 and other chromosomes in the offspring to be optimized u3 The intersection is performed at the intersection position, and so on.

[0037] Optionally, the error rate total_error_rate of the entire circuit diagram can be determined by the input set O that causes the approximate circuit output error. total_approx The ratio of the number of elements in the set Total_Input to the number of elements in all possible inputs is expressed as:

[0038]

[0039] The present invention provides an approximate circuit optimization device, comprising a memory and a processor;

[0040] The memory is used to store computer programs;

[0041] The processor is used to implement the approximate circuit optimization method as described in any one of the above items when executing the computer program.

[0042] The present invention provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the approximate circuit optimization method as described in any one of the above items is implemented.

[0043] The beneficial effects of the present invention are:

[0044] The present invention first performs chromosome encoding on the graph structure members converted from the netlist, and then uses a genetic algorithm to cross, compile, and calculate and select the fitness of the offspring on the chromosome gene fragments. In addition, a hill climbing algorithm is used to arrange the offspring according to fitness and perform crossover and inheritance until the fitness requirements are met. The present invention optimizes the circuit area and delay while ensuring that the approximate circuit meets the given fault tolerance rate. Compared with the traditional method of replacing redundant circuits with pre-calculated structures, the present invention uses the respective advantages of genetic and hill climbing algorithms to solve the problem of large consumption of storage resources in circuit optimization, while greatly improving the optimization efficiency; moreover, the use of heuristic algorithms such as genetic algorithms and hill climbing algorithms can solve the range that is not covered in the pre-calculated structure library, which further improves the ability to solve redundant circuits. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0046] Figure 1 It is the overall flow chart of the approximate circuit optimization method of the present invention.

[0047] Figure 2 This is a schematic diagram of the circuit structure division in the second embodiment of the present invention.

[0048] Figure 3 This is a schematic diagram of chromosome coding of the circuit diagram structure in the second embodiment of the present invention.

[0049] Figure 4 This is a schematic diagram of the parent chromosome crossover in Example 2 of the present invention.

[0050] Figure 5 This is a schematic diagram of the parent chromosome variation in Example 2 of the present invention.

[0051] Figure 6 Schematic diagram of the comparison of functions between the optimized sub-graph and the original sub-graph in the second embodiment of the present invention.

[0052] Figure 7 This is a schematic diagram of the arrangement and crossover of the offspring to be optimized in the second embodiment of the present invention. DETAILED DESCRIPTION

[0053] In order to make the objectives, technical solutions and advantages of the present invention more clear, the embodiments of the present invention will be further described in detail below with reference to the accompanying drawings.

[0054] Embodiment 1:

[0055] This embodiment provides an approximate circuit optimization method based on genetic and hill climbing algorithms, see Figure 1 , the method comprising:

[0056] Step 1: Convert the original netlist of the circuit to be optimized into a graph structure;

[0057] Step 2: Divide the graph structure into several sub-circuit graphs;

[0058] Step 3: Perform chromosome encoding, crossover, and mutation operations on the sub-circuit diagram to generate offspring;

[0059] Step 4: Calculate the fitness of the offspring. If the fitness of the offspring meets the requirements, the current subcircuit is optimized and the crossover and mutation operations of step 3 are continued on the next subcircuit.

[0060] If the fitness of the offspring does not meet the requirements, first record the fitness of the current offspring to be optimized and the position of the previous chromosome crossover, and proceed to step 5;

[0061] Step 5: If the fitness of the offspring does not meet the requirement within the number of iterations, continue with the chromosome random crossover and mutation operations in step 3; if the fitness does not meet the requirement outside the number of iterations, first arrange the current offspring to be optimized according to the fitness;

[0062] Step 6: After the fitness ranking is completed, the offspring to be optimized are cross-ranked;

[0063] Step 7: Use the hill climbing algorithm to guide the fitness of the offspring to be optimized to continuously improve until the preset fitness requirements are met;

[0064] Step 8: If all sub-circuits are optimized, all sub-circuits are spliced ​​into a complete circuit diagram to obtain an optimized circuit.

[0065] Embodiment 2:

[0066] This embodiment provides an approximate circuit optimization method based on genetic and hill climbing algorithms, see Figure 1 , the method comprising:

[0067] Step 1: Convert the original netlist of the circuit to be optimized into a graph structure (this embodiment uses the structure of AIG to illustrate, and this method is also applicable to other directed acyclic graphs).

[0068] Step 2: Divide the complete circuit diagram P0 into multiple sub-circuits, such as Figure 2 As shown, the subcircuits are numbered s1, s2,, s N First, use the genetic and hill climbing algorithms to process the subcircuit numbered s1, and then sequentially process the subcircuit numbers s2,,s N .

[0069] The circuit division method is shown in formula (1):

[0070] P0={s1,s2,,s N} (1)

[0071] Partitioning the circuit helps reduce the time required to evaluate the error rate of circuit subgraphs, reduces the complexity of optimizing a single subcircuit, and also makes it easier to use genetic algorithms to process multiple subcircuits in parallel, thereby improving optimization efficiency.

[0072] Step 3: Perform chromosome encoding, crossover, and mutation operations on the sub-circuit diagram to generate offspring.

[0073] Among them, the chromosome encoding adopts the method of encoding layer by layer from the main input PI of the graph structure (such as non-graph AIG) in the order of graph numbers upward, such as Figure 3 As shown, a single gene segment consists of a node and its two inputs. If the input of a single gene segment is the inverted output of its previous level, "a" is added after the previous level graph number to indicate inversion. A single chromosome consists of a main output PO of the graph structure segment and multiple gene segments composed of its transfer fan-in TFI.

[0074] Then, chromosome crossover is performed. One parent s1 of the chromosome crossover comes from the sequentially numbered subcircuit diagram of the graph structure, and the other parent comes from the random subcircuit diagram s of the graph structure. rand1 . Chromosome crossover can occur in each gene segment of the parent chromosome. After the two parent chromosomes complete the crossover operation, a child will be generated to wait for fitness evaluation. Figure 4 As shown, the parents s1 and s rand1 The method of performing the chromosome crossover operation at a randomly selected crossover point c is shown in formulas (2) and (3):

[0075] s1=(s1[1:c-1],s rand1 [c],s1[c+1:end]) (2)

[0076] s rand1 =(s rand1 [1:c-1],s1[c],s rand1 [c+1:end]) (3)

[0077] The parent of chromosome mutation comes from the sub-circuit diagram with random numbers in the graph structure. Chromosome mutation can occur in various gene fragments of the parent chromosome, such as Figure 5 As shown. The mutated gene g' i The i-th gene g before the mutation can be iThe chromosome mutation operation is performed according to the X rule with the mutation rate mut_rate, as shown in formula (4):

[0078] g' i =1-g i ·X(mut_rate) (4)

[0079] Where X(mut_rate) means that X follows a Bernoulli distribution, the probability of taking a value of 1 is the mutation rate mut_rate, and the probability of taking a value of 0 is 1-mut_rate.

[0080] Step 4: Calculate the fitness of the offspring and select the offspring. First calculate the fitness of the offspring. i , and then compare the preset fitness threshold Fitness0 to select the offspring to be inherited.

[0081] If the fitness of the offspring meets the requirements, the current subcircuit is optimized and the crossover and mutation operations in step 3 are continued on the next subcircuit;

[0082] If the fitness of the offspring does not meet the requirements, first record the fitness of the current offspring to be optimized and the position of the previous chromosome crossover, and proceed to step 5.

[0083] Fitness of offspring i Can be determined by the error rate error_rate i and its weight w e and area_ratio i and its weight w a It is expressed as formula (5):

[0084]

[0085] Each subcircuit diagram s i error_rate i The error rate total_error_rate of the entire circuit diagram structure is obtained by weighting the importance and sensitivity of the sub-circuit, which can be obtained by the input set O that causes the approximate circuit output error. approx_i The number of elements in the set Input and the possible inputs i The ratio of the number of internal elements is expressed as follows:

[0086]

[0087] The area ratio Area_ratio can be obtained by approximating the area of ​​the circuit after optimization. approx Area before approximate circuit optimization origThe ratio of is expressed as follows, as shown in formula (7):

[0088]

[0089] The area of ​​the circuit is mainly measured by the number of nodes in the graph structure.

[0090] The Monte Carlo simulation method is used to compare the optimized sub-graph function with the original sub-graph function.

[0091] Step 5: If the fitness of the offspring does not meet the requirement within the number of iterations, continue with the chromosome random crossover and mutation operations in step 3; if the fitness does not meet the requirement outside the number of iterations, first arrange the fitness of the current offspring to be optimized;

[0092] Fitness sorting is to sort the unqualified offspring that exceed the number of iterations from high to low according to the fitness size, and then number the offspring to be optimized s u1 , offspring to be optimized u2 …, the arrangement can be expressed as formula (8):

[0093] Fitness u1 >Fitness u2 >>…>Fitness u(N-1) >Fitness uN (8)

[0094] Step 6: After the arrangement is completed according to fitness, the offspring to be optimized are cross-arranged.

[0095] like Figure 7 As shown, the offspring s with the highest fitness to be optimized u1 The original chromosome crossover position remains unchanged, and then the offspring s to be optimized is taken u1 and the remaining random chromosomes rand1 In the offspring to be optimized u2 Chromosomes cross over at the original crossover position, and the two generate offspring s r1 , the process is as follows:

[0096] s u1 =(s u1 [1:c u1 -1],s u1 [c u1 ],s u1 [c u1 +1:c u2 -1],s rand1 [c u2 ],s u1 [c u2 +1:end]) (9)

[0097] s rand1 =(s rand1 [1:c u2 -1],s u1 [c u2 ],s rand1 [c u2 +1:end]) (10)

[0098] For offspring r1 The fitness is evaluated. If its fitness meets the requirements, the next step of circuit splicing is carried out. If its fitness does not meet the requirements, a second crossover is performed according to the arrangement.

[0099] Step 7: In the process of repeatedly iterating the crossover according to the arrangement, the fitness of the offspring to be optimized is guided to be continuously improved by using the hill climbing algorithm until the preset fitness requirement is met.

[0100] Observe the offspring r1 The fitness of the offspring to be optimized is u1 Whether there is an improvement on the basis of chromosomes, if not, the offspring will be optimized u1 Chromosomes and other random chromosomes in the offspring to be optimized u2 The chromosomes continue to cross over at the original crossover position, and the two regenerate offspring s r1 , if it is improved, the offspring s will be retained r1 Continue with the crossover by arrangement.

[0101] Offspring r1 If the fitness of the offspring is improved but still does not meet the fitness requirement, r1 The original chromosome crossover to be optimized progeny s u1 Position and offspring to be optimized u2 The position remains unchanged, and then the offspring s is taken r1 and the remaining random chromosomes rand2 In the offspring to be optimized u3 Chromosomes cross over at the original crossover position, and the two generate offspring s r2 , the process is as follows:

[0102] s r1 =(s r1 [1:c u1 -1],s r1 [c u1 ],s r1 [c u1 +1:c u2 -1],s r1 [c u2 ],s r1 [cu2 +1:c u3 -1],s rand2 [c u3 ],s r1 [c u3 +1:end]) (11)

[0104] s rand2 =(s rand2 [1:c u3 -1],s r1 [c u3 ],s rand2 [c u3 +1:end]) (12)

[0105] The fitness evaluation and hill climbing algorithm guidance are performed again, and the operation is repeated until the offspring meets the fitness requirements. i+2 The expression of is as follows:

[0106] s i+2 = argmax{Fitness ri ,Fitness r(i+1)} (13)

[0107] Step 8: If all subcircuits are optimized, all subcircuits s' that meet the fitness requirements are i Splice into a complete circuit diagram P t+1 , the optimized circuit is obtained, which is expressed as:

[0108] P t+1 ={s'1,s'2,,s' N} (14)

[0109] This embodiment first performs chromosome encoding on the graph structure members converted from the netlist, and then uses a genetic algorithm to perform crossover, mutation, and offspring fitness calculation and selection on the gene segments of the chromosome. In addition, a hill climbing algorithm is used to arrange the offspring according to fitness, crossover, and inheritance until the fitness requirements are met. The present invention optimizes the circuit area and delay while ensuring that the approximate circuit meets a given fault tolerance rate. Compared with the traditional method of replacing redundant circuits with pre-calculated structures, this embodiment uses the respective advantages of genetic and hill climbing algorithms to solve the problem of large consumption of storage resources in circuit optimization, while greatly improving the optimization efficiency; moreover, the use of heuristic algorithms such as genetic algorithms and hill climbing algorithms can solve the range that is not covered in the pre-calculated structure library, which further improves the ability to solve redundant circuits.

[0110] Some steps in the embodiments of the present invention may be implemented using software, and the corresponding software program may be stored in a readable storage medium, such as a CD or a hard disk.

[0111] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. An approximate circuit optimization method, characterized in that: The method comprises: Step 1: Convert the original netlist of the circuit to be optimized into a graph structure; Step 2: Divide the graph structure into a plurality of sub-circuit graphs; Step 3: performing chromosome encoding, crossover, and mutation operations on the sub-circuit diagram to generate offspring; Step 4: Calculate the fitness of the offspring. If the fitness of the offspring meets the requirements, the optimization of the current subcircuit is completed, and continue to perform the crossover and mutation operations of step 3 on the next subcircuit; If the fitness of the offspring does not meet the requirements, first record the fitness of the current offspring to be optimized and the position of the previous chromosome crossover, and proceed to step 5; Step 5: If the fitness of the offspring does not meet the requirement within the number of iterations, continue the chromosome random crossover and mutation operations in step 3; if the fitness does not meet the requirement outside the number of iterations, first arrange the current offspring to be optimized according to the fitness; Step 6: After the fitness ranking is completed, the offspring to be optimized are cross-ranked; Step 7: Use the hill climbing algorithm to guide the fitness of the offspring to be optimized to continuously improve until the preset fitness requirements are met; Step 8: If all sub-circuits are optimized, all sub-circuits are spliced ​​into a complete circuit diagram to obtain an optimized circuit.

2. The approximate circuit optimization method according to claim 1, characterized in that: The fitness of the offspring i The calculation method is: Among them, error_rate i area_ratio represents the error rate of the subcircuit, which is obtained by weighting the error rate of the entire circuit diagram structure total_error_rate according to the importance and sensitivity of the subcircuit; i represents the area ratio of the subcircuit before and after optimization, w e represents the weight of the error rate, w a represents the weight of the area ratio.

3. The approximate circuit optimization method according to claim 2, characterized in that: The expression of the error rate is: Among them, O approx_i Represents the input set that causes the subcircuit output error, Input i Represents the input set of the subcircuit, and Number_of represents the number of elements in the set.

4. The approximate circuit optimization method according to claim 1, characterized in that: The process of chromosome crossing in step 3 includes: Parent s1 and s rand1 Perform chromosome crossover at a randomly selected crossover point c, expressed as: s1=(s1[1:c-1],s rand1 [c],s1[c+1:end]) s rand1 =(s rand1 [1:c-1],s1[c],s rand1 [c+1:end]) Where s1 is a sequentially numbered sub-circuit diagram derived from the diagram structure, s rand1 is a random subcircuit graph derived from the graph structure.

5. The approximate circuit optimization method according to claim 1, characterized in that: The parent of the chromosome mutation in step 3 is derived from the sub-circuit diagram with random numbers in the graph structure, and the chromosome mutation can occur in each gene segment of the parent chromosome.

6. The approximate circuit optimization method according to claim 1, characterized in that: The mutation rate of the chromosome in step 3 is: g' i =1-g i ·X(mut_rate) Among them, X(mut_rate) means that X follows Bernoulli distribution, and the mutated i-th gene g' i From the i-th gene g before mutation i The chromosome mutation operation is performed with the mutation rate mut_rate.

7. The approximate circuit optimization method according to claim 1, characterized in that: The chromosome encoding process in step 3 includes: starting from the main input of the subcircuit, the nodes are encoded layer by layer in the order of the graph numbers, and a single gene fragment consists of a node and its two inputs. If the input of the single gene fragment is the inverted output of its previous level, an inverted mark is added after the previous level graph number.

8. The approximate circuit optimization method according to claim 1, characterized in that: The process of cross-arrangement in step 6 includes: After sorting all the offspring to be optimized by fitness, first sort the offspring to be optimized s u1 As parent 1, and other random chromosomes rand1 In the offspring to be optimized u2 Crossover is performed at the crossover position of the two, and the offspring s generated by the two are compared. r1 Whether the fitness meets the requirements; If the offspring s r1 If the fitness of the offspring s meets the requirement, then stop the crossover according to the arrangement; if the offspring s r1 If the fitness of the offspring s does not meet the requirements, r1 and other chromosomes in the offspring to be optimized u3 The intersection is performed at the intersection position, and so on.

9. An approximate circuit optimization device, characterized in that: including memory and processor; The memory is used to store computer programs; The processor is configured to implement the approximate circuit optimization method according to any one of claims 1 to 8 when executing the computer program.

10. A computer-readable storage medium, characterized in that: The storage medium stores a computer program, and when the computer program is executed by a processor, the approximate circuit optimization method according to any one of claims 1 to 8 is implemented.

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