Program execution method and device, equipment and storage medium
By using multiple cores to allocate and switch the function code of UEFI application during UEFI startup, and detecting kernel exceptions through heartbeat signals, the program suspension problem caused by UEFI not supporting multi-threaded execution is solved, and UEFI does not stop responding is achieved. Startup process and reliable log analysis.
Patent Information
- Application Number
- CN202411336677.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-24
- Publication Date
- 2025-02-11
AI Technical Summary
The existing UEFI does not support multi-threaded execution, which causes the application to stop responding when the program is suspended and cannot perform other operations. The device needs to be restarted to collect execution logs, but the restart affects the user experience and the log may not be saved, making it difficult to analyze the reason for the suspend.
During the UEFI startup process, the first core is used to allocate the first functional code of the UEFI application to the second core for execution. When responding to the second core exception, the code is allocated to the third core for execution, and the kernel exception is detected through the heartbeat signal. Make sure the program does not stop responding.
It avoids UEFI applications stop responding, improves user experience, collects execution logs and analyzes the reason for suspending without restarting the device, and enhances the stability and analyticity of the UEFI startup process.
Smart Images
Figure CN119415224A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the field of computer technology, and in particular to a program execution method, apparatus, device and storage medium. Background Art
[0002] The current Unified Extensible Firmware Interface (UEFI) does not support multi-threaded execution. If the UEFI program is suspended during execution, the application will stop responding and other operations will be impossible. At this time, the only option is to restart the electronic device and collect the execution log of the UEFI program to analyze the cause of the suspension. However, restarting the device will seriously affect user use and result in a poor user experience. The execution log may not be saved due to restarting the device, making it difficult to analyze the cause of the suspension. Summary of the invention
[0003] The present disclosure provides a program execution method, apparatus, device and storage medium to at least solve the above technical problems existing in the prior art.
[0004] According to a first aspect of the present disclosure, a program execution method is provided, including: during a Unified Extensible Firmware Interface (UEFI) startup process, determining a kernel in a processor that executes a UEFI application as a first kernel; using the first kernel to allocate a first function code in the UEFI application to a second kernel in the processor for execution, the first kernel being different from the second kernel, and the first function code being a code for executing the UEFI startup task; in response to an abnormality in the second kernel, using the first kernel to allocate the first function code to a third kernel in the processor for execution, the third kernel being different from the first kernel and the second kernel.
[0005] In one possible implementation, the use of the first kernel to allocate the first function code in the UEFI application to the second kernel in the processor for execution includes: allocating the first function code in the UEFI application to the second kernel in the processor for execution based on the second function code in the UEFI application by the first kernel, wherein the second function code is a code for allocating the code in the first kernel to other kernels for execution.
[0006] In one possible implementation, after using the first core to allocate the first function code in the UEFI application to the second core in the processor for execution, it also includes: controlling the second core to update the heartbeat signal in the shared memory every first target time period, and the shared memory is a memory accessible to all cores of the processor.
[0007] In one possible implementation, the responding to the second kernel exception includes: using the first kernel to detect whether the heartbeat signal in the shared memory meets the target condition every second target time period; and responding to the first kernel determining that the heartbeat signal does not meet the target condition.
[0008] In one possible implementation, after using the first core to allocate the first function code in the UEFI application to the second core in the processor for execution, it also includes at least one of the following: setting the priority of the process related to the second core to the highest priority, the higher the priority of the process, the earlier the process is executed; increasing the memory space and disk space corresponding to the second core; adjusting the operating frequency and operating voltage of the second core to the target threshold.
[0009] In one possible implementation, a program execution method further includes: determining, by the first kernel, a cause of an exception of the second kernel based on a running log and debugging information of the second kernel; and repairing, by the first kernel, an exception of the second kernel based on the cause of the exception.
[0010] In one possible implementation, a program execution method further includes: in response to the second kernel being normal, executing the first function code through the second kernel until the UEFI startup is completed.
[0011] According to a second aspect of the present disclosure, a program execution device is provided, including: a determination module, used to determine, during a Unified Extensible Firmware Interface (UEFI) startup process, that a kernel in a processor that executes a UEFI application is a first kernel; an allocation module, used to use the first kernel to allocate a first function code in the UEFI application to a second kernel in the processor for execution, the first kernel being different from the second kernel, and the first function code being a code for executing the UEFI startup task; the allocation module, further used to use the first kernel to allocate the first function code to a third kernel in the processor for execution, in response to an abnormality in the second kernel, the third kernel being different from the first kernel and the second kernel.
[0012] According to a third aspect of the present disclosure, there is provided an electronic device, including:
[0013] at least one processor; and
[0014] a memory communicatively connected to the at least one processor; wherein,
[0015] The memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the method described in the present disclosure.
[0016] According to a fourth aspect of the present disclosure, a non-transitory computer-readable storage medium storing computer instructions is provided, wherein the computer instructions are used to cause the computer to execute the method described in the present disclosure.
[0017] It should be understood that the content described in this section is not intended to identify the key or important features of the embodiments of the present disclosure, nor is it intended to limit the scope of the present disclosure. Other features of the present disclosure will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] The above and other objects, features and advantages of the exemplary embodiments of the present disclosure will become readily understood by reading the detailed description below with reference to the accompanying drawings. In the accompanying drawings, several embodiments of the present disclosure are shown in an exemplary and non-limiting manner, in which:
[0019] In the drawings, the same or corresponding reference numerals represent the same or corresponding parts.
[0020] Figure 1 A schematic diagram showing a process of a program execution method according to an embodiment of the present disclosure Figure 1 ;
[0021] Figure 2 A schematic diagram showing a process of a program execution method according to an embodiment of the present disclosure Figure 2 ;
[0022] Figure 3 A schematic diagram showing a process of a program execution method according to an embodiment of the present disclosure Figure 3 ;
[0023] Figure 4 A schematic diagram showing the structure of a program execution device according to an embodiment of the present disclosure is shown;
[0024] Figure 5 A schematic diagram of the structure of an electronic device according to an embodiment of the present disclosure is shown. DETAILED DESCRIPTION
[0025] In order to make the purpose, features, and advantages of the present disclosure more obvious and easy to understand, the technical solutions in the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings in the embodiments of the present disclosure. Obviously, the described embodiments are only part of the embodiments of the present disclosure, not all of the embodiments. Based on the embodiments in the present disclosure, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present disclosure.
[0026] Figure 1 A schematic diagram showing a process of a program execution method according to an embodiment of the present disclosure Figure 1 ,like Figure 1 As shown, a program execution method includes:
[0027] Step S101: during a unified extensible firmware interface UEFI boot process, a kernel that executes a UEFI application in a processor is determined as a first kernel.
[0028] In this embodiment, the processor is a multi-core central processing unit (CPU), and the multi-core CPU includes multiple cores (Core), each of which can execute programs independently; in the process of the electronic device starting up through UEFI, the core that executes the UEFI application in the multi-core CPU is determined as the first core, and the first core is also the boot processor (BSP) responsible for starting up, and the other cores except the first core are application processors (AP). In one example, the multiple cores of the multi-core CPU can determine the first core that executes the UEFI application through a competition mechanism, or, according to the identification information of the BSP configured in advance in the multi-core CPU, such as the core identification, core number, etc., determine the first core that executes the UEFI application.
[0029] Step S102: using the first core to distribute the first function code in the UEFI application to the second core in the processor for execution.
[0030] In this embodiment, the first function code in the UEFI application is the code for executing the UEFI startup task, that is, the main function code in the UEFI application. The second core is the core other than the first core in the multi-core CPU. After determining the first core for executing the UEFI application, the first core can be used to allocate the first function code in the UEFI application to the second core for execution. At this time, the first core is the core that controls the allocation of the first function code, and the second core is the core that executes the first function code.
[0031] Step S103 , in response to the second core being abnormal, using the first core to distribute the first function code to a third core in the processor for execution.
[0032] In this embodiment, during the process of the second core executing the first function code, if the second core is abnormal, the first core can also be used to distribute the first function code to the third core in the multi-core CPU for execution, and the third core is different from the first core and the second core; during the process of the third core executing the first function code, if the third core is abnormal, the first core can also be used to distribute the first function code to the fourth core in the multi-core CPU, and the fourth core is different from the first core, the second core and the third core, and so on. In another example, if the second core is abnormal, the first core can also take back the control of the first function code, that is, reload the first function code into the first core for execution.
[0033] In the present disclosure, if the core executing the first function code is abnormal, the first function code can be allocated to other cores of the processor, thereby preventing the UEFI application from stopping responding. The user will see on the user interface (UI) that the UEFI application is stuck and then automatically reloaded, without the need to restart the electronic device, thereby improving the user experience. The execution log of the UEFI application can be directly collected to analyze the cause of the suspension, thereby quickly eliminating abnormalities in the UEFI startup process.
[0034] In another embodiment, step S102 “using the first core to distribute the first function code in the UEFI application to the second core in the processor for execution” includes:
[0035] The first core allocates the first function code in the UEFI application to the second core in the processor for execution based on the second function code in the UEFI application, where the second function code is a code for allocating the code in the first core to other cores for execution.
[0036] In this embodiment, the UEFI application includes a first function code and a second function code, the first function code is a code for executing the UEFI startup task, that is, the main function code in the UEFI application, and the second function code is a code for allocating the code in the first kernel to other kernels for execution. In one example, the StartupThisAP function in the first kernel as the BSP can pass the function code to the specified AP, and the first kernel does not need to wait for the AP to complete the execution of the function code after calling the StartupThisAP function in the non-blocking mode, and can immediately execute the next task. Therefore, it is necessary to adjust the first kernel to the non-blocking mode, and the CreateEvent function can be called to create an event (Event) for the WaitEvent function of the StartupThisAP function to monitor the status, so that the first kernel becomes non-blocking mode, that is, the second function code can use the StartupThisAP function and the CreateEvent function to allocate the first function code to the specified second kernel for execution. Specifically, an Event can be created by the CreateEvent function and provided to the StartupThisAP function, so that the BSP becomes non-blocking mode, so that the StartupThisAP function can be used to allocate the first function code to other APs for execution, while not affecting the execution of the second function code on the BSP.
[0037] Figure 2 A schematic diagram showing a process of a program execution method according to an embodiment of the present disclosure Figure 2 ,like Figure 2 As shown, a program execution method includes:
[0038] Step S201: During the Unified Extensible Firmware Interface (UEFI) boot process, a kernel that executes a UEFI application in a processor is determined as a first kernel.
[0039] Step S202: using the first core to distribute the first function code in the UEFI application to the second core in the processor for execution.
[0040] The specific implementation details of step S201-step S202 are similar to those of step S101-step S102 and will not be repeated here.
[0041] Step S203: Control the second kernel to update the heartbeat signal in the shared memory every first target period.
[0042] In this embodiment, the shared memory is a memory accessible to all cores of the processor. After the first function code in the UEFI application is assigned to the second core in the processor for execution, the second core can be controlled to update the heartbeat signal in the shared memory every first target period. The heartbeat signal can indicate whether the second core is normal.
[0043] Step S204: Utilize the first kernel to detect whether the heartbeat signal in the shared memory meets the target condition every second target period.
[0044] Step S205 , in response to the first core determining that the heartbeat signal does not meet the target condition, the first core is used to distribute the first function code to the third core in the processor for execution.
[0045] In this embodiment, the first kernel can detect whether the heartbeat signal in the shared memory meets the target condition every second target period. If the heartbeat signal does not meet the target condition, it proves that the second kernel is abnormal. At this time, the first kernel can be used to assign the first function code to the third kernel in the processor for execution; if the heartbeat signal meets the target condition, it proves that the second kernel is normal, wherein the second target period can be the same as or different from the first target period. In one example, if the first kernel does not read the heartbeat signal in the shared memory, it is determined that the heartbeat signal does not meet the target condition, or if the first kernel detects that the heartbeat signal in the shared memory is different from the pre-set target signal, it is determined that the heartbeat signal does not meet the target condition. After detecting whether the heartbeat signal in the shared memory meets the target condition, the first kernel also needs to clear the data in the shared memory so that the second kernel can continue to update the heartbeat signal in the shared memory.
[0046] In the present disclosure, a heartbeat mechanism is used to detect whether the second core is abnormal. If the second core is abnormal, the first core is used to allocate the first function code to the third core in the processor for execution, thereby preventing the UEFI application from stopping responding and improving the user experience.
[0047] In another embodiment, after step S102 “using the first core to allocate the first function code in the UEFI application to the second core in the processor for execution”, a program execution method further includes at least one of the following:
[0048] The priority of the process associated with the second core is set to the highest priority. The higher the priority of a process is, the earlier the process is executed.
[0049] Increase the memory and disk space for the second kernel.
[0050] The operating frequency and the operating voltage of the second core are adjusted to target thresholds.
[0051] In the present disclosure, after the first core is used to allocate the first function code in the UEFI application to the second core in the processor for execution, in order to ensure the efficient execution of the first function code in the second core, it is necessary to adjust the system resources of the electronic device to optimize the performance of the second core, and the adjustment method includes: setting the priority of the process allocated to the second core to the highest priority, thereby ensuring that the process of the second core is executed first; increasing the memory space and disk space corresponding to the second core can reduce memory access delay and improve disk read and write efficiency, thereby ensuring the execution efficiency of the first function code; adjusting the operating frequency and operating voltage of the second core to the target threshold can enhance the computing power of the second core and speed up the response time of the second core, thereby further ensuring the execution efficiency of the first function code, wherein the target threshold can be set according to the actual application scenario, and the present disclosure does not limit the target threshold. It should be emphasized that the target threshold cannot be too high, otherwise it will lead to increased power consumption of the processor, shortened battery life, and cause the processor to generate more heat, shortening the life of the processor.
[0052] In another embodiment, a program execution method further includes:
[0053] The first kernel determines the abnormal cause of the second kernel based on the operation log and debugging information of the second kernel; and the first kernel repairs the abnormality of the second kernel based on the abnormal cause.
[0054] In the present disclosure, if the second kernel is abnormal, after allocating the first function code to the third kernel in the processor for execution, the first kernel can directly access and analyze the operation log and debugging information of the second kernel, determine the cause of the abnormality of the second kernel, and repair the abnormality of the second kernel based on the cause of the abnormality, thereby quickly eliminating the abnormality in the UEFI startup process and ensuring the subsequent normal operation of the processor.
[0055] Figure 3 A schematic diagram showing a process of a program execution method according to an embodiment of the present disclosure Figure 3 ,like Figure 3 As shown, a program execution method includes:
[0056] Step S301: During a unified extensible firmware interface UEFI boot process, a kernel that executes a UEFI application in a processor is determined as a first kernel.
[0057] Step S302: using the first core to distribute the first function code in the UEFI application to the second core in the processor for execution.
[0058] The specific implementation details of step S301-step S302 are similar to those of step S101-step S102 and will not be repeated here.
[0059] If the second core is abnormal, step S303 is executed to distribute the first function code to the third core in the processor for execution by using the first core.
[0060] The specific implementation details of step S303 are similar to those of step S103 and are not repeated here.
[0061] If the second kernel is normal, step S304 is performed to execute the first function code through the second kernel until the UEFI startup is completed.
[0062] In the present disclosure, after the first function code in the UEFI application is assigned to the second core in the processor for execution using the first core, if the heartbeat mechanism is used to detect that the second core is normal, the first function code can be executed using the second core until the UEFI startup is completed and the Event created by the CreateEvent function is closed.
[0063] Figure 4 A schematic diagram of the structure of a program execution device according to an embodiment of the present disclosure is shown. Figure 4 As shown, a program execution device includes:
[0064] The determination module 10 is used to determine the kernel that executes the UEFI application in the processor as the first kernel during the Unified Extensible Firmware Interface UEFI startup process; the allocation module 11 is used to use the first kernel to allocate the first function code in the UEFI application to the second kernel in the processor for execution, the first kernel is different from the second kernel, and the first function code is the code for executing the UEFI startup task; the allocation module 11 is also used to respond to the second kernel abnormality and use the first kernel to allocate the first function code to the third kernel in the processor for execution, the third kernel is different from the first kernel and the second kernel.
[0065] In one embodiment, the allocation module 11 is also used to: allocate the first function code in the UEFI application to the second core in the processor for execution based on the second function code in the UEFI application through the first core, and the second function code is a code used to allocate the code in the first core to other cores for execution.
[0066] In one possible implementation, the allocation module 11 is further used to: control the second core to update the heartbeat signal in the shared memory every first target period, where the shared memory is a memory accessible to all cores of the processor.
[0067] In one embodiment, the allocation module 11 is further used to: use the first kernel to detect whether the heartbeat signal in the shared memory meets the target condition every second target period; in response to the first kernel determining that the heartbeat signal does not meet the target condition.
[0068] In one embodiment, the allocation module 11 is also used to: set the priority of the process related to the second core to the highest priority, the higher the priority of the process, the earlier the process is executed; increase the memory space and disk space corresponding to the second core; adjust the operating frequency and operating voltage of the second core to the target threshold.
[0069] In one possible implementation, a program execution device also includes: a repair module, which is used to determine the cause of the exception of the second kernel based on the operation log and debugging information of the second kernel through the first kernel; and repair the exception of the second kernel based on the cause of the exception through the first kernel.
[0070] In one possible implementation, a program execution device further includes: an execution module, configured to execute the first function code through the second kernel in response to the second kernel being normal, until the UEFI startup is completed.
[0071] According to an embodiment of the present disclosure, the present disclosure also provides an electronic device and a readable storage medium.
[0072] Figure 5 A schematic block diagram of an example electronic device 800 that can be used to implement an embodiment of the present disclosure is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the present disclosure described and / or required herein.
[0073] like Figure 5 As shown, the device 800 includes a computing unit 801, which can perform various appropriate actions and processes according to a computer program stored in a read-only memory (ROM) 802 or a computer program loaded from a storage unit 808 into a random access memory (RAM) 803. In the RAM 803, various programs and data required for the operation of the device 800 can also be stored. The computing unit 801, the ROM 802, and the RAM 803 are connected to each other via a bus 804. An input / output (I / O) interface 805 is also connected to the bus 804.
[0074] A number of components in the device 800 are connected to the I / O interface 805, including: an input unit 806, such as a keyboard, a mouse, etc.; an output unit 807, such as various types of displays, speakers, etc.; a storage unit 808, such as a disk, an optical disk, etc.; and a communication unit 809, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 809 allows the device 800 to exchange information / data with other devices through a computer network such as the Internet and / or various telecommunication networks.
[0075] The computing unit 801 may be a variety of general and / or special processing components with processing and computing capabilities. Some examples of the computing unit 801 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various dedicated artificial intelligence (AI) computing chips, various computing units running machine learning model algorithms, digital signal processors (DSPs), and any appropriate processors, controllers, microcontrollers, etc. The computing unit 801 performs the various methods and processes described above, such as a program execution method. For example, in some embodiments, a program execution method may be implemented as a computer software program, which is tangibly contained in a machine-readable medium, such as a storage unit 808. In some embodiments, part or all of the computer program may be loaded and / or installed on the device 800 via ROM 802 and / or communication unit 809. When the computer program is loaded into RAM 803 and executed by the computing unit 801, one or more steps of a program execution method described above may be performed. Alternatively, in other embodiments, the computing unit 801 may be configured to execute a program execution method in any other appropriate manner (e.g., by means of firmware).
[0076] Various implementations of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), systems on chips (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various implementations can include: being implemented in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which can be a special purpose or general purpose programmable processor that can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.
[0077] The program code for implementing the method of the present disclosure may be written in any combination of one or more programming languages. These program codes may be provided to a processor or controller of a general-purpose computer, a special-purpose computer, or other programmable data processing device, so that the program code, when executed by the processor or controller, enables the functions / operations specified in the flow chart and / or block diagram to be implemented. The program code may be executed entirely on the machine, partially on the machine, partially on the machine and partially on a remote machine as a stand-alone software package, or entirely on a remote machine or server.
[0078] In the context of the present disclosure, a machine-readable medium may be a tangible medium that may contain or store a program for use by or in conjunction with an instruction execution system, device, or equipment. A machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, device, or equipment, or any suitable combination of the foregoing. A more specific example of a machine-readable storage medium may include an electrical connection based on one or more lines, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
[0079] To provide interaction with a user, the systems and techniques described herein can be implemented on a computer having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and pointing device (e.g., a mouse or trackball) through which the user can provide input to the computer. Other types of devices can also be used to provide interaction with the user; for example, the feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including acoustic input, voice input, or tactile input).
[0080] The systems and techniques described herein may be implemented in a computing system that includes back-end components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes front-end components (e.g., a user computer with a graphical user interface or a web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such back-end components, middleware components, or front-end components. The components of the system may be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: a local area network (LAN), a wide area network (WAN), and the Internet.
[0081] A computer system may include a client and a server. The client and the server are generally remote from each other and usually interact through a communication network. The relationship of client and server is generated by computer programs running on respective computers and having a client-server relationship with each other. The server may be a cloud server, a server of a distributed system, or a server combined with a blockchain.
[0082] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps recorded in this disclosure can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solutions disclosed in this disclosure can be achieved, and this document does not limit this.
[0083] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of the features. In the description of the present disclosure, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.
[0084] The above is only a specific embodiment of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any person skilled in the art who is familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present disclosure, which should be included in the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be based on the protection scope of the claims.
Claims
1. A program execution method, comprising: During a unified extensible firmware interface (UEFI) boot process, a kernel executing a UEFI application in a processor is determined as a first kernel; Allocating, by using the first core, a first function code in the UEFI application to a second core in the processor for execution, the first core being different from the second core, and the first function code being a code for executing the UEFI startup task; In response to the second core being abnormal, the first core is used to distribute the first function code to a third core in the processor for execution, where the third core is different from the first core and the second core.
2. The method according to claim 1, wherein using the first core to allocate the first function code in the UEFI application to the second core in the processor for execution comprises: Based on the second function code in the UEFI application, the first function code in the UEFI application is allocated to the second core in the processor for execution by the first core, where the second function code is a code for allocating the code in the first core to other cores for execution.
3. The method according to claim 1, after using the first core to allocate the first function code in the UEFI application to the second core in the processor for execution, further comprising: The second core is controlled to update a heartbeat signal in a shared memory every first target period, where the shared memory is a memory accessible to all cores of the processor.
4. The method according to claim 3, wherein the response to the second kernel exception comprises: Using the first kernel to detect whether the heartbeat signal in the shared memory meets the target condition every second target period; In response to the first kernel determining that the heartbeat signal does not meet the target condition.
5. The method according to claim 1, after using the first core to allocate the first function code in the UEFI application to the second core in the processor for execution, further comprising at least one of the following: Setting the priority of the process related to the second kernel to the highest priority, wherein the higher the priority of the process is, the earlier the process is executed; Increase the memory space and disk space corresponding to the second kernel; The operating frequency and the operating voltage of the second core are adjusted to a target threshold.
6. The method according to any one of claims 1 to 5, further comprising: Determining, by the first kernel, an abnormality cause of the second kernel based on the operation log and debugging information of the second kernel; The first core repairs the exception of the second core based on the cause of the exception.
7. The method according to any one of claims 1 to 5, further comprising: In response to the second kernel being normal, executing the first function code through the second kernel until the UEFI boot is completed.
8. A program execution device, comprising: A determination module, used to determine a kernel executing a UEFI application in a processor as a first kernel during a unified extensible firmware interface UEFI startup process; an allocation module, configured to allocate, by using the first core, a first function code in the UEFI application to a second core in the processor for execution, wherein the first core is different from the second core, and the first function code is a code for executing the UEFI startup task; The allocation module is further used to allocate the first function code to a third core in the processor for execution using the first core in response to an exception of the second core, where the third core is different from the first core and the second core.
9. An electronic device, comprising: at least one processor; as well as a memory communicatively connected to the at least one processor; wherein, The memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the method according to any one of claims 1 to 7.
10. A non-transitory computer-readable storage medium storing computer instructions for causing a computer to execute the method according to any one of claims 1 to 7.