Verification method and device for functional unit model in simulation system

Abstract

The embodiment of the invention provides a method and a device for verifying a functional unit model in a simulation system. Automatic verification of a simulation model is realized by constructing a model verification platform. A cross compiling technology is innovatively designed to convert a simulation model into a functional unit model file, and a mapping mechanism of a structured variable and a flattened variable is established. The system executes model verification in the virtual machine environment, the numerical deviation is compared, the change trend between adjacent step lengths is analyzed, and multi-dimensional accuracy verification is achieved. According to the method, the limitation of traditional manual verification is broken through, and a systematic and automatic solution is provided for simulation model verification.

Description

Technical Field

[0001] The present application relates to the field of data processing, and in particular to a method and device for verifying a functional unit model in a simulation system. Background Art

[0002] Traditional simulation model verification methods often rely on manual experience and judgment, lacking systematic verification methods and standards. Existing technologies have data consistency issues in the model export and variable mapping process, and the verification process lacks automated support. The system is also relatively simple in terms of simulation step data collection and comparative analysis, making it difficult to discover deep-seated model problems.

[0003] At the same time, the existing system has obvious deficiencies in model verification in a virtual machine environment. Traditional methods usually only focus on numerical accuracy, ignore the importance of data change trends, and lack a complete abnormality record and tracking mechanism. The system is also relatively mechanical in cross-platform model verification and data conversion, and fails to fully utilize the advantages of modern virtualization technology.

[0004] In addition, existing technologies also have limitations in verification report generation and anomaly analysis. The lack of fine-grained verification indicator definition and systematic anomaly classification methods leads to insufficient credibility and traceability of verification results. Solving these problems is of great significance to improving the reliability and engineering practicality of simulation systems. Summary of the invention

[0005] In response to the problems in the prior art, the present application provides a verification method and device for a functional unit model in a simulation system, which can break through the limitations of traditional manual verification and provide a systematic and automated solution for simulation model verification.

[0006] In order to solve at least one of the above problems, the present application provides the following technical solutions: In a first aspect, the present application provides a method for verifying a functional unit model in a simulation system, comprising: Construct a model verification platform, the model verification platform includes a simulation model generation module and a virtual machine verification module; the simulation model generation module exports the simulation model into a functional unit model file through cross-compilation technology, extracts the structured variables of the simulation model and generates flattened variables of the functional unit model, establishes a mapping table between the structured variables and the flattened variables, writes the mapping table into a description file of the functional unit model file, collects benchmark data of the simulation model at each simulation step, and stores the benchmark data in a resource directory of the functional unit model file in a time series; The virtual machine verification module is started to load the target operating system, the virtual machine verification module calls the functional unit model file to perform step simulation calculation, collects the output data of the functional unit model at each simulation step, obtains the variable mapping relationship from the mapping table, and converts the output data into a corresponding structured form according to the variable mapping relationship to obtain the data to be verified; The benchmark data corresponding to the current step length is read from the resource directory, and the benchmark data is verified with the data to be verified, wherein the verification comprises: calculating the numerical deviation between the benchmark data and the data to be verified at corresponding moments, and judging whether the numerical deviation exceeds a preset tolerance range; calculating the changing trend of the data to be verified between adjacent steps, and comparing the changing trend with the changing trend of the benchmark data; when the numerical deviation exceeds the tolerance range or the changing trend is inconsistent, generating a verification anomaly flag, recording the step length position and data content corresponding to the verification anomaly flag, and writing the verification anomaly flag into a verification report.

[0007] Further, the simulation model generation module exports the simulation model into a functional unit model file through a cross-compilation technology, extracts the structured variables of the simulation model and generates flattened variables of the functional unit model, establishes a mapping table between the structured variables and the flattened variables, and writes the mapping table into a description file of the functional unit model file, including: Read the source code file and configuration parameters of the simulation model, compile the source code file into an executable file of the target platform based on a cross compiler, package the executable file and the configuration parameters of the simulation model to generate a functional unit model file, and store the functional unit model file in a preset file directory; Scan the global variables and local variables in the simulation model, generate a structured variable table according to the scope and data structure of the variables, expand the hierarchical structure in the structured variable table into a flat variable sequence, generate a unique identifier for each flat variable, establish a correspondence table between structured variables and flat variables, serialize the correspondence table and write it into the description file of the functional unit model file.

[0008] Furthermore, the collecting of the benchmark data of the simulation model at each simulation step and storing the benchmark data in a time series in a resource directory of the functional unit model file includes: Run the simulation model to enter the data acquisition state, calculate the sampling time point according to the simulation step parameter set in the model configuration file, read the value of the structured variable in the simulation model at each sampling time point, form the sampling time point and the corresponding structured variable value into a data record item, and establish an index table for the data record item according to the sampling sequence number; Create a benchmark data file, write the data record items into the benchmark data file, sort the data record items in the benchmark data file according to the sampling sequence number, save the sorted benchmark data file to the resource directory of the functional unit model file, generate a checksum for the benchmark data file and write it into the file header.

[0009] Further, the starting of the virtual machine verification module to load the target operating system, the virtual machine verification module calling the functional unit model file to perform step length simulation calculation, includes: Initialize the configuration parameters of the virtual machine verification module, start the virtual machine and load the target operating system image, set the memory allocation size and the number of processor cores of the virtual machine, establish a file sharing area between the virtual machine and the host machine, and copy the functional unit model file to the running directory of the virtual machine, which is used to store temporary files during the model running process; The functional unit model file is read from the running directory to the memory space of the virtual machine, the configuration parameters in the functional unit model file are parsed, the start time and step interval of the simulation calculation are set according to the configuration parameters, the input and output interfaces of the functional unit model are initialized, the calculation function of the functional unit model is called to perform the step simulation calculation, and the calculation result of the calculation function is stored in the memory buffer of the virtual machine.

[0010] Furthermore, the collecting the output data of the functional unit model at each simulation step, obtaining the variable mapping relationship from the mapping table, and converting the output data into a corresponding structured form according to the variable mapping relationship to obtain the data to be verified, includes: Accessing the memory buffer of the virtual machine, reading the output data of the functional unit model at the current step, parsing the value and timestamp of the output data according to the data storage format of the memory buffer, grouping the output data according to the identifier of the flattened variable, and generating a data sequence of the flattened variable, wherein the data sequence includes the variable identifier, the value and the timestamp; The mapping table is read from the description file of the functional unit model file, the data sequence of the flattened variable is restored to a structured form based on the variable correspondence recorded in the mapping table, the identifier of the flattened variable is replaced with the identifier of the structured variable according to the variable correspondence, and the converted structured data is stored as data to be verified in the data cache area of ​​the virtual machine.

[0011] Further, the reference data corresponding to the current step length is read from the resource directory, and the reference data is verified with the data to be verified, wherein the verification includes: calculating the numerical deviation between the reference data and the data to be verified at the corresponding time, and judging whether the numerical deviation exceeds a preset tolerance range; calculating the change trend of the data to be verified between adjacent step lengths, and comparing the change trend with the change trend of the reference data, including: Reading a reference data file from the resource directory of the functional unit model file, searching for a corresponding data record item in the reference data file according to the timestamp of the current step, matching the structured variable value in the data record item with the data to be verified in the data buffer area, calculating the value deviation of each structured variable at the current moment, comparing the value deviation with a preset tolerance threshold, and generating a value verification result; The data to be verified of two adjacent steps in the data buffer area are obtained, the differential value of each structured variable between adjacent steps is calculated, the change direction and amplitude of the data to be verified are determined according to the differential value, the data record items of the corresponding time period are read from the benchmark data file, the differential value of the benchmark data is calculated, the differential features of the data to be verified and the benchmark data are compared, and a trend verification result is generated.

[0012] Further, when the numerical deviation exceeds the tolerance range or the change trend is inconsistent, a calibration abnormality mark is generated, the step position and data content corresponding to the calibration abnormality mark are recorded, and the calibration abnormality mark is written into the calibration report, including: Determine whether the numerical deviation in the numerical verification result exceeds the tolerance threshold, and determine whether the differential features of the data to be verified and the reference data in the trend verification result are inconsistent. When any of the above situations occurs, generate a verification abnormality mark, and the verification abnormality mark includes an abnormality type, abnormality level and abnormality description; Record the simulation step, structured variable identifier, benchmark data value and data value to be verified corresponding to the verification exception identifier, write the verification exception identifier and its related data content into a verification report file according to a preset report format, the verification report file includes a verification overview, exception statistics and detailed records, and the verification report file is saved to the resource directory of the functional unit model file.

[0013] In a second aspect, the present application provides a verification device for a functional unit model in a simulation system, comprising: A platform building module is used to build a model verification platform, and the model verification platform includes a simulation model generation module and a virtual machine verification module; the simulation model generation module exports the simulation model as a functional unit model file through cross-compilation technology, extracts the structured variables of the simulation model and generates flattened variables of the functional unit model, establishes a mapping table between the structured variables and the flattened variables, writes the mapping table into a description file of the functional unit model file, collects benchmark data of the simulation model at each simulation step, and stores the benchmark data in a time series in a resource directory of the functional unit model file; A mapping loading module is used to start the virtual machine verification module to load the target operating system, the virtual machine verification module calls the functional unit model file to perform step simulation calculation, collects the output data of the functional unit model at each simulation step, obtains the variable mapping relationship from the mapping table, and converts the output data into a corresponding structured form according to the variable mapping relationship to obtain data to be verified; A model verification module is used to read the benchmark data corresponding to the current step length from the resource directory, and verify the benchmark data with the data to be verified, wherein the verification includes: calculating the numerical deviation between the benchmark data and the data to be verified at corresponding times, and judging whether the numerical deviation exceeds a preset tolerance range; calculating the change trend of the data to be verified between adjacent steps, and comparing the change trend with the change trend of the benchmark data; when the numerical deviation exceeds the tolerance range or the change trend is inconsistent, generating a verification anomaly mark, recording the step position and data content corresponding to the verification anomaly mark, and writing the verification anomaly mark into a verification report.

[0014] In a third aspect, the present application provides an electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the program, the steps of the method for verifying the functional unit model in the simulation system are implemented.

[0015] In a fourth aspect, the present application provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of the method for verifying a functional unit model in the simulation system.

[0016] In a fifth aspect, the present application provides a computer program product, including a computer program / instruction, which, when executed by a processor, implements the steps of the verification method of the functional unit model in the simulation system.

[0017] It can be seen from the above technical solution that the present application provides a verification method and device for a functional unit model in a simulation system, which realizes the automatic verification of the simulation model by constructing a model verification platform. The cross-compilation technology is innovatively designed to convert the simulation model into a functional unit model file, and establish a mapping mechanism between structured variables and flattened variables. The system performs model verification in a virtual machine environment, which not only compares numerical deviations, but also analyzes the changing trends between adjacent steps, realizing multi-dimensional accuracy verification. This method breaks through the limitations of traditional manual verification and provides a systematic and automated solution for simulation model verification. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0019] Figure 1 One of the flow charts of the verification method of the functional unit model in the simulation system in the embodiment of the present application; Figure 2 The second flowchart of the verification method of the functional unit model in the simulation system in the embodiment of the present application; Figure 3 The third flowchart of the verification method of the functional unit model in the simulation system in the embodiment of the present application; Figure 4 The fourth flowchart of the verification method of the functional unit model in the simulation system in the embodiment of the present application; Figure 5 FIG5 is a flowchart of a method for verifying a functional unit model in a simulation system in an embodiment of the present application; Figure 6 6 is a flow chart of a method for verifying a functional unit model in a simulation system in an embodiment of the present application; Figure 7 FIG7 is a flow chart of a method for verifying a functional unit model in a simulation system in an embodiment of the present application; Figure 8 It is a structural diagram of a verification device for a functional unit model in a simulation system in an embodiment of the present application; Fig. 9 It is a schematic diagram of the structure of an electronic device in an embodiment of the present application.

[0020] Reference numerals: Electronic device 9600, central processing unit 9100, memory 9140, communication module 9110, input unit 9120, audio processor 9130, display 9160, power supply 9170, buffer memory 9141, application / function storage unit 9142, data storage unit 9143, driver program storage unit 9144, antenna 9111, speaker 9131, microphone 9132. DETAILED DESCRIPTION

[0021] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0022] The acquisition, storage, use, and processing of data in the technical solution of this application comply with the relevant provisions of national laws and regulations.

[0023] Taking into account the problems existing in the prior art, the present application provides a verification method and device for a functional unit model in a simulation system, which realizes the automatic verification of the simulation model by constructing a model verification platform. The cross-compilation technology is innovatively designed to convert the simulation model into a functional unit model file, and a mapping mechanism between structured variables and flattened variables is established. The system performs model verification in a virtual machine environment, which not only compares the numerical deviation, but also analyzes the change trend between adjacent steps, realizing multi-dimensional accuracy verification. This method breaks through the limitations of traditional manual verification and provides a systematic and automated solution for simulation model verification.

[0024] In order to break through the limitations of traditional manual verification and provide a systematic and automated solution for simulation model verification, the present application provides an embodiment of a verification method for a functional unit model in a simulation system, see Figure 1 The verification method of the functional unit model in the simulation system specifically includes the following contents: Step S101: construct a model verification platform, the model verification platform includes a simulation model generation module and a virtual machine verification module; the simulation model generation module exports the simulation model into a functional unit model file through cross-compilation technology, extracts the structured variables of the simulation model and generates flattened variables of the functional unit model, establishes a mapping table between the structured variables and the flattened variables, writes the mapping table into a description file of the functional unit model file, collects benchmark data of the simulation model at each simulation step, and stores the benchmark data in a time series to a resource directory of the functional unit model file; Optionally, in the process of building the model verification platform, this embodiment adopts a distributed architecture design to decompose complex verification tasks into independent functional modules. The simulation model generation module and the virtual machine verification module communicate through message queues, realizing asynchronous data transmission and parallel processing of tasks. Each module is equipped with an independent configuration management system to support parameter adjustment and status monitoring during runtime.

[0025] In the implementation of cross-compilation technology, this embodiment builds a complete tool chain system. First, the compilation environment of the target platform is established, including the compiler, linker and library files. For different source code languages, such as C++, Python, etc., corresponding compilation rules are configured respectively. During the compilation process, the platform-related code segments are processed through preprocessing instructions to ensure that the generated functional unit model can run correctly on different hardware architectures. For example, for data structures that are sensitive to byte order, byte order conversion code is automatically inserted.

[0026] In the process of variable structure analysis, this embodiment implements a multi-level code parsing mechanism. First, the variable declaration and definition in the source code are identified by the lexical analyzer, and then the abstract syntax tree is constructed using the syntax analyzer. For complex data structures, such as nested structures, unions, and multidimensional arrays, the complete variable hierarchy relationship is extracted through a tree traversal algorithm. When processing template classes, the specific data type is determined through template instantiation analysis.

[0027] The generation of flattened variables adopts a standardized naming strategy. The variable identifier consists of multiple fields, including the original variable name, scope identifier, array index, and structure member path. For example, for the structure array "data[3].value", the generated flattened identifier is "data_3_value_f32", where the suffix indicates the data type. This naming method maintains the readability of the variable and ensures the uniqueness of the identifier.

[0028] In the process of constructing the mapping table, this embodiment implements a bidirectional index mechanism. In addition to the forward mapping from structured variables to flattened variables, a reverse search index is also established. The mapping table is stored in a tree data structure, and each node contains attribute information such as variable type, offset, array dimension, etc. For dynamically allocated memory areas, the memory status is tracked through a reference counting mechanism to ensure the security of data access.

[0029] The organization of the functional unit model file adopts a modular design concept. The file header contains version information, platform identification and dependency description. The code segment is organized in a position-independent manner to support dynamic loading and relocation. The data segment is partitioned according to access attributes, such as read-only data, writable data and uninitialized data. The resource segment adopts paging management to support dynamic loading and memory mapping of data.

[0030] In the process of generating the description file, this embodiment implements data compression and error detection mechanisms. For repeated data structure definitions, reference is used to avoid redundant storage. The integrity of the description file is ensured by calculating the cyclic redundancy check code. The file format supports incremental updates. When the model structure changes, only the relevant description information needs to be updated.

[0031] During the benchmark data collection process, this embodiment implements adaptive sampling control. The sampling frequency is automatically adjusted according to the dynamic characteristics of the model, and the sampling density is increased at key time points. The collected data is preprocessed, including outlier detection and data smoothing, to ensure data quality. For large-scale data streams, streaming processing is used to avoid memory overflow.

[0032] The storage of time series data adopts a layered architecture. The latest data is stored in the memory cache to support fast access; historical data is archived by time interval, and indexes are used to accelerate queries. Data files are stored in a columnar format, which is conducive to the compression and analysis of time series. For long-term stored data, an automatic archiving and cleanup mechanism is implemented.

[0033] The configuration management of the virtual machine environment adopts a template design. According to different types of verification tasks, multiple virtual machine configuration templates are predefined, including parameters such as the number of processor cores, memory size, and disk space. Through the resource monitoring mechanism, the resource allocation of the virtual machine is dynamically adjusted to ensure the stable operation of the verification task.

[0034] This embodiment adopts a versioned protocol in the module interface design. Data exchange between different modules follows a unified serialization format and supports forward and backward compatibility. Through the interface adapter mode, new functional modules and data formats can be easily integrated. The interface definition includes a complete error handling mechanism to ensure that the system can be gracefully degraded under abnormal circumstances.

[0035] This embodiment significantly improves the accuracy and efficiency of model verification through this refined implementation scheme. In particular, when dealing with large-scale, complex structure simulation models, the scheme demonstrates excellent scalability and reliability. The modular design and standardized interface of the system provide a solid foundation for subsequent functional upgrades and maintenance.

[0036] Step S102: starting the virtual machine verification module to load the target operating system, the virtual machine verification module calling the functional unit model file to perform step simulation calculation, collecting the output data of the functional unit model at each simulation step, obtaining the variable mapping relationship from the mapping table, and converting the output data into a corresponding structured form according to the variable mapping relationship to obtain data to be verified; Optionally, this embodiment adopts a hierarchical initialization strategy during the startup process of the virtual machine verification module. First, the basic environment of the virtual machine is configured through the hardware abstraction layer, including the processor architecture, memory layout and peripheral simulation. In terms of processor virtualization, a suitable instruction set simulation method is selected according to the characteristics of the target operating system, binary translation is implemented for commonly used instructions to improve execution efficiency, and full simulation is used for privileged instructions to ensure security.

[0037] When loading the target operating system, this embodiment implements a dynamic resource allocation mechanism. The address space mapping is established through the virtual memory management unit to achieve on-demand allocation of physical memory. For functional unit models of different sizes, the system can adaptively adjust the memory page size and cache strategy. For example, for data-intensive simulation models, the page size is increased to reduce page switching overhead; for computationally intensive models, the prefetch strategy of the instruction cache is optimized.

[0038] The loading process of the functional unit model file adopts a segment management solution. By parsing the segment table information in the file header, the code segment, data segment and resource segment are mapped to different memory areas of the virtual machine. For the code segment that needs to be relocated, dynamic symbol resolution and address correction are implemented. When loading the data segment, a copy-on-write mechanism is established to support multiple instances sharing read-only data and improve memory usage efficiency.

[0039] The execution of step-length simulation calculations uses a precise timing control mechanism. The simulation time and physical time are synchronized through the virtual clock manager to ensure the accuracy of the calculation step. In each simulation cycle, the system first updates the input state of the model, and then calls the calculation function according to the predefined execution sequence. For multi-threaded parallel computing tasks, thread-level scheduling and synchronization control are implemented.

[0040] In the data collection phase, this embodiment designs a multi-level cache structure. During the model execution process, the changes of key variables are captured in real time through a lightweight probe mechanism. These probes are strategically placed at key locations in the calculation function to ensure that the dynamic behavior of the model can be fully recorded. The collected data is first stored in a fast access cache, and when a certain amount is accumulated, it is written to persistent storage in batches.

[0041] The variable mapping relationship is processed using an efficient search algorithm. The conversion process from flat variables to structured variables is accelerated by building a hash index. For complex data structures, such as multidimensional arrays and nested structures, a recursive parsing mechanism is implemented. The system can correctly handle conversions between different data types, including precision adjustment of basic types and structural reorganization of composite types.

[0042] In the process of structured conversion of output data, this embodiment implements an intelligent type deduction mechanism. By analyzing the type information in the mapping table, the appropriate conversion method is automatically selected. For enumeration types, the correspondence between symbol names and values ​​is maintained; for floating-point numbers, conversions between different precisions are processed; for strings, the consistency of the encoding format is ensured.

[0043] When generating the data to be verified, this embodiment adopts a standardized data organization method. The converted structured data is rearranged according to the variable organization form of the original model to facilitate comparison with the benchmark data. At the same time, data version control is implemented to support tracking the change history of each variable value. For derived variables, the system can reconstruct the dependency relationship between them and the basic variables.

[0044] Virtual machine resource management adopts a dynamic optimization strategy. By monitoring CPU utilization, memory usage, and I / O load, resource allocation can be adjusted in a timely manner. Under high load conditions, the system can dynamically expand virtual machine resources or adjust task priorities to ensure that critical computing processes are not affected. For long-running verification tasks, a checkpoint mechanism is implemented to support state preservation and recovery.

[0045] This embodiment significantly improves the real-time performance and reliability of model verification through this sophisticated implementation scheme. Especially when dealing with complex simulation models, the scheme can accurately capture the dynamic behavior of the model and ensure the consistency of verification data through an efficient data conversion mechanism. The scalable design of the system also provides a basis for supporting more types of model verification.

[0046] Step S103: read the benchmark data corresponding to the current step from the resource directory, and verify the benchmark data with the data to be verified, the verification comprising: calculating the numerical deviation between the benchmark data and the data to be verified at corresponding times, and judging whether the numerical deviation exceeds a preset tolerance range; calculating the change trend of the data to be verified between adjacent steps, and comparing the change trend with the change trend of the benchmark data; when the numerical deviation exceeds the tolerance range or the change trend is inconsistent, generating a verification exception mark, recording the step position and data content corresponding to the verification exception mark, and writing the verification exception mark into a verification report.

[0047] Optionally, in the process of implementing data verification, this embodiment first constructs an efficient resource directory access mechanism. By establishing a time index tree of benchmark data, rapid positioning of specific step data is achieved. The index tree adopts a B+ tree structure, with leaf nodes storing the physical location information of data blocks and non-leaf nodes storing time interval identifiers. This design significantly improves the retrieval efficiency of large-scale time series data.

[0048] In the numerical deviation calculation link, this embodiment implements an adaptive precision control strategy. For different types of numerical variables, the system dynamically adjusts the comparison accuracy according to their physical meaning and dimensional characteristics. For example, for angle data, a cyclic comparison method is used to handle the situation across 360 degrees; for cumulative data, the propagation characteristics of the error in the time dimension are considered.

[0049] This embodiment adopts a multi-dimensional evaluation method to determine the tolerance range. Different types of variables are assigned different tolerance calculation rules: for state variables, a fixed threshold is used for judgment; for process variables, a percentage tolerance based on the numerical range is used; for derivative variables, the rate tolerance is calculated in combination with the sampling period. This differentiated tolerance strategy improves the accuracy of verification.

[0050] In the change trend analysis, this embodiment implements the data processing mechanism of the sliding window. The dynamic characteristics of the data are captured by constructing a local trend vector between adjacent steps. The trend vector contains not only the direction of change, but also the rate of change and acceleration information. The system achieves a quantitative evaluation of trend consistency by calculating the angle and modulus ratio of the trend vector.

[0051] This embodiment takes into account the influence of data noise when processing trend comparison. By implementing an adaptive data smoothing algorithm, the interference of random fluctuations is effectively suppressed while maintaining the true trend characteristics. For signals with different characteristic frequencies, the system can automatically adjust the size of the smoothing window to ensure the accuracy of trend extraction.

[0052] The identification of verification anomalies adopts a multi-level judgment mechanism. First, deviations are checked at the numerical level, then consistency is verified at the trend level, and finally a comprehensive evaluation result is generated through combined analysis. For detected anomalies, the system will track their propagation paths in time and space dimensions, which helps to locate the root cause of the problem.

[0053] This embodiment implements a detailed feature extraction mechanism in the process of generating anomaly identification. Each anomaly identification not only contains basic location and type information, but also records the context data of the anomaly, including the historical values, change trends and correlation analysis results of related variables. This rich diagnostic information is helpful for subsequent fault analysis.

[0054] In terms of the organization of the verification report, this embodiment adopts a hierarchical data structure. The report content is organized according to the chronological order and the severity of the abnormality, supporting multi-dimensional statistical analysis. By implementing a templated generation mechanism for the report, the standardization and readability of the report format are ensured. For important abnormal situations, the system will automatically generate a detailed analysis description.

[0055] The data persistence storage adopts an incremental update strategy. The intermediate results and final reports generated during the verification process are written to the storage system through the transaction mechanism to ensure data consistency and recoverability. At the same time, a data compression mechanism is implemented to significantly reduce storage overhead by identifying and encoding repeated patterns.

[0056] This embodiment implements a real-time alarm mechanism in the exception handling process. When a serious anomaly is detected, the system can promptly notify relevant personnel and provide preliminary diagnostic information of the anomaly. By configuring different levels of alarm thresholds, a hierarchical response management strategy is implemented.

[0057] This embodiment achieves accurate verification of the simulation model behavior through this systematic verification scheme. Especially when dealing with complex dynamic systems, the scheme can accurately identify various abnormal situations and provide detailed diagnostic information. The scalable design of the system also provides a good foundation for supporting new verification requirements, significantly improving the reliability and efficiency of simulation verification.

[0058] From the above description, it can be seen that the verification method of the functional unit model in the simulation system provided by the embodiment of the present application can realize the automatic verification of the simulation model by constructing a model verification platform. The cross-compilation technology is innovatively designed to convert the simulation model into a functional unit model file, and establish a mapping mechanism between structured variables and flattened variables. The system performs model verification in a virtual machine environment, not only comparing numerical deviations, but also analyzing the changing trends between adjacent steps, and realizing multi-dimensional accuracy verification. This method breaks through the limitations of traditional manual verification and provides a systematic and automated solution for simulation model verification.

[0059] In one embodiment of the verification method of the functional unit model in the simulation system of the present application, see Figure 2 , and can also include the following: Step S201: reading the source code file and configuration parameters of the simulation model, compiling the source code file into an executable file of the target platform based on a cross compiler, packaging the executable file and the configuration parameters of the simulation model to generate a functional unit model file, and storing the functional unit model file in a preset file directory; Step S202: Scan the global variables and local variables in the simulation model, generate a structured variable table according to the scope and data structure of the variables, expand the hierarchical structure in the structured variable table into a flat variable sequence, generate a unique identifier for each flat variable, establish a correspondence table between the structured variables and the flat variables, serialize the correspondence table and write it into the description file of the functional unit model file.

[0060] Optionally, when processing the source code file of the simulation model, this embodiment first implements a complete file parsing mechanism. The lexical analyzer identifies the keywords, identifiers and operators in the source code and establishes an initial symbol table. For source files written in different programming languages, the system can automatically identify their language characteristics and select corresponding parsing strategies. For example, for C++ source files, template specialization and namespaces need to be processed; for Fortran source files, their unique array slicing syntax needs to be processed.

[0061] In the process of building a cross-compilation environment, this embodiment implements a flexible toolchain configuration mechanism. For different target platform architectures, such as ARM, x86 or RISC-V, the system will automatically select the corresponding compiler front-end and back-end components. During the compilation process, multiple optimization strategies, including instruction scheduling, register allocation and memory alignment, are used to ensure that the generated target code has good execution efficiency.

[0062] This embodiment adopts a hierarchical parameter management scheme when processing configuration parameters. Configuration parameters are divided into three levels: model parameters, operating parameters, and debugging parameters. Model parameters describe the basic characteristics of the simulation model; operating parameters control the execution behavior of the model; debugging parameters are used for monitoring and diagnosis. This hierarchical design makes parameter management clearer and facilitates subsequent maintenance and adjustment.

[0063] When generating the functional unit model file, this embodiment implements a modular file organization structure. The file header contains version information and platform identification, followed by a configuration parameter area, a code segment, and a data segment. By introducing a segment table management mechanism, effective organization of different types of data is achieved. For example, read-only data and writable data are stored separately, which facilitates the implementation of a memory protection mechanism.

[0064] The variable scanning process adopts a recursive traversal strategy. For complex data structures, such as nested structures and multi-dimensional arrays, the system can accurately identify their internal organization. When processing global variables, the impact of static links and dynamic links is considered; for local variables, their life cycle and scope need to be analyzed.

[0065] This embodiment implements an intelligent type derivation mechanism when generating a structured variable table. By analyzing the definition and usage context of the variable, its complete type information is determined. For a custom type, the system will track its type definition chain until a combination of basic types is obtained. This in-depth analysis ensures the integrity of the type information.

[0066] In the flattening process, this embodiment adopts a standardized naming strategy. The identifier of the flattened variable is generated by combining the original variable name, scope identifier and path information. For example, for a structure member, its flattened identifier contains the complete access path from the root node to the leaf node. This naming method not only maintains the traceability of the variable, but also ensures the uniqueness of the identifier.

[0067] The establishment of the corresponding relationship table adopts a bidirectional mapping mechanism. In addition to the forward mapping from structured variables to flattened variables, a reverse index is also established. This bidirectional mapping supports fast search in the subsequent data conversion process. At the same time, the relationship table also records the attribute information of the variable, such as data type, array dimension, etc.

[0068] This embodiment implements an efficient data compression mechanism during the serialization process. By analyzing the repetitive patterns in the corresponding relationship table, an appropriate encoding method is used to reduce storage overhead. The serialized data adopts a block storage strategy, supports incremental updates and partial loading, and improves the efficiency of data access.

[0069] The description file is organized in an extensible format. In addition to basic variable mapping information, an extension field is reserved for storing additional description information. By implementing a version control mechanism, the forward compatibility of the description file format is ensured.

[0070] This embodiment significantly improves the efficiency and reliability of model conversion and variable management through this systematic implementation scheme. Especially when dealing with large-scale complex models, the scheme can accurately capture and convert various types of variable information, providing a reliable data foundation for subsequent model verification. The scalable design of the system also facilitates the support of new programming languages ​​and data types.

[0071] In one embodiment of the verification method of the functional unit model in the simulation system of the present application, see Figure 3 , and can also include the following: Step S301: Run the simulation model to enter the data acquisition state, calculate the sampling time point according to the simulation step parameter set in the model configuration file, read the value of the structured variable in the simulation model at each sampling time point, form the sampling time point and the corresponding structured variable value into a data record item, and establish an index table for the data record item according to the sampling sequence number; Step S302: Create a benchmark data file, write the data record items into the benchmark data file, sort the data record items in the benchmark data file according to the sampling sequence number, save the sorted benchmark data file to the resource directory of the functional unit model file, generate a checksum for the benchmark data file and write it into the file header.

[0072] Optionally, this embodiment implements an accurate timing control mechanism during the data acquisition process of the simulation model. By parsing the step size parameter in the model configuration file, a sampling strategy based on a virtual clock is established. The sampling time point is calculated using an accumulator mode, and the exact moment of each sampling point is determined by an integer multiple of the step size parameter, while taking into account the processing of time accuracy and rounding errors.

[0073] When the simulation model enters the data acquisition state, this embodiment implements a multi-level data caching mechanism. A circular buffer is established in the memory for temporarily storing sampled data. The size of the buffer is dynamically adjusted according to the sampling frequency and data volume, which not only ensures the real-time nature of the data, but also avoids excessive occupation of memory resources. For data that exceeds the buffer capacity, the system automatically triggers the data persistence operation.

[0074] In the process of reading variable values, this embodiment adopts an efficient memory access strategy. By establishing a variable address mapping table, direct memory access is achieved, avoiding frequent function call overhead. For complex data structures, such as multidimensional arrays and nested structures, the system uses a recursive traversal algorithm to ensure that the complete data state is captured.

[0075] The organization of data record items adopts a compact storage format. Each record item contains three basic fields: timestamp, variable identifier and value. For different types of variables, a unified serialization method is used to ensure data consistency. For example, floating point data is encoded according to the IEEE754 standard, and string data uses variable length encoding, which effectively reduces storage space.

[0076] In the process of constructing the index table, this embodiment implements a multi-level index mechanism. The main index establishes a B+ tree structure based on the sampling sequence number to support fast random access. At the same time, a timestamp index is established to facilitate querying data by time range. The index table adopts a sparse storage strategy and only establishes index records for key sampling points, which reduces storage overhead while ensuring query efficiency.

[0077] When creating a benchmark data file, this embodiment implements a block writing mechanism. Data is organized in blocks of fixed size, and each data block contains a complete set of record items. Blocks are associated through a linked list structure to support dynamic expansion of files. For each data block, the system calculates a checksum for data integrity verification.

[0078] The data sorting process uses an external sorting algorithm. Since the benchmark data may be large in size and cannot be loaded into the memory at one time, the system first divides the data into multiple ordered segments, and then completes the final sorting through a multi-way merge algorithm. The data compression mechanism is implemented in the sorting process, and the storage space of temporary files is reduced through differential encoding.

[0079] This embodiment adopts a hierarchical storage structure in the management of resource directories. The benchmark data files are organized according to the model version and acquisition time, which is convenient for version control and historical tracing. The directory structure is described by metadata files, including the location information, data characteristics and access rights of the files.

[0080] The generation of file verification codes uses a multiple verification mechanism. In addition to calculating the SHA-256 hash value for the overall data, segment verification is also performed on the key parts of the file. The verification information is encoded and written into the file header, and also includes metadata such as the file format version and creation time.

[0081] This embodiment implements real-time monitoring of data integrity. During the data writing process, the correctness of the data is verified by checksum calculation. When data anomalies are detected, the system will automatically retry or switch to the backup storage path. At the same time, a data recovery mechanism is implemented to support the continuation of data collection from the breakpoint.

[0082] In order to improve data access efficiency, this embodiment adopts an optimization strategy in file organization. Frequently accessed data segments are cached in the memory, and less frequently accessed data are stored on the secondary storage device. By implementing a pre-reading mechanism, the delay of I / O operations is reduced.

[0083] This embodiment significantly improves the efficiency and reliability of data collection and storage through this systematic implementation scheme. In particular, the scheme shows excellent performance and stability when processing large-scale simulation data. The scalable design of the system also provides convenience for supporting new data collection requirements.

[0084] In one embodiment of the verification method of the functional unit model in the simulation system of the present application, see Figure 4 , and can also include the following: Step S401: Initialize the configuration parameters of the virtual machine verification module, start the virtual machine and load the target operating system image, set the memory allocation size and the number of processor cores of the virtual machine, establish a file sharing area between the virtual machine and the host machine, and copy the functional unit model file to the running directory of the virtual machine, where the running directory is used to store temporary files during the model running process; Step S402: read the functional unit model file from the running directory to the memory space of the virtual machine, parse the configuration parameters in the functional unit model file, set the start time and step interval of the simulation calculation according to the configuration parameters, initialize the input and output interface of the functional unit model, call the calculation function of the functional unit model to perform step simulation calculation, and store the calculation result of the calculation function to the memory buffer of the virtual machine.

[0085] Optionally, in the initialization process of the virtual machine verification module, this embodiment adopts a hierarchical configuration management strategy. The configuration parameters are divided into three levels: system layer, application layer and model layer. The system layer parameters control the basic operating environment of the virtual machine, the application layer parameters manage the simulation execution environment, and the model layer parameters define the specific simulation behavior. This hierarchical design ensures the flexibility and maintainability of the configuration.

[0086] During the virtual machine startup process, this embodiment implements a dynamic resource allocation mechanism. By analyzing the scale and computational complexity of the functional unit model, the resource configuration of the virtual machine is adaptively adjusted. For example, for computationally intensive models, the system will allocate more processor cores; for data-intensive models, the memory allocation is increased. The allocation of processor cores also takes into account the parallel characteristics of tasks to ensure optimal resource utilization.

[0087] The establishment of the file sharing area adopts an efficient shared memory mechanism. By establishing a memory mapping between the host and the virtual machine, zero-copy data transmission is achieved. The shared area adopts paging management to support efficient transmission of large-scale files. At the same time, an access control mechanism is implemented to ensure the security of data transmission.

[0088] This embodiment implements an intelligent file organization strategy in the management of the running directory. Temporary files are stored according to their usage, including intermediate calculation results, state snapshots, and log information. By implementing the life cycle management of files, the system can automatically clean up expired temporary files to avoid wasting storage space.

[0089] In the process of loading the functional unit model file, this embodiment adopts a segmented loading strategy. First, the code segment and read-only data segment of the model are loaded, and then the writable data segment is loaded on demand. By implementing delayed loading of memory pages, the memory usage in the initialization phase is significantly reduced. For frequently accessed data segments, the system will fix them in memory to improve access efficiency.

[0090] The parsing process of configuration parameters adopts a recursive deep parsing method. The system can handle complex parameter dependencies and ensure that the loading order of parameters meets the dependency constraints. For expressions in parameters, a dynamic evaluation mechanism is implemented to support the calculation relationship between parameters. The validity of parameters is guaranteed by type checking and value range verification.

[0091] This embodiment implements a precise control mechanism in simulation time management. By establishing a virtual clock system, the synchronization control of simulation time and physical time is achieved. The setting of the step interval takes into account the dynamic characteristics of the model, using a smaller step size for rapidly changing states and a larger step size for slowly changing states, thereby improving the calculation efficiency.

[0092] The initialization of the input and output interface uses standardized interface encapsulation. By establishing a unified data exchange format, seamless conversion of different types of data is achieved. The interface layer implements a data cache mechanism, and double buffering technology is used to ensure the real-time and consistency of data exchange.

[0093] In the process of calling the calculation function, this embodiment implements a complex task scheduling mechanism. By analyzing the dependencies of the calculation tasks and building a task execution graph, the optimal parallel execution strategy is implemented. For calculation processes with circular dependencies, the system ensures the convergence of the calculation results through iterative solution.

[0094] The storage of calculation results adopts a multi-level cache structure. The memory buffer is layered according to the timeliness of the data. Hot data is stored in the cache, and cold data is stored in the ordinary memory area. By implementing cache prefetching and replacement strategies, the hit rate of data access is improved.

[0095] This embodiment significantly improves the performance and reliability of model verification in a virtual machine environment through this systematic implementation scheme. In particular, when dealing with complex simulation models, the scheme demonstrates excellent resource management capabilities and computing efficiency. The scalable design of the system also provides a basis for supporting new simulation requirements.

[0096] In one embodiment of the verification method of the functional unit model in the simulation system of the present application, see Figure 5 , and can also include the following: Step S501: accessing the memory buffer of the virtual machine, reading the output data of the functional unit model at the current step, parsing the value and timestamp of the output data according to the data storage format of the memory buffer, grouping the output data according to the identifier of the flattened variable, and generating a data sequence of the flattened variable, wherein the data sequence includes the variable identifier, the value and the timestamp; Step S502: read the mapping table from the description file of the functional unit model file, restore the data sequence of the flattened variable to a structured form based on the variable correspondence recorded in the mapping table, replace the identifier of the flattened variable with the identifier of the structured variable according to the variable correspondence, and store the converted structured data as data to be verified in the data cache area of ​​the virtual machine.

[0097] Optionally, this embodiment implements an efficient memory mapping mechanism based on page tables during the virtual machine memory access process. By establishing a multi-level mapping table from virtual addresses to physical addresses, fast access to the memory buffer is ensured. During the access process, memory prefetching technology is used to load the data that may be needed into the CPU cache in advance based on the spatial locality characteristics of the data, effectively reducing memory access latency.

[0098] In the data storage format parsing stage, this embodiment adopts a flexible data decoding strategy. For different types of data, such as fixed-point numbers, floating-point numbers, and strings, dedicated parsers are implemented respectively. The parser automatically selects the corresponding decoding method by analyzing the type identifier in the data header. For example, for floating-point numbers in IEEE754 format, the sign bit, exponent bit, and mantissa bit are extracted through bit operations to ensure accurate restoration of the value.

[0099] This embodiment implements an accurate timing management mechanism in timestamp processing. Timestamps are represented by 64-bit integers with an accuracy of nanoseconds and support automatic conversion of different time units. The system ensures time synchronization between multiple data sources by maintaining a global clock source, avoiding data misalignment problems caused by time inconsistency.

[0100] The data grouping process uses an efficient hash index structure. By calculating the hash value of the flattened variable identifier, a fast mapping of variables to data blocks is established. The hash table uses open addressing to handle conflicts and maintains a low load factor through a dynamic expansion mechanism to ensure search efficiency. For frequently accessed variable groups, the system will keep their index information in the cache.

[0101] This embodiment achieves a compact data organization when generating data sequences. Each sequence record is stored in a variable-length encoding manner, including three basic fields: identifier, value, and timestamp. For repeated identifiers, differential encoding is used to reduce storage space. The system also implements a block storage mechanism for sequences, where each data block contains complete index information and supports parallel processing.

[0102] In the process of reading the mapping table, this embodiment adopts a hierarchical cache strategy. When accessed for the first time, the commonly used mapping relationships are loaded into the memory to establish a fast lookup table. For large mapping tables, a paging loading method is adopted to avoid occupying too much memory at one time. The system manages the cache through the LRU algorithm and eliminates infrequently used mapping items in a timely manner.

[0103] The variable restoration process implements a recursive data structure reconstruction mechanism. Starting from flattened variables, complex data structures are gradually constructed by analyzing the hierarchical information in identifiers. When processing arrays and structures, the system verifies index ranges and member validity to ensure the integrity of the data structure. For possible type conversions, safe type checking and conversion operations are implemented.

[0104] This embodiment adopts intelligent namespace management in the identifier replacement link. By establishing a scope tree, the visibility and naming conflicts of variables are correctly handled. The system can identify and maintain the inheritance relationship between variables to ensure that the restored structured data conforms to the original semantic definition.

[0105] The management of data cache adopts a multi-level storage architecture. According to the access characteristics of data, hot data is stored in the cache, and cold data is stored in the main memory or virtual memory. By implementing a predictive cache strategy, the system can load the data blocks that are about to be accessed in advance, improving data access efficiency.

[0106] This embodiment ensures the reliability of the data conversion process by establishing a complete data consistency check mechanism. At each conversion node, the data integrity is verified by calculating the checksum. For detected abnormal situations, the system can automatically perform data repair or rollback operations and record detailed error information for subsequent analysis.

[0107] To support large-scale data processing, this embodiment implements a streaming processing framework. By establishing a data processing pipeline, operations such as data reading, conversion, and storage are parallelized. The system can dynamically adjust the degree of parallelism according to the processing load to maintain the optimization of processing efficiency. This design significantly improves the throughput of data processing, especially when processing large simulation model data.

[0108] This embodiment effectively solves the efficiency and reliability issues of large-scale data processing in a virtual machine environment through this systematic implementation solution. In particular, the solution demonstrates excellent performance and stability when processing complex data structure conversions. The system's scalable design also provides a solid foundation for supporting new data formats and processing requirements.

[0109] In one embodiment of the verification method of the functional unit model in the simulation system of the present application, see Figure 6 , and can also include the following: Step S601: read a reference data file from the resource directory of the functional unit model file, search for a corresponding data record item in the reference data file according to the timestamp of the current step length, match the structured variable value in the data record item with the data to be verified in the data buffer area, calculate the value deviation of each structured variable at the current moment, compare the value deviation with a preset tolerance threshold, and generate a value verification result; Step S602: Obtain the data to be verified of two adjacent steps in the data cache area, calculate the differential value of each structured variable between adjacent steps, determine the change direction and amplitude of the data to be verified according to the differential value, read the data record items of the corresponding time period from the benchmark data file, calculate the differential value of the benchmark data, compare the differential features of the data to be verified and the benchmark data, and generate a trend verification result.

[0110] Optionally, this embodiment implements an efficient data indexing mechanism during the data verification process. By establishing a time index tree in the benchmark data file, fast positioning of timestamps to data records is achieved. The index tree adopts a B+ tree structure, with leaf nodes storing the correspondence between timestamps and data records, and non-leaf nodes storing time interval information, ensuring efficient search in large-scale data sets.

[0111] In the data record matching process, this embodiment adopts an intelligent data alignment strategy. Considering that the sampling times of different data sources may be slightly different, the system implements a time window matching mechanism. By setting the time tolerance range, data records at adjacent time points are paired. In the case of inconsistent sampling rates, missing data points are supplemented by an interpolation algorithm.

[0112] This embodiment implements a multi-dimensional error analysis mechanism in the numerical deviation calculation link. For different types of variables, corresponding error measurement methods are used. For example, for floating-point numbers, relative error and absolute error are calculated; for vector types, Euclidean distance and cosine similarity are calculated. The system also considers the impact of the numerical range on error evaluation and adopts an adaptive error calculation strategy for data of different magnitudes.

[0113] The tolerance threshold processing adopts a hierarchical threshold management mechanism. Different levels of tolerance requirements are set according to the importance and physical meaning of the variables. For key control parameters, stricter thresholds are used; for intermediate calculation results, a larger error range is allowed. The system maintains threshold rules through configuration files and supports online adjustment.

[0114] This embodiment implements a robust numerical differentiation algorithm in the differential value calculation process. Considering the rounding error and noise influence in numerical calculation, the central difference method is used to improve the calculation accuracy. For time series data, the sliding window smoothing process is used to reduce the influence of random fluctuations. The system also implements adaptive time step selection to improve efficiency while ensuring calculation accuracy.

[0115] The change feature analysis adopts the method of multi-feature fusion. In addition to calculating the basic differential value, it also extracts high-order features such as change rate and acceleration. By establishing feature vectors, the system can fully describe the dynamic change characteristics of the data. For periodically changing data, the frequency domain analysis function is implemented to identify the main frequency components of the signal.

[0116] This embodiment uses sequence similarity analysis technology in the trend verification link. The problem of time series alignment is solved through the dynamic time warping algorithm. The system calculates indicators such as shape similarity and trend consistency of the sequence, and comprehensively evaluates whether the change trend of the data matches. In the case of phase difference, the best matching position is determined by signal delay analysis.

[0117] The generation process of verification results implements a multi-level evaluation system. The system evaluates the consistency of data from three levels: point value comparison, interval statistics, and trend analysis. By weighted fusion of evaluation results from different dimensions, a comprehensive verification score is generated. The evaluation results are stored in a structured form to support subsequent statistical analysis and visualization.

[0118] This embodiment implements an intelligent early warning mechanism in terms of anomaly detection. By establishing a statistical model of data, abnormal numerical fluctuations and trend changes are identified. The system can distinguish between occasional anomalies and systematic deviations, providing a basis for fault diagnosis. For detected anomalies, a detailed analysis report is automatically generated, including the time, location and possible causes of the anomaly.

[0119] In order to improve the verification efficiency, this embodiment adopts a parallel computing framework. Through data sharding technology, large-scale data sets are divided into multiple independent computing tasks. The system dynamically adjusts the degree of parallelism based on available computing resources and fully utilizes the computing power of multi-core processors.

[0120] This embodiment significantly improves the accuracy and efficiency of simulation model verification through this systematic implementation scheme. In particular, the scheme demonstrates excellent performance and reliability when processing large-scale, multi-variable simulation data. The scalable design of the system also provides a basis for supporting new verification requirements and can flexibly adapt to different types of simulation model verification scenarios.

[0121] In one embodiment of the verification method of the functional unit model in the simulation system of the present application, see Figure 7, and can also include the following: Step S701: Determine whether the numerical deviation in the numerical verification result exceeds the tolerance threshold, and determine whether the differential features of the data to be verified and the benchmark data in the trend verification result are inconsistent. When any of the above situations occurs, generate a verification abnormality mark, and the verification abnormality mark includes an abnormality type, abnormality level and abnormality description; Step S702: record the simulation step, structured variable identifier, benchmark data value and data value to be verified corresponding to the verification exception identifier, write the verification exception identifier and its related data content into a verification report file according to a preset report format, the verification report file includes a verification overview, exception statistics and detailed records, and the verification report file is saved to the resource directory of the functional unit model file.

[0122] Optionally, this embodiment implements a multi-dimensional anomaly identification mechanism during the verification anomaly judgment process. By establishing a hierarchical anomaly evaluation system, a refined analysis of numerical deviations and trend inconsistencies is performed. The evaluation system includes two dimensions: immediate anomalies and cumulative anomalies. Immediate anomalies focus on the numerical value exceeding the limit at a single time point, while cumulative anomalies monitor the cumulative effect of deviations in continuous time periods.

[0123] In the abnormality type determination link, this embodiment adopts an intelligent classification strategy. By analyzing the distribution characteristics of numerical deviations, the anomalies are divided into three basic types: random fluctuations, systematic deviations, and mutations. For trend inconsistencies, analysis is performed from aspects such as the rate of change, acceleration, and inflection point characteristics to identify types such as trend deviation, oscillation anomaly, and phase delay.

[0124] This embodiment establishes a grading mechanism based on the degree of impact when dividing the abnormal level. By evaluating the importance of the variables in the model, the duration of the abnormality, and the deviation amplitude, the abnormalities are divided into four levels: warning, minor, severe, and fatal. The system also considers the correlation between variables. When a key variable is abnormal, the abnormal level of the related variables will be increased.

[0125] The generation of exception descriptions uses a templated description engine. According to the specific characteristics of the exception, the appropriate description mode is selected from the preset description template library, and combined with the actual numerical and trend information, an accurate and easy-to-understand exception description is generated. The description content includes the time characteristics of the exception, numerical characteristics and possible cause analysis.

[0126] This embodiment implements a complete on-site protection mechanism in the abnormal data recording link. In addition to recording the data at the time of the abnormality, it also captures a snapshot of the data within a certain time window before and after the abnormality occurs. The preservation of this contextual information provides an important basis for subsequent fault analysis. The system also records the environmental parameters and model status information when the abnormality occurs.

[0127] The verification report generation process adopts a structured document organization method. The report content is divided into three levels: overview, statistical analysis, and detailed records. The overview part provides the overall situation and key findings of the verification task; the statistical analysis part shows the distribution characteristics and change trends of the anomalies in the form of charts; the detailed record part records the specific information of each anomaly in chronological order.

[0128] This embodiment realizes diversified display methods in the report format design. By configuring different report templates, report formats suitable for different user needs can be generated. For technical analysts, technical reports containing detailed data and diagnostic information are provided; for managers, summary reports with highlighted key points are generated.

[0129] In order to improve the readability of the report, this embodiment implements intelligent data visualization. Through an adaptive chart generation mechanism, abnormal data is presented in an intuitive form. The system can automatically select appropriate chart types based on data characteristics, such as trend charts, scatter plots, or heat maps. For important anomalies, annotations and explanations are automatically added.

[0130] This embodiment adopts a hierarchical storage strategy in resource directory management. Report files are stored in different storage levels according to the importance and access frequency of the report. Multiple copies of important exception reports are saved at the same time, and file indexes are established to support fast retrieval and statistical analysis.

[0131] In order to support subsequent data mining and analysis, this embodiment implements structured storage of report data. The report content is converted into a standard data format to support query and analysis through database tools. The system also provides a report comparison function to track the evolution of anomalies and the effect of treatment.

[0132] This embodiment significantly improves the reliability and traceability of model verification results through this systematic implementation. Especially in the verification process of complex models, the solution can accurately capture and record various abnormal situations, providing strong support for model optimization and problem diagnosis. The scalable design of the system also provides a basis for supporting new verification requirements and reporting forms.

[0133] In order to break through the limitations of traditional manual verification and provide a systematic and automated solution for simulation model verification, the present application provides an embodiment of a verification device for a functional unit model in a simulation system for implementing all or part of the verification method for a functional unit model in a simulation system, see Figure 8 The verification device of the functional unit model in the simulation system specifically includes the following contents: The platform building module 10 is used to build a model verification platform, which includes a simulation model generation module and a virtual machine verification module; the simulation model generation module exports the simulation model as a functional unit model file through cross-compilation technology, extracts the structured variables of the simulation model and generates flattened variables of the functional unit model, establishes a mapping table between the structured variables and the flattened variables, writes the mapping table into the description file of the functional unit model file, collects the benchmark data of the simulation model at each simulation step, and stores the benchmark data in the resource directory of the functional unit model file in time series; A mapping loading module 20 is used to start the virtual machine verification module to load the target operating system, the virtual machine verification module calls the functional unit model file to perform step simulation calculation, collects the output data of the functional unit model at each simulation step, obtains the variable mapping relationship from the mapping table, and converts the output data into a corresponding structured form according to the variable mapping relationship to obtain data to be verified; The model verification module 30 is used to read the benchmark data corresponding to the current step size from the resource directory, and verify the benchmark data with the data to be verified. The verification includes: calculating the numerical deviation between the benchmark data and the data to be verified at the corresponding time, and judging whether the numerical deviation exceeds the preset tolerance range; calculating the change trend of the data to be verified between adjacent steps, and comparing the change trend with the change trend of the benchmark data; when the numerical deviation exceeds the tolerance range or the change trend is inconsistent, generating a verification anomaly mark, recording the step position and data content corresponding to the verification anomaly mark, and writing the verification anomaly mark into the verification report.

[0134] From the above description, it can be seen that the verification device of the functional unit model in the simulation system provided by the embodiment of the present application can realize the automatic verification of the simulation model by constructing a model verification platform. The cross-compilation technology is innovatively designed to convert the simulation model into a functional unit model file, and establish a mapping mechanism between structured variables and flattened variables. The system performs model verification in a virtual machine environment, not only comparing numerical deviations, but also analyzing the changing trends between adjacent steps, realizing multi-dimensional accuracy verification. This method breaks through the limitations of traditional manual verification and provides a systematic and automated solution for simulation model verification.

[0135] From the hardware level, in order to break through the limitations of traditional manual verification and provide a systematic and automated solution for simulation model verification, the present application provides an embodiment of an electronic device for implementing all or part of the verification method of the functional unit model in the simulation system, and the electronic device specifically includes the following contents: Processor, memory, communication interface and bus; wherein the processor, memory and communication interface communicate with each other through the bus; the communication interface is used to realize information transmission between the verification device of the functional unit model in the simulation system and the core business system, user terminal and related database and other related devices; the logic controller can be a desktop computer, a tablet computer and a mobile terminal, etc., but the present embodiment is not limited thereto. In the present embodiment, the logic controller can be implemented with reference to the embodiment of the verification method of the functional unit model in the simulation system and the embodiment of the verification device of the functional unit model in the simulation system in the embodiment, and the contents thereof are incorporated herein, and the repeated parts are not repeated.

[0136] It is understandable that the user terminal may include a smart phone, a tablet electronic device, a network set-top box, a portable computer, a desktop computer, a personal digital assistant (PDA), a vehicle-mounted device, a smart wearable device, etc. Among them, the smart wearable device may include smart glasses, a smart watch, a smart bracelet, etc.

[0137] In practical applications, part of the verification method of the functional unit model in the simulation system can be executed on the electronic device side as described above, or all operations can be completed in the client device. The selection can be made based on the processing capability of the client device and the limitations of the user's usage scenario. This application does not limit this. If all operations are completed in the client device, the client device may also include a processor.

[0138] The client device may have a communication module (i.e., a communication unit) that can communicate with a remote server to achieve data transmission with the server. The server may include a server on the task scheduling center side, and other implementation scenarios may also include a server on an intermediate platform, such as a server on a third-party server platform that has a communication link with the task scheduling center server. The server may include a single computer device, or a server cluster consisting of multiple servers, or a server structure of a distributed device.

[0139] Fig. 9 FIG. 9 is a schematic block diagram of the system structure of the electronic device 9600 according to an embodiment of the present application. Fig. 9As shown, the electronic device 9600 may include a central processor 9100 and a memory 9140; the memory 9140 is coupled to the central processor 9100. It is worth noting that Fig. 9 is exemplary; other types of structures may also be used to supplement or replace this structure to implement telecommunication functions or other functions.

[0140] In one embodiment, the verification method function of the functional unit model in the simulation system can be integrated into the central processing unit 9100. The central processing unit 9100 can be configured to perform the following control: Step S101: construct a model verification platform, the model verification platform includes a simulation model generation module and a virtual machine verification module; the simulation model generation module exports the simulation model into a functional unit model file through cross-compilation technology, extracts the structured variables of the simulation model and generates flattened variables of the functional unit model, establishes a mapping table between the structured variables and the flattened variables, writes the mapping table into a description file of the functional unit model file, collects benchmark data of the simulation model at each simulation step, and stores the benchmark data in a time series to a resource directory of the functional unit model file; Step S102: starting the virtual machine verification module to load the target operating system, the virtual machine verification module calling the functional unit model file to perform step simulation calculation, collecting the output data of the functional unit model at each simulation step, obtaining the variable mapping relationship from the mapping table, and converting the output data into a corresponding structured form according to the variable mapping relationship to obtain data to be verified; Step S103: read the benchmark data corresponding to the current step from the resource directory, and verify the benchmark data with the data to be verified, the verification comprising: calculating the numerical deviation between the benchmark data and the data to be verified at corresponding times, and judging whether the numerical deviation exceeds a preset tolerance range; calculating the change trend of the data to be verified between adjacent steps, and comparing the change trend with the change trend of the benchmark data; when the numerical deviation exceeds the tolerance range or the change trend is inconsistent, generating a verification exception mark, recording the step position and data content corresponding to the verification exception mark, and writing the verification exception mark into a verification report.

[0141] From the above description, it can be seen that the electronic device provided in the embodiment of the present application realizes the automatic verification of the simulation model by constructing a model verification platform. The cross-compilation technology is innovatively designed to convert the simulation model into a functional unit model file, and establish a mapping mechanism between structured variables and flattened variables. The system performs model verification in a virtual machine environment, not only comparing numerical deviations, but also analyzing the changing trends between adjacent steps, and realizing multi-dimensional accuracy verification. This method breaks through the limitations of traditional manual verification and provides a systematic and automated solution for simulation model verification.

[0142] In another embodiment, the verification device of the functional unit model in the simulation system can be configured separately from the central processing unit 9100. For example, the verification device of the functional unit model in the simulation system can be configured as a chip connected to the central processing unit 9100, and the verification method function of the functional unit model in the simulation system is implemented through the control of the central processing unit.

[0143] like Fig. 9 As shown, the electronic device 9600 may also include: a communication module 9110, an input unit 9120, an audio processor 9130, a display 9160, and a power supply 9170. It is worth noting that the electronic device 9600 does not necessarily have to include Fig. 9 In addition, the electronic device 9600 may also include Fig. 9 For components not shown, reference may be made to the prior art.

[0144] like Fig. 9 As shown, the central processing unit 9100 is sometimes also referred to as a controller or an operation control, and may include a microprocessor or other processor device and / or logic device. The central processing unit 9100 receives input and controls the operation of various components of the electronic device 9600.

[0145] The memory 9140 may be, for example, one or more of a cache, a flash memory, a hard drive, a removable medium, a volatile memory, a non-volatile memory or other suitable devices. The above-mentioned information related to the failure may be stored, and a program for executing the relevant information may also be stored. The CPU 9100 may execute the program stored in the memory 9140 to implement information storage or processing, etc.

[0146] The input unit 9120 provides input to the central processing unit 9100. The input unit 9120 is, for example, a key or a touch input device. The power supply 9170 is used to provide power to the electronic device 9600. The display 9160 is used to display display objects such as images and texts. The display may be, for example, an LCD display, but is not limited thereto.

[0147] The memory 9140 may be a solid-state memory, such as a read-only memory (ROM), a random access memory (RAM), a SIM card, etc. It may also be a memory that saves information even when the power is off, can be selectively erased, and is provided with more data, examples of which are sometimes referred to as EPROMs, etc. The memory 9140 may also be some other type of device. The memory 9140 includes a buffer memory 9141 (sometimes referred to as a buffer). The memory 9140 may include an application / function storage unit 9142, which is used to store application programs and function programs or processes for executing the operation of the electronic device 9600 through the central processor 9100.

[0148] The memory 9140 may also include a data storage unit 9143 for storing data, such as contacts, digital data, pictures, sounds, and / or any other data used by the electronic device. The driver storage unit 9144 of the memory 9140 may include various drivers for communication functions of the electronic device and / or for executing other functions of the electronic device (such as messaging applications, address book applications, etc.).

[0149] The communication module 9110 is a transmitter / receiver that sends and receives signals via the antenna 9111. The communication module 9110 (transmitter / receiver) is coupled to the central processor 9100 to provide input signals and receive output signals, which may be the same as the case of a conventional mobile communication terminal.

[0150] Based on different communication technologies, multiple communication modules 9110 may be provided in the same electronic device, such as a cellular network module, a Bluetooth module and / or a wireless LAN module. The communication module 9110 (transmitter / receiver) is also coupled to a speaker 9131 and a microphone 9132 via an audio processor 9130 to provide an audio output via the speaker 9131 and receive an audio input from the microphone 9132, thereby realizing a common telecommunication function. The audio processor 9130 may include any suitable buffer, decoder, amplifier, etc. In addition, the audio processor 9130 is also coupled to the central processor 9100, so that recording can be performed on the local machine through the microphone 9132, and the sound stored on the local machine can be played through the speaker 9131.

[0151] The embodiments of the present application also provide a computer-readable storage medium capable of implementing all the steps in the method for verifying a functional unit model in a simulation system in which the execution subject is a server or a client in the above embodiments. The computer-readable storage medium stores a computer program. When the computer program is executed by a processor, all the steps in the method for verifying a functional unit model in a simulation system in which the execution subject is a server or a client in the above embodiments are implemented. For example, when the processor executes the computer program, the following steps are implemented: Step S101: construct a model verification platform, the model verification platform includes a simulation model generation module and a virtual machine verification module; the simulation model generation module exports the simulation model into a functional unit model file through cross-compilation technology, extracts the structured variables of the simulation model and generates flattened variables of the functional unit model, establishes a mapping table between the structured variables and the flattened variables, writes the mapping table into a description file of the functional unit model file, collects benchmark data of the simulation model at each simulation step, and stores the benchmark data in a time series to a resource directory of the functional unit model file; Step S102: starting the virtual machine verification module to load the target operating system, the virtual machine verification module calling the functional unit model file to perform step simulation calculation, collecting the output data of the functional unit model at each simulation step, obtaining the variable mapping relationship from the mapping table, and converting the output data into a corresponding structured form according to the variable mapping relationship to obtain data to be verified; Step S103: read the benchmark data corresponding to the current step from the resource directory, and verify the benchmark data with the data to be verified, the verification comprising: calculating the numerical deviation between the benchmark data and the data to be verified at corresponding times, and judging whether the numerical deviation exceeds a preset tolerance range; calculating the change trend of the data to be verified between adjacent steps, and comparing the change trend with the change trend of the benchmark data; when the numerical deviation exceeds the tolerance range or the change trend is inconsistent, generating a verification exception mark, recording the step position and data content corresponding to the verification exception mark, and writing the verification exception mark into a verification report.

[0152] As can be seen from the above description, the computer-readable storage medium provided in the embodiment of the present application realizes the automatic verification of the simulation model by constructing a model verification platform. The cross-compilation technology is innovatively designed to convert the simulation model into a functional unit model file, and establish a mapping mechanism between structured variables and flattened variables. The system performs model verification in a virtual machine environment, not only comparing numerical deviations, but also analyzing the changing trends between adjacent steps, and realizing multi-dimensional accuracy verification. This method breaks through the limitations of traditional manual verification and provides a systematic and automated solution for simulation model verification.

[0153] The embodiments of the present application also provide a computer program product capable of implementing all the steps of the verification method of the functional unit model in the simulation system in which the execution subject is a server or a client in the above embodiments. When the computer program / instruction is executed by a processor, the steps of the verification method of the functional unit model in the simulation system are implemented. For example, the computer program / instruction implements the following steps: Step S101: construct a model verification platform, the model verification platform includes a simulation model generation module and a virtual machine verification module; the simulation model generation module exports the simulation model into a functional unit model file through cross-compilation technology, extracts the structured variables of the simulation model and generates flattened variables of the functional unit model, establishes a mapping table between the structured variables and the flattened variables, writes the mapping table into a description file of the functional unit model file, collects benchmark data of the simulation model at each simulation step, and stores the benchmark data in a time series to a resource directory of the functional unit model file; Step S102: starting the virtual machine verification module to load the target operating system, the virtual machine verification module calling the functional unit model file to perform step simulation calculation, collecting the output data of the functional unit model at each simulation step, obtaining the variable mapping relationship from the mapping table, and converting the output data into a corresponding structured form according to the variable mapping relationship to obtain data to be verified; Step S103: read the benchmark data corresponding to the current step from the resource directory, and verify the benchmark data with the data to be verified, the verification comprising: calculating the numerical deviation between the benchmark data and the data to be verified at corresponding times, and judging whether the numerical deviation exceeds a preset tolerance range; calculating the change trend of the data to be verified between adjacent steps, and comparing the change trend with the change trend of the benchmark data; when the numerical deviation exceeds the tolerance range or the change trend is inconsistent, generating a verification exception mark, recording the step position and data content corresponding to the verification exception mark, and writing the verification exception mark into a verification report.

[0154] From the above description, it can be seen that the computer program product provided in the embodiment of the present application realizes the automatic verification of the simulation model by constructing a model verification platform. The cross-compilation technology is innovatively designed to convert the simulation model into a functional unit model file, and establish a mapping mechanism between structured variables and flattened variables. The system performs model verification in a virtual machine environment, not only comparing numerical deviations, but also analyzing the changing trends between adjacent step sizes, and realizing multi-dimensional accuracy verification. This method breaks through the limitations of traditional manual verification and provides a systematic and automated solution for simulation model verification.

[0155] It should be understood by those skilled in the art that embodiments of the present invention may be provided as methods, devices, or computer program products. Therefore, the present invention may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0156] The present invention is described with reference to flowcharts and / or block diagrams of methods, devices (apparatus), and computer program products according to embodiments of the present invention. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0157] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0158] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0159] The present invention uses specific embodiments to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. At the same time, for those skilled in the art, according to the idea of ​​the present invention, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present invention.

Claims

1. A method for verifying a functional unit model in a simulation system, characterized in that: The method comprises: Construct a model verification platform, the model verification platform includes a simulation model generation module and a virtual machine verification module; the simulation model generation module exports the simulation model into a functional unit model file through cross-compilation technology, extracts the structured variables of the simulation model and generates flattened variables of the functional unit model, establishes a mapping table between the structured variables and the flattened variables, writes the mapping table into a description file of the functional unit model file, collects benchmark data of the simulation model at each simulation step, and stores the benchmark data in a resource directory of the functional unit model file in a time series; The virtual machine verification module is started to load the target operating system, the virtual machine verification module calls the functional unit model file to perform step simulation calculation, collects the output data of the functional unit model at each simulation step, obtains the variable mapping relationship from the mapping table, and converts the output data into a corresponding structured form according to the variable mapping relationship to obtain the data to be verified; The benchmark data corresponding to the current step length is read from the resource directory, and the benchmark data is verified with the data to be verified, wherein the verification comprises: calculating the numerical deviation between the benchmark data and the data to be verified at corresponding moments, and judging whether the numerical deviation exceeds a preset tolerance range; calculating the changing trend of the data to be verified between adjacent steps, and comparing the changing trend with the changing trend of the benchmark data; when the numerical deviation exceeds the tolerance range or the changing trend is inconsistent, generating a verification anomaly flag, recording the step length position and data content corresponding to the verification anomaly flag, and writing the verification anomaly flag into a verification report.

2. The method for verifying a functional unit model in a simulation system according to claim 1, characterized in that: The simulation model generation module exports the simulation model into a functional unit model file through a cross-compilation technology, extracts the structured variables of the simulation model and generates flattened variables of the functional unit model, establishes a mapping table between the structured variables and the flattened variables, and writes the mapping table into a description file of the functional unit model file, including: Read the source code file and configuration parameters of the simulation model, compile the source code file into an executable file of the target platform based on a cross compiler, package the executable file and the configuration parameters of the simulation model to generate a functional unit model file, and store the functional unit model file in a preset file directory; Scan the global variables and local variables in the simulation model, generate a structured variable table according to the scope and data structure of the variables, expand the hierarchical structure in the structured variable table into a flat variable sequence, generate a unique identifier for each flat variable, establish a correspondence table between structured variables and flat variables, serialize the correspondence table and write it into the description file of the functional unit model file.

3. The method for verifying a functional unit model in a simulation system according to claim 1, characterized in that: The collecting of the benchmark data of the simulation model at each simulation step and storing the benchmark data in a time series in a resource directory of the functional unit model file includes: Run the simulation model to enter the data acquisition state, calculate the sampling time point according to the simulation step parameter set in the model configuration file, read the value of the structured variable in the simulation model at each sampling time point, form the sampling time point and the corresponding structured variable value into a data record item, and establish an index table for the data record item according to the sampling sequence number; Create a benchmark data file, write the data record items into the benchmark data file, sort the data record items in the benchmark data file according to the sampling sequence number, save the sorted benchmark data file to the resource directory of the functional unit model file, generate a checksum for the benchmark data file and write it into the file header.

4. The method for verifying a functional unit model in a simulation system according to claim 1, characterized in that: The starting of the virtual machine verification module to load the target operating system, wherein the virtual machine verification module calls the functional unit model file to perform step length simulation calculation, includes: Initialize the configuration parameters of the virtual machine verification module, start the virtual machine and load the target operating system image, set the memory allocation size and the number of processor cores of the virtual machine, establish a file sharing area between the virtual machine and the host machine, and copy the functional unit model file to the running directory of the virtual machine, which is used to store temporary files during the model running process; The functional unit model file is read from the running directory to the memory space of the virtual machine, the configuration parameters in the functional unit model file are parsed, the start time and step interval of the simulation calculation are set according to the configuration parameters, the input and output interfaces of the functional unit model are initialized, the calculation function of the functional unit model is called to perform the step simulation calculation, and the calculation result of the calculation function is stored in the memory buffer of the virtual machine.

5. The method for verifying a functional unit model in a simulation system according to claim 1, characterized in that: The collecting the output data of the functional unit model at each simulation step, acquiring the variable mapping relationship from the mapping table, and converting the output data into a corresponding structured form according to the variable mapping relationship to obtain the data to be verified, includes: Accessing the memory buffer of the virtual machine, reading the output data of the functional unit model at the current step, parsing the value and timestamp of the output data according to the data storage format of the memory buffer, grouping the output data according to the identifier of the flattened variable, and generating a data sequence of the flattened variable, wherein the data sequence includes the variable identifier, the value and the timestamp; The mapping table is read from the description file of the functional unit model file, the data sequence of the flattened variable is restored to a structured form based on the variable correspondence recorded in the mapping table, the identifier of the flattened variable is replaced with the identifier of the structured variable according to the variable correspondence, and the converted structured data is stored as data to be verified in the data cache area of ​​the virtual machine.

6. The method for verifying a functional unit model in a simulation system according to claim 1, characterized in that: The step of reading the reference data corresponding to the current step length from the resource directory and verifying the reference data with the data to be verified includes: calculating the numerical deviation between the reference data and the data to be verified at corresponding moments, and judging whether the numerical deviation exceeds a preset tolerance range; calculating the change trend of the data to be verified between adjacent steps, and comparing the change trend with the change trend of the reference data, including: Reading a reference data file from the resource directory of the functional unit model file, searching for a corresponding data record item in the reference data file according to the timestamp of the current step, matching the structured variable value in the data record item with the data to be verified in the data buffer area, calculating the value deviation of each structured variable at the current moment, comparing the value deviation with a preset tolerance threshold, and generating a value verification result; The data to be verified of two adjacent steps in the data buffer area are obtained, the differential value of each structured variable between adjacent steps is calculated, the change direction and amplitude of the data to be verified are determined according to the differential value, the data record items of the corresponding time period are read from the benchmark data file, the differential value of the benchmark data is calculated, the differential features of the data to be verified and the benchmark data are compared, and a trend verification result is generated.

7. The method for verifying a functional unit model in a simulation system according to claim 1, characterized in that: When the numerical deviation exceeds the tolerance range or the change trend is inconsistent, generating a calibration abnormality mark, recording the step position and data content corresponding to the calibration abnormality mark, and writing the calibration abnormality mark into the calibration report, including: Determine whether the numerical deviation in the numerical verification result exceeds the tolerance threshold, and determine whether the differential features of the data to be verified and the reference data in the trend verification result are inconsistent. When any of the above situations occurs, generate a verification abnormality mark, and the verification abnormality mark includes an abnormality type, abnormality level and abnormality description; Record the simulation step, structured variable identifier, benchmark data value and data value to be verified corresponding to the verification exception identifier, write the verification exception identifier and its related data content into a verification report file according to a preset report format, the verification report file includes a verification overview, exception statistics and detailed records, and the verification report file is saved to the resource directory of the functional unit model file.

8. A verification device for a functional unit model in a simulation system, characterized in that: The device comprises: A platform building module is used to build a model verification platform, and the model verification platform includes a simulation model generation module and a virtual machine verification module; the simulation model generation module exports the simulation model as a functional unit model file through cross-compilation technology, extracts the structured variables of the simulation model and generates flattened variables of the functional unit model, establishes a mapping table between the structured variables and the flattened variables, writes the mapping table into a description file of the functional unit model file, collects benchmark data of the simulation model at each simulation step, and stores the benchmark data in a time series in a resource directory of the functional unit model file; A mapping loading module is used to start the virtual machine verification module to load the target operating system, the virtual machine verification module calls the functional unit model file to perform step simulation calculation, collects the output data of the functional unit model at each simulation step, obtains the variable mapping relationship from the mapping table, and converts the output data into a corresponding structured form according to the variable mapping relationship to obtain data to be verified; A model verification module is used to read the benchmark data corresponding to the current step length from the resource directory, and verify the benchmark data with the data to be verified, wherein the verification includes: calculating the numerical deviation between the benchmark data and the data to be verified at corresponding times, and judging whether the numerical deviation exceeds a preset tolerance range; calculating the change trend of the data to be verified between adjacent steps, and comparing the change trend with the change trend of the benchmark data; when the numerical deviation exceeds the tolerance range or the change trend is inconsistent, generating a verification anomaly mark, recording the step position and data content corresponding to the verification anomaly mark, and writing the verification anomaly mark into a verification report.

9. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the program, the steps of the method for verifying a functional unit model in a simulation system according to any one of claims 1 to 7 are implemented.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method for verifying a functional unit model in a simulation system according to any one of claims 1 to 7 are implemented.

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