Data retention method and device, storage control chip and storage medium

Abstract

The invention discloses a data retention method and device, a storage control chip and a storage medium. The method comprises the following steps: scanning the Flash, and reading the error bit number of each page in the Flash; screening out unstable pages according to the error bit digits; adjusting the threshold voltage of the unstable page according to a preset adjustment method so as to change the error bit number of the unstable page, and generating a rereading voltmeter according to a change result; a re-read voltmeter is stored. According to the method, unstable pages are screened out in advance, threshold voltages of the unstable pages are adjusted, error bits of the unstable pages can be changed due to adjustment of the threshold voltages, a rereading voltmeter is generated according to a change result, and due to the fact that the rereading voltmeter records the threshold voltages for adjusting the unstable pages into stable pages, the error bits of the unstable pages can be changed. Therefore, the data accuracy of the Flash can be kept.

Description

Technical Field

[0001] The present invention relates to the field of flash memory technology, and in particular to a data retention method, device, storage control chip and storage medium. Background Art

[0002] NAND Flash (Flash for short, the same below) is widely used in the storage industry due to its capacity, stability and other characteristics. It is currently the preferred storage medium for manufacturing storage products.

[0003] Due to the unique physical properties of Flash, for example, in SLC Flash, if the voltage of the storage cell is above the threshold voltage, the charge state of the storage cell is determined to be "1"; if the voltage of the storage cell is below the threshold voltage, the charge state of the storage cell is determined to be "0". Flash reads data based on the above working principle.

[0004] Flash will become unstable as it is used for a longer time. The electrons stored in the storage cells will be lost, causing the threshold voltage distribution to move. If the original threshold voltage configured by the factory is still used to read data from the Flash, data misjudgment, i.e., a read error, will occur. Summary of the invention

[0005] The purpose of the present invention is to overcome the deficiencies in the prior art and provide a data retention method, device, storage control chip and storage medium, which can enable Flash to maintain data accuracy.

[0006] A first aspect of the present application provides a data retention method, comprising:

[0007] Perform a scan of the Flash and read the number of error bits in each page of the Flash;

[0008] Screening out unstable pages according to the number of error bits;

[0009] adjusting the threshold voltage of the unstable page according to a preset adjustment method so that the number of error bits of the unstable page changes, and generating a reread voltage table according to the change result;

[0010] The reread voltage table is stored.

[0011] Further, in one of the preferred embodiments, the reading the number of error bits of each page in the Flash includes:

[0012] Read the number of error bits of each frame in the current page;

[0013] The highest number of error bits in each of the Frames is used as the number of error bits for the current page.

[0014] Furthermore, in one of the preferred embodiments, the step of selecting unstable pages according to the number of error bits comprises:

[0015] Counting the pages in each block whose number of error bits exceeds a first preset threshold;

[0016] Filter out unstable pages based on the number of exceeded results;

[0017] If the Flash is of a single-bit type, the unstable page includes the current page; if the Flash is of a multi-bit type, the unstable page includes the current page and a shared page corresponding to the current page.

[0018] Furthermore, in one of the preferred embodiments, the threshold voltage of the unstable page is changed according to a preset adjustment method, and a re-read voltage table is generated according to the change result, including:

[0019] configuring the threshold voltage values ​​of the registers one by one according to a preset adjustment step, and reading the number of error bits of the unstable page after adjustment;

[0020] According to the change result of the error bit number, confirming the matching relationship between the register and the unstable page;

[0021] A reread voltage table is generated according to a preset adjustment step configuration of the threshold voltage value of the register that matches the unstable page, wherein the reread voltage table includes multiple groups of reread voltage sequences, each group of the reread voltage sequence records the threshold voltage value of the register corresponding to the unstable page.

[0022] Further, in one of the preferred embodiments, after configuring the threshold voltage value of the register matching the unstable page according to the preset adjustment step length and generating the reread voltage table, the method further includes:

[0023] Screening out the re-read voltage sequence whose error bit number drops to a second preset threshold as a target re-read voltage sequence;

[0024] The target reread voltage sequence is used to form a target reread voltage table;

[0025] The storing the re-read voltage table comprises:

[0026] The target re-read voltage table is stored.

[0027] A second aspect of the present application provides a data holding device, comprising:

[0028] A scanning module is used to scan the Flash and read the number of error bits of each page in the Flash;

[0029] A screening module, used for screening out unstable pages according to the number of error bits;

[0030] An adjustment module, used for adjusting the threshold voltage of the unstable page according to a preset adjustment method, so that the number of error bits of the unstable page changes, and generating a reread voltage table according to the change result;

[0031] A storage module is used to store the re-read voltage table.

[0032] Furthermore, in one preferred embodiment, the scanning module comprises:

[0033] A reading unit, used for reading the number of error bits of each Frame in the current page;

[0034] The confirmation unit is used to use the highest number of error bits in each of the Frames as the number of error bits of the current page.

[0035] Furthermore, in one preferred embodiment, the screening module comprises:

[0036] A statistical unit, used for counting the pages in each block whose number of error bits exceeds a first preset threshold;

[0037] A locking unit, used to filter out unstable pages based on the result of the number of exceeded times;

[0038] If the Flash is of a single-bit type, the unstable page includes the current page; if the Flash is of a multi-bit type, the unstable page includes the current page and a shared page corresponding to the current page.

[0039] Furthermore, in one preferred embodiment, the adjustment module comprises:

[0040] A voltage configuration unit, used to configure the threshold voltage value of the register one by one, and read the error bit number of the unstable page after adjustment;

[0041] A matching unit, configured to determine a matching relationship between the register and the unstable page according to a change result of the error bit number;

[0042] A generating unit is used to generate a reread voltage table according to a preset adjustment step configuration of the threshold voltage value of the register matching the unstable page, wherein the reread voltage table includes multiple groups of reread voltage sequences, each group of the reread voltage sequence records the threshold voltage value of the register corresponding to the unstable page.

[0043] Furthermore, in one preferred embodiment, the adjustment module further includes:

[0044] a target screening unit, configured to screen out a reread voltage sequence whose error bit number drops to a second preset threshold as a target reread voltage sequence;

[0045] A sequence composition unit, used for composing the target re-read voltage sequence into a target re-read voltage table;

[0046] The storage module is used for storing the re-read voltage table, and includes:

[0047] The target re-read voltage table is stored.

[0048] The technical solution of the present application includes: performing a scan on the Flash and reading the number of error bits of each page in the Flash; screening out unstable pages according to the number of error bits; adjusting the threshold voltage of the unstable page according to a preset adjustment method so that the number of error bits of the unstable page changes, and generating a reread voltage table according to the change result; and storing the reread voltage table. By pre-screening out unstable pages, adjusting the threshold voltage of these unstable pages, the threshold voltage adjustment will change the number of error bits of the unstable page, and generating a reread voltage table according to the change result. Since the reread voltage table records the threshold voltage for adjusting the unstable page to a stable page, the data accuracy of the Flash can be maintained. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for use in the embodiments are briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without creative work.

[0050] Figure 1 is a flowchart of a data retention method shown in an embodiment of the present application;

[0051] Figure 2 It is a schematic diagram of a flow chart of a data retention method in another embodiment of the present application;

[0052] Figure 3 The figure is a schematic diagram of the structure of a data holding device in one embodiment of the present application;

[0053] Figure 4 Shown is a structural schematic diagram of a data holding device in another embodiment of the present application;

[0054] Figure 5 FIG. 1 is a schematic diagram of the structure of a storage control chip in an embodiment of the present application;

[0055] Figure 6Shown is a schematic structural diagram of an electronic device in an embodiment of the present application. DETAILED DESCRIPTION

[0056] In order to facilitate the understanding of the present invention, the present invention will be described more comprehensively with reference to the accompanying drawings. The preferred embodiments of the present invention are shown in the accompanying drawings. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present invention more thoroughly understood.

[0057] It should be noted that when an element is referred to as being "fixed to" another element, it may be directly on the other element or there may be a central element. When an element is considered to be "connected to" another element, it may be directly connected to the other element or there may be a central element at the same time. The terms "vertical", "horizontal", "left", "right" and similar expressions used herein are for illustrative purposes only and do not represent the only implementation method.

[0058] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art of the present invention. The terms used herein in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The term "and / or" used herein includes any and all combinations of one or more related listed items.

[0059] In the related art, as Flash becomes unstable as the usage time increases, the electrons stored in the storage unit will be lost, causing the threshold voltage distribution to move. If the original threshold voltage configured by the factory is still used to read data from the Flash, it will cause data misjudgment, that is, a read error.

[0060] Therefore, in order to solve the above technical problems, the present application provides a data retention method, which can enable Flash to maintain the accuracy of data.

[0061] The technical solution of the present application is described in detail below with reference to the accompanying drawings.

[0062] Before formally describing the technical solution of this application, the professional terms involved in this application are explained.

[0063] Read Retry: It is a mechanism for managing Flash read and write operations. Due to the physical characteristics of Flash, the threshold voltage of Flash will shift as a whole due to quality, the increase in the number of times it is used, and in extreme environments. If the previously configured threshold voltage is still used to read data at this time, the read data will be misjudged. After using the reread mechanism, the threshold voltage can be continuously changed to try to find the voltage point where the correct data can be read until the data is read correctly.

[0064] Retry Table: If the Flash is required to continuously change the threshold voltage until the voltage point at which the correct data is read is matched, the retry table records the adjustment range of the threshold voltage, and the Flash can reread the data based on the retry table.

[0065] The key to the reread mechanism is the establishment of a reread voltage table. It is subject to the storage capacity of the Flash and the requirements of related storage protocols (such as the SD standard protocol and the USB standard protocol). Flash cannot be reread at all costs, so the "good or bad" establishment of the reread table is particularly important. The table must not only consider how to minimize the capacity of the Flash, but also how to use the least number of rereads to allow the Flash to read the correct data. It should be emphasized that the above-mentioned "correct data" does not require that the data read out by the Flash is exactly the same as the original data. It is allowed that some bit errors in the data can be allowed as long as the bit errors that occur can be corrected by the ECC error correction mechanism.

[0066] Figure 1 The figure is a flow chart of a data retention method in one embodiment of the present application.

[0067] See also Figure 1 , a data retention method, comprising the following steps:

[0068] Step S110 , scan the Flash and read the number of error bits of each page in the Flash.

[0069] Flash is divided into Die (LUN), Plane, Block and Page according to the architectural hierarchy. Performing a full scan of Flash will read each Plane, each Block and each Page in Flash. The purpose of a full scan is to read the basic information of each page in Flash. In this embodiment, the number of error bits of each page is read. In firmware design, a page is the smallest unit for data storage composed of several Frames. For most models of Flash, the page size is 16KByte, and the frame size is 1Kbyte, that is, each page includes 16 Frames, and each Frame corresponds to the number of error bits.

[0070] It should be noted that, in this embodiment, the following method is used to determine the number of error bits for each page: read the number of error bits of each frame in the current page; and use the highest number of error bits in each frame as the number of error bits for the current page. For example, in the current page, the number of error bits of 16 frames is read, of which the 52-bit error bit is the highest bit of all frames, and thus the error bit is used as the number of error bits for the current page, that is, in the current page, 52 bits of error data will occur in every 1Kbyte of data.

[0071] Step S120: Filter out unstable pages according to the number of error bits.

[0072] It should be noted that due to the characteristics of the physical structure of Flash, the properties of pages with the same page offset in different blocks are almost the same. This is because Flash operates with a management architecture called WordLine. For example, there are a total of 10 blocks in Flash, each of which includes 10 pages. If the number of error bits in the first page of Flash blocks 0 to 6 exceeds the ECC error correction performance, then these pages are unstable pages. Due to the characteristics of the WordLine management architecture, the first page of blocks 7 to 9 will also become extremely unstable, which is equivalent to WordLine1 managing the first page of these 10 blocks. When the number of unstable pages on this wordline exceeds a certain proportion, the pages on this wordline need to be determined as unstable pages.

[0073] In addition, Flash can be divided into SLC, MLC, TLC and QLC types according to the number of storage bits. For SLC Flash, one WordLine corresponds to one page; MLC Flash corresponds to 2 pages, which are a pair (LowPage and UpperPage); TLC Flash corresponds to 3 pages (LowerPage, UpperPage and ExtraPage); QLC Flash corresponds to 4 pages (LowerPage, UpperPage, ExtraPage and TopPage, different Flash manufacturers call them differently). The above pages are called shared pages (SharedPage). According to the Flash data manual, shared pages have an obvious feature point, that is, shared pages are related to each other. For example, when operating TLC type Flash to write data, if pages 0 to 2 in the current block are shared pages, when operating page 0 (LowPage) to write data, page 1 (UpperPage) and page 2 (Extra Page) must be operated together to perform the write operation.

[0074] Furthermore, for most models of Flash, the order of shared pages in different blocks is fixed. Taking TLC-type Flash as an example, assuming that each block has 9 pages, whether it is block 0, block 1 or block 8, the page type order is LowPage, UpperPage and ExtraPage, that is, pages 0 to 2 are LowPage, UpperPage, ExtraPage; pages 3 to 5 are LowPage, UpperPage, ExtraPage; pages 6 to 8 are LowPage, UpperPage, ExtraPage.

[0075] To this end, in this embodiment, the following method can be used to filter out unstable pages in Flash: count the pages in each block whose number of error bits exceeds a first preset threshold; filter out unstable pages based on the result of the number of excess times; wherein, if Flash is a single-bit type, the unstable pages include the current page; if Flash is a multi-bit type, the unstable pages include the current page and the shared page corresponding to the current page.

[0076] For example, assuming that there are 10 blocks in the current TLC type Flash, and each block has 9 pages. After reading the number of error bits in each page, we get the number shown in Table 1, where "0" represents that the number of error bits of the page is greater than the first preset threshold (the first preset threshold is configured as 42Bit / 1K in this case, and the first preset threshold can be flexibly set according to actual conditions, and is not specifically limited in this embodiment), that is, the page is an unstable page, and "1" represents that the number of error bits of the page is less than or equal to the first preset threshold. LP is the abbreviation of LowPage; UP is the abbreviation of UpperPage; XP is the abbreviation of ExtraPage. The rows of Table 1 represent the pages; the columns of Table 1 represent the blocks.

[0077] 0(LP) 1(UP) 2(XP) 3(LP) 4(UP) 5(XP) 6(LP) 7(UP) 8(XP) 0 0 1 0 1 1 1 0 0 1 1 0 0 0 1 0 0 1 0 1 2 1 1 1 1 1 1 0 0 1 3 0 0 0 1 1 1 1 1 1 4 0 0 0 1 1 1 1 1 1 5 1 1 0 1 1 1 0 1 0 6 0 1 0 1 1 1 1 1 1 7 0 0 0 1 1 1 0 0 1 8 0 0 0 1 1 1 0 0 1 9 0 0 0 1 1 1 0 0 0

[0078] Table 1

[0079] According to Table 1, the probability that the number of error bits of Page 0, Page 1, Page 2, Page 6, and Page 7 is greater than the first preset threshold is more than 50% (that is, the number of times exceeded is 5 times), so these pages are unstable pages. However, since the Flash is of TLC type, Pages 0 to 2 are shared pages; Pages 3 to 5 are shared pages; Pages 6 to 8 are shared pages. When Page 0, Page 1, Page 2, Page 6, and Page 7 are screened out as unstable, the corresponding shared pages of the instability need to be screened out, that is, Pages 0 to 2 and Pages 6 to 8 will all be screened out.

[0080] It should be noted that the above cases are based on TLC-type Flash. For SLC and QLC-type Flash, the principle can refer to the examples in Table 1. For SLC-type Flash, since it does not distinguish shared pages, it is only necessary to locate the unstable pages, and there is no need to locate the shared pages together.

[0081] Step S130 , adjusting the threshold voltage of the unstable page according to a preset adjustment method so that the number of error bits of the unstable page changes, and generating a re-read voltage table according to the change result.

[0082] It should be noted that after the unstable page is screened out, the threshold voltage of the unstable page is adjusted by a preset adjustment method to change the number of error bits of the unstable page. According to the data sheet of each type of Flash, the threshold voltage value is related to the register value, that is, the register value can be configured to adjust the threshold voltage value, so as to change the number of error bits of the page.

[0083] For example, for TLC type Flash, there are 8 registers in total. For ease of understanding, the size of each register is 1 Byte. As shown in Table 2, "Reg" is the abbreviation of register, the following number "x" represents the number of registers, and "-" represents the register value. Table 2 does not set it (but the register value will be pre-set when the Flash leaves the factory. This embodiment is only for explanation and therefore not set).

[0084] Reg0 Reg1 Reg2 Reg3 Reg4 Reg5 Reg6 Reg7 - - - - - - - -

[0085] Table 2

[0086] As mentioned above, for multi-bit Flash, there are shared pages inside, and in the Flash architecture management, shared pages are associated with each other. When adjusting the threshold voltage of an unstable page, it is necessary to clearly determine which register values ​​will affect which shared pages. Following the case in Table 1, when adjusting the threshold voltage of the shared page 0 to 2, the following method can be used: configure the threshold voltage value of the register matching the unstable page according to the preset adjustment step, and generate a reread voltage table, wherein the reread voltage table includes multiple groups of reread voltage sequences, and each group of reread voltage sequences records the threshold voltage value of the register corresponding to the unstable page.

[0087] First, adjust the value of register Reg0 and set it to "0x0a", that is, increase 10mV, and other registers Reg1~7 do not change, and still keep the initial value. Read the number of error bits of page 0 (LowPage) at this time to confirm whether the number of error bits of page 0 has changed. If so, it is determined that register Reg0 will have an impact on the number of error bits of page 0 (LowPage). After the determination is completed, adjust register Reg1 and set it to "0x0a" (can be set to other values), that is, increase 10mV, and other registers Reg0 and Reg2~7 do not change. Read the number of error bits of page 0 (LowPage) at this time to confirm whether the number of error bits of page 0 has changed. If so, it is determined that register Reg1 will have an impact on the number of error bits of page 0 (LowPage). Adjust the register values ​​one by one in the above manner until the matching relationship between the register and the unstable page is confirmed. It should be emphasized that if it is confirmed that the register has a matching relationship with the LP type page, the register will not have a matching relationship with other types (UP, XP or TP).

[0088] After such a cycle, the matching relationship between the registers and the unstable pages is confirmed. Registers Reg0~1 have a matching relationship with page 0 (LowPage), that is, adjusting the values ​​of registers Reg0~1 (any one of these two registers) will affect the number of error bits of page 0 (LowPage); registers Reg2~4 have a matching relationship with page 1 (UpperPage), that is, adjusting the values ​​of registers Reg2~4 (any one of these three registers) will affect the number of error bits of page 1 (UpperPage); registers Reg5~6 have a matching relationship with page 2 (ExtraPage), that is, adjusting the values ​​of registers Reg5~6 (any one of these two registers) will affect the number of error bits of page 2 (ExtraPage).

[0089] It should be noted that for most Flash, register Reg7 will basically not affect any type of page, and the default value will be set to "0x00". If there is any impact, refer to the method mentioned above to perform traversal and judgment.

[0090] It should also be noted that for most models of Flash, the order and type of shared pages in different blocks are fixed. That is to say, after the matching relationship between registers and unstable pages is confirmed, the matching relationship between registers and unstable pages is applicable to all blocks. For example, registers Reg0~1 affect the LowPage of block 1, and also affect the LowPage of block 2; registers Reg2~4 affect the UpperPage of block 1, and also affect the UpperPage of block 2; registers Reg5~6 affect the ExtraPage of block 1, and also affect the ExtraPage of block 2.

[0091] According to the preset adjustment step size, the threshold voltage value of the register matching the unstable page is configured to generate a reread voltage table, wherein the reread voltage table includes multiple groups of reread voltage sequences, each group of reread voltage sequences records the threshold voltage value of the register corresponding to the unstable page. Continuing with the above case, Table 3 can be obtained.

[0092]

[0093] Table 3

[0094] It should be noted that, since LP is affected by registers Reg0-1, and the size of each register is 1 Byte, when the combination of two registers affects LP, it is equivalent to 65536 (256*256) register values ​​affecting the number of error bits of LP. However, Flash has a service life and cannot be reread indefinitely. Therefore, a preset adjustment step size is configured to adjust the register value matched by LP. In this embodiment, the preset adjustment step size is configured to "0x04", register Reg1 is counted as the low bit, and register Reg0 is counted as the high bit.

[0095] During the first adjustment, register Reg1 is "0x04" and register Reg0 is "0x00";

[0096] During the second adjustment, register Reg1 is "0x08" and register Reg0 is "0x00";

[0097] During the third adjustment, register Reg1 is "0x0c" and register Reg0 is "0x00";

[0098] During the fourth adjustment, register Reg1 is "0x10" and register Reg0 is "0x00".

[0099] It should be emphasized that the maximum value of a single register is "0xFF". When the register exceeds this value, it will overflow and need to be carried forward. The carry value is related to the preset adjustment step size. When carrying forward.

[0100] At the 65th adjustment, register Reg1 is "0x00" and register Reg0 is "0x04";

[0101] At the 66th adjustment, register Reg1 is "0x04"; register Reg0 is "0x04";

[0102] At the 67th adjustment, register Reg1 is "0x08" and register Reg0 is "0x04";

[0103] …

[0104] This cycle is repeated until the 16384th adjustment, when register Reg1 is "0xFF" and register Reg0 is "0xFF", and the traversal is completed to obtain a complete re-read voltage table of the number of LP error bits.

[0105] The re-read voltage table of Table 3 includes multiple groups of re-read voltage sequences, and each group of re-read voltage sequences records the register value (ie, the threshold voltage value) corresponding to the unstable page.

[0106] Similarly, corresponding re-reading voltage tables can be generated for other matching relationships, such as Table 4 and Table 5.

[0107]

[0108] Table 4

[0109] The principle of generating the reread voltage table of Table 4 can refer to Table 3 and will not be repeated here. It should be noted that since the number of error bits of UP will be affected by the values ​​of three registers, which is equivalent to 16777216 (256*256*256) register values ​​affecting the number of error bits of LP, the preset adjustment step size needs to be configured as large as possible, otherwise it will lead to too many reread times.

[0110]

[0111] Table 5

[0112] The generation principle of the rereading voltage table in Table 5 can refer to Table 3 and will not be repeated here.

[0113] It is also important to emphasize that, based on a large amount of previous debugging experience, for most Flash, the register value [0x96, 0xD0] interval is prone to cause Flash damage. Therefore, when adjusting the register value according to the preset adjustment step, the [0x96, 0xD0] interval can be directly skipped.

[0114] After generating the reread voltage tables of Table 3, Table 4 and Table 5, Table 3, Table 4 and Table 5 can be combined in such a way that the reread voltage sequences of the same group order in different tables are combined. For example, the first group in Table 3, the first group in Table 4 and the first group in Table 5 are combined with the reread voltage sequences; the second group in Table 3, the second group in Table 4 and the second group in Table 5 are combined with the reread voltage sequences; the third group in Table 3, the third group in Table 4 and the third group in Table 5 are combined with the reread voltage sequences. By repeating this cycle, a complete reread voltage table for Flash is obtained. However, since the number of error bits corresponding to the reread voltage sequences of the same group order in different tables may be different, in this embodiment, the following two methods are provided for selection;

[0115] 1) Calculate the mean of the number of error bits. For example, when the first group in Table 3, the first group in Table 4, and the first group in Table 5 are combined with the reread voltage sequences, the number of error bits of the first group LP in Table 3 is 8, the number of error bits of the first group UP in Table 4 is 8, and the number of error bits of the first group XP in Table 5 is 12. The number of error bits obtained after the mean calculation is approximately equal to 9 (if the decimal point is greater than or equal to 0.5, it is carried).

[0116] 2) Select the minimum number of error bits. For example, when the second group in Table 3, the second group in Table 4, and the second group in Table 5 are combined with the reread voltage sequence, the number of error bits of the second group LP in Table 3 is 8, the number of error bits of the second group UP in Table 4 is 9, and the number of error bits of the first group XP in Table 5 is 15, then the minimum number of error bits is 8.

[0117] Step S140, storing the re-read voltage table.

[0118] A complete reread voltage table is obtained and stored. Since the reread voltage table is generated for the unstable page of Flash, the number of error bits of the unstable page can be reduced when the reread voltage is used to reread the unstable page, so the use of these reread voltages can also have the same effect on the stable page of Flash. In this embodiment, by pre-screening the unstable pages, the threshold voltages of these unstable pages are adjusted. The threshold voltage adjustment will change the number of error bits of the unstable pages, and a reread voltage table is generated according to the change results. Since the reread voltage table records the threshold voltage for adjusting the unstable page to the stable page, the data accuracy of the Flash can be maintained.

[0119] Figure 2 A schematic flow chart of a data retention method in another embodiment of the present application is shown.

[0120] See also Figure 2 , a data retention method, comprising the following steps:

[0121] Step S210 , scan the Flash and read the number of error bits of each page in the Flash.

[0122] Please refer to the relevant description of step S110 for this step, which will not be repeated here.

[0123] Step S220: Filter out unstable pages according to the number of error bits.

[0124] Please refer to the relevant description of step S120 for this step, which will not be repeated here.

[0125] Step S230 , configuring the threshold voltage values ​​of the registers one by one, and reading the number of error bits of the unstable page after adjustment.

[0126] For this step, please refer to the description of the part about “the threshold voltage value of the configuration register” in step S130, which will not be repeated here.

[0127] Step S240: According to the change result of the error bit number, the matching relationship between the register and the unstable page is confirmed.

[0128] For this step, please refer to the description of the part about “matching relationship between register and unstable page” in step S130, which will not be repeated here.

[0129] Step S250, configuring the threshold voltage value of the register matching the unstable page according to the preset adjustment step size, generating a reread voltage table, wherein the reread voltage table includes multiple groups of reread voltage sequences, each group of reread voltage sequences records the threshold voltage value of the register corresponding to the unstable page.

[0130] For this step, please refer to the description of the part about “generating a re-read voltage table” in step S130, which will not be repeated here.

[0131] Step S260 , selecting a re-read voltage sequence whose error bit number is less than or equal to a second preset threshold as a target re-read voltage sequence.

[0132] It should be noted that even if the reread voltage table excludes the register value [0x96, 0xD0], which is a reread interval value that is easy to damage the Flash, the reread voltage sequence included in the reread voltage table is still very large relative to the Flash. As mentioned earlier, it is impossible for Flash to perform unlimited rereading at all costs. The number of rereads of the data to be read is limited, and the Flash needs to read accurate data in the least number of rereads as much as possible (once again, accurate data does not mean that it must be the same as the original data. It only needs to be considered accurate data as long as the number of error bits in the read data does not exceed the ECC error correction performance of the Flash). Therefore, when the Flash performs a reread operation, it must choose the most appropriate reread voltage to perform the reread operation as much as possible.

[0133] Step S270: compose a target re-read voltage table from the target re-read voltage sequence.

[0134] Each group of reread voltage sequences corresponds to the number of error bits, and it is only necessary to sort the multiple groups of reread voltage sequences in the reread voltage table according to the corresponding number of error bits. For example, if the reread voltage table includes 100 groups of reread voltage sequences, and each group of reread voltage sequences corresponds to the number of error bits, the reread voltage sequences whose error bit number is less than or equal to the second preset threshold value (for example, less than or equal to 20 bits, the second preset threshold value can be flexibly set according to the actual situation, and there is no specific restriction) are screened out as target reread voltage sequences, and these target reread voltage sequences are combined into a target reread voltage table.

[0135] Step S280, storing the target re-read voltage table.

[0136] It should be noted that since the target reread voltage sequence has a corresponding reread voltage relative to the other reread voltage sequences, it has better reread accuracy when the number of error bits on the page drops below the second preset threshold. Therefore, the target reread voltage table is stored in the Flash, waiting for the storage control chip that controls the Flash to perform a read call to realize the rereading of the Flash, thereby maintaining the accuracy of the data.

[0137] Corresponding to the aforementioned method embodiments, the present application provides a data holding device and corresponding embodiments.

[0138] Figure 3 A schematic structural diagram of a data holding device in an embodiment of the present application is shown.

[0139] See also Figure 3 , a data holding device 300 includes: a scanning module 310, a screening module 320, an adjustment module 330 and a storage module 340.

[0140] The scanning module 310 is used to scan the Flash and read the number of error bits of each page in the Flash.

[0141] Furthermore, in this embodiment, the scanning module 310 includes a reading unit 311 and a confirmation unit 312. The reading unit 311 is used to read the number of error bits of each frame in the current page. The confirmation unit 312 is used to use the highest number of error bits in each frame as the number of error bits of the current page.

[0142] The screening module 320 is used to screen out unstable pages according to the number of error bits.

[0143] Further, in this embodiment, the screening module 320 includes a statistical unit 321 and a locking unit 322. The statistical unit 321 is used to count the pages whose error bit number in each block exceeds the first preset threshold. The locking unit 322 is used to filter out unstable pages based on the result of the number of exceeding times. If the Flash is a single-bit type, the unstable page includes the current page; if the Flash is a multi-bit type, the unstable page includes the current page and the shared page corresponding to the current page.

[0144] The adjustment module 330 is used to adjust the threshold voltage of the unstable page according to a preset adjustment method so as to change the number of error bits of the unstable page, and generate a re-read voltage table according to the change result.

[0145] Further, in the present embodiment, the adjustment module 330 includes a voltage configuration unit 331, a matching unit 332 and a generation unit 333. The voltage configuration unit 331 is used to configure the threshold voltage value of the register one by one, and read the number of error bits of the unstable page after adjustment. The matching unit 332 is used to confirm the matching relationship between the register and the unstable page according to the change result of the number of error bits. The generation unit 333 is used to configure the threshold voltage value of the register matching the unstable page according to the preset adjustment step size, and generate a reread voltage table, wherein the reread voltage table includes multiple groups of reread voltage sequences, and each group of reread voltage sequences records the threshold voltage value of the register corresponding to the unstable page.

[0146] The storage module 340 is used to store the re-read voltage table.

[0147] It should be noted that the data holding method implemented by the data holding device disclosed in this embodiment is the same as the above embodiment, so it will not be described in detail here. Optionally, each module in this embodiment and the above other operations or functions are respectively for implementing the methods in the above embodiments.

[0148] Figure 4 A schematic structural diagram of a data holding device in another embodiment of the present application is shown.

[0149] See also Figure 4 , a data holding device, comprising: a scanning module 310, a screening module 320, an adjustment module 330 and a storage module 340. For a functional description of the scanning module 310, the screening module 320 and the adjustment module 330, please refer to Figure 3 , I will not go into details here.

[0150] Further, in this embodiment, the scanning module 310 includes a reading unit 311 and a confirmation unit 312. For a functional description of the reading unit 311 and the confirmation unit 312, please refer to Figure 3 , I will not go into details here.

[0151] Further, in this embodiment, the screening module 320 includes a statistical unit 321 and a locking unit 322. For a functional description of the statistical unit 321 and the locking unit 322, please refer to Figure 3 , I will not go into details here.

[0152] Further, in this embodiment, the adjustment module 330 includes a voltage configuration unit 331, a matching unit 332 and a generating unit 333. For a functional description of the voltage configuration unit 331, the matching unit 332 and the generating unit 333, please refer to Figure 3 , I will not go into details here.

[0153] Furthermore, in this embodiment, the adjustment module 330 also includes a target screening unit 334 and a sequence composition unit 335 .

[0154] The target screening unit 334 is used to screen out a re-read voltage sequence whose error bit number drops to a second preset threshold as a target re-read voltage sequence.

[0155] The sequence forming unit 335 is used to form a target re-read voltage table by forming a target re-read voltage sequence.

[0156] Further, in this embodiment, the storage module 340 is used to store the target re-read voltage table.

[0157] like Figure 5 Shown is a structural schematic diagram of a storage control chip in one embodiment of the present application.

[0158] Please refer to 5 , a storage control chip 500 includes the above-mentioned data holding device 300 .

[0159] It should be noted that the storage control chip of the present embodiment pre-screens unstable pages and adjusts the threshold voltages of these unstable pages. The threshold voltage adjustment will change the number of error bits of the unstable pages, and a reread voltage table is generated according to the change results. Since the reread voltage table records the threshold voltages for adjusting the unstable pages to stable pages, the data accuracy of the Flash can be maintained.

[0160] See also Figure 6 Another embodiment of the present application shows a computing electronic device 600 including: a processor 610 and a memory 620.

[0161] The processor 610 can be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field programmable gate arrays (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc.

[0162] A general purpose processor may be a microprocessor or the processor may be any conventional processor. The memory 610 may include various types of storage units, such as system memory, read-only memory (ROM), and permanent storage.

[0163] Among them, ROM can store static data or instructions required by processor 620 or other modules of the computer. The permanent storage device can be a readable and writable storage device. The permanent storage device can be a non-volatile storage device that does not lose the stored instructions and data even if the computer is powered off. In some embodiments, the permanent storage device uses a large-capacity storage device (such as a magnetic or optical disk, flash memory) as a permanent storage device.

[0164] In some other embodiments, the permanent storage device may be a removable storage device (e.g., a floppy disk, an optical drive). The system memory may be a read-write storage device or a volatile read-write storage device, such as a dynamic random access memory. The system memory may store some or all of the instructions and data required by the processor at run time.

[0165] In addition, the memory 620 may include any combination of computer-readable storage media, including various types of semiconductor memory chips (eg, DRAM, SRAM, SDRAM, flash memory, programmable read-only memory), magnetic disks and / or optical disks.

[0166] In some embodiments, the memory 620 may include a removable storage device that can be read and / or written, such as a laser disc (CD), a read-only digital versatile disc (such as a DVD-ROM, a double-layer DVD-ROM), a read-only Blu-ray disc, an ultra-density optical disc, a flash memory card (such as an SD card, a mini SD card, and a Micro-SD card, etc.), a magnetic floppy disk, etc. The computer-readable storage medium does not contain a carrier wave and an instantaneous electronic signal transmitted wirelessly or by wire. The memory 620 stores executable code, and when the executable code is processed by the processor 610, the processor 610 can execute part or all of the methods described above.

[0167] In addition, the method according to the present application may also be implemented as a computer program or a computer program product, which includes computer program code instructions for executing some or all of the steps in the above method of the present application.

[0168] Alternatively, the present application can also be implemented as a computer-readable storage medium (or non-transitory machine-readable storage medium or machine-readable storage medium) on which executable code (or computer program or computer instruction code) is stored. When the executable code (or computer program or computer instruction code) is executed by a processor of an electronic device (or server, etc.), the processor executes part or all of the steps of the above-mentioned method according to the present application.

[0169] The embodiments of the present application have been described above, and the above description is exemplary, not exhaustive, and is not limited to the disclosed embodiments. Many modifications and changes will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The selection of terms used herein is intended to best explain the principles of the embodiments, practical applications, or improvements to the technology in the market, or to enable other persons of ordinary skill in the art to understand the embodiments disclosed herein.

Claims

1. A data retention method, characterized in that: include: Perform a scan of the Flash and read the number of error bits in each page of the Flash; Screening out unstable pages according to the number of error bits; adjusting the threshold voltage of the unstable page according to a preset adjustment method so that the number of error bits of the unstable page changes, and generating a reread voltage table according to the change result; The reread voltage table is stored.

2. The data holding method according to claim 1, characterized in that: The step of reading the number of error bits of each page in the Flash comprises: Read the number of error bits of each frame in the current page; The highest number of error bits in each of the Frames is used as the number of error bits for the current page.

3. The data holding method according to claim 1, characterized in that: include: The step of selecting unstable pages according to the number of error bits includes: Counting the pages in each block whose number of error bits exceeds a first preset threshold; Filter out unstable pages based on the number of exceeded results; If the Flash is of a single-bit type, the unstable page includes the current page; if the Flash is of a multi-bit type, the unstable page includes the current page and a shared page corresponding to the current page.

4. The data holding method according to claim 3, characterized in that: The step of adjusting the threshold voltage of the unstable page according to a preset adjustment method so as to change the number of error bits of the unstable page, and generating a reread voltage table according to the change result includes: configuring the threshold voltage values ​​of the registers one by one, and reading the number of error bits of the unstable page after adjustment; According to the change result of the error bit number, confirming the matching relationship between the register and the unstable page; A reread voltage table is generated according to a preset adjustment step configuration of the threshold voltage value of the register that matches the unstable page, wherein the reread voltage table includes multiple groups of reread voltage sequences, each group of the reread voltage sequence records the threshold voltage value of the register corresponding to the unstable page.

5. The data holding method according to claim 4, characterized in that: After configuring the threshold voltage value of the register matching the unstable page according to the preset adjustment step length and generating the reread voltage table, the method further includes: Screening out the re-read voltage sequence whose error bit number drops to a second preset threshold as a target re-read voltage sequence; The target reread voltage sequence is used to form a target reread voltage table; The storing the re-read voltage table comprises: The target re-read voltage table is stored.

6. A data holding device, characterized in that: include: A scanning module is used to scan the Flash and read the number of error bits of each page in the Flash; A screening module, used for screening out unstable pages according to the number of error bits; An adjustment module, used for adjusting the threshold voltage of the unstable page according to a preset adjustment method, so that the number of error bits of the unstable page changes, and generating a reread voltage table according to the change result; A storage module is used to store the re-read voltage table.

7. The data holding device according to claim 6, characterized in that: The scanning module comprises: A reading unit, used for reading the number of error bits of each Frame in the current page; The confirmation unit is used to use the highest number of error bits in each of the Frames as the number of error bits of the current page.

8. The data holding device according to claim 6, characterized in that: The screening module comprises: A statistical unit, configured to count the pages in each block whose number of error bits exceeds a first preset threshold; A locking unit, used to filter out unstable pages based on the result of the number of exceeded times; If the Flash is of a single-bit type, the unstable page includes the current page; if the Flash is of a multi-bit type, the unstable page includes the current page and a shared page corresponding to the current page.

9. The data holding device according to claim 6, characterized in that: The adjustment module comprises: A voltage configuration unit, used to configure the threshold voltage value of the register one by one, and read the error bit number of the unstable page after adjustment; A matching unit, configured to determine a matching relationship between the register and the unstable page according to a change result of the error bit number; A generating unit is used to generate a reread voltage table according to a preset adjustment step configuration of the threshold voltage value of the register matching the unstable page, wherein the reread voltage table includes multiple groups of reread voltage sequences, each group of the reread voltage sequence records the threshold voltage value of the register corresponding to the unstable page.

10. The data holding device according to claim 9, characterized in that: The adjustment module further includes: a target screening unit, configured to screen out a reread voltage sequence whose error bit number drops to a second preset threshold as a target reread voltage sequence; A sequence composition unit, used for composing the target re-read voltage sequence into a target re-read voltage table; The storage module is used for storing the re-read voltage table, and includes: The target re-read voltage table is stored.

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