Method, device and equipment for testing fat tree network and medium
By dividing the switch to be tested into several layers of sub-switches and building a target fat tree network, obtaining and sending test data according to the target routing path, the problems of low simulation efficiency and high resource consumption in the existing technology are solved, and high efficiency is achieved network testing.
Patent Information
- Application Number
- CN202411663483.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-20
- Publication Date
- 2025-02-11
AI Technical Summary
The prior art When developing and verifying switches using fat tree topology, the simulation efficiency is low and resource consumption is high, making it difficult to efficiently test fat tree networks.
By dividing the switch to be tested into several layers of sub-switches, each layer of sub-switch includes at least two ports, forming a target fat tree network, and obtaining the target routing path, and sending test data according to the path to verify the network structure.
It improves the simulation efficiency of Fat Tree Network, reduces the resource consumption required for testing, and enhances the flexibility and convenience of the testing method.
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Figure CN119420719A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of computer communication technology, and in particular to a fat tree network testing method, device, equipment and medium. Background Art
[0002] The fat tree topology is widely used in high-performance networks and data center networks due to its simplicity and high bandwidth. When developing switches using the fat tree topology, a simple fat tree topology network needs to be built to verify the fat tree network.
[0003] In the related art, multiple switches are interconnected to form a network to verify the switches, but the simulation efficiency is low and the resource consumption is large.
[0004] In view of this, a testing method for fat tree networks with high simulation efficiency and low resource consumption is needed. Summary of the invention
[0005] In view of this, the present invention provides a fat tree network testing method to improve the simulation efficiency of networking and reduce the resource consumption of testing.
[0006] In a first aspect, the present invention provides a method for testing a fat tree network, wherein the fat tree network is arranged on a switch to be tested; the switch to be tested includes several layers of sub-switches; each layer of sub-switches includes at least two ports in the switch to be tested; the ports of several layers of sub-switches are connected to form a target fat tree network; the downlink ports of the bottom layer sub-switches of the target fat tree network are connected to each host channel adapter; the method comprises: obtaining a target routing path; the target routing path is a path from a source host channel adapter to a target host channel adapter; sending test data according to the target routing path to obtain a test result.
[0007] In this embodiment, the switch to be tested includes several layers of sub-switches, and each layer of sub-switches includes at least two ports in the switch to be tested. The ports of several layers of sub-switches are connected to form a target fat tree network, and the downlink ports of the bottom sub-switches of the target fat tree network are connected to the host channel adapter; the test results are obtained by obtaining the target routing path and sending test data according to the target routing path. The network structure of the fat tree network can be verified by only one switch to be tested, and the target fat tree network can be modified by changing the ports of the sub-switch, so as to improve the flexibility of the method and reduce the resources required for fat tree network testing.
[0008] In an optional implementation, before obtaining the target routing path, the method further includes: dividing the switch to be tested into various sub-switches, and building a target fat-tree network including a plurality of sub-switches.
[0009] In this embodiment, by dividing the ports of the switch to be tested, several sub-switches can be obtained, and a target fat-tree network including several sub-switches can be built to complete the verification of the target fat-tree network, which can improve the flexibility and convenience of the method.
[0010] In an optional implementation, building a target fat tree network including several layers of sub-switches includes: obtaining test requirements, and determining a network structure of the target fat tree network according to the test requirements, wherein the target fat tree network includes several layers of sub-switches, each layer of sub-switches includes several sub-switches, and ports of sub-switches of each layer are connected to ports of sub-switches of adjacent layers; obtaining the number of host channel adapters to connect the host channel adapters to downlink ports of a first sub-switch, wherein the first sub-switch is the lowest layer of sub-switch of the target fat tree network.
[0011] In this embodiment, according to the test requirements, the network structure of the target fat tree network is determined, and the host channel adapter is connected to the downlink port of the minimum layer sub-switch of the target fat tree network. Data can be transmitted in the target fat tree network through the host channel adapter to complete the test of the target fat tree network.
[0012] In an optional implementation, obtaining a target routing path includes: obtaining routing constraints, a source host channel adapter, and a target host channel adapter; generating a target routing path that satisfies the routing constraints based on a target fat tree network, wherein the target routing path passes through a top-level sub-switch of the target fat tree network.
[0013] In this implementation manner, the generated target routing path satisfies the routing constraint condition and passes through the top switch of the target fat-tree network, so that the network structure of the target fat-tree network can be fully tested.
[0014] In an optional implementation, obtaining routing constraints includes: dividing the ports of the top-level sub-switch of the target fat-tree network, and generating a data transmission group based on the division result; determining the data transmission direction of the target routing path in the top-level sub-switch according to the data transmission group, and using it as the routing constraint.
[0015] In this embodiment, by dividing the ports of the top switch of the target fat tree network and generating a data transmission group according to the division result to determine the transmission direction of the target routing path, the performance of the target routing path in the network can be accurately evaluated, thereby ensuring the stability and reliability of the network.
[0016] In an optional implementation, obtaining the target routing path includes: obtaining a test requirement, wherein the test requirement includes at least one of an all-to-all communication requirement and a one-to-many communication requirement; and obtaining at least one target routing path based on the test requirement.
[0017] In this implementation, a target routing path is generated according to the test requirements, and the performance of the target fat-tree network can be accurately evaluated.
[0018] In an optional embodiment, the method further includes: when there is a common path between at least two target routing paths, monitoring the traffic situation of the common path, and judging whether there is congestion on the common path based on the traffic situation; and when there is congestion on the common path, adjusting the data sending speed of the source host channel adapter in the target routing path.
[0019] In this embodiment, when at least two target routing paths include a public path, the traffic situation of the public path is monitored, and when congestion occurs on the public path, the data sending speed of the source host channel adapter in the target routing path is adjusted, so as to alleviate the congestion and obtain more accurate performance indicator data.
[0020] In a second aspect, the present invention provides a testing device for a fat tree network, the device comprising: an acquisition module for acquiring a target routing path; the target routing path is a path from a source host channel adapter to a target host channel adapter; a testing module for sending test data according to the target routing path to obtain a test result.
[0021] In a third aspect, the present invention provides a computer device, comprising: a memory and a processor, the memory and the processor are communicatively connected to each other, the memory stores computer instructions, and the processor executes the fat tree network testing method of the first aspect or any corresponding embodiment thereof by executing the computer instructions.
[0022] In a fourth aspect, the present invention provides a computer-readable storage medium having computer instructions stored thereon, the computer instructions being used to enable a computer to execute the fat-tree network testing method of the first aspect or any corresponding embodiment thereof. BRIEF DESCRIPTION OF THE DRAWINGS
[0023] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.
[0024] Figure 1 It is a schematic diagram of a fat tree network structure;
[0025] Figure 2 is a flow chart of a fat tree network testing method according to an embodiment of the present invention;
[0026] Figure 3 is a flow chart of another fat tree network testing method according to an embodiment of the present invention;
[0027] Figure 4 is a flow chart of another fat tree network testing method according to an embodiment of the present invention;
[0028] Figure 5 This is another diagram of the fat tree network structure;
[0029] Figure 6 is a structural block diagram of a fat tree network testing device according to an embodiment of the present invention;
[0030] Figure 7 It is a schematic diagram of the hardware structure of a computer device according to an embodiment of the present invention. DETAILED DESCRIPTION
[0031] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.
[0032] The fat tree topology is widely used in high-performance networks and data center networks due to its simplicity and high bandwidth. When developing switches using the fat tree topology, if a simple fat tree topology network is built in the early stages of development, the function or performance problems of the switch can be discovered in advance.
[0033] In the related art, the fat tree network is usually built and verified at the EDA (Electronic Design Automation), EMU (Emulator) or FPGA (Field Programmable Gate Array) stage.
[0034] Figure 1 The following is an example of a fat tree network structure, where SW_0-SW_5 represent six switches. The six switches are divided into two layers. The top switches SW_0 and SW_1 are connected to the other four switches respectively, and the bottom switches are connected to two host channel adapters. Figure 1When verifying the fat tree structure shown, the simulation efficiency of EDA is too slow. The simulation time of a single switch ranges from 10 microseconds to 3 hours. Different verification environments need to be built for different fat tree networks, and the complexity of the fat tree network has a greater impact on the simulation efficiency. EMU requires a large platform capacity and high cost requirements. FPGA requires the purchase of a large number of FPGAs, which has high cost requirements.
[0035] The embodiment of the present invention provides a method for testing a fat tree network, which divides a switch to be tested, obtains several layers of sub-switches containing at least two ports, and the ports of several layers of sub-switches are connected to form a target fat tree network. The downlink ports of the bottom switches of the target fat tree network are connected to each host channel adapter. The target routing path is obtained, and test data is sent according to the target routing path to obtain a test result. The network structure of the fat tree network can be verified by only one switch to be tested, and the target fat tree network can be modified by changing the ports of the sub-switches, so as to improve the flexibility of the method and reduce the resources required for fat tree network testing.
[0036] According to an embodiment of the present invention, an embodiment of a test method for a fat tree network is provided. It should be noted that the steps shown in the flowchart of the accompanying drawings can be executed in a computer system such as a set of computer executable instructions, and although a logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in an order different from that shown here.
[0037] In this embodiment, a fat tree network testing method is provided, wherein the network is set on a switch to be tested; the switch to be tested includes several layers of sub-switches; each layer of sub-switches includes at least two ports in the switch to be tested; the ports of several layers of sub-switches are connected to form a target fat tree network; the downlink ports of the bottom layer sub-switches of the target fat tree network are connected to each host channel adapter, Figure 2 FIG. 1 is a flow chart of a method for testing a fat tree network according to an embodiment of the present invention. Figure 2 As shown, the process includes the following steps:
[0038] Step S101, obtaining a target routing path; the target routing path is a path from a source host channel adapter to a target host channel adapter.
[0039] Before testing the fat tree network, it is necessary to divide the ports in the switch to be tested into several layers of sub-switches. Each layer of sub-switches includes at least one sub-switch. The ports of each layer of sub-switches are connected to form a target fat tree network. The downlink port of the bottom switch of the target fat tree network is connected to the host channel adapter, so that the host can send data packets to the switch to be tested through the host channel adapter. By obtaining the transmission status of the data packet, it can be determined whether the target fat tree network meets the expected network performance and requirements.
[0040] The target routing path is the path from the source host channel adapter to the target host channel adapter, and the target routing path can be generated according to the test requirements of the target fat tree network. The test requirements may include test scope, connectivity test, and performance test, etc. In some optional implementations, the test requirement is to test a portion of the network in the fat tree network, and the target routing path may only include the portion of the network, without the need to fully test the fat tree network.
[0041] Step S102: Send test data according to the target routing path to obtain test results.
[0042] The host device sends the test data to the source host channel adapter according to the target routing path, and the test data is transmitted to the target host channel adapter along the target routing path through the source host channel adapter. The test result of the fat tree network can be determined based on the data obtained from the target host channel adapter, the transmission speed of the test data in the target routing path, etc.
[0043] The test data may be determined according to the test requirements of the fat tree network. In some optional implementations, the test requirements include a packet loss rate test, and a large number of data packets may be sent to the source host channel adapter, and then the number of packets sent and received by the target host channel adapter may be compared to calculate the packet loss rate of the fat tree network, thereby obtaining the test result.
[0044] The fat tree network testing method provided in this embodiment includes several layers of sub-switches on the switch to be tested, and each layer of sub-switches includes at least two ports in the switch to be tested. The ports of several layers of sub-switches are connected to form a target fat tree network, and the downlink ports of the bottom layer sub-switches of the target fat tree network are connected to the host channel adapter; the test results are obtained by obtaining the target routing path and sending test data according to the target routing path. The network structure of the fat tree network can be verified by only one switch to be tested, and the target fat tree network can be modified by changing the ports of the sub-switch, so as to improve the flexibility of the method and reduce the resources required for fat tree network testing.
[0045] In this embodiment, a fat tree network testing method is provided, wherein the network is set on a switch to be tested; the switch to be tested includes several layers of sub-switches; each layer of sub-switches includes at least two ports in the switch to be tested; the ports of several layers of sub-switches are connected to form a target fat tree network; the downlink ports of the bottom layer sub-switches of the target fat tree network are connected to each host channel adapter, Figure 3 is a flow chart of a method for testing a fat tree network according to an embodiment of the present invention. Figure 3 As shown, the process includes the following steps:
[0046] Step S201: divide the switch to be tested into sub-switches, and build a target fat-tree network including several sub-switches.
[0047] The ports in the switch to be tested can be grouped according to the routing table in the switch to be tested to obtain several port groups, each of which includes at least one port. Then several sub-switches are obtained, each of which includes at least one port group.
[0048] Obtain the network topology information such as the number of layers of the target fat tree network and the number of sub-switches at each layer, and build the target fat tree network according to the network topology information.
[0049] In some optional implementations, the above step S201 includes:
[0050] Step S2011: Divide the switch to be tested into various sub-switches.
[0051] The port information of the switch to be tested is obtained, wherein the port information includes the total number of ports and the port type; the port range corresponding to each sub-switch is divided according to the port information, and then the ports of each sub-switch are configured.
[0052] Step S2012, obtaining the test requirements, and determining the network structure of the target fat tree network according to the test requirements, wherein the target fat tree network includes several layers of sub-switches, each layer of sub-switches includes several sub-switches, and the ports of the sub-switches of each layer are connected to the ports of the sub-switches of the adjacent layer.
[0053] The network structure of the target fat tree network is different depending on the test requirements. The topology of the fat tree network can be determined based on the actual working conditions of the target fat tree network.
[0054] In some optional implementations, the purpose of the test is only to determine whether the devices at each level in the target fat tree network can communicate normally, and a conventional three-layer fat tree topology structure can be used.
[0055] Step S2013, obtaining the number of host channel adapters to connect the host channel adapters to the downlink ports of the first sub-switch, wherein the first sub-switch is the bottom-level sub-switch of the target fat-tree network.
[0056] According to the network structure of the target fat-tree network, the number of the lowest-level sub-switches in the target fat-tree network and the number of downlink ports of each sub-switch can be determined. Thus, the number of host channel adapters can be obtained. In an actual application, the downlink port of a sub-switch is divided into two sub-ports, and the number of host channel adapters is the product of the number of the lowest-level sub-switches and twice the number of downlink ports of the sub-switch.
[0057] According to the test requirements, the network structure of the target fat tree network is determined, and the host channel adapter is connected to the downlink port of the minimum layer sub-switch of the target fat tree network. Data can be transmitted in the target fat tree network through the host channel adapter to complete the test of the target fat tree network.
[0058] Step S202, obtaining a target routing path; the target routing path is a path from a source host channel adapter to a target host channel adapter.
[0059] For details, please see Figure 2 Step S101 of the illustrated embodiment will not be described in detail here.
[0060] In some optional implementations, the above step S202 includes:
[0061] Step S2021, obtaining routing constraints, source host channel adapters, and target host channel adapters.
[0062] Among them, the routing constraints may include network topology constraints, sub-switch performance constraints, etc., and the test requirements of the target fat tree network may also be determined according to the actual application scenario of the target fat tree network; and then the routing constraints are determined according to the test requirements.
[0063] In some optional implementations, the routing constraint condition includes: the target routing path passes through a core layer switch in the target fat tree network.
[0064] In some optional implementations, obtaining the routing constraint condition includes:
[0065] Step a1, dividing the ports of the top-level sub-switch of the target fat-tree network, and generating a data transmission group based on the division result;
[0066] The ports with adjacent numbers can be divided into a data transmission group according to the port numbers in the top-level sub-switch, or the ports that pass the routing forwarding table can be divided into a data transmission group according to the routing forwarding table of the ports in the sub-switch.
[0067] Step a2: Determine the data transmission direction of the target routing path in the top-level sub-switch according to the data transmission group, and use it as a routing constraint condition.
[0068] In the case where the data transmission group includes at least two ports, the transmission direction of the target routing path is the remaining ports of the data transmission group. In the case where the data transmission group only includes the first port, the target routing path can be forwarded to the second port in the top-level switch, where the first port is the inlet port of the target routing path connected to the top-level sub-switch, and the second port is the port in the top-level sub-switch with the closest number to the first port.
[0069] By dividing the ports of the top switches of the target fat tree network and generating data transmission groups based on the division results to determine the transmission direction of the target routing path, the performance of the target routing path in the network can be accurately evaluated, thereby ensuring the stability and reliability of the network.
[0070] Step S2022: Generate a target routing path that meets the routing constraint condition according to the target fat tree network, wherein the target routing path passes through the top-level sub-switch of the target fat tree network.
[0071] According to the topology of the target fat-tree network and the test requirements, a target routing path that meets the routing constraints is generated.
[0072] The generated target routing path satisfies the routing constraint conditions and passes through the top switch of the target fat-tree network, so the network structure of the target fat-tree network can be fully tested.
[0073] Step S203: Send test data according to the target routing path to obtain test results.
[0074] For details, please see Figure 2 Step S102 of the illustrated embodiment will not be described in detail here.
[0075] The fat tree network testing method provided in this embodiment can obtain several sub-switches by dividing the ports of the switch to be tested, and build a target fat tree network including several sub-switches to complete the verification of the target fat tree network, which can improve the flexibility and convenience of the method.
[0076] In this embodiment, a fat tree network testing method is provided, wherein the network is set on a switch to be tested; the switch to be tested includes several layers of sub-switches; each layer of sub-switches includes at least two ports in the switch to be tested; the ports of several layers of sub-switches are connected to form a target fat tree network; the downlink ports of the bottom layer sub-switches of the target fat tree network are connected to each host channel adapter; Figure 4 FIG. 1 is a flow chart of a method for testing a fat tree network according to an embodiment of the present invention. Figure 4 As shown, the process includes the following steps:
[0077] Step S301, obtaining a target routing path; the target routing path is a path from a source host channel adapter to a target host channel adapter.
[0078] Specifically, the above step S301 includes:
[0079] Step S3011, obtaining a test requirement, wherein the test requirement includes at least one of an all-to-all communication requirement and a one-to-many communication requirement.
[0080] Among them, the test requirements can be determined according to the actual application scenarios of the target fat tree network.
[0081] Step S3012: based on the test requirements, obtain at least one target routing path.
[0082] When the test requirements include full-to-full communication requirements, any node in the network must perform communication tests with other nodes. A source host channel adapter can be combined with all other host channel adapters as target host channel adapters in turn; then each host channel adapter is used as the source host channel adapter, and the above combination process with other host channel adapters as target host channel adapters is repeated to obtain the target routing network.
[0083] When the test requirements include one-to-many communication requirements, a source host channel adapter can be combined with all other host channel adapters as target host channel adapters at the same time; then, each host channel adapter is used as the source host channel adapter, and the above combination process with other host channel adapters as target host channel adapters is repeated to obtain the target routing network.
[0084] Step S302: Send test data according to the target routing path to obtain test results.
[0085] For details, please see Figure 2 Step S102 of the illustrated embodiment will not be described in detail here.
[0086] In some optional implementations, step S302 further includes:
[0087] Step S303: When there is a common path between at least two target routing paths, the traffic situation of the common path is monitored, and whether there is congestion on the common path is determined according to the traffic situation.
[0088] When there is a public path on the target path, the traffic on the public path needs to be monitored. In some optional implementations, the port traffic monitoring function of the switch can be used to obtain the traffic of each port, thereby detecting the traffic on the public path to determine whether congestion occurs on the public path.
[0089] Step S304: when there is congestion on the public path, adjust the data sending speed of the source host channel adapter in the target routing path.
[0090] When there is congestion on the public path, the data transmission speed of the source host channel adapter in the target routing path is reduced to alleviate the data congestion in the public path.
[0091] In an actual application, the fat tree network has 16 host channel adapters. Host channel adapters 1 to 14 send packets to host channel adapter 15 at the same time, and host channel adapter 0 sends packets to host channel adapter 7. The two data streams will pass through the common path. The packet sending speed of the 16 host channel adapters can be adjusted. The packet sending speed of host channel adapters 1 to 14 can be reduced to 1 / 15 of the line speed of host channel adapter 15, and host channel adapter 0 still maintains the original speed.
[0092] In the case where at least two target routing paths include a public path, monitoring the traffic situation of the public path and adjusting the data sending speed of the source host channel adapter in the target routing path when there is congestion on the public path can alleviate the congestion and obtain more accurate performance indicator data.
[0093] The fat tree network testing method provided in this embodiment generates a target routing path according to the test requirements, and can accurately evaluate the performance of the target fat tree network.
[0094] In an actual application, if a port fails in a fat tree network, a corresponding backup path is used to replace this path, thereby achieving rapid routing recovery. The corresponding backup path can be set by a staff member.
[0095] In an actual application, a switch includes 40 ports p0-p39, and every 4 ports are divided into a sub-switch, so 10 sub-switches SW0-SW9 can be obtained. Figure 5As shown, each sub-switch includes two Ftb (Forwarding Table Base, routing forwarding table), each routing forwarding table is connected to at least two ports, and ten sub-switches form a three-layer fat tree network, wherein the downlink ports of Level0 sub-switches SW6-SW10 are split into two sub-ports, each sub-port is connected to an HCA (Host Channel Adapter, host channel adapter); the uplink ports of Level0 sub-switches SW6-SW10 and the downlink ports of Level1 sub-switches SW2-SW5 are split into 2 sub-ports; Level2 sub-switches SW0-SW1 only include downlink ports, each downlink port is connected to an uplink port of a sub-switch in Level1, and each downlink port is connected to a different sub-switch. The numbering of the sub-ports in the sub-switch is based on the sum of the double of the corresponding port number and 1 or the sum of the double of the corresponding port number and 2.
[0096] If there are no restrictions or constraints on routing rules, there are multiple paths from one HCA to another. In an actual application, HCA0 transmits data to HCA1, and the path can be HCA0->sp51->sw6->sp52->HCA1, or it can be: HCA0->sp51->sw6->sp53->sp3->sw2->p35->p7->sw0->p8->p3->sw3->sp12->sp54->sw6->sp52->HCA1. Therefore, when testing the fat tree network, it is necessary to restrict the target routing path. In an actual application, the target routing path needs to pass through the Level2 sub-switch, and the data transmission direction in the top-level switch is determined based on the grouping results of the ports in the Level2 sub-switch.
[0097] In a practical application, Figure 5 As shown in the figure, there are 4 groups of two ports in the Level 2 sub-switch, namely (port_7, port_8), (port_9, port_34), (port_33, port_32), (port_0, port_14). After any port receives a data packet, it can only be routed to the remaining ports connected to the dotted line.
[0098] In an actual application, the target routing path needs to pass through the Level 2 sub-switch, and the data transmission direction in the top switch is determined according to the grouping results of the ports in the Level 2 sub-switch. The structure of the fat tree network is as follows: Figure 5As shown, HCA0 sends data to HCA15, and the data transmission path is HCA0->sp51->sw6->sp56->sp48>sw5->p22->p14->sw1->p0->p11->sw4->sp28->sp40->sw9->sp42->HCA15.
[0099] In this embodiment, a DLID (Destination Link Identifier) writing rule is also provided, and the rule is: DLID[6:0] is the port number corresponding to the destination host channel adapter, DLID[13:7] is the port number corresponding to the source host channel adapter, and DLID[16:14] is the target host channel adapter. When the port connected to the host channel adapter is a subport, the port number is the number of the subport.
[0100] In an actual application, there are 16 target host channel adapters. The correspondence between the target host channel adapters and DLID[16:14] is shown in Table 1:
[0101] Target Host Channel Adapter DLID[16:14] 0 0 1 1 2 2 3 3 4 4 5 5 6 6 7 0 8 0 9 1 10 2 11 3 12 4 13 5 14 6 15 7
[0102] Table 1
[0103] When the source host channel adapter 0 sends data to the destination host channel adapter 15, the port number corresponding to the source host channel adapter 0 is 1, and the port number corresponding to the destination host channel adapter 15 is 2, DLID[6:0]=1, DLID[13:7]=2, and DLID[16:14]=7.
[0104] In this embodiment, a test device for a fat tree network is also provided, which is used to implement the above-mentioned embodiments and preferred implementation modes, and the descriptions that have been made will not be repeated. As used below, the term "module" can implement a combination of software and / or hardware of a predetermined function. Although the devices described in the following embodiments are preferably implemented in software, the implementation of hardware, or a combination of software and hardware, is also possible and conceivable.
[0105] This embodiment provides a fat tree network testing device, such as Figure 6 As shown, including:
[0106] The acquisition module 401 is used to acquire a target routing path; the target routing path is a path from a source host channel adapter to a target host channel adapter;
[0107] The test module 402 is used to send test data according to the target routing path to obtain a test result.
[0108] In some optional embodiments, the testing device further comprises:
[0109] The building module 403 is used to divide the switch to be tested into various sub-switches and build a target fat-tree network including several sub-switches.
[0110] In some optional implementations, the building module 403 includes:
[0111] A determination unit, used to obtain a test requirement and determine a network structure of a target fat tree network according to the test requirement, wherein the target fat tree network includes several layers of sub-switches, each layer of sub-switches includes several sub-switches, and ports of sub-switches of each layer are connected to ports of sub-switches of adjacent layers;
[0112] The connection unit is used to obtain the number of host channel adapters to connect the host channel adapters to the downlink ports of the first sub-switch, wherein the first sub-switch is the lowest layer sub-switch of the target fat-tree network.
[0113] In some optional implementations, the acquisition module 401 includes:
[0114] The first acquisition unit is used to acquire the routing constraint condition, the source host channel adapter and the target host channel adapter.
[0115] The generating unit is used to generate a target routing path satisfying the routing constraint condition according to the target fat tree network, wherein the target routing path passes through the top-level sub-switch of the target fat tree network.
[0116] In some optional implementations, the first acquiring unit includes:
[0117] A partitioning subunit is used to partition the ports of the top-level sub-switch of the target fat-tree network and generate a data transmission group based on the partitioning result;
[0118] The direction determination subunit is used to determine the data transmission direction of the target routing path in the top-level sub-switch according to the data transmission group, and use it as a routing constraint condition.
[0119] In some optional implementations, the acquisition module 401 further includes:
[0120] A second acquisition unit, configured to acquire a test requirement, wherein the test requirement includes at least one of an all-to-all communication requirement and a one-to-many communication requirement;
[0121] The path acquisition unit is used to acquire at least one target routing path based on the test requirements.
[0122] In some optional implementations, the test device further includes a congestion control module 404, and the congestion control module 404 includes:
[0123] A monitoring unit, configured to monitor the traffic situation of the common path when there is a common path between at least two target routing paths, and determine whether there is congestion on the common path according to the traffic situation;
[0124] The adjusting unit is used for adjusting the data sending speed of the source host channel adapter in the target routing path when there is congestion in the public path.
[0125] The further functional description of each of the above modules and units is the same as that of the above corresponding embodiments and will not be repeated here.
[0126] The test device of the fat tree network in this embodiment is presented in the form of a functional unit, where the unit refers to an ASIC (Application Specific Integrated Circuit) circuit, a processor and memory that executes one or more software or fixed programs, and / or other devices that can provide the above functions.
[0127] The embodiment of the present invention also provides a computer device having the above Figure 6 Test setup of the fat-tree network shown.
[0128] See also Figure 7 , Figure 7 1 is a schematic diagram of the structure of a computer device provided by an optional embodiment of the present invention, and the computer device includes: one or more processors 10, a memory 20, and interfaces for connecting various components, including high-speed interfaces and low-speed interfaces. The various components are connected to each other using different buses for communication, and can be installed on a common mainboard or installed in other ways as needed. The processor can process instructions executed in the computer device, including instructions stored in or on the memory to display graphical information of the GUI on an external input / output device (such as a display device coupled to the interface). In some optional embodiments, if necessary, multiple processors and / or multiple buses can be used together with multiple memories and multiple memories. Similarly, multiple computer devices can be connected, and each device provides some necessary operations (for example, as a server array, a group of blade servers, or a multi-processor system). Figure 7 A processor 10 is taken as an example.
[0129] The processor 10 may be a central processing unit, a network processor or a combination thereof. The processor 10 may further include a hardware chip. The hardware chip may be a dedicated integrated circuit, a programmable logic device or a combination thereof. The programmable logic device may be a complex programmable logic device, a field programmable gate array, a general purpose array logic or any combination thereof.
[0130] The memory 20 stores instructions executable by at least one processor 10, so that at least one processor 10 executes the method shown in the above embodiment.
[0131] The memory 20 may include a program storage area and a data storage area, wherein the program storage area may store an operating system, an application required for at least one function; the data storage area may store data created according to the use of the computer device, etc. In addition, the memory 20 may include a high-speed random access memory, and may also include a non-transient memory, such as at least one disk storage device, a flash memory device, or other non-transient solid-state storage device. In some optional embodiments, the memory 20 may optionally include a memory remotely arranged relative to the processor 10, and these remote memories may be connected to the computer device via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.
[0132] The memory 20 may include a volatile memory, such as a random access memory; the memory may also include a non-volatile memory, such as a flash memory, a hard disk or a solid state drive; the memory 20 may also include a combination of the above types of memory.
[0133] The computer device also includes an input device 30 and an output device 40. The processor 10, the memory 20, the input device 30 and the output device 40 may be connected via a bus or other means. Figure 7 The example of connecting through bus is taken in the following.
[0134] The input device 30 can receive input digital or character information, and generate key signal input related to the user settings and function control of the computer device, such as a touch screen, a keypad, a mouse, a track pad, a touch pad, an indicator bar, one or more mouse buttons, a trackball, a joystick, etc. The output device 40 may include a display device, an auxiliary lighting device (e.g., an LED) and a tactile feedback device (e.g., a vibration motor), etc. The above-mentioned display device includes but is not limited to a liquid crystal display, a light emitting diode, a display and a plasma display. In some optional embodiments, the display device can be a touch screen.
[0135] The embodiment of the present invention also provides a computer-readable storage medium. The method according to the embodiment of the present invention can be implemented in hardware, firmware, or can be implemented as a computer code that can be recorded in a storage medium, or can be implemented as a computer code that is originally stored in a remote storage medium or a non-temporary machine-readable storage medium and will be stored in a local storage medium through a network download, so that the method described herein can be stored in such software processing on a storage medium using a general-purpose computer, a dedicated processor, or programmable or dedicated hardware. Among them, the storage medium can be a magnetic disk, an optical disk, a read-only storage memory, a random access memory, a flash memory, a hard disk or a solid-state hard disk, etc.; further, the storage medium can also include a combination of the above types of memories. It can be understood that a computer, a processor, a microprocessor controller, or programmable hardware includes a storage component that can store or receive software or computer code. When the software or computer code is accessed and executed by a computer, a processor, or hardware, the method shown in the above embodiment is implemented.
[0136] A part of the present invention may be applied as a computer program product, such as a computer program instruction, which, when executed by a computer, can call or provide the method and / or technical solution according to the present invention through the operation of the computer. Those skilled in the art should understand that the existence of the computer program instruction in a computer-readable medium includes, but is not limited to, a source file, an executable file, an installation package file, etc., and accordingly, the way in which the computer program instruction is executed by the computer includes, but is not limited to: the computer directly executes the instruction, or the computer compiles the instruction and then executes the corresponding compiled program, or the computer reads and executes the instruction, or the computer reads and installs the instruction and then executes the corresponding installed program. Here, the computer-readable medium may be any available computer-readable storage medium or communication medium accessible to the computer.
[0137] Although the embodiments of the present invention have been described in conjunction with the accompanying drawings, those skilled in the art may make various modifications and variations without departing from the spirit and scope of the present invention, and such modifications and variations are all within the scope defined by the appended claims.
Claims
1. A fat tree network testing method, characterized in that: The fat tree network is arranged on the switch to be tested; the switch to be tested includes several layers of sub-switches; each layer of sub-switches includes at least two ports of the switch to be tested; the ports of the several layers of sub-switches are connected to form a target fat tree network; The downlink ports of the bottom-layer sub-switch of the target fat-tree network are connected to each host channel adapter; The method comprises: Obtaining a target routing path; the target routing path is a path from a source host channel adapter to a target host channel adapter; The test data is sent according to the target routing path to obtain the test result.
2. The method according to claim 1, characterized in that Before obtaining the target routing path, the method further includes: Divide the switch to be tested into sub-switches, and build a target fat-tree network containing several sub-switches.
3. The method according to claim 2, characterized in that The construction of a target fat-tree network including several layers of sub-switches includes: Acquire test requirements, and determine the network structure of the target fat tree network according to the test requirements, wherein the target fat tree network includes several layers of sub-switches, each layer of sub-switches includes several sub-switches, and ports of sub-switches of each layer are connected to ports of sub-switches of adjacent layers; The number of host channel adapters is obtained to connect the host channel adapters to downlink ports of a first sub-switch, wherein the first sub-switch is a bottom-level sub-switch of the target fat-tree network.
4. The method according to claim 1, characterized in that: The obtaining of the target routing path comprises: Obtaining routing constraints, the source host channel adapter, and the target host channel adapter; A target routing path that satisfies the routing constraint condition is generated according to the target fat-tree network, wherein the target routing path passes through the top-level sub-switch of the target fat-tree network.
5. The method according to claim 4, characterized in that The acquisition of routing constraints includes: Performing port division on the top-level sub-switch of the target fat-tree network, and generating a data transmission group based on the division result; According to the data transmission group, the data transmission direction of the target routing path in the top-level sub-switch is determined and used as a routing constraint condition.
6. The method according to claim 1, characterized in that The obtaining of the target routing path comprises: Acquire a test requirement, wherein the test requirement includes at least one of an all-to-all communication requirement and a one-to-many communication requirement; Based on the test requirement, at least one target routing path is obtained.
7. The method according to claim 1, characterized in that The method further comprises: In the case where there is a common path between at least two target routing paths, monitoring the traffic situation of the common path, and judging whether there is congestion on the common path according to the traffic situation; When congestion occurs on the public path, a data sending speed of a source host channel adapter in the target routing path is adjusted.
8. A fat tree network testing device, characterized in that: The device comprises: An acquisition module, used for acquiring a target routing path; the target routing path is a path from a source host channel adapter to a target host channel adapter; The test module is used to send test data according to the target routing path to obtain test results.
9. A computer device, characterized in that: include: A memory and a processor, wherein the memory and the processor are communicatively connected to each other, the memory stores computer instructions, and the processor executes the fat tree network testing method according to any one of claims 1 to 7 by executing the computer instructions.
10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a computer to execute the fat-tree network testing method according to any one of claims 1 to 7.