Irregularly shaped capacitive sensor and location of touch event therein

Abstract

A method includes changing a geometry of a capacitive sensor design from a first geometry to a second geometry, the second geometry being different from the first geometry; and obtaining an executable instruction that transforms a location identifier of a touch event from a first location identifier associated with the first geometry to a second location identifier associated with the second geometry.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the benefit of the priority date of U.S. Provisional Patent Application No. 63 / 366,682, filed on June 20, 2022, entitled “CAPACITIVE SENSOR GEOMETRY DISTORTION TO DESIGN A CAPACITIVE SENSOR HAVING AN IRREGULAR GEOMETRY, AND CAPACITIVE SENSORS HAVING IRREGULAR GEOMETRIES,” the entire contents and disclosure of which are incorporated herein by reference. Technical Field

[0003] Examples involve capacitive sensors, irregularly shaped capacitive sensors, and reporting the location of touch events at which they occur. Background Art

[0004] Capacitive sensors are used in a variety of operating environments such as, but not limited to, touch screens, touch pads, and capacitive buttons. BRIEF DESCRIPTION OF THE DRAWINGS

[0005] To easily identify the discussion of any particular element or act, the most significant digit(s) in a reference number refers to the figure number in which the element is first introduced.

[0006] Figure 1A is a schematic diagram depicting a capacitive sensor design according to one or more examples, and more particularly, a graphical representation of a capacitive sensor design to be distorted.

[0007] Figure 1B is a schematic diagram depicting a capacitive sensor design according to one or more examples, and more particularly, a graphical representation of a distorted capacitive sensor design.

[0008] Figure 2 is a flow chart depicting a process of distorting the geometry of a capacitive sensor design from a first regular geometry to a second irregular geometry according to one or more examples.

[0009] Figure 3 is a flow chart depicting a process of distorting the geometry of a capacitive sensor design according to one or more examples.

[0010] Figure 4 is a flow chart depicting a process of changing the geometry of a capacitive sensor design from a first geometry to a second geometry according to one or more examples.

[0011] Figure 5is a flow chart depicting a process of mapping the geometry of a reference design to the geometry of a target design according to one or more examples.

[0012] Figure 6 is a flow chart depicting a process of setting corresponding node areas of a mapped reference design to have uniform size according to one or more examples.

[0013] Figure 7 is a flow chart depicting a process of scaling the size of corresponding node areas of a mapped reference design according to a scaling factor according to one or more examples.

[0014] Figure 8 is a flow chart depicting a process of completing corresponding sensor node geometries of a mapped reference design according to one or more examples.

[0015] Fig. 9A and Fig. 9B is a graphical representation of the outline of a target capacitive sensor design having an irregular geometry.

[0016] Fig. 10A is a graphical representation of a base grid according to one or more examples.

[0017] Fig. 10B is a remap based on one or more examples Fig. 10A A graphical representation of the base grid.

[0018] Fig. 10C is according to one or more examples corresponding to Fig. 10A A graphical representation of the basic grid of the basic touch sensor panel (TSP) pattern.

[0019] Fig. 10D is a remap based on one or more examples Fig. 10C Graphical representation of the TSP pattern.

[0020] Fig.11A is a graphical representation of a base grid having a 0.7 horizontal ratio according to one or more examples.

[0021] Fig. 11B is a remapped Fig.11A Graphical representation of a basic grid with a horizontal ratio of 0.7.

[0022] Fig. 11C is a graphical representation of a basic TSP pattern having a 0.7 level ratio according to one or more examples.

[0023] Fig.11D is a remapped Fig. 11CGraphical representation of the TSP pattern of the 0.7 horizontal ratio.

[0024] Fig. 12A , Fig. 12B and Fig. 12C is a graphical representation depicting a rough sensor node geometry for a 2-tier sensor node design according to one or more examples.

[0025] Fig.13A and Fig. 13B is a graphical representation depicting a distorted capacitive sensor design including a sensor node having a constructed geometry according to one or more examples.

[0026] Fig.14A , Fig. 14B and Fig. 14C is a schematic design illustrating a portion of a sensor node including electrodes and intersections of cross-elements according to one or more examples.

[0027] Fig.15 is a graphical representation depicting a completed distorted capacitive sensor design according to one or more examples.

[0028] Fig.16 is a block diagram depicting a system for distorting a geometry of a capacitive sensor design from a first regular geometry to a second irregular geometry according to one or more examples.

[0029] Fig.17 is a block diagram depicting a system for detecting touch at an irregularly shaped sensor according to one or more examples.

[0030] Fig.18 is a flow diagram depicting a process for detecting touch events at an irregularly shaped capacitive sensor according to one or more examples.

[0031] Fig.19 are block diagrams of circuits that, in some examples, may be used to implement various functions, operations, acts, processes, or methods disclosed herein. DETAILED DESCRIPTION

[0032] In the following detailed description, reference is made to the accompanying drawings which form a part of the present disclosure, and in the accompanying drawings are shown by way of example specific examples of embodiments in which the present disclosure may be implemented. These embodiments are described in sufficient detail to enable one of ordinary skill in the art to practice the present disclosure. However, other embodiments may be utilized, and changes in structure, material, and process may be made without departing from the scope of the present disclosure.

[0033] The illustrations presented herein are not intended to be actual views of any particular method, system, device, or structure, but are merely idealized representations for describing embodiments of the present disclosure. The drawings presented herein are not necessarily drawn to scale. For the convenience of the reader, similar structures or components in the various drawings may retain the same or similar numbering; however, the similarity of numbering does not mean that the structures or components must be identical in size, composition, configuration, or any other attribute.

[0034] The following description may include examples to help those skilled in the art practice the disclosed embodiments of the present invention. The use of the terms "exemplary", "by way of example" and "for example" means that the relevant description is illustrative, and although the scope of the present disclosure is intended to cover examples and legal equivalents, the use of such terms is not intended to limit the scope of the embodiments or the present disclosure to the specified components, steps, features or functions, etc.

[0035] It should be readily understood that the components of the embodiments as generally described herein and shown in the accompanying drawings may be arranged and designed in a variety of different configurations. Therefore, the following description of various embodiments is not intended to limit the scope of the present disclosure, but is merely representative of various embodiments. Although various aspects of the embodiments may be presented in the accompanying drawings, the drawings are not necessarily drawn to scale unless otherwise indicated.

[0036] In addition, the specific implementations shown and described are only examples and should not be construed as the only way to implement the present disclosure, unless otherwise specified herein. Elements, circuits, and functions can be shown in block diagram form so as not to obscure the present disclosure with unnecessary details. On the contrary, the specific implementations shown and described are only exemplary and should not be construed as the only way to implement the present disclosure, unless otherwise specified herein. Additionally, the partitioning of logic between block definitions and individual blocks is an example of a specific implementation. It will be apparent to those of ordinary skill in the art that the present disclosure can be practiced through many other partitioning solutions. In most cases, details about timing considerations, etc. have been omitted, where such details are not required to obtain a complete understanding of the present disclosure and are within the capabilities of those of ordinary skill in the relevant art.

[0037] Those of ordinary skill in the art will appreciate that information and signals may be represented using any of a variety of different technologies and techniques. For clarity of presentation and description, some of the figures may illustrate signals as single signals. Those of ordinary skill in the art will appreciate that a signal may represent a signal bus, where the bus may have a variety of bit widths, and that the present disclosure may be implemented on any number of data signals, including a single data signal.

[0038] The various exemplary logic blocks, modules, and circuits described in conjunction with the embodiments disclosed herein may be implemented or implemented with a general purpose processor, a special purpose processor, a digital signal processor (DSP), an integrated circuit (IC), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, a discrete gate or transistor logic component, a discrete hardware component, or any combination thereof designed to implement the functions described herein. A general purpose processor (which may also be referred to herein as a host processor or simply a host) may be a microprocessor, but in an alternative, the processor may be any conventional processor, controller, microcontroller, or state machine. The processor may also be implemented as a combination of computing devices, such as a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors combined with a DSP core, or any other such configuration. A general purpose computer including a processor is considered a special purpose computer when the general purpose computer is configured to execute computing instructions (e.g., software code) associated with the embodiments disclosed herein.

[0039] Embodiment can be described according to the process that is depicted as flow chart, flow diagram, structure diagram or block diagram.Although flow chart can describe operable action as continuous process, many of these actions can be performed in accordance with another sequence, in parallel or substantially simultaneously.In addition, the order of action can be rearranged.Process can correspond to method, thread, function, procedure, subroutine, subprogram, without restriction.In addition, the method disclosed herein can be realized by hardware, software or both.If realized in software, function can be stored or transmitted to computer readable medium as one or more instructions or codes.Computer readable medium includes both computer storage medium and communication medium, and this communication medium includes any medium that is conducive to transferring computer program from one location to another location.

[0040] Any reference to elements herein using names such as "first," "second," etc. does not limit the quantity or order of those elements unless such limitations are explicitly stated. Rather, these names may be used herein as a convenient method of distinguishing between two or more elements or instances of elements. Thus, reference to a first element and a second element does not mean that only two elements may be employed there, or that the first element must precede the second element in some manner. Furthermore, unless otherwise indicated, a group of elements may include one or more elements.

[0041] As used herein, the term "substantially" in reference to a given parameter, attribute, or condition refers to and includes the degree to which a person of ordinary skill in the art would understand that the given parameter, attribute, or condition is satisfied with a small degree of variance, such as, for example, within acceptable manufacturing tolerances. By way of example, depending on the particular parameter, attribute, or condition that is substantially satisfied, the parameter, attribute, or condition may be satisfied by at least 90%, at least 95%, or even at least 99%.

[0042] In this description, the term "coupled" and its derivatives may be used to indicate that two elements cooperate or interact with each other. When an element is described as being "coupled" to another element, then the elements may be in direct physical or electrical contact, or there may be intervening elements or layers. In contrast, when an element is described as being "directly coupled" to another element, then there are no intervening elements or layers. The terms "on" and "connected" may be used interchangeably with the term "coupled" in this description and have the same meaning, unless otherwise expressly indicated or the context would otherwise indicate to one of ordinary skill in the art.

[0043] As used herein, the term "geometric shape" refers to the shape and relative arrangement of the parts of something. As used herein, the term "irregular geometric shape" refers to a geometric shape that is not a rectangle. Non-limiting examples include geometric shapes that include uneven sides, uneven angles, or uneven curves. As used herein, the term "irregularly shaped" means "having an irregular geometric shape," unless otherwise expressly stated or the specific context of the term used herein would indicate otherwise to one of ordinary skill in the art.

[0044] In a typical capacitive sensor arrangement for capacitive sensing, electrodes are arranged in a grid of rows and columns (sometimes referred to as "X electrodes" and "Y electrodes"), respectively, and the intersections of the X electrodes and the Y electrodes are referred to as "sensor nodes". When an alternating current electrical stimulus is applied to the capacitive sensor, the electrodes measure capacitance. When a conductive object such as a finger or stylus is appropriately close to (e.g., near or touching, but not limited to) a sensor node, at least some of the electrodes measure a different capacitance, i.e., a change in the measured capacitance of those electrodes. Capacitive sensing involves detecting such changes in measured capacitance.

[0045] In a typical two-dimensional (2D) arrangement of capacitive sensors ("sensors"), the grid has a rectangular shape and the corresponding sensor nodes of the sensors have uniform rectangular shapes. A typical touch controller is preconfigured to detect capacitance changes at sensors having rectangular shapes. Symmetry facilitates capacitive sensing (especially mutual capacitance sensing) because the effects of capacitive loads (e.g., conductive objects that are appropriately close to the sensor nodes) are balanced.

[0046] Sometimes it may be desirable to have a sensor that has a non-rectangular shape (e.g., trapezoidal or elliptical, as well as regular or irregular shapes, but not limited thereto). As a non-limiting example, a non-rectangular sensor may be paired with a non-rectangular shaped display, touchpad, button, or slider.

[0047] A touch controller that is preconfigured to detect capacitance changes at a sensor having a rectangular shape may produce incorrect or inaccurate results if paired with a sensor having a non-rectangular shape. For example, a touch controller that generates Cartesian coordinates ("coordinates") associated with the location of a touch event at a sensor may generate coordinates that are different from the actual coordinates of the location of the touch event at the non-rectangular sensor.

[0048] One or more examples generally relate to distorting the geometry of a capacitive sensor design from a first regular geometry to a second irregular geometry, and methods, apparatus, and systems for doing so. The distorted capacitive sensor design may determine the size of a physical capacitive sensor manufactured based on the design.

[0049] One or more examples generally relate to generating a location identifier (e.g., Cartesian coordinates, but not limited thereto) for a touch event at a capacitive sensor having an irregular geometry, configuring a controller to generate a location identifier for a touch event at a capacitive sensor having an irregular geometry, and methods, apparatus, and systems for doing so. The controller may be preconfigured to generate a location identifier for a capacitive sensor having a regular geometry, and one or more examples may relate to changing a location identifier for a capacitive sensor having a regular geometry to a location identifier for a capacitive sensor having an irregular geometry.

[0050] One or more examples generally relate to a controller configured to generate a location identifier for a touch event at a capacitive sensor having an irregular geometry, and a capacitive sensing system including the controller.

[0051] Figure 1A and Figure 1B is a graphical representation of a capacitive sensor design pre-distorted (“capacitive sensor design to be distorted”) and post-distorted (“distorted capacitive sensor design”) according to one or more examples.

[0052] Figure 1A and Figure 1B Each of the X and Y axes defines an XY plane. The numbers on the X and Y axes increase in linear proportion from the origin. The XY pairs of these numbers can be used to represent the location of a specific point on the XY plane as a unique coordinate according to the coordinate system. These numbers can be used to represent the distance from the origin. In the Cartesian coordinate system, the spacing between the numbers is uniform. Figure 1A and Figure 1B The coordinate system defined by the depicted X-axis and Y-axis is a Cartesian coordinate system. By convention, the height is the distance on the Y-axis and the width is the distance on the X-axis, but this convention is used herein only for convenience and is not intended to limit the scope of the present disclosure in any way.

[0053] Figure 1A is a graphical representation of a capacitive sensor design 100a to be distorted according to one or more examples and may also be referred to herein as capacitive sensor design 100a to be distorted. The capacitive sensor design to be distorted may also be referred to herein as a "reference capacitive sensor design" or just a "reference design."

[0054] The capacitive sensor design 100a to be distorted includes a sensor 102. The sensor 102 includes X electrodes and Y electrodes arranged in a grid. The X electrodes and Y electrodes may be in or form the same layer or different layers, with one layer covering the other layer. The corresponding intersections 104 of the X electrodes and the Y electrodes form corresponding sensor nodes 106 of the sensor 102.

[0055] Sensor 102 has a regular geometric shape. Specifically, sensor 102 has uniform dimensions: the height of sensor 102 is 25, the width of sensor 102 is 25, the length of each column of electrodes is 25, and the length of each row of electrodes is 25. In addition, each row and each column of sensor 102 has the same number of sensor nodes, and the corresponding sensor nodes have the same area (the corresponding node area is "node area"). The coordinate plane of the capacitive sensor design 100a and its geometry to be distorted is the XY plane defined by the outline of sensor 102.

[0056] Since the node area and number of sensor nodes of sensor nodes 106 are uniform, in the absence of a touch event (i.e., there is no object that is appropriately close to one or more sensor nodes to affect the capacitance measurement), the corresponding capacitance and capacitance value (e.g., the value generated in response to the capacitance measurement, but not limited thereto) of the nodes of sensor 102 can be given by the uniform parallel plate capacitor formula: It is represented by, where C is the capacitance measured in farads, A is the area of ​​one of the parallel plates measured in square meters, and ∈ is the vacuum dielectric constant ∈0 multiplied by the relative dielectric constant ∈ r defines the dielectric constant of the electrolyte (the material between the plates, such as air), and d is the distance between the parallel plates (usually the thickness of the touch cover).

[0057] Figure 1B is a graphical representation of a capacitive sensor design 100b distorted according to one or more examples, and may also be referred to herein as a distorted capacitive sensor design 100b. As discussed below, the distorted capacitive sensor design 100b is generated by distorting the geometry of the sensor 102 of the capacitive sensor design 100a to be distorted. In one or more examples, the distorted capacitive sensor design may correspond to a target capacitive sensor design. The target capacitive sensor design may also be referred to herein as a "target design."

[0058] The distorted capacitive sensor design 100b includes a distorted sensor 108. The distorted sensor includes X electrodes and Y electrodes arranged in a grid. The X electrodes and Y electrodes may be in or form the same layer or different layers, with one layer covering the other layer. Respective intersections of the X electrodes and Y electrodes of the distorted sensor 108 form corresponding sensor nodes of the distorted sensor 108.

[0059] The distorted sensor 108 has an irregular geometry. More specifically, the distorted sensor 108 does not have uniform dimensions. The top width is about 20, the bottom width is about 25, and the length of the corresponding rows of sensors 102 increases from the bottom row having a width of about 25 to the top row having a width of about 20. The lengths of the left and right sides of the distorted sensor 108 are different, and the formula for determining the length of the side of a right triangle can be used to determine, where 'n' is the length of the hypotenuse, and 'l' and 'm' are the lengths of the other sides of the right triangle.

[0060] The locations of points on the area defined by the distorted sensor 108 may be expressed according to the Cartesian coordinate system of the capacitive sensor design 100a to be distorted, and may also be expressed according to another coordinate system that is a distorted version of the coordinate system of the capacitive sensor design 100a to be distorted. In the distorted coordinate system, the spacing intervals on the X-axis and the Y-axis are uneven. The spacing intervals of the distorted coordinate system are defined by the spacing intervals in the X-direction and the Y-direction between the intersections of the X-electrodes and the Y-electrodes of the distorted capacitive sensor design 100b, which are not aligned with the spacing intervals of the intersections of the X-electrodes and the Y-electrodes of the capacitive sensor design 100a to be distorted, nor are they aligned with the spacing intervals of the numbers on the X-axis and the numbers on the Y-axis.

[0061] Distorted Capacitive Sensor Design 100b with Figure 1A The Cartesian coordinate system of is associated with and it is also associated with a coordinate system that is different from the capacitive sensor design 100a to be distorted.

[0062] The corresponding areas of the sensor nodes of the distorted sensor 108 are substantially uniform (i.e., if the difference from the smallest area to the largest area is < 25%, then the node area is substantially uniform), and the corresponding geometric shapes of the sensor nodes are different in at least some cases (e.g., the corresponding heights or widths of the sensor nodes are different, but not limited to such), and therefore may not be substantially uniform. Figure 1BIn the particular non-limiting example depicted, the geometry of sensor node 110 is different than the geometry of sensor node 112. The widths of sensor node 110 and sensor node 112 are different, and the heights of sensor node 110 and sensor node 112 are different. Notably, the respective node areas of sensor node 110 and sensor node 112 are substantially the same (i.e., uniform, as discussed below).

[0063] The number of sensor nodes in each row of the distorted sensor 108 is uniform, and the corresponding node areas of the sensor nodes of the distorted sensor 108 are substantially uniform, and the corresponding capacitances and capacitance values ​​of the X electrodes and Y electrodes of the distorted sensor 108 in the absence of touch are substantially uniform (if the difference from the minimum capacitance to the maximum capacitance is ≤ 20%, the capacitance is substantially uniform, but some higher or lower variations may be allowed based on specific operating conditions). Because the capacitance is substantially uniform, the capacitive response to touch is substantially uniform (i.e., if the difference from the minimum capacitance response to the maximum capacitance response is < XYZ%, the capacitive response to touch is substantially uniform here). Because the capacitive response to touch is substantially uniform, a touch controller configured to detect touch events on a sensor having a regular geometry can reliably detect touch events on the distorted sensor 108.

[0064] The visual and above-discussed differences between the capacitive sensor design to be distorted 100a and the distorted capacitive sensor design 100b represent the distortion applied to the capacitive sensor design to be distorted 100a, as discussed below.

[0065] If a touch at distorted sensor 108 is detected using a touch controller configured to detect a touch at sensor 102, the coordinates representing the location of the touch event detected by the touch controller will be associated with the coordinate plane of the capacitive sensor design 100a to be distorted. For example, in the case of a touch event at the upper right corner of distorted sensor 108, such a touch controller will output XY coordinates (25, 25), but the actual XY coordinates will be (24, 25).

[0066] Since the coordinate planes are known for both the capacitive sensor design to be distorted 100a and the distorted capacitive sensor design 100b, a transformation for changing coordinates associated with the coordinate plane of the capacitive sensor design to be distorted 100a to coordinates associated with the coordinate plane of the distorted capacitive sensor design 100b may be determined as discussed below.

[0067] Figure 2is a flow chart depicting a process 200 of distorting the geometry of a capacitive sensor design from a first regular geometry to a second irregular geometry according to one or more examples. Process 200 is a non-limiting example of a process of distorting a capacitive sensor design 100a to be distorted to a distorted capacitive sensor design 100b.

[0068] Although the example process 200 depicts a particular order of operations, this order may be changed without departing from the scope of the present disclosure. For example, some of the operations depicted may be performed in parallel or in a different order without materially affecting the functionality of the process 200. In other examples, different components of an example device or system implementing the process 200 may perform functions substantially simultaneously or in a particular sequence.

[0069] According to one or more examples, process 200 includes changing a geometry of a capacitive sensor design from a first geometry to a second geometry that is different from the first geometry at operation 202. In one or more examples, the first geometry can be a regular geometry and the second geometry can be an irregular geometry.

[0070] According to one or more examples, process 200 includes obtaining executable instructions (e.g., software, firmware, machine executable instructions, but not limited to) at operation 204 to transform the position identifier of the touch event from a first position identifier associated with a first geometric shape to a second position identifier associated with a second geometric shape. Obtaining executable instructions includes but is not limited to generating executable instructions. In one or more examples, the corresponding position identifier is an XY coordinate according to a Cartesian coordinate system. In one or more examples, the first position identifier is associated with the first geometric shape because it is associated with a coordinate plane of the first geometric shape. In one or more examples, the second position identifier is associated with the second geometric shape because it is associated with a coordinate plane of the second geometric shape based on the applied transformation.

[0071] Figure 3 is a flow chart depicting a process 300 of distorting the geometry of a capacitive sensor design according to one or more examples.

[0072] Although the example process 300 depicts a particular order of operations, this order may be changed without departing from the scope of the present disclosure. For example, some of the operations depicted may be performed in parallel or in a different order without materially affecting the functionality of the process 300. In other examples, different components of an example device or system implementing the process 300 may perform functions substantially simultaneously or in a particular sequence.

[0073] According to one or more examples, process 300 includes stretching, narrowing, or tilting a geometry of a capacitive sensor design or a corresponding geometry of one or more sensor nodes of a capacitive sensor design at operation 302. In one or more examples, stretching, narrowing, or tilting a geometry of a capacitive sensor design may include increasing or decreasing a height, a width, or both of an area corresponding to the capacitive sensor design or its sensor nodes; increasing or decreasing a length of a corresponding column or row of the capacitive sensor design or its sensor nodes; rotating an area corresponding to the capacitive sensor design or its sensor nodes on an axis perpendicular thereto, or combinations and sub-combinations thereof.

[0074] According to one or more examples, process 300 includes maintaining a same number of sensor nodes of a capacitive sensor design between a first geometry and a second geometry at operation 304 .

[0075] According to one or more examples, process 300 includes, at operation 306 , maintaining respective node areas of one or more sensor nodes of a capacitive sensor design substantially uniform.

[0076] Figure 4 is a flow chart depicting a process 400 of changing the geometry of a capacitive sensor design from a first geometry to a second geometry according to one or more examples.

[0077] Although the example process 400 depicts a particular order of operations, this order may be changed without departing from the scope of the present disclosure. For example, some of the operations depicted may be performed in parallel or in a different order without materially affecting the functionality of the process 400. In other examples, different components of an example device or system implementing the process 400 may perform functions substantially simultaneously or in a particular sequence.

[0078] According to one or more examples, process 400 includes obtaining a reference capacitive sensor design and a target capacitive sensor design at operation 402. The geometry of the reference capacitive sensor design is a first geometry and the geometry of the target capacitive sensor design is a second geometry. The first geometry and the second geometry are different, and as a non-limiting example, may be a regular geometry and an irregular geometry, respectively. The reference capacitive sensor design is the capacitive sensor design to be distorted. The target capacitive sensor design represents the requirements for the distorted capacitive sensor design. In theory, the distorted capacitive sensor design should match the target capacitive sensor design. The degree to which the distorted capacitive sensor design matches the target capacitive sensor design is a matter of design choice, and as a non-limiting example may depend on the specific application or specific operating conditions of the system including the capacitive sensor according to the distorted capacitive sensor design.

[0079] According to one or more examples, process 400 includes mapping a geometry of a reference capacitive sensor design to a geometry of a target capacitive sensor design at operation 404 .

[0080] According to one or more examples, process 400 includes setting corresponding node areas of the mapped reference capacitive sensor design to be substantially uniform at operation 406 .

[0081] According to one or more examples, process 400 includes completing the corresponding sensor node geometry of the mapped reference capacitive sensor design at operation 408. Here, "complete" refers to actions taken, if any, to refine and complete the form, fit, or function of the sensor node geometry.

[0082] Figure 5 is a flow chart depicting a process 500 of mapping the geometry of a reference design to the geometry of a target design according to one or more examples.

[0083] Although the example process 500 depicts a particular order of operations, this order may be changed without departing from the scope of the present disclosure. For example, some of the operations depicted may be performed in parallel or in a different order without materially affecting the functionality of the process 500. In other examples, different components of the example device or system implementing the process 500 may perform functions substantially simultaneously or in a particular sequence.

[0084] According to one or more examples, process 500 includes obtaining a reference capacitive sensor design and a target capacitive sensor design at operation 502. The geometry of the reference capacitive sensor design is a first geometry and the geometry of the target capacitive sensor design is a second geometry. The first geometry and the second geometry are different and, as non-limiting examples, may be a regular geometry and an irregular geometry, respectively.

[0085] According to one or more examples, process 500 includes identifying, at operation 504 , a component geometry of a geometry of a target capacitive sensor design that matches a predetermined geometry.

[0086] According to one or more examples, the method includes dividing the geometry of the reference capacitive sensor design into rectangular sub-geometries at operation 506. The respective rectangular sub-geometries include respective component geometries of the identified component geometries of the target capacitive sensor design.

[0087] According to one or more examples, process 500 includes calculating respective X coordinates of constituent geometric shapes for respective Y coordinates at operation 508 .

[0088] According to one or more examples, process 500 includes determining, at operation 510 , a function that describes a relationship between the Y coordinate of the component geometric shape and the Y coordinate of the rectangular sub-geometric shape.

[0089] According to one or more examples, process 500 includes returning XY coordinates of a geometry for a target capacitive sensor design and a function for determining the XY coordinates at operation 512. The function for determining the X and Y coordinates is a coordinate transformation.

[0090] Figure 6 is a flow chart depicting a process 600 of setting corresponding node areas of a mapped reference design to be substantially uniform, according to one or more examples.

[0091] Although the example process 600 depicts a particular order of operations, this order may be changed without departing from the scope of the present disclosure. For example, some of the operations depicted may be performed in parallel or in a different order without materially affecting the functionality of the process 600. In other examples, different components of an example device or system implementing the process 600 may perform functions substantially simultaneously or in a particular sequence.

[0092] According to one or more examples, the method includes obtaining a scaling factor at operation 602 .

[0093] According to one or more examples, the method includes scaling a size of a corresponding node area of ​​the mapped reference design according to a scaling factor at operation 604 .

[0094] Figure 7 is a flow chart depicting a process 700 of scaling the size of corresponding node areas of a mapped reference design according to a scaling factor, according to one or more examples.

[0095] Although the example process 700 depicts a particular order of operations, this order may be changed without departing from the scope of the present disclosure. For example, some of the operations depicted may be performed in parallel or in a different order without materially affecting the functionality of the process 700. In other examples, different components of the example device or system implementing the process 700 may perform functions substantially simultaneously or in a particular sequence.

[0096] According to one or more examples, process 700 includes receiving a ratio value and a delta value at operation 702 .

[0097] According to one or more examples, process 700 includes applying a ratio value to a height of a bottom row of a reference design at operation 704 .

[0098] According to one or more examples, process 700 includes incrementing the ratio value by the increment value at operation 706 .

[0099] According to one or more examples, process 700 includes applying the incremented ratio value to the height of the next row of the reference design at operation 708 .

[0100] According to one or more examples, the process 700 includes determining whether all rows are allocated at decision block 710. If the process 700 determines "no" in response to the decision block 710, it loops back to operation 706 to increment the ratio value by the increment value, and so on. If the process 700 determines "yes" in response to the decision block 710, the process 700 proceeds to decision block 712.

[0101] According to one or more examples, process 700 includes calculating a maximum sensor node area, a minimum sensor node area, and a maximum area difference at decision block 712. The maximum area difference is calculated as the difference between the calculated maximum sensor node area and the calculated minimum sensor node area. The maximum sensor node area is the area of ​​the corresponding sensor node having the maximum area calculated by process 700, and the minimum sensor node area is the area of ​​the other corresponding sensor node having the minimum area calculated by process 700.

[0102] According to one or more examples, process 700 includes determining whether the maximum area difference value is acceptable at decision block 714. In one or more examples, determining whether the maximum area difference value is acceptable includes comparing the maximum area difference value to a predetermined threshold and determining "yes" if the maximum area difference value is greater than the predetermined threshold and determining "no" if the maximum area difference value is less than the predetermined threshold.

[0103] In some examples, the loop of process 700 may appear to be infinite because repeated iterations of process 700 do not result in an acceptable maximum area difference value (e.g., below a predetermined threshold, but not limited thereto). Therefore, in one or more examples, process 700 may include a counter and continue to return an error status if decision block 712 does not return "yes" (i.e., current counter>predetermined count threshold) within a predetermined number of counts.

[0104] If process 700 determines “no” at decision block 714 , process 700 proceeds to operation 716 .

[0105] According to one or more examples, process 700 includes obtaining a new ratio value at operation 716, and then looping back to operation 704. The new ratio value may be calculated using any suitable technique. As a non-limiting example, the new ratio value may be calculated by increasing or decreasing the current ratio value according to a function or a predetermined step size. As another non-limiting example, the new ratio value may be obtained from a lookup table (LUT) that associates the ratio value with the current ratio value.

[0106] If process 700 determines “yes” at decision block 714 , process 700 proceeds to operation 718 .

[0107] According to one or more examples, process 700 includes returning the scaled, remapped reference capacitive sensor design at operation 718 .

[0108] Figure 8 is a flow chart depicting a process 800 of completing corresponding sensor node geometries for a mapped reference capacitive sensor design according to one or more examples.

[0109] Although the example process 800 depicts a particular order of operations, this order may be changed without departing from the scope of the present disclosure. For example, some of the operations depicted may be performed in parallel or in a different order without materially affecting the functionality of the process 800. In other examples, different components of an example device or system implementing the process 800 may perform functions substantially simultaneously or in a particular sequence.

[0110] According to one or more examples, the method includes, at operation 802 , constructing a coarse sensor node geometry of a distorted sensor node.

[0111] According to one or more examples, the method includes, at operation 804 , smoothing a curve of a cut line of the coarse node geometry.

[0112] According to one or more examples, the method includes aligning respective cross elements of respective sensor node geometries at operation 806. At the intersection of the X electrode and the Y electrode, typically one or both of the electrodes include a discontinuity at the intersection. The cross element is a mass of conductive material that is arranged to provide physical and electrical connections between portions of the electrode having the discontinuity across the space created by the discontinuity.

[0113] According to one or more examples, the method includes trimming gaps in the cut line at operation 808 .

[0114] According to one or more examples, the method includes returning a completed sensor node geometry at operation 810. The sensor node geometry has been smoothed, aligned, and trimmed to refine and complete the form, fit, or function of the sensor node geometry. The number of actions taken to refine and complete the form, fit, or function of the sensor node geometry and the quality of the results will depend on the specific operating conditions.

[0115] Fig. 9A , Fig. 9B , Fig. 10A , Fig. 10B , Fig.11A , Fig. 11B , Fig. 12A , Fig. 12B , Fig. 12C , Fig.13A and Fig. 13B Depicted together are specific non-limiting examples of intermediate graphical representations of positively distorted capacitive sensor designs according to one or more examples.

[0116] Fig. 9A and Fig. 9B Is it about Figure 5 A graphical representation of the component geometries of the target capacitive sensor design identified when mapping the geometry of the reference capacitive sensor design to the geometry of the target capacitive sensor design as discussed with process 500 .

[0117] A contour is set on the XY axis according to a Cartesian coordinate system (via a line from a point at (15,25) to a point at (25,0)), and Cartesian coordinates (0,0), (0,25), (15,25), (25,0), and (25,25) are depicted. The height of the target capacitive sensor design is the length from (0,0) to (0,25). The bottom length (bot_length) is the length from (0,0) to (25,0). The difference in the X direction between the upper right corner (coordinate (25,25)) and point 902 is "X_diff". The coordinates of point 902 are (15,25), so X_diff = 10.

[0118] Fig. 9A and Fig. 9B Depicted are aspects of determining a function that defines the relationship between the respective X-coordinates of constituent geometric shapes and the X-coordinates of regular, rectangular sub-geometric shapes of a reference capacitive sensor design.

[0119] In this example, new coordinates (10, 12.5) are calculated for the XY coordinates.

[0120] The parameter "x_diff_over" x_diff_over = (x_diff / (y_height / y)) is calculated using the following expression. Where "y_height" is the Y coordinate of the point using the original XY coordinates, and "y" is the height of the point using the constituent geometry, and "x_diff" is the difference between the X coordinate of the upper right corner of the constituent geometry and the X coordinate of the regular rectangular sub-geometry of the reference capacitive sensor design that will be distorted to achieve the constituent geometry of the target capacitive sensor design. Substituting the values ​​of these parameters into the expression x_diff_over = (10 / (25 / 12.5)) = 5.

[0121] The coefficient is calculated using the expression coefficient = bot_length / (bot_length - x_diff_over), where "bot_length" is the length of the bottom side of the constituent geometry of the target capacitive sensor design.

[0122] The "coefficients" are functions (also referred to herein as "transformation functions") that define the relationship between the respective X coordinates of the constituent geometric shapes and the X coordinates of the rectangular sub-geometric shapes. In one or more examples, the coefficients are stored (e.g., in a lookup table, but not limited thereto) and can be utilized by a coordinate transformation to change coordinates associated with a first geometric shape (a regular geometric shape) to coordinates associated with a second geometric shape (an irregular geometric shape).

[0123] When the values ​​of bot_length and x_diff_over are substituted into the expression, coefficient = 25 / (25-5) = 1.25.

[0124] The new X coordinate is calculated using the expression X / coefficient, where "X" is the original X coordinate. Substituting the values ​​for these terms, the new X coordinate = (10 / 1.666) = 8. The new XY coordinate is (8, 12.5).

[0125] If a touch event occurs at point 902 of a sensor generated from a distorted capacitive sensor design as discussed herein, a touch controller configured to detect a touch at a sensor having a regular geometry will output an XY coordinate of (25, 25) because the sensor nodes of the reference capacitive sensor design are squeezed together in the x-direction to generate the distorted capacitive sensor design. The distorted capacitive sensor design has the same number of sensor nodes as the reference capacitive sensor design, only arranged more compactly.

[0126] Applying the transformation function to the output coordinates changes the coordinates to a non-uniform Cartesian coordinate plane. Additionally or alternatively, the XY coordinates associated with the irregular geometric shape may be stored in a lookup table (LUT) and searched using the XY coordinates associated with the irregular geometric shape.

[0127] Fig. 10A is a graphical representation of a base grid according to one or more examples. Fig. 10B is remapped as discussed above Fig. 10A A graphical representation of the base grid.

[0128] Fig. 10BThe remapped basic grid depicts the outline of the target capacitive sensor design having an irregular geometry. The center points of the corresponding cells of the grid correspond to the sensor nodes, that is, the center points of the cells of the grid correspond to the intersections of the X electrodes and the Y electrodes. Although the basic grid and the remapped basic grid include the same number of cells, the cells of the remapped basic grid are not regular, but irregular (e.g., parallelograms and trapezoids).

[0129] Notably, on the remapped grid, there is a 104% area difference between the minimum and maximum areas of the cells of the remapped grid.As discussed above, it is desirable to reduce or eliminate differences in the respective areas of the sensor nodes represented by the grid cells.

[0130] Fig. 10C is a graphical representation of a basic touch sensor panel (TSP) pattern. Fig. 10D It is remapped Fig. 10C A graphical representation of the TSP pattern, as discussed above.

[0131] Fig. 10C The basic TSP pattern corresponds to Fig. 10A The basic grid depicted, and Fig. 10D The remapped TSP pattern corresponds to Fig. 10B The base mesh that was remapped in .

[0132] Fig. 10C and Fig. 10D The positions of the intersections of the X electrodes and the Y electrodes depicted in FIG. Fig. 10A and Fig. 10B The center points of the cells of the mesh depicted and the remapped mesh.

[0133] It is worth noting that the number of sensor nodes and cross-points in the remapped TSP pattern is the same as that in the basic TSP pattern.

[0134] As discussed above, it is desirable to reduce or eliminate differences in the respective areas of sensor nodes.

[0135] Fig.11A is a graphical representation of an example base grid with a 0.7 horizontal ratio. Fig. 11B is a remap with a horizontal ratio of 0.7 Fig.11A As a non-limiting example, the basic grid of Fig. 10A and Fig. 10B Apply a scaling process (such as, but not limited to, process 700) to obtain Fig.11A and Fig. 11B Depicted are the remapped base grid and base grid with a 0.7 horizontal ratio.

[0136] The vertical ratio is Fig.11A The height of the bottom row of cells in the same order as before scaling (i.e., Fig. 10A Here, the ratio is 0.7, so the height of the bottom row of cells is equal to 0.7H1. Although this example uses an adjustment to the vertical ratio, an adjustment to the horizontal ratio can be performed in the same manner. In addition, adjustments to both the vertical ratio and the horizontal ratio can be performed.

[0137] Fig. 11C is a graphical representation of an example basic TSP pattern with a 0.7 horizontal ratio. Fig. 11C is a remap with a horizontal ratio of 0.7 Fig. 11C As a non-limiting example, the basic TSP pattern can be represented by Fig. 10C and Fig. 10D Apply a scaling process (such as, but not limited to, process 700) to obtain Fig. 11C and Fig.11D Depicted are the remapped basic TSP pattern and the basic TSP pattern with a horizontal ratio of 0.7.

[0138] exist Fig.11D In the case of the sensor nodes of the depicted example, the gap has been maintained, but the node area and geometry of the cross-element are not uniform among the various sensor nodes, which can result in significant differences in the capacitance values ​​of the corresponding sensor nodes. Setting the node area and geometry of the sensor nodes of the mapped capacitive sensor design to be substantially uniform generally reduces the differences in capacitance values ​​for the corresponding sensor nodes.

[0139] Fig. 12A , Fig. 12B and Fig. 12C is a graphical representation depicting a rough sensor node geometry for a 2-tier sensor node design according to one or more examples.

[0140] As a non-limiting example, by performing some or all of the operations of process 800, Fig. 12A , Fig. 12B and Fig. 12C The geometric shapes depicted.

[0141] Fig. 12A Depicts an example basic sensor node geometry for a basic sensor node design.

[0142] Fig. 12B Example rough sensor node geometry depicting a first example distorted sensor node design.

[0143] Fig. 12CDepicting example coarse sensor node geometry for a second example distorted sensor node design that is different from the first distorted sensor node design.

[0144] Constructed using the 4-corner construction method used in computer-aided layout design Fig. 12A The example rough sensor node geometry is depicted in , but the present disclosure is not limited and any suitable method may be utilized, including, but not limited to, edge-center based construction methods utilized in computer-aided layout design.

[0145] Other rough sensor node geometries can be created, these are just the ones that will fit Fig. 11B Specific non-limiting examples of some sensor nodes in the remapped TSP pattern depicted.

[0146] Fig.13A and Fig. 13B is a graphical representation depicting a distorted capacitive sensor design including sensor nodes having geometries constructed as discussed herein. Fig.13A The sensor nodes of the distorted capacitive sensor design depicted in FIG. 1 are constructed using an edge-center construction method, and Fig. 13B The sensor nodes of the distorted capacitive sensor design depicted in are constructed using the 4-corner point construction method.

[0147] Cross-element geometry Fig.13A and Fig. 13B The distorted capacitive sensor design depicted in FIG. 1 is not consistently aligned, which can result in significant differences in the capacitance values ​​of the sensor nodes.

[0148] Fig.14A , Fig. 14B and Fig. 14C is a schematic design depicting a portion of a sensor node including electrodes and intersections of cross-elements. Fig.14A It shows a situation where the cross elements of the sensor nodes do not exhibit uniform alignment relative to the segment tips, as discussed below.

[0149] like Fig.14A , the cross element 1404 is arranged in a direction indicated by arrow 1406, which extends from a center point 1410 of the cross element 1404 through the midpoint of a line segment defining a side of a box representing the cross element 1404. The desired alignment is indicated by alignment line 1402, which extends from the center point 1410 to a segment top 1408, indicating the direction in which the cross element 1404 should be aligned. As long as the cross elements have the same geometry, any similar side of the box representing the cross element may be selected for orientation.

[0150] like Fig. 14BAs depicted, the cross element 1404 is rotated in the direction indicated by arrow 1414 about an axis (the axis being perpendicular to the page and passing through the center point 1410) until it is oriented in the direction depicted by the directional arrow indicated by arrow 1412, which is a ray from the center point 1410 through the midline of the edge of 1404 to the segment tip 1408. When oriented in this manner, the cross element 1404 is oriented in alignment with the segment tip 1408. In general, it is desirable for the cross element to exhibit a uniform orientation, whether relative to the segment tip or relative to another similar reference.

[0151] Fig. 14C Several sensor node portions are depicted including cross elements uniformly aligned with segment tips as discussed above.

[0152] Fig.15 is a graphical representation depicting an example distorted capacitive sensor design pattern completed as discussed above.

[0153] Fig.16 is a block diagram illustrating a system 1600 for distorting a geometry of a capacitive sensor design from a first regular geometry to a second irregular geometry according to one or more examples.

[0154] The system 1600 includes a sensor design application 1602. The sensor design application 1602 includes a geometry distorter 1604, a transformer calculator 1606, a distorted reference design 1612, and a coordinate transformer 1614.

[0155] As non-limiting examples, the sensor design application 1602 may be a software application executing on a local computer or a remote computer, or a service hosted at a server computer or in a cloud computing environment.

[0156] As a non-limiting example, geometry distorter 1604 can be a software module, routine, subroutine, or wrapper of sensor design application 1602. Geometry distorter 1604 receives reference design 1608 and target design 1610, which is a capacitive sensor design, and generates distorted reference design 1612 at least in response to reference design 1608 and target design 1610. As a non-limiting example, geometry distorter 1604 can generate distorted reference design 1612 in response to performing some or all of the operations discussed with respect to process 200, process 300, process 400, process 500, process 600, process 700, or process 800, or any combination or subcombination thereof.

[0157] As non-limiting examples, the transformer calculator 1606 may be a software module, routine, subroutine, or wrapper of the sensor design application 1602 or the geometry distorter 1604. The transformer calculator 1606 receives the distorted reference design 1612 and generates the coordinate transformer 1614. As non-limiting examples, the transformer calculator 1606 may generate the coordinate transformer 1614 in response to performing some or all of the operations discussed with respect to the process 500, or any combination or sub-combination thereof.

[0158] Coordinate transformer 1614 is a set of executable instructions for changing a set of coordinates generated by a touch controller configured for use with a regular shaped sensor into coordinates associated with an irregular shaped sensor. In one or more examples, coordinate transformer 1614 generated by transformer calculator 1606 may be software, firmware, or microcode that may be executed at least in part by a processing core of a microcontroller or more generally by an integrated circuit (IC).

[0159] Fig.17 is a block diagram illustrating a system 1700 for detecting touch at an irregularly shaped capacitive sensor according to one or more examples.

[0160] System 1700 includes a touch controller 1702 and an irregularly shaped capacitive sensor 1704. Touch controller 1702 includes firmware 1710, which includes a sensor detector 1706 of regular shape and a sensor coordinate transformer 1708. The sensor detector 1706 of regular shape is firmware for performing touch measurement and detection at touch controller 1702. Generally speaking, the sensor detector 1706 of regular shape detects a touch at a capacitive sensor of regular shape and generates coordinates of a Cartesian coordinate system. Coordinate transformer 1708 is firmware for changing coordinates generated by a touch controller (e.g., touch controller 1702, but not limited thereto) to coordinates associated with an irregular geometric shape (specifically, an irregular geometric shape of the capacitive sensor 1704 of irregular shape), the touch controller being configured to generate coordinates of a Cartesian coordinate system such as the sensor detector 1706 of regular shape. Coordinate transformer 1708 may be coordinate transformer 1614 generated by transformer calculator 1606. As a non-limiting example, coordinate transformer 1708 may be a non-limiting example of coordinate transformer 1614 generated by transformer calculator 1606 or generated via process 500 .

[0161] Fig.18 18 is a flow chart depicting a process 1800 for detecting touch events at an irregularly shaped capacitive sensor and reporting their locations according to one or more examples. As a non-limiting example, some or all of the operations of process 1800 may be performed at system 1700.

[0162] Although the example process 1800 depicts a particular order of operations, this order may be changed without departing from the scope of the present disclosure. For example, some of the operations depicted may be performed in parallel or in a different order without materially affecting the functionality of the process 1800. In other examples, different components of an example device or system implementing the process 1800 may perform functions substantially simultaneously or in a particular sequence.

[0163] According to some examples, the method includes receiving a measurement signal from an irregularly shaped capacitive sensor during a capacitance measurement process at operation 1802 .

[0164] According to some examples, the method includes detecting a capacitance change indicating a touch event at the irregularly shaped capacitance sensor at operation 1804 .

[0165] According to some examples, the method includes generating, at operation 1806 , a location identifier associated with the location of the touch event.

[0166] According to some examples, the method includes changing the location identifier from a first location identifier value to a second location identifier value at operation 1808, the first location identifier value being associated with a regular geometric shape and the second location identifier value being associated with an irregular geometric shape. In one or more examples, changing the location identifier from the first location identifier value to the second location identifier value may include assigning a new coordinate value, or generating an additional location identifier having the second location identifier value. In one or more examples, the changed location identifier or the additional location identifier (as the case may be) may be used to report a touch event.

[0167] Those skilled in the art will appreciate that the functional elements (eg, functions, operations, actions, processes or methods) of the examples disclosed herein may be implemented in any suitable hardware, software, firmware or a combination thereof. Fig.19 Non-limiting examples of specific implementations of the functional elements disclosed herein are illustrated.In some examples, some or all of the functional elements disclosed herein may be performed by hardware capable of executing the functional elements.

[0168] Fig.191906 is a block diagram of a circuit that can be used to implement various functions, operations, actions, processes, or methods disclosed herein in some examples. The circuit includes one or more processors 1902 (sometimes referred to herein as "processors 1902") operably coupled to one or more data storage devices 1904 (sometimes referred to herein as "storage devices 1904"). The storage devices 1904 include machine executable code 1906 stored thereon, and the processor 1902 includes logic circuits 1908. The machine executable code 1906 describes information of functional elements that can be implemented by the logic circuits 1908 (e.g., executed by the logic circuits). The logic circuits 1908 are adapted to implement (e.g., execute) the functional elements described by the machine executable code 1906. When executing the functional elements described by the machine executable code 1906, the circuit should be regarded as dedicated hardware for executing the functional elements disclosed herein. In some examples, the processors 1902 may execute the functional elements described by the machine executable code 1906 sequentially, simultaneously (e.g., on one or more different hardware platforms), or in one or more parallel process flows.

[0169] When implemented by logic circuitry 1908 of processor 1902, machine executable code 1906 adapts processor 1902 to perform operations of the examples disclosed herein. As non-limiting examples, machine executable code 1906 may adapt processor 1902 to perform some or all operations of one or more of the following: process 200, process 300, process 400, process 500, process 600, process 700, process 800, or process 1800.

[0170] Also as a non-limiting example, the machine executable code 1906 may adapt the processor 1902 to perform some or all of the features, functions, or operations disclosed herein for one or more of the following: the distorted capacitive sensor design 100a, the distorted capacitive sensor design 100b, the system 1600, and the system 1700. More specifically, the features, functions, or operations disclosed herein are directed to one or more of the following: the sensor design application 1602, the geometry distorter 1604, and the transformer calculator 1606; and the touch controller 1702, the firmware 1710, the irregular shape capacitive sensor 1704, the regular shape sensor detector 1706, and the coordinate transformer 1708.

[0171] Processor 1902 may include a general-purpose processor, a special-purpose processor, a central processing unit (CPU), a microcontroller, a programmable logic controller (PLC), a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, other programmable devices, or any combination thereof designed to perform the functions disclosed herein. When a general-purpose computer executes functional elements corresponding to machine executable code 1906 (e.g., software code, firmware code, hardware description) related to the examples of the present disclosure, the general-purpose computer including the processor is considered a special-purpose computer. It should be noted that the general-purpose processor (also referred to as a host processor or simply a host in this article) can be a microprocessor, but in an alternative, the processor 1902 may include any conventional processor, controller, microcontroller or state machine. The processor 1902 may also be implemented as a combination of computing devices, such as a combination of a DSP and a microprocessor, multiple microprocessors, one or more microprocessors combined with a DSP core, or any other such configuration.

[0172] In some examples, storage device 1904 includes volatile data storage device (e.g., random access memory (RAM)), non-volatile data storage device (e.g., flash memory, hard disk drive, solid state drive, erasable programmable read-only memory (EPROM), but not limited thereto). In some examples, processor 1902 and storage device 1904 may be implemented as a single device (e.g., semiconductor device product, system on chip (SOC), but not limited thereto). In some examples, processor 1902 and storage device 1904 may be implemented as independent devices.

[0173] In some examples, machine executable code 1906 may include computer readable instructions (e.g., software code, firmware code). By way of non-limiting example, the computer readable instructions may be stored by storage device 1904, directly accessed by processor 1902, and executed by processor 1902 using at least logic circuit 1908. Also as a non-limiting example, the computer readable instructions may be stored on storage device 1904, transferred to a memory device (not shown) for execution, and executed by processor 1902 using at least logic circuit 1908. Thus, in some examples, logic circuit 1908 includes electrically configurable logic circuit 1908.

[0174] In some examples, machine executable code 1906 may describe hardware (e.g., circuitry) to be implemented in logic circuit 1908 to perform a functional element. The hardware may be described at any of a variety of abstraction levels from low-level transistor layout to a high-level description language. At a high level of abstraction, a hardware description language (HDL) may be used, such as an IEEE standard hardware description language (HDL). As non-limiting examples, Verilog, SystemVerilog, and the like may be used. TM or Very Large Scale Integration (VLSI) Hardware Description Language (VHDL).

[0175] The HDL description may be converted into a description at any of a variety of other abstraction levels as desired. As a non-limiting example, the high-level description may be converted into a logic-level description such as a register transfer language (RTL), a gate-level (GL) description, a layout-level description, or a mask-level description. As a non-limiting example, the micro-operations performed by the hardware logic circuits (e.g., gates, flip-flops, registers, but not limited thereto) of the logic circuit 1908 may be described in RTL and then converted into a GL description by a synthesis tool, and the GL description may be converted into a layout-level description by a placement and routing tool, which corresponds to the physical layout of an integrated circuit, discrete gate or transistor logic, discrete hardware components, or a combination thereof of a programmable logic device. Therefore, in some examples, the machine executable code 1906 may include HDL, RTL, GL descriptions, mask-level descriptions, other hardware descriptions, or any combination thereof.

[0176] In examples where the machine executable code 1906 includes a hardware description (at any level of abstraction), a system (not shown, but including the storage device 1904) implements the hardware description described by the machine executable code 1906. As a non-limiting example, the processor 1902 may include a programmable logic device (e.g., an FPGA or a PLC), and the logic circuit 1908 may be electrically controlled to implement circuits corresponding to the hardware description into the logic circuit 1908. Also as a non-limiting example, the logic circuit 1908 may include hard-wired logic manufactured by a manufacturing system (not shown, but including the storage device 1904) according to the hardware description of the machine executable code 1906.

[0177] Regardless of whether the machine executable code 1906 includes computer readable instructions or a hardware description, the logic circuit 1908 is adapted to perform the functional elements described by the machine executable code 1906 when implementing the functional elements of the machine executable code 1906. It should be noted that although the hardware description may not directly describe the functional elements, the hardware description indirectly describes the functional elements that the hardware elements described by the hardware description are capable of performing.

[0178] The terms used in this disclosure, especially in the appended claims (e.g., the bodies of the appended claims) are generally intended to be “open” terms (e.g., the term “comprising” should be interpreted as “including but not limited to,” the term “having” should be interpreted as “having at least,” the term “including” should be interpreted as “including but not limited to,” etc.).

[0179] Additionally, if a specific number of introduced claim recitations is intended, such intent will be expressly recited in the claim, and in the absence of such recitation, no such intent is present. For example, as an aid to understanding, the following appended claims may include the use of the introductory phrases "at least one" and "one or more" to introduce claim recitations. However, the use of such phrases should not be construed to imply that a claim recitation introduced by the indefinite article "a" or "an" will limit any particular claim containing such introduced claim recitation to an embodiment containing only one such recitation, even when the same claim includes the introductory phrases "one or more" or "at least one" and an indefinite article, such as "a" or "an" (e.g., "a" and / or "an" may be interpreted to mean "at least one" or "one or more"); the same is true when a definite article is used to introduce a claim recitation.

[0180] In addition, even if a specific number of an introduced claim recitation is explicitly recited, one skilled in the art will recognize that such recitation should be interpreted to mean at least the recited number (e.g., the unmodified recitation "two recitations" means at least two recitations, or two or more recitations, in the absence of other modifiers). Moreover, in those cases where a convention similar to "at least one of A, B, and C, etc." or "one or more of A, B, and C, etc." is used, such construction is generally intended to include only A, only B, only C, both A and B, both A and C, both B and C, or all three of A, B, and C, etc. As used herein, "each" refers to some or the whole, and "each" refers to the whole.

[0181] In addition, any separate word or phrase presenting two or more alternative terms, whether in the specification, claims or drawings, should be understood to include the possibility of one of the terms, any one of the terms, or both of the terms. For example, the phrase "A or B" should be understood to include the possibility of "A" or "B" or "A and B".

[0182] Additional non-limiting examples include:

[0183] Embodiment 1: A method comprising: changing the geometry of a capacitive sensor design from a first geometry to a second geometry, the second geometry being different from the first geometry; and obtaining executable instructions for transforming a position identifier of a touch event from a first position identifier associated with the first geometry to a second position identifier associated with the second geometry.

[0184] Embodiment 2: The method according to embodiment 1, wherein the first geometric shape is a regular geometric shape, and the second geometric shape is an irregular geometric shape.

[0185] Embodiment 3: The method according to embodiments 1 and 2, wherein changing the geometry of the capacitive sensor design from the first geometry to the second geometry comprises: obtaining a reference capacitive sensor design and a target capacitive sensor design, wherein the geometry of the reference capacitive sensor design is the first geometry, and the geometry of the target capacitive sensor design is the second geometry; mapping the geometry of the reference capacitive sensor design to the geometry of the target capacitive sensor design; and setting corresponding node areas of the mapped reference capacitive sensor design to be uniform.

[0186] Embodiment 4: A method according to any one of embodiments 1 to 3, wherein mapping the geometric shape of the reference design to the geometric shape of the target design comprises: identifying a component geometric shape that matches a predetermined geometric shape in the geometric shape of the target capacitive sensor design; dividing the geometric shape of the reference capacitive sensor design into rectangular sub-geometric shapes, the corresponding rectangular sub-geometric shapes including the corresponding identified component geometric shapes in the component geometric shape of the target capacitive sensor design; for the corresponding Y coordinate, calculating the corresponding X coordinate of the identified component geometric shape; determining a function that describes the relationship between the X coordinate of the component geometric shape and the X coordinate of the rectangular sub-geometric shape; and returning the X coordinate and Y coordinate for the second geometric shape, and the function.

[0187] Embodiment 5: A method according to any one of embodiments 1 to 4, wherein setting the corresponding node areas of the mapped reference design to be uniform comprises: obtaining a scaling factor; and scaling the size of the corresponding node areas of the mapped reference capacitive sensor design according to the scaling factor.

[0188] Embodiment 6: The method according to any one of embodiments 1 to 5 includes: completing the corresponding sensor node geometry of the mapped reference capacitive sensor design.

[0189] Embodiment 7: A method according to any one of embodiments 1 to 6, wherein the completion includes: constructing a rough sensor node geometry; smoothing the curves of the cutting lines of the rough node geometry; aligning the corresponding intersection details of the corresponding sensor node geometries; trimming the gaps in the cutting lines; and returning the completed sensor node geometry.

[0190] Embodiment 8: The method according to any one of embodiments 1 to 7, wherein the scale of the reference coordinate line of the first geometric shape is different from the scale of the reference coordinate line of the second geometric shape.

[0191] Embodiment 9: The method according to any one of embodiments 1 to 8 includes: maintaining the same number of sensor nodes of the capacitive sensor design between the first geometric shape and the second geometric shape; and maintaining the corresponding node areas of the one or more sensor nodes of the capacitive sensor design substantially uniform.

[0192] Embodiment 10: A method according to any one of embodiments 1 to 9, wherein changing the geometric shape of the capacitive sensor design comprises one or more of the following: stretching, narrowing or tilting the geometric shape of the capacitive sensor design or the corresponding geometric shape of one or more sensor nodes of the capacitive sensor design.

[0193] Embodiment 11: The method according to any one of embodiments 1 to 10 includes: defining the second geometric shape according to the geometric shape of the target touch surface.

[0194] Embodiment 12: An apparatus comprising: a storage device; and at least one processor, the at least one processor executing machine executable instructions stored at the storage device, the machine executable instructions causing the at least one processor to: change the geometry of a capacitive sensor design from a first geometry to a second geometry, the second geometry being different from the first geometry; and obtain executable instructions for transforming a position identifier of a touch event from a first position identifier associated with the first geometry to a second position identifier associated with the second geometry.

[0195] Embodiment 13: A method comprising: receiving a measurement signal from an irregularly shaped capacitance sensor during a capacitance measurement process; detecting a capacitance change indicative of a touch event at the irregularly shaped capacitance sensor; generating a location identifier associated with the location of the touch event; and changing the location identifier from a first location identifier value to a second location identifier value, the first location identifier value being associated with a regular geometric shape and the second location identifier value being associated with an irregular geometric shape.

[0196] Embodiment 14: The method of any one of Embodiments 13, wherein changing the location identifier from a first location identifier value to a second location identifier value comprises generating an additional location identifier having the second location identifier value associated with the irregular geometric shape.

[0197] Embodiment 15: The method according to any one of embodiments 13 and 14 includes: calculating the second location identifier value by applying a transformation function to the first location identifier value.

[0198] Embodiment 16: The method according to any one of embodiments 13 to 15, wherein the first location identifier value and the second location identifier value are XY coordinates.

[0199] Embodiment 17: The method according to any one of Embodiments 13 to 16, wherein the irregularly shaped capacitive sensor is a non-rectangular capacitive sensor.

[0200] Embodiment 18: The method of any one of Embodiments 13 to 17, wherein the sensor nodes of the irregularly shaped capacitive sensor present a substantially uniform sensor area.

[0201] Embodiment 19: The method of any one of Embodiments 13 to 18, wherein the sensor nodes of the irregularly shaped capacitive sensor exhibit a substantially non-uniform geometry.

[0202] Embodiment 20: The method of any one of Embodiments 13 to 19, wherein the spacing between sensor nodes of the irregularly shaped capacitive sensor is non-uniform.

[0203] Embodiment 21: The method of embodiments 13 to 20, wherein the number of sensor nodes in corresponding rows of the irregularly shaped capacitive sensor is uniform.

[0204] Embodiment 22: A method according to any one of embodiments 13 to 21, wherein the sensor nodes of the irregularly shaped capacitive sensor present a substantially uniform sensor area; the sensor nodes of the irregularly shaped capacitive sensor present a substantially non-uniform geometric shape; the spacing between the sensor nodes of the irregularly shaped capacitive sensor is non-uniform; and the number of sensor nodes in corresponding rows of the irregularly shaped capacitive sensor is uniform.

[0205] Embodiment 23: A device comprising: a memory; and at least one processor, the at least one processor executing instructions stored at the memory, the instructions causing the at least one processor to: receive a measurement signal from an irregularly shaped capacitance sensor during a capacitance measurement process; detect a capacitance change indicating a touch event at the irregularly shaped capacitance sensor; generate a location identifier associated with the location of the touch event; and change the location identifier from a first location identifier value to a second location identifier value, the first location identifier value being associated with a regular geometric shape, and the second location identifier value being associated with an irregular geometric shape.

[0206] Embodiment 24: An apparatus according to any one of Embodiments 23, wherein the instruction causing the at least one processor to change the location identifier from a first location identifier value to a second location identifier value includes instructions for generating an additional location identifier having the second location identifier value associated with the irregular geometric shape.

[0207] Embodiment 25: An apparatus according to any one of Embodiments 23 and 24, wherein the instruction causing the at least one processor to change the location identifier from a first location identifier value to a second location identifier value includes an instruction to perform the following: calculate the second location identifier value by applying a transformation function to the first location identifier value.

[0208] Embodiment 26: A system comprising: an irregularly shaped capacitive sensor; and a touch controller associated with the irregularly shaped capacitive sensor, the touch controller comprising: a first firmware that enables the touch controller to generate a first position identifier for a touch event associated with the regularly shaped capacitive sensor; and a second firmware that enables the touch controller to generate a second position identifier for the touch event associated with the irregularly shaped capacitive sensor based at least in part on the first position identifier.

[0209] Embodiment 27: The system of any one of Embodiment 26, wherein the surface of the irregularly shaped capacitive sensor has an irregular geometry.

[0210] Embodiment 28: The system of Embodiments 26 and 27, wherein the irregular geometry of the irregularly shaped capacitive sensor is a non-rectangular geometry.

[0211] Embodiment 29: The system of any one of Embodiments 26 to 28, wherein the first location identifier value and the second location identifier value are XY coordinates.

[0212] Embodiment 30: The system of any one of Embodiments 26 to 29, wherein the irregularly shaped capacitive sensor is a non-rectangular capacitive sensor.

[0213] Embodiment 31: The system of any one of Embodiments 26 to 30, wherein the sensor nodes of the irregularly shaped capacitive sensor present a substantially uniform sensor area;

[0214] Embodiment 32: The system of any one of Embodiments 26 to 31, wherein the sensor nodes of the irregularly shaped capacitive sensor exhibit a substantially non-uniform geometry.

[0215] Embodiment 33: The system of any one of Embodiments 26 to 32, wherein the spacing between sensor nodes of the irregularly shaped capacitive sensor is non-uniform.

[0216] Embodiment 34: The system of Embodiments 26 to 33, wherein the number of sensor nodes in corresponding rows of the irregularly shaped capacitive sensor is uniform.

[0217] Embodiment 35: A system according to any one of embodiments 26 to 34, wherein the sensor nodes of the irregularly shaped capacitive sensor present a substantially uniform sensor area; the sensor nodes of the irregularly shaped capacitive sensor present a substantially non-uniform geometry; the spacing between the sensor nodes of the irregularly shaped capacitive sensor is non-uniform; and the number of sensor nodes in corresponding rows of the irregularly shaped capacitive sensor is uniform.

[0218] Although the present disclosure describes the present invention with respect to certain illustrative examples, those of ordinary skill in the art will recognize and understand that the present invention is not so limited. Instead, many additions, deletions, and modifications may be made to the illustrative examples and the examples described without departing from the scope of the present invention as claimed below and its legal equivalents. In addition, features from one example may be combined with features of another example while still being included within the scope of the present invention as contemplated by the inventor.

Claims

1. A method comprising: changing a geometry of a capacitive sensor design from a first geometry to a second geometry, the second geometry being different from the first geometry; as well as Executable instructions are obtained to transform a position identifier of a touch event from a first position identifier associated with the first geometric shape to a second position identifier associated with the second geometric shape. 2 . The method of claim 1 , wherein the first geometric shape is a regular geometric shape and the second geometric shape is an irregular geometric shape.

3. The method of claim 1 , wherein changing the geometry of the capacitive sensor design from the first geometry to the second geometry comprises: obtaining a reference capacitive sensor design and a target capacitive sensor design, wherein a geometry of the reference capacitive sensor design is the first geometry and a geometry of the target capacitive sensor design is the second geometry; mapping the geometry of the reference capacitive sensor design to the geometry of the target capacitive sensor design; as well as The corresponding node areas of the mapped reference capacitive sensor design are set to be uniform.

4. The method of claim 3, wherein mapping the geometry of the reference design to the geometry of the target design comprises: identifying a component geometry in the geometry of the target capacitive sensor design that matches a predetermined geometry; dividing the geometric shape of the reference capacitive sensor design into rectangular sub-geometries, respective rectangular sub-geometries including respective identified component geometric shapes of the component geometric shapes of the target capacitive sensor design; For the corresponding Y coordinate, calculating the corresponding X coordinate of the identified component geometric shape; determining a function describing the relationship between the X coordinate of the component geometric shape and the X coordinate of the rectangular sub-geometric shape; as well as Returns the X and Y coordinates for the second geometric shape, and the function.

5. The method according to claim 3, wherein setting the corresponding node areas of the mapped reference design to be uniform comprises: Get the scaling factor; as well as The size of the corresponding node area of ​​the mapped reference capacitive sensor design is scaled according to the scaling factor.

6. The method according to claim 3, comprising: The corresponding sensor node geometry of the mapped reference capacitive sensor design is completed.

7. The method of claim 6, wherein the completing comprises: Construct rough sensor node geometry; Smooth the curves of the cutting lines of the coarse node geometry; aligning corresponding intersection details of corresponding sensor node geometries; trimming gaps in the cut line; as well as Returns the completed sensor node geometry.

8. The method of claim 1, wherein a scale of the reference coordinate lines of the first geometric shape is different from a scale of the reference coordinate lines of the second geometric shape.

9. The method according to claim 1, comprising: maintaining a same number of sensor nodes of the capacitive sensor design between the first geometry and the second geometry; as well as Respective node areas of the one or more sensor nodes of the capacitive sensor design are maintained substantially uniform.

10. The method of claim 1, wherein changing the geometry of the capacitive sensor design comprises one or more of: stretching, narrowing, or tilting the geometry of the capacitive sensor design or corresponding geometries of one or more sensor nodes of the capacitive sensor design.

11. The method according to claim 1, comprising: The second geometry is defined according to the geometry of the target touch surface.

12. An apparatus comprising: Storage devices; and at least one processor that executes machine-executable instructions stored at the storage device, the machine-executable instructions causing the at least one processor to: changing a geometry of a capacitive sensor design from a first geometry to a second geometry, the second geometry being different from the first geometry; as well as Executable instructions are obtained to transform a position identifier of a touch event from a first position identifier associated with the first geometric shape to a second position identifier associated with the second geometric shape.

13. A method comprising: receiving a measurement signal from the irregularly shaped capacitive sensor during a capacitance measurement process; detecting a change in capacitance indicative of a touch event at the irregularly shaped capacitive sensor; generating a location identifier associated with the location of the touch event; as well as The location identifier is changed from a first location identifier value associated with a regular geometric shape to a second location identifier value associated with an irregular geometric shape.

14. The method of claim 13, wherein changing the location identifier from a first location identifier value to a second location identifier value comprises: A further location identifier is generated having the second location identifier value associated with the irregular geometric shape.

15. The method according to claim 13, comprising: The second place identifier value is calculated by applying a transformation function to the first place identifier value.

16. The method of claim 13, wherein the first location identifier value and the second location identifier value are XY coordinates.

17. The method of claim 13, wherein the irregularly shaped capacitive sensor is a non-rectangular capacitive sensor.

18. The method of claim 13, wherein the sensor nodes of the irregularly shaped capacitive sensor exhibit a substantially uniform sensor area.

19. The method of claim 13, wherein sensor nodes of the irregularly shaped capacitive sensor exhibit a substantially non-uniform geometry.

20. The method of claim 13, wherein spacing between sensor nodes of the irregularly shaped capacitive sensor is non-uniform.

21. The method of claim 13, wherein the number of sensor nodes in a corresponding row of the irregularly shaped capacitive sensors is uniform.

22. The method of claim 13, wherein: The sensor nodes of the irregularly shaped capacitive sensor present a substantially uniform sensor area; The sensor nodes of the irregularly shaped capacitive sensor exhibit a substantially non-uniform geometry; The spacing between sensor nodes of the irregularly shaped capacitive sensor is non-uniform; and The number of sensor nodes in a corresponding row of the irregularly shaped capacitive sensor is uniform.

23. An apparatus comprising: Memory; and at least one processor configured to execute instructions stored at the memory, the instructions configured to cause the at least one processor to: receiving a measurement signal from the irregularly shaped capacitive sensor during a capacitance measurement process; detecting a change in capacitance indicative of a touch event at the irregularly shaped capacitive sensor; generating a location identifier associated with the location of the touch event; as well as The location identifier is changed from a first location identifier value associated with a regular geometric shape to a second location identifier value associated with an irregular geometric shape.

24. The apparatus of claim 23, wherein the instructions to cause the at least one processor to change the location identifier from a first location identifier value to a second location identifier value comprise instructions to: A further location identifier is generated having the second location identifier value associated with the irregular geometric shape.

25. The apparatus of claim 23, wherein the instructions to cause the at least one processor to change the location identifier from a first location identifier value to a second location identifier value comprise instructions to: The second place identifier value is calculated by applying a transformation function to the first place identifier value.

26. A system comprising: Irregularly shaped capacitive sensors; and A touch controller, the touch controller being associated with the irregularly shaped capacitive sensor, the touch controller comprising: first firmware that enables the touch controller to generate a first position identifier for a touch event associated with a regular-shaped capacitive sensor; and Second firmware that enables the touch controller to generate a second position identifier for the touch event associated with the irregularly shaped capacitive sensor based at least in part on the first position identifier.

27. The system of claim 26, wherein a surface of the irregularly shaped capacitive sensor has an irregular geometry.

28. The system of claim 26, wherein the irregular geometry of the irregularly shaped capacitive sensor is a non-rectangular geometry.

29. The system of claim 26, wherein the first location identifier value and the second location identifier value are XY coordinates.

30. The system of claim 26, wherein the irregularly shaped capacitive sensor is a non-rectangular capacitive sensor.

31. The system of claim 26, wherein sensor nodes of the irregularly shaped capacitive sensor exhibit a substantially uniform sensor area.

32. The system of claim 26, wherein sensor nodes of the irregularly shaped capacitive sensor exhibit a substantially non-uniform geometry.

33. The system of claim 26, wherein spacing between sensor nodes of the irregularly shaped capacitive sensor is non-uniform.

34. The system of claim 26, wherein the number of sensor nodes in a corresponding row of the irregularly shaped capacitive sensors is uniform.

35. The system of claim 26, wherein: The sensor nodes of the irregularly shaped capacitive sensor present a substantially uniform sensor area; The sensor nodes of the irregularly shaped capacitive sensor exhibit a substantially non-uniform geometry; The spacing between sensor nodes of the irregularly shaped capacitive sensor is non-uniform; and The number of sensor nodes in a corresponding row of the irregularly shaped capacitive sensor is uniform.

Images