A display device, a driving method, and a display apparatus

Abstract

The application provides a display device, a driving method and a display equipment, and belongs to the technical field of display driving. The display device comprises a plurality of pixel units arranged in rows and columns, a plurality of scan line groups, a plurality of data lines and a driving controller. In the application, the pixel units, the scan line groups and the data lines are used to jointly form a data line sharing architecture. Secondly, the driving controller is used to control the first pixel units of adjacent odd rows, the second pixel units of adjacent odd rows, the first pixel units of adjacent even rows and the second pixel units of adjacent even rows to be sequentially turned on, so that the same row color mixing phenomenon of the first pixel units and the second pixel units sharing the data lines is avoided. Moreover, the turned-on pixel units have the same light-emitting color and do not have the same column color mixing phenomenon. In this way, the first pixel units of adjacent odd rows or the second pixel units of adjacent even rows are simultaneously controlled to be turned on, frequency doubling refreshing is realized, and therefore the data line sharing architecture can be adapted to the double gate line technology.

Description

Technical Field

[0001] The present application relates to the field of display driving technology, and in particular to a display device, a driving method and a display equipment. Background Art

[0002] In liquid crystal display technology, DLS (Data Line Sharing) is a technical architecture used to optimize panel design and reduce costs. It mainly reduces the number of data control modules by doubling the number of scan lines (Gate Lines) and halving the number of data lines (Data Lines), thereby reducing costs and simplifying the design process of display panels.

[0003] Currently, to increase the refresh rate of display devices, DLG (Dual Gate Line) technology is often used. This technology primarily scans two rows of pixels at a time, halving the number of rows that need to be scanned, and then replicates the remaining pixels, thereby achieving a doubled display frequency effect. However, in a data line sharing architecture, since the data lines need to be shared, if the conventional DLG technology is used, the pixels of different colors connected to the same data line will be turned on simultaneously, resulting in image anomalies such as cross-color.

[0004] Therefore, how to make the data line sharing architecture adapt to the dual gate line technology, thereby realizing double frequency refresh in the data line sharing architecture, is a problem to be solved urgently in this field. Summary of the Invention

[0005] In view of the deficiencies in the prior art, the present application provides a display device, a driving method and a display apparatus.

[0006] In a first aspect, the present application provides a display device comprising:

[0007] A plurality of pixel units arranged in rows and columns, each row of pixel units including first pixel units and second pixel units arranged alternately;

[0008] a plurality of scan line groups, each scan line group including two adjacent scan lines, one of the scan lines in each scan line group being connected to a first pixel unit in a row of pixel units, and the other being connected to a second pixel unit in the row of pixel units;

[0009] Several data lines, pixel units located in the same column are alternately connected to two adjacent data lines; among pixel units located in the same row, one of the first pixel units and one of the adjacent second pixel units are connected to the same data line;

[0010] A driving controller is configured to sequentially drive the first pixel units in the adjacent odd rows to be turned on simultaneously, the second pixel units in the adjacent odd rows to be turned on simultaneously, the first pixel units in the adjacent even rows to be turned on simultaneously, and the second pixel units in the adjacent even rows to be turned on simultaneously through the scan lines.

[0011] Optionally, the driving controller comprises an odd row driving module and an even row driving module.

[0012] The odd row driving module is connected with the pixel units in the adjacent odd rows through the scan lines, and is configured to sequentially drive the first pixel units in the adjacent odd rows to be turned on simultaneously and the second pixel units in the adjacent odd rows to be turned on simultaneously.

[0013] The even row driving module is connected with the odd row driving module, and is configured to sequentially drive the second pixel units in the adjacent even rows to be turned on simultaneously and the second pixel units in the adjacent even rows to be turned on simultaneously through the scan lines after the driving of the odd row driving module is completed.

[0014] Optionally, the odd row driving module comprises a first driving unit and a second driving unit.

[0015] The first driving unit comprises an N+1th gate driving circuit and an N+5th gate driving circuit; the output end of the N+1th gate driving circuit and the output end of the N+5th gate driving circuit are connected with the first pixel units in the adjacent odd rows through the scan lines, so as to drive the first pixel units in the adjacent odd rows to be turned on simultaneously in a first time period.

[0016] The second driving unit comprises an N+2th gate driving circuit and an N+6th gate driving circuit; the output end of the N+2th gate driving circuit and the output end of the N+6th gate driving circuit are connected with the second pixel units in the adjacent odd rows through the scan lines, so as to drive the second pixel units in the adjacent odd rows to be turned on simultaneously in a second time period.

[0017] Optionally, the even row driving module comprises a third driving unit and a fourth driving unit.

[0018] The third driving unit is connected with the first driving unit in cascade, and is configured to drive the first pixel units in the adjacent even rows to be turned on simultaneously in a third time period after the driving of the first driving unit is completed.

[0019] The fourth driving unit is connected with the second driving unit in cascade, and is configured to drive the second pixel units in the adjacent even rows to be turned on simultaneously in a fourth time period after the driving of the second driving unit is completed.

[0020] Optionally, the third driving unit comprises an N+3th gate driving circuit and an N+7th gate driving circuit.

[0021] The N+3th gate drive circuit comprises a pull-up sub-circuit connected to the output terminal of the N+1th gate drive circuit;

[0022] The N+7th gate drive circuit comprises a pull-up sub-circuit connected to the output terminal of the N+5th gate drive circuit;

[0023] The output terminal of the N+3th gate drive circuit and the output terminal of the N+7th gate drive circuit are respectively connected to the first pixel units in the adjacent even rows through the scan lines.

[0024] Optionally, the fourth driving unit comprises an N+4th gate drive circuit and an N+8th gate drive circuit;

[0025] The N+4th gate drive circuit comprises a pull-up sub-circuit connected to the output terminal of the N+2th gate drive circuit;

[0026] The N+8th gate drive circuit comprises a pull-up sub-circuit connected to the output terminal of the N+6th gate drive circuit;

[0027] The output terminal of the N+4th gate drive circuit and the output terminal of the N+8th gate drive circuit are respectively connected to the second pixel units in the adjacent even rows through the scan lines.

[0028] Optionally, the emitting colors of the two adjacent pixel units in the same row are different.

[0029] In a second aspect, in one embodiment, the present application provides a driving method for driving the display device mentioned above, comprising:

[0030] The first driving signal and the second driving signal are generated in sequence to control the first pixel units in the adjacent odd rows to be turned on simultaneously and the second pixel units in the adjacent odd rows to be turned on simultaneously in sequence, so that after the pixel units in the odd rows are turned on completely, the first pixel units in the adjacent even rows are turned on simultaneously and the second pixel units in the adjacent even rows are turned on simultaneously in sequence.

[0031] Optionally, the first driving signal and the second driving signal are generated in sequence to control the first pixel units in the adjacent odd rows to be turned on simultaneously and the second pixel units in the adjacent odd rows to be turned on simultaneously in sequence, so that after the pixel units in the odd rows are turned on completely, the first pixel units in the adjacent even rows are turned on simultaneously and the second pixel units in the adjacent even rows are turned on simultaneously in sequence, comprising:

[0032] In the first time period, a first driving signal is generated to control the first pixel units in the adjacent odd rows to be turned on simultaneously, and in a third time period after the first pixel units in the adjacent odd rows are turned on completely, the first pixel units in the adjacent even rows are triggered to be turned on simultaneously;

[0033] In the second time period, a second driving signal is generated to control the second pixel units in the adjacent odd rows to be turned on simultaneously, and in a fourth time period after the second pixel units in the adjacent odd rows are turned on completely, the second pixel units in the adjacent even rows are triggered to be turned on simultaneously;

[0034] The second time period is after the first time period and before the third time period.

[0035] In a third aspect, in one embodiment, the present application provides a display device, comprising the display device described above.

[0036] The program is loaded by the processor to perform the steps in the display device in any of the embodiments described above.

[0037] In summary, the present application utilizes a plurality of pixel units, a plurality of scan line groups and a plurality of data lines to form a data line sharing architecture. Secondly, the driving controller controls the first pixel units in the adjacent odd rows, the second pixel units in the adjacent odd rows, the first pixel units in the adjacent even rows and the second pixel units in the adjacent even rows to be turned on in turn, so that the first pixel units and the second pixel units in each row are not turned on simultaneously, thereby avoiding the same row color bleeding phenomenon of the first pixel units and the second pixel units sharing the data line in the same row. Then, since the pixel units in the same column have the same light-emitting color, when the first pixel units or the second pixel units in the adjacent odd rows or the adjacent even rows are controlled to be turned on simultaneously, the light-emitting colors of the turned-on pixel units are consistent and do not appear column color bleeding. In this way, by controlling the first pixel units in two rows (adjacent odd rows or adjacent even rows) to be turned on simultaneously or the second pixel units to be turned on simultaneously each time, compared with the row-by-row turning-on mode in the data line sharing architecture, the frequency refreshing is doubled, thereby realizing that the data line sharing architecture can adapt to the double gate line technology. BRIEF DESCRIPTION OF DRAWINGS

[0038] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the embodiment description. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can also be obtained by those skilled in the art without any creative effort on the basis of these drawings.

[0039] Figure 1 The driving waveform diagram in the double gate line technology in the related art;

[0040] Figure 2 This is a schematic structural diagram of a display device in one embodiment of the present application;

[0041] Figure 3 This is a schematic diagram of the structure of a drive controller in one embodiment of the present application;

[0042] Figure 4 This is a schematic structural diagram of an odd-row control module and an even-row control module in one embodiment of the present application;

[0043] Figure 5 This is a waveform diagram of a scanning signal outputted to a scanning line by a driving controller in one embodiment of the present application;

[0044] Figure 6 Schematic diagram of a gate driving circuit in one embodiment of the present application.

[0045] Explanation of the accompanying drawings: 1. pixel unit; 11. first pixel unit; 12. second pixel unit; 2. scan line; 3. data line; 4. drive controller; 41. odd-row drive module; 42. even-row drive module; 411. first drive unit; 412. second drive unit; 421. third drive unit; 422. fourth drive unit. DETAILED DESCRIPTION

[0046] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without making creative efforts are within the scope of protection of this application.

[0047] In the description of the present application, it should be understood that the terms "first", "second" are used only for descriptive purposes and are not to be construed as indicating or implying relative importance or an indicated number of technical features. Therefore, the features defined with "first", "second" can explicitly or implicitly include one or more of the features. In the description of the present application, the meaning of "a plurality of" is two or more, unless otherwise specifically limited. In the present application, the word "exemplary" is used to mean "serving as an example, instance, or illustration." Any implementation described as "exemplary" in the present application is not necessarily to be construed as preferred or advantageous over other implementations. The following description is presented to enable any person skilled in the art to make and use the present application. In the following description, details are set forth for the purpose of explanation. It should be appreciated that one of ordinary skill in the art can realize and implement the present application without using these specific details. In other instances, well-known structures and processes are not elaborated in order not to obscure the description of the present application with unnecessary details. Therefore, the present application is not intended to be limited to the embodiments shown, but is to be accorded the widest scope consistent with the principles and features disclosed herein.

[0048] First, based on the content in the foregoing background art of the present application in combination with the display panel structure, the background of the present application is further described. As shown in Figure 1 Figure 1 ​is a driving timing diagram of a DLG (Dual Gate Line) technology, first controlling the first and second rows of scan lines (G1 and G2) to be turned on at the same time, then controlling the third and fourth rows of scan lines (G3 and G4) to be turned on at the same time, and then the fifth row is turned on through the first row of scan lines, and the sixth row is turned on through the second row of scan lines, so that the fifth and sixth rows of scan lines (G5 and G6) are turned on at the same time. The seventh row is turned on through the third row of scan lines, and the eighth row is turned on through the fourth row of scan lines, so that the seventh and eighth rows of scan lines (G7 and G8) are turned on at the same time, and so on. In this way, two scan lines are turned on at a time to reduce the number of scanning rows by half, thereby achieving frequency doubling refresh. In the DLS (Data Line Sharing) structure, each adjacent two scan lines are connected to the same row of pixel units, for example, the first and second rows of scan lines are connected to the first row of pixel units, the third and fourth rows of scan lines are connected to the second row of pixel units, and so on. In the same row of pixel units, the data lines are shared, and adjacent pixel units of different colors share the same data line, and different color data signals are written into adjacent pixel units of different colors through time-sharing writing. However, according to the driving timing of the dual gate line technology, for example, when the first and second rows of scan lines are turned on at the same time, the first row of pixel units is turned on at the same time, and adjacent pixel units of different colors share the same data line to write data signals at the same time, which causes color mixing phenomenon of pixel units of different colors, thereby making the dual gate line technology unable to be applied to the data line sharing structure. Based on this, the present application is proposed.

[0049] In one embodiment, the present application provides a display device, as shown in the first aspect, Figure 2 In one embodiment, the present application provides a display device, as shown in the first aspect,

[0050] As an example, the light emitting colors of two adjacent pixel units 1 in the same row are different, and the pixel units 1 in the same row are arranged periodically, for example, the pixel units 1 can be red sub-pixels, blue sub-pixels and green sub-pixels, and taking the order of red sub-pixels, blue sub-pixels and green sub-pixels as an example, the pixel units 1 in each row are always arranged in the order of red sub-pixels, blue sub-pixels and green sub-pixels, so that the light emitting colors of the pixel units 1 in the same column are the same. The data line 3 can be connected with a data controller to output a data signal to the pixel unit 1. It should be noted that the light emitting colors of the first pixel unit 11 and the second pixel unit 12 can be the same or different. In this embodiment, for each row of pixel units 1, those connected with one of the scan lines 2 in one of the scan line groups are collectively referred to as the first pixel unit 11, and those connected with the other scan line 2 are collectively referred to as the second pixel unit 12. As an example, in the same row, the blue sub-pixels can be divided into the first pixel unit 11 and the second pixel unit 12, the red sub-pixels can be all divided into the second pixel unit 12, and the green sub-pixels can be all divided into the first pixel unit 11, and the light emitting colors of the first pixel unit 11 and the second pixel unit 12 are not specifically limited here.

[0051] As an example, since the pixel units 1 in the same column are connected with two adjacent data lines 3 alternately, and in the pixel units 1 in the same row, one first pixel unit 11 and one adjacent second pixel unit 12 are connected with the same data line 3, so that in the pixel units 1 in the same row, the data lines 3 connected with each first pixel unit 11 are different from each other, and the data lines 3 connected with each second pixel unit 12 are different from each other. The first pixel unit 11 and the second pixel unit 12 in the same row are connected to two scan lines 2 in the scan line group respectively, so that when the two scan lines 2 in the scan line group are not turned on at the same time, only the first pixel unit 11 or only the second pixel unit 12 in the same row is turned on in the same time period, so that the first pixel unit 11 and the second pixel unit 12 sharing the same data line 3 are not turned on at the same time.

[0052] In the above embodiment, the data line sharing architecture is formed by the plurality of pixel units 1, the plurality of scan line groups and the plurality of data lines 3. Secondly, the first pixel units 11 in the adjacent odd rows, the second pixel units 12 in the adjacent odd rows, the first pixel units 11 in the adjacent even rows and the second pixel units 12 in the adjacent even rows are sequentially turned on by the driving controller 4 respectively, so that the first pixel units 11 and the second pixel units 12 sharing the data line 3 in the same row will not be turned on at the same time, thereby avoiding the same row color mixing phenomenon of the first pixel units 11 and the second pixel units 12 sharing the data line 3 in the same row. Then, since the pixel units 1 in the same column have the same light-emitting color, when the first pixel units 11 or the second pixel units 12 in the adjacent odd rows or the adjacent even rows are controlled to be turned on at the same time, the light-emitting colors of the turned-on pixel units 1 are consistent and the same column color mixing phenomenon will not occur. In this way, by controlling the first pixel units 11 in two rows (adjacent odd rows or adjacent even rows) to be turned on at the same time or the second pixel units 12 to be turned on at the same time each time, compared with the row-by-row turning-on mode in the data line sharing architecture, the frequency of refreshing is doubled, so that the data line sharing architecture can be adapted to the double gate line technology.

[0053] With reference to Figure 3 As an embodiment of the driving controller 4, the driving controller 4 includes an odd row driving module 41 and an even row driving module 42. The odd row driving module 41 is connected with the pixel units 1 in the adjacent odd rows through the scan line 2, and is used to sequentially drive the first pixel units 11 in the adjacent odd rows to be turned on at the same time and the second pixel units 12 in the adjacent odd rows to be turned on at the same time. The even row driving module 42 is connected with the odd row driving module 41, and is used to sequentially drive the second pixel units 12 in the adjacent even rows to be turned on at the same time and the second pixel units 12 in the adjacent even rows to be turned on at the same time after the driving of the odd row driving module 41 is completed.

[0054] In the above embodiment, the adjacent odd rows are driven by the odd row driving module 41, and the adjacent even rows are driven by the even row driving module 42 after the driving of the odd row driving module 41 is completed, so that the odd rows and the even rows are not turned on at the same time, thereby realizing the sequential driving of the pixel units 1 in the odd rows and the pixel units 1 in the even rows.

[0055] With reference to Figure 4, as an embodiment of the odd row driving module 41, the odd row driving module 41 comprises a first driving unit 411 and a second driving unit 412; wherein the first driving unit 411 comprises an N+1th gate driving circuit and an N+5th gate driving circuit. The output end of the N+1th gate driving circuit and the output end of the N+5th gate driving circuit are connected with the first pixel unit 11 in the adjacent odd row through the scan line 2 respectively, so as to drive the first pixel unit 11 in the adjacent odd row to turn on simultaneously in the first time period. The second driving unit 412 comprises an N+2th gate driving circuit and an N+6th gate driving circuit; the output end of the N+2th gate driving circuit and the output end of the N+6th gate driving circuit are connected with the second pixel unit 12 in the adjacent odd row through the scan line 2 respectively, so as to drive the second pixel unit 12 in the adjacent odd row to turn on simultaneously in the second time period.

[0056] As an example, N is an integer, the value of N is a multiple of the number of scan lines 2 required to complete a scanning cycle, for example, in this embodiment, a total of 8 scan lines 2 are required to drive the pixel units 1 in the adjacent odd row and the adjacent even row in a cycle, then N can be a multiple of 8 or zero.

[0057] As an example, in combination with Figure 5 , Figure 5 is a waveform diagram of the scan signal output by the driving controller 4. GN+1 is the scan signal output by the N+1th gate driving circuit, GN+5 is the scan signal output by the N+5th gate driving circuit, the scan signals GN+1 and GN+5 are the same signals, so as to drive the first pixel unit 11 in the adjacent odd row to turn on simultaneously in the first time period respectively. Similarly, GN+2 is the scan signal output by the N+2th gate driving circuit, GN+6 is the scan signal output by the N+6th gate driving circuit, the scan signals GN+2 and GN+6 are the same signals and the turn-on timing is after the scan signals GN+1 and GN+5, so as to drive the second pixel unit 12 in the adjacent odd row to turn on simultaneously in the second time period after the first time period, thereby realizing the effect that all the pixel units 1 in the adjacent odd row are turned on and the first pixel unit 11 and the second pixel unit 12 are not turned on at the same time.

[0058] Referring to Figure 3 , as an embodiment of the even row driving module 42, the even row driving module 42 comprises a third driving unit 421 and a fourth driving unit 422; wherein the third driving unit 421 is cascaded with the first driving unit 411, for driving the first pixel unit 11 in the adjacent even row to turn on simultaneously in the third time period after the driving of the first driving unit 411 is completed; the fourth driving unit 422 is cascaded with the second driving unit 412, for driving the second pixel unit 12 in the adjacent even row to turn on simultaneously in the fourth time period after the driving of the second driving unit 412 is completed.

[0059] In the above embodiment, the third driving unit 421 is cascaded with the first driving unit 411, and the fourth driving unit 422 is cascaded with the second driving unit 412, so that the third driving unit 421 can be triggered to work through the cascade after the first driving unit 411 completes driving, and the fourth driving unit 422 can be triggered to work through the cascade after the second driving unit 412 completes driving, so as to ensure that the pixel units 1 in the adjacent even rows and the adjacent odd rows are not turned on at the same time.

[0060] In combination with Figure 4 As shown in FIG. 6, in some embodiments, the third driving unit 421 includes an N+3th gate driving circuit and an N+7th gate driving circuit; the N+3th gate driving circuit includes a pull-up sub-circuit connected with the output end of the N+1th gate driving circuit; the N+7th gate driving circuit includes a pull-up sub-circuit connected with the output end of the N+5th gate driving circuit; the output end of the N+3th gate driving circuit and the output end of the N+7th gate driving circuit are respectively connected with the first pixel unit 11 in the adjacent even row through the scanning line 2. The fourth driving unit 422 includes an N+4th gate driving circuit and an N+8th gate driving circuit; the N+4th gate driving circuit includes a pull-up sub-circuit connected with the output end of the N+2th gate driving circuit; the N+8th gate driving circuit includes a pull-up sub-circuit connected with the output end of the N+6th gate driving circuit; the output end of the N+4th gate driving circuit and the output end of the N+8th gate driving circuit are respectively connected with the second pixel unit 12 in the adjacent even row through the scanning line 2.

[0061] As an example, in combination with Figure 6 , Figure 6 is a structural schematic diagram of the gate driving circuit corresponding to the even row. The gate driving circuit can also include an output sub-circuit, a maintenance sub-circuit and a pull-down sub-circuit to jointly realize the output of the scanning signal. Since the gate driving circuit of the even row is conducted on by the gate driving circuit of the adjacent odd row, the pull-up sub-circuit of the gate driving circuit of the even row is connected with the scanning of the gate driving circuit of the previous two levels of the odd row. For example, for the nth gate driving circuit of the even row, the pull-up sub-circuit thereof is output by the gate driving circuit of the Gn-2th level and located in the odd row, n is the serial number of the gate driving circuit corresponding to the pixel unit 1 of the even row, and every two gate driving circuits jointly drive a row of pixel units 1.

[0062] As an example, in combination with Figure 5GN+3 is the scanning signal output by the N+3th stage gate drive circuit, and GN+7 is the scanning signal output by the N+7th stage gate drive circuit. Since the N+3th stage gate drive circuit is triggered by the scanning signal output by the N+1th stage gate drive circuit, and the N+7th stage gate drive circuit is triggered by the scanning signal output by the N+5th stage gate drive circuit, and since the scanning signals GN+1 and GN+5 are the same signals, the scanning signals GN+3 and GN+7 are the same signals, so that the first pixel units 11 in the adjacent even rows are simultaneously turned on in the third time period after the driving of the first driving unit 411 is completed through the scanning signals GN+3 and GN+7. Similarly, the scanning signals GN+4 and GN+8 are the same signals, and the turn-on timing is in the fourth time period after the scanning signals GN+3 and GN+7, so that the second pixel units 12 in the adjacent even rows are simultaneously turned on in the fourth time period after the driving of the first driving unit 411 is completed. Thus, the driving timing of the third driving unit 421 and the fourth driving unit 422 is controlled, so that the first pixel units 11 and the second pixel units 12 in the even rows can be turned on in turn.

[0063] In the above embodiment, only by changing the cascade relationship of the gate drive circuit, the gate drive circuit for driving the even rows is triggered by the scanning signal output by the gate drive circuit for driving the odd rows, without greatly modifying the design of the pixel unit 1 circuit board.

[0064] It should be noted that the odd rows and the even rows described in the present embodiment are described with reference to the pixel unit 1, and are not the odd and even positions of the scanning line 2 or the gate drive circuit.

[0065] In a second aspect, in one embodiment, the present application provides a driving method for driving the display device described above.

[0066] As an example, the driving method is used to generate the first driving signal and the second driving signal in turn to control the first pixel units 11 in the adjacent odd rows to be simultaneously turned on and the second pixel units 12 in the adjacent odd rows to be simultaneously turned on in turn, so that after the pixel units 1 in the odd rows are turned on, the first pixel units 11 in the adjacent even rows are simultaneously turned on and the second pixel units 12 in the adjacent even rows are simultaneously turned on in turn. In detail, the driving method can include steps S101-S102.

[0067] Step S101: in the first time period, the first driving signal is generated to control the first pixel units 11 in the adjacent odd rows to be simultaneously turned on, and in the third time period after the first pixel units 11 in the adjacent odd rows are turned on, the first pixel units 11 in the adjacent even rows are triggered to be simultaneously turned on.

[0068] Step S102: generating a second driving signal in a second time period to control the second pixel units 12 in the adjacent odd rows to be turned on simultaneously, and triggering the second pixel units 12 in the adjacent even rows to be turned on simultaneously in a fourth time period after the turning on of the second pixel units 12 in the adjacent odd rows is completed.

[0069] The second time period is after the first time period and before the third time period.

[0070] As an example, the first driving signal and the second driving signal can be output by the timing controller to the driving controller, the first driving unit 411 in the driving controller outputs the scanning signal according to the first driving signal to control the first pixel units 11 in the adjacent odd rows to be turned on simultaneously, and then the scanning signal output by the first driving unit 411 is transferred to the third driving unit 421, so that the third driving unit 421 outputs the scanning signal to control the first pixel units 11 in the adjacent even rows to be turned on simultaneously, and by analogy, the second driving unit 412 in the driving controller outputs the scanning signal according to the second driving signal to control the second pixel units 12 in the adjacent odd rows to be turned on simultaneously, and then the scanning signal output by the third driving unit 421 is transferred to the fourth driving unit 422, so that the fourth driving unit 422 outputs the scanning signal to control the second pixel units 12 in the adjacent even rows to be turned on simultaneously.

[0071] In a third aspect, in an embodiment, the present application provides a display device comprising the display apparatus as described above.

[0072] The specific implementation of each operation can refer to the foregoing embodiments, which will not be described here.

[0073] In the foregoing embodiments, the description of each embodiment has its own focus, and the parts not described in detail in a certain embodiment can refer to the detailed description of other embodiments above, which will not be described here.

[0074] The display apparatus provided by the present application is described in detail above, and the principle and implementation manner of the present application are described by applying specific examples; the foregoing embodiment descriptions are only used to help understand the method and core idea of the present application; meanwhile, for those skilled in the art, the specific implementation manner and application range can be changed according to the idea of the present application, and the content of the specification should not be understood as a limitation of the present application.

[0075] Each technical feature of the foregoing embodiments can be combined arbitrarily, and in order to make the description concise, not all possible combinations of the technical features in the foregoing embodiments are described; however, as long as the combinations of the technical features do not exist contradictions, they should be considered as the scope of the present application.

Claims

1. A display device, characterized in that: include: A plurality of pixel units arranged in rows and columns, each row of pixel units including first pixel units and second pixel units arranged alternately; a plurality of scan line groups, each scan line group including two adjacent scan lines, one of the scan lines in each scan line group being connected to a first pixel unit in a row of pixel units, and the other being connected to a second pixel unit in the row of pixel units; Several data lines, pixel units located in the same column are alternately connected to two adjacent data lines; among pixel units located in the same row, one of the first pixel units and one of the adjacent second pixel units are connected to the same data line; The driving controller is used to sequentially drive the first pixel units in adjacent odd rows to be turned on simultaneously, the second pixel units in adjacent odd rows to be turned on simultaneously, the first pixel units in adjacent even rows to be turned on simultaneously, and the second pixel units in adjacent even rows to be turned on simultaneously through the scanning lines.

2. The display device according to claim 1, wherein The drive controller includes an odd row drive module and an even row drive module; The odd row driving module is connected to the pixel units of the adjacent odd rows through the scan lines, and is used to sequentially drive the first pixel units in the adjacent odd rows to be turned on simultaneously and the second pixel units in the adjacent odd rows to be turned on simultaneously; The even row driving module is connected to the odd row driving module and is used to drive the second pixel units in adjacent even rows and the second pixel units in adjacent even rows to be turned on simultaneously through the scanning lines after the odd row driving module completes driving.

3. The display device according to claim 2, wherein: The odd-row driving module includes a first driving unit and a second driving unit; The first driving unit includes an N+1-stage gate driving circuit and an N+5-stage gate driving circuit; the output end of the N+1-stage gate driving circuit and the output end of the N+5-stage gate driving circuit are respectively connected to the first pixel units in the adjacent odd-numbered rows through the scanning lines, so as to drive the first pixel units in the adjacent odd-numbered rows to be turned on simultaneously during a first time period; The second driving unit includes an N+2-level gate driving circuit and an N+6-level gate driving circuit; the output end of the N+2-level gate driving circuit and the output end of the N+6-level gate driving circuit are respectively connected to the second pixel units in the adjacent odd rows through the scanning lines, so as to drive the second pixel units in the adjacent odd rows to be turned on simultaneously during the second time period.

4. The display device according to claim 3, wherein: The even-row driving module includes a third driving unit and a fourth driving unit; The third driving unit is cascaded with the first driving unit, and is used to drive the first pixel units in adjacent even rows to be turned on simultaneously within a third period after the first driving unit completes driving; The fourth driving unit is cascaded with the second driving unit, and is used to drive the second pixel units in adjacent even rows to be turned on simultaneously within a fourth time period after the second driving unit completes driving.

5. The display device according to claim 4, wherein: The third driving unit includes an N+3-th stage gate driving circuit and an N+7-th stage gate driving circuit; The (N+3) stage gate driving circuit includes a pull-up sub-circuit connected to the output end of the (N+1) stage gate driving circuit; The (N+7) stage gate driving circuit includes a pull-up sub-circuit connected to the output end of the (N+5) stage gate driving circuit; The output end of the N+3th stage gate driving circuit and the output end of the N+7th stage gate driving circuit are respectively connected to the first pixel units in adjacent even rows through the scanning lines.

6. The display device according to claim 4, wherein: The fourth driving unit includes an N+4th-stage gate driving circuit and an N+8th-stage gate driving circuit; The N+4th stage gate driving circuit includes a pull-up sub-circuit connected to the output end of the N+2th stage gate driving circuit; The N+8th stage gate driving circuit includes a pull-up sub-circuit connected to the output end of the N+6th stage gate driving circuit; The output end of the N+4th stage gate driving circuit and the output end of the N+8th stage gate driving circuit are respectively connected to the second pixel units in adjacent even rows through the scanning lines.

7. The display device according to any one of claims 1 to 6, characterized in that: The luminous colors of two adjacent pixel units located in the same row are different.

8. A driving method for driving the display device according to any one of claims 1 to 7, characterized in that: include: A first drive signal and a second drive signal are generated in sequence to sequentially control the first pixel units in adjacent odd rows to be turned on simultaneously and the second pixel units in adjacent odd rows to be turned on simultaneously, so that after the pixel units in the odd rows are turned on, the first pixel units in adjacent even rows and the second pixel units in adjacent even rows are turned on simultaneously.

9. The driving method according to claim 8, wherein: The method of sequentially generating the first driving signal and the second driving signal to sequentially control the first pixel units in adjacent odd rows to be turned on simultaneously and the second pixel units in adjacent odd rows to be turned on simultaneously, so that after the pixel units in the odd rows are turned on, the first pixel units in adjacent even rows to be turned on simultaneously and the second pixel units in adjacent even rows to be turned on simultaneously include: During a first time period, a first driving signal is generated to control the first pixel units in adjacent odd rows to be turned on simultaneously, and during a third time period after the first pixel units in adjacent odd rows are turned on, the first pixel units in adjacent even rows are triggered to be turned on simultaneously; During the second time period, a second driving signal is generated to control the second pixel units in adjacent odd rows to be turned on simultaneously, and during the fourth time period after the second pixel units in adjacent odd rows are turned on, the second pixel units in adjacent even rows are triggered to be turned on simultaneously; The second time period is after the first time period and before the third time period.

10. A display device, characterized in that: The device comprises the display device according to any one of claims 1 to 7.

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