Printed wiring board

Abstract

A printed wiring board having high quality. The printed wiring board includes: a first conductor layer; a resin insulating layer having a first surface, a second surface on the opposite side from the first surface, and an opening from the first surface to the second surface, the resin insulating layer being laminated on the first conductor layer such that the second surface faces the first conductor layer; a second conductor layer formed on the first surface of the resin insulating layer; and a via hole conductor which is formed in the opening and connects the first conductor layer and the second conductor layer. The resin insulating layer includes a resin and inorganic particles, the inorganic particles include first inorganic particles forming the first surface and second inorganic particles embedded in the resin, the first inorganic particles have substantially flat exposed portions, the resin has an upper surface forming the first surface, and the second inorganic particles have a lower surface forming the second surface. The first surface is formed by the upper surface of the resin and the exposed portion of the first inorganic particles.

Description

Technical Field

[0001] The technology disclosed in this specification relates to a printed wiring board. Background Art

[0002] Patent document 1 discloses a printed wiring board having a first conductor layer, an insulating layer formed on the first conductor layer, and a second conductor layer formed on the insulating layer. The insulating layer has a through hole for a via conductor that exposes the first conductor layer. A via conductor connecting the first conductor layer and the second conductor layer is formed in the through hole. The via conductor is formed by a chemical plating layer and an electroplating layer. The insulating layer contains a resin and inorganic particles.

[0003] Patent Document 1: Japanese Patent Application Publication No. 2015-126103

[0004] Problem of Patent Document 1

[0005] As shown in FIG. 17 of Patent Document 1, Patent Document 1 has an intermediate layer on the wall surface (inner peripheral surface) of the through hole. The intermediate layer has a complex concave-convex surface due to the gap formed between the inorganic particles. The inorganic particles contained in the intermediate layer are the same as the inorganic particles contained in the insulating layer. As shown in FIG. 18 of Patent Document 1, Patent Document 1 forms a chemical plating film in the through hole. The chemical plating film follows the concave-convex formed in the intermediate layer. Alternatively, the gap formed in the intermediate layer is filled with the chemical plating film. However, if the concave-convex is complex, it is considered difficult to completely fill the gap with the chemical plating film. It is believed that when the chemical plating film is precipitated, the gas generated by the reaction is hindered from filling the gap. If the gap is not completely filled with the chemical plating film, it is believed that a gap is generated between the wall surface of the through hole and the chemical plating film. It is believed that when the gap expands due to heat, the chemical plating film peels off from the wall surface of the through hole. Summary of the invention

[0006] The printed wiring board of the present invention comprises: a first conductor layer; a resin insulating layer having a first surface, a second surface on the side opposite to the first surface, and an opening from the first surface to the second surface, the resin insulating layer being stacked on the first conductor layer in such a manner that the second surface faces the first conductor layer; a second conductor layer formed on the first surface of the resin insulating layer; and a via conductor formed in the opening to connect the first conductor layer and the second conductor layer. The resin insulating layer comprises a resin and inorganic particles, the inorganic particles comprising first inorganic particles forming the first surface and second inorganic particles buried in the resin, the first inorganic particles having a substantially flat exposed portion, the resin having an upper surface forming the first surface, the first surface being formed by the upper surface of the resin and the exposed portion of the first inorganic particles.

[0007] In the printed wiring board of the embodiment of the present invention, almost no recess is formed on the first surface of the resin insulating layer. Therefore, when the seed layer is formed on the resin insulating layer by sputtering, even if the thickness of the sputtering film is thin, the embodiment can form a continuous seed layer. As a result, when the seed layer is removed, the embodiment can reduce the etching amount. The embodiment can form fine signal wiring. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1 It is a cross-sectional view schematically showing a printed wiring board according to the embodiment.

[0009] Figure 2 This is an enlarged cross-sectional view schematically showing a part of the printed wiring board according to the embodiment.

[0010] Figure 3 This is an enlarged cross-sectional view schematically showing a part of the printed wiring board according to the embodiment.

[0011] Figure 4 This is an enlarged cross-sectional view schematically showing a part of the printed wiring board according to the embodiment.

[0012] Figure 5A It is a cross-sectional view schematically showing a method for manufacturing a printed wiring board according to an embodiment.

[0013] Figure 5B It is a cross-sectional view schematically showing a method for manufacturing a printed wiring board according to an embodiment.

[0014] Figure 5C It is a cross-sectional view schematically showing a method for manufacturing a printed wiring board according to an embodiment.

[0015] Figure 5D It is an enlarged cross-sectional view schematically showing the method for manufacturing a printed wiring board according to the embodiment.

[0016] Figure 5E It is an enlarged cross-sectional view schematically showing the method for manufacturing a printed wiring board according to the embodiment.

[0017] Fig. 5F It is a cross-sectional view schematically showing a method for manufacturing a printed wiring board according to an embodiment.

[0018] Figure 6 It is a cross-sectional view schematically showing a modification of the embodiment.

[0019] Description of symbols

[0020] 2: printed wiring board; 4: insulating layer; 10: first conductor layer; 20: resin insulating layer; 22: first surface; 24: second surface; 26: opening; 27: inner wall surface; 30: second conductor layer; 30a: seed layer; 31a: first layer; 31b: second layer; 40: via conductor; 80: resin; 90: inorganic particles; 91: first inorganic particles; 92: second inorganic particles; 93: third inorganic particles. DETAILED DESCRIPTION

[0022] Figure 1 It is a cross-sectional view showing a printed wiring board 2 according to the embodiment. Figure 2 and Figure 3 2 is an enlarged cross-sectional view showing a portion of the printed wiring board 2 according to the embodiment. Figure 1 As shown, the printed wiring board 2 has an insulating layer 4, a conductor layer (first conductor layer) 10, a resin insulating layer (first resin insulating layer) 20, a conductor layer (second conductor layer) 30, a via conductor 40, a resin insulating layer (second resin insulating layer) 120, a conductor layer (third conductor layer) 130 and a via conductor 140.

[0023] The insulating layer 4 is formed of resin. The insulating layer 4 may also contain inorganic particles such as silicon dioxide. The insulating layer 4 may also contain a reinforcing material such as glass cloth. The insulating layer 4 has a third surface 6 and a fourth surface 8 opposite to the third surface 6 .

[0024] The first conductor layer 10 is formed on the third surface 6 of the insulating layer 4. The first conductor layer 10 includes a signal wiring 12 and a pad 14. Although not shown in the figure, the first conductor layer 10 also includes a conductor circuit other than the signal wiring 12 and the pad 14. The first conductor layer 10 is mainly formed of copper. The first conductor layer 10 is formed by a seed layer 10a on the insulating layer 4 and a plating layer 10b on the seed layer 10a. The thickness of the seed layer 10a is less than 0.5μm. The seed layer 10a is formed by a first layer 11a on the third surface 6 and a second layer 11b on the first layer 11a. The first layer 11a is in contact with the insulating layer 4. The ratio of the thickness of the first layer 11a to the thickness of the second layer 11b (the thickness of the first layer / the thickness of the second layer) is greater than 0.25 and less than 0.7. The thickness of the second layer 11b is preferably thicker than the thickness of the first layer 11a.

[0025] The first layer 11a is formed of an alloy containing copper and a metal other than copper (copper alloy). For example, the first layer 11a is formed of an alloy containing copper and aluminum. The first layer 11a is formed of an alloy containing copper, aluminum and a specific metal. Examples of specific metals are nickel, zinc, gallium, silicon, and magnesium. The alloy preferably contains one specific metal, or two specific metals, or three specific metals. An example of a specific metal is silicon. The content of aluminum in the alloy is greater than 1.0 at% and less than 15.0 at%. In the case where the alloy contains a specific metal, the content of the specific metal in the alloy is greater than 0.5 at% and less than 10.0 at%. The first layer 11a may also contain impurities. Examples of impurities are oxygen and carbon. The first layer 11a may contain oxygen or carbon. The first layer 11a may contain oxygen and carbon. In an embodiment, the alloy also contains carbon. The content of carbon in the alloy is less than 50 ppm. The alloy also contains oxygen. The content of oxygen in the alloy is less than 100 ppm. The values ​​of the contents of the above-mentioned elements are examples. Among the elements forming the first layer 11a, the amount of copper is the largest. Next, the amount of aluminum is large. In the case where the alloy contains a specific metal, the amount of the specific metal is smaller than the amount of aluminum. Therefore, copper is the primary metal, aluminum is the first secondary metal, and the specific metal is the second secondary metal. The amount of impurities is smaller than the amount of the specific metal.

[0026] The second layer 11b is formed of copper. The plated layer 10b is formed of copper.

[0027] The copper content of the copper alloy forming the first layer 11a is greater than 90at%. The copper content of the alloy is less than 99at%. The copper content of the copper alloy is 98at% or less. The copper content of the second layer 11b is 99.9at% or more. The copper content of the second layer 11b is preferably 99.95at% or more. The electroplated layer 10b is formed of copper. The copper content of the electroplated layer 10b is 99.9at% or more. The copper content of the electroplated layer 10b is preferably 99.95at% or more.

[0028] The resin insulating layer (first resin insulating layer) 20 is formed on the third surface 6 of the insulating layer 4 and the first conductor layer 10. The first resin insulating layer 20 has a first surface 22 and a second surface 24 on the opposite side to the first surface 22. The second surface 24 of the first resin insulating layer 20 is opposite to the first conductor layer 10. The first resin insulating layer 20 has an opening (opening for via conductor) 26 that exposes the pad 14. The diameter of the bottom of the opening 26 is greater than 20 μm and less than 50 μm. The resin insulating layer (first resin insulating layer) 20 is formed by a resin 80 and a plurality of inorganic particles 90 dispersed in the resin 80. The resin 80 has an upper surface 80R and a lower surface 80S on the opposite side to the upper surface 80R. The upper surface 80R forms the first surface 22, and the lower surface 80S forms the second surface 24. The resin 80 is an epoxy resin. Examples of the resin are thermosetting resins and photocurable resins. The inorganic particles 90 are, for example, glass particles or aluminum oxide particles. The inorganic particles 90 preferably contain oxygen. The average particle size of the inorganic particles 90 is 0.5 μm or less. The amount of the inorganic particles 90 in the resin insulating layer 20 is 75 wt % or more.

[0029] like Figure 1 and Figure 2As shown, the inorganic particles 90 include first inorganic particles 91 forming the first surface 22 and second inorganic particles 92 embedded in the resin 80. The second inorganic particles 92 are completely embedded in the resin 80. The shape of the second inorganic particles 92 is a sphere. The first inorganic particles 91 are formed by the second inorganic particles 92. The first inorganic particles 91 are formed by removing a portion of the second inorganic particles 92. The shape of the first inorganic particles 91 is different from the shape of the second inorganic particles 92. The shape of the first inorganic particles 91 is substantially a spherical segment. A portion of the surface of the first inorganic particle 91 is a substantially flat plane, which is roughly flat. The plane forms a surface 91c of the cutout of the spherical segment and faces the first surface 22. Alternatively, a portion of the surface of the first inorganic particle 91 is a substantially curved surface, which is roughly smooth. The curved surface forms a surface 91c of the cutout of the spherical segment and faces the first surface 22. The first inorganic particle 91 is embedded in the resin 80 in such a way that the surface 91c of the cutout forms the first surface 22. The first surface 22 is formed by the surface 91c of the cut of the first inorganic particle 91 and the upper surface 80R of the resin 80. The surface 91c of the cut and the upper surface 80R form substantially the same surface. The surface 91c of the cut is exposed from the upper surface 80R of the resin 80. The portion of the surface of the first inorganic particle 91 exposed through the upper surface 80R of the resin 80 is the exposed portion 91P. The surface (exposed surface) 91x of the exposed portion 91P forms the first surface 22. The exposed surface (first exposed surface) 91x is a substantially flat surface or a substantially curved surface. The first exposed surface 91x is approximately flat. The first exposed surface 91x is approximately smooth. The first exposed surface 91x and the surface 91c of the cut are substantially the same surface. The first surface 22 is formed by the first exposed surface 91x and the upper surface 80R of the resin 80. The first exposed surface 91x and the upper surface 80R form substantially the same surface.

[0030] The arithmetic mean roughness (Ra) of the first surface 22 is less than 0.08 μm. The roughness Ra of the first surface 22 is preferably less than 0.05 μm. The roughness Ra of the first surface 22 is more preferably less than 0.03 μm. The arithmetic mean roughness (Ra) of the upper surface 80R is less than 0.08 μm. The roughness Ra of the upper surface 80R is preferably less than 0.05 μm. The roughness Ra of the upper surface 80R is more preferably less than 0.03 μm.

[0031] The first surface 22 may have a step (first step) between the first exposed surface 91x and the upper surface 80R. The first exposed surface 91x protrudes relative to the upper surface 80R. Alternatively, the first exposed surface 91x is recessed relative to the upper surface 80R. Preferably, it protrudes. The size of the step (first step) (the distance between the first exposed surface 91x and the upper surface 80R of the resin 80) is 5 μm or less. The size of the first step is preferably 3 μm or less. The size of the first step is more preferably 1.5 μm or less. Even if a step (first step) is formed, since the step is small, the first exposed surface 91x and the upper surface 80R of the resin 80 form a substantially common surface. For example, the size of the step is represented by a maximum value.

[0032] The ratio R of the volume of the first inorganic particle 91 to the volume of the sphere (imaginary sphere) predicted based on the first inorganic particle 91 (volume of the first inorganic particle / volume of the imaginary sphere) is greater than 0.6 and less than 1. The ratio R is preferably greater than 0.8. The ratio R is more preferably greater than 0.9. The ratio R is most preferably greater than 0.95. The ratio R is preferably less than 0.97. The thermal expansion coefficient of the resin 80 near the upper surface 80R is controlled.

[0033] like Figure 1 and Figure 3 As shown, the inorganic particles 90 further include a third inorganic particle 93 that forms an inner wall surface (first inner wall surface) 27 of an opening (opening for a via conductor) 26. The shape of the third inorganic particle 93 is obtained by cutting a sphere in a plane. The shape of the third inorganic particle 93 is obtained by cutting the second inorganic particle 92 in a plane. The third inorganic particle 93 is formed by the second inorganic particle 92. The third inorganic particle 93 is obtained by removing a portion of the second inorganic particle 92. The shape of the third inorganic particle 93 is substantially a spherical segment. The shape of the first inorganic particle 91 is substantially the same as the shape of the third inorganic particle 93. The shape of the third inorganic particle 93 is different from the shape of the second inorganic particle 92. The third inorganic particle 93 has a flat portion 93a. The flat portion 93a forms the inner wall surface 27. The inner wall surface 27 is formed by the resin 80 and the flat portion 93a. The flat portion 93a and the surface (first resin surface) 80a of the resin 80 that forms the inner wall surface 27 form a substantially common surface. No irregularities are formed on the resin 80 forming the inner wall surface 27. The surface 80a of the resin 80 forming the inner wall surface 27 is substantially smooth. No irregularities are formed on the exposed surface (surface forming the inner wall surface 27) 93b of the flat portion 93a. The exposed surface (second exposed surface) 93b of the flat portion 93a is smooth. The inner wall surface 27 is smoothly formed. The arithmetic mean roughness (Ra) of the inner wall surface 27 is 1.0 μm or less. The roughness (Ra) of the surface 80a of the resin 80 forming the inner wall surface 27 is 1.0 μm or less.

[0034] The inner wall surface 27 may have a step (second step) between the flat portion 93a and the surface 80a of the resin 80 forming the inner wall surface 27. The exposed surface (second exposed surface) 93b of the flat portion 93a protrudes relative to the surface 80a of the resin 80 forming the inner wall surface 27. Alternatively, the exposed surface 93b of the flat portion 93a is recessed relative to the surface 80a of the resin 80 forming the inner wall surface 27. Preferably, it protrudes. The size of the step (second step) (the distance between the exposed surface 93b of the flat portion 93a and the surface 80a of the resin 80 forming the inner wall surface 27) is 5 μm or less. The size of the second step is preferably 3 μm or less. The size of the second step is more preferably 1.5 μm or less. Even if a step (second step) is formed, since the step is small, the exposed surface 93b of the flat portion 93a and the surface 80a of the resin 80 forming the inner wall surface 27 form a substantially common surface. When the first exposed surface 91x protrudes, the second exposed surface 93b also protrudes. When the first exposed surface 91x is recessed, the second exposed surface 93b is also recessed.

[0035] like Figure 1 As shown, the second conductor layer 30 is formed on the first surface 22 of the resin insulating layer (first resin insulating layer) 20. The second conductor layer 30 includes a first signal wiring 32, a second signal wiring 34, and a pad 36. Although not shown in the figure, the second conductor layer 30 also includes a conductor circuit other than the first signal wiring 32, the second signal wiring 34, and the pad 36. The first signal wiring 32 and the second signal wiring 34 form a pair of wirings. The first signal wiring 32 is adjacent to the second signal wiring 34. Figure 2 As shown, the interval D1 between the first signal wiring 32 and the second signal wiring 34 is 1.5 μm to 10 μm. The interval D1 is preferably 1.5 μm to 8 μm. The first signal wiring 32 is an example of a first conductor circuit, and the second signal wiring 34 is an example of a second conductor circuit.

[0036] The conductor layer (second conductor layer) 30 is mainly formed of copper. The second conductor layer 30 is formed of a seed layer 30a on the first surface 22 and a plating layer 30b on the seed layer 30a. The seed layer 30a is formed of a first layer 31a on the first surface 22 and a second layer 31b on the first layer 31a. The thickness of the seed layer 30a is less than 0.5 μm. The first conductor layer 10 and the second conductor layer 30 are the same. The relationship between the thickness of the first layer 31a and the thickness of the second layer 31b is the same as the relationship between the thickness of the first layer 11a and the thickness of the second layer 11b. The first layer 31a and the second layer 31b form the second conductor layer 30, and the first layer 11a and the second layer 11b form the first conductor layer 10. The first layer 31a is formed of the same alloy (copper alloy) as the first layer 11a. The second layer 31b is formed of copper. The plating layer 30b is formed of copper. The first layer 31a is in contact with the first surface 22.

[0037] The via conductor (first via conductor) 40 is formed in the opening (opening for via conductor) 26. The opening 26 passes through the first resin insulating layer 20 and reaches the first conductor layer 10. The via conductor (first via conductor) 40 connects the first conductor layer 10 and the second conductor layer 30. Figure 1 , the via conductor 40 connects the pad 14 and the land 36. The via conductor 40 is formed by a seed layer 30a and a plating layer 30b on the seed layer 30a. The seed layer 30a forming the via conductor 40 and the seed layer 30a forming the second conductor layer 30 are common. The first layer 31a forming the via conductor 40 and the first layer 31a forming the second conductor layer 30 are common. The first layer 31a is in contact with the inner wall surface 27. The second layer 31b forming the via conductor 40 and the second layer 31b forming the second conductor layer 30 are common. The plating layer 30b forming the via conductor 40 and the plating layer 30b forming the second conductor layer 30 are common.

[0038] The first layer 11a forming the first conductor layer 10, the first layer 31a forming the second conductor layer 30, and the first layer 31a forming the via-hole conductor 40 are the same. Both 11a and 31a are formed of the same element. The elements forming both 11a and 31a have the same amount. The second layer 11b forming the first conductor layer 10, the second layer 31b forming the second conductor layer 30, and the second layer 31b forming the via-hole conductor 40 are the same. The second layers 11b and 31b are respectively formed of the same element. The second layers 11b and 31b are respectively formed of approximately the same amount of elements. The electroplating layer 10b forming the first conductor layer 10, the electroplating layer 30b forming the second conductor layer 30, and the electroplating layer 30b forming the via-hole conductor 40 are the same. The electroplating layers 10b and 30b are respectively formed of the same element. The electroplating layers 10b and 30b are respectively formed of approximately the same amount of elements.

[0039] like Figure 1As shown, the embodiment can form an adhesive layer 100 on the surface (upper surface and side surface) of the second conductor layer 30. The adhesive layer 100 is not essential. The surface of the second conductor layer 30 is formed by a first surface and a second surface. The first surface of the surface is a portion exposed through the opening 126 for the via conductor 140. The via conductor 140 penetrates the second resin insulating layer 120 and reaches the second conductor layer 30. The second surface is a portion other than the first surface. The first surface is not covered by the adhesive layer 100, and the second surface is covered by the adhesive layer 100. The adhesive layer 100 is in contact with the second conductor layer 30. The adhesive layer 100 is in contact with the second surface of the second conductor layer 30. The adhesive layer 100 is formed of a resin. The adhesive layer 100 is formed of an organic material (organic resin). An example of an organic material is a nitrogen-based organic compound. An example of a nitrogen-based organic compound is a tetrazole compound. An example of a nitrogen-based organic compound is disclosed in Japanese Patent Publication No. 2015-54987. The adhesive layer 100 does not cover the first surface 22 of the resin insulating layer 20 exposed from the second conductor layer 30. The adhesive layer 100 is formed between the second conductor layer 30 and the second resin insulating layer 120. The adhesive layer 100 is sandwiched between the second conductor layer 30 and the resin insulating layer (second resin insulating layer) 120. The adhesive layer 100 bonds the second conductor layer 30 and the second resin insulating layer 120.

[0040] Figure 4 1 is an enlarged cross-sectional view showing a portion of the adhesive layer 100 formed on the second surface of the second conductor layer 30. Figure 4 As shown, the adhesive layer 100 is formed of a substantially smooth smooth film 102 and a plurality of protrusions 104 protruding from the smooth film 102 .

[0041] The smooth film 102 has a substantially uniform thickness T. The thickness T of the smooth film 102 is not less than 10 nm and not more than 120 nm. The ratio (S1 / S2) of the area (S1) of the smooth film 102 exposed from the protrusion 104 to the area (S2) of the adhesive layer 100 is not less than 0.1 and not more than 0.5. The smooth film 102 on the second surface of the second conductor layer 30 is formed substantially along the shape of the second surface of the second conductor layer 30. In the case where undulations are formed on the upper surface and the side surface of the second conductor layer 30, the smooth film 102 follows the undulations.

[0042] The protrusion 104 is formed by a plurality of protrusions 106. The plurality of protrusions 106 form irregularities on the upper surface of the protrusion 104. 2 The number of protrusions 106 is 5 or more and 15 or less. The protrusion 104 has heights H1 and H2 between the upper surface of the smooth film 102 and the top of the protrusion 104. The maximum value of the heights H1 and H2 is 10 or more and 30 or less times the thickness T of the smooth film 102. The heights H1 and H2 are 200 nm or more and 450 nm or less.

[0043] The second resin insulating layer 120 is formed on the second conductor layer 30 and the first surface 22 of the first resin insulating layer 20. The second resin insulating layer 120 is formed on the second conductor layer 30 via the adhesive layer 100. The second resin insulating layer 120 has a first surface 122 and a second surface 124 on the opposite side of the first surface 122. The second surface 124 of the second resin insulating layer 120 faces the second conductor layer 30. The second resin insulating layer 120 has an opening (opening for a via conductor) 126. The opening 126 penetrates the second resin insulating layer 120 and reaches the second conductor layer 30.

[0044] The second resin insulating layer 120 is formed of a resin 80 and inorganic particles 90. The first resin insulating layer 20 is the same as the second resin insulating layer 120. Therefore, the resin 80 forming the second resin insulating layer 120 is the same as the resin 80 forming the first resin insulating layer 20. The inorganic particles 90 forming the second resin insulating layer 120 are the same as the inorganic particles 90 forming the first resin insulating layer 20. As with the first resin insulating layer 20, the inorganic particles 90 forming the second resin insulating layer 120 include first inorganic particles 91, second inorganic particles 92, and third inorganic particles 93. The first inorganic particles 91 in the first resin insulating layer 20 are the same as the first inorganic particles 91 in the second resin insulating layer 120. The second inorganic particles 92 in the first resin insulating layer 20 are the same as the second inorganic particles 92 in the second resin insulating layer 120. The third inorganic particles 93 in the first resin insulating layer 20 are the same as the third inorganic particles 93 in the second resin insulating layer 120.

[0045] The first surface 22 of the first resin insulating layer 20 is the same as the first surface 122 of the second resin insulating layer 120. The first surface 122 of the resin insulating layer (second resin insulating layer) 120 is formed by the upper surface (second upper surface) of the resin 80 forming the resin insulating layer (second resin insulating layer) 120 and the exposed surface (third exposed surface) of the exposed portion of the first inorganic particles 91 forming the resin insulating layer (second resin insulating layer) 120. The second upper surface and the third exposed surface form a substantially common surface. Similar to the first surface 22 of the first resin insulating layer 20, the first surface 122 of the second resin insulating layer 120 can have a step (third step) between the second upper surface and the third exposed surface. The first step is the same as the third step. The size of the first step is the same as the size of the third step. Even if the first surface 122 has a step, since the size of the step is small, the upper surface (second upper surface) of the resin 80 and the exposed surface (third exposed surface) of the first inorganic particles 91 are substantially located on the same plane.

[0046] The opening (opening for via conductor) 126 penetrating the second resin insulating layer 120 is the same as the opening (opening for via conductor) 26 penetrating the first resin insulating layer 20. Therefore, the inner wall surface (second inner wall surface) 127 of the opening 126 is the same as the inner wall surface (first inner wall surface) 27 of the opening 26. The second inner wall surface 127 is formed by the resin 80 and the flat portion 93a of the third inorganic particle 93. Similar to the first inner wall surface 27, the second inner wall surface 127 is formed by the surface of the resin 80 (the surface of the second resin) forming the second inner wall surface 127 and the flat portion of the third inorganic particle 93 forming the second resin insulating layer 120. Similar to the flat portion 93a of the third inorganic particle 93 forming the first resin insulating layer 20, the flat portion of the third inorganic particle 93 forming the second resin insulating layer 120 has an exposed surface (fourth exposed surface). The surface of the second resin and the fourth exposed surface forming the inner wall surface 127 form a substantially common surface. Similar to the first inner wall surface 27, the second inner wall surface 127 can have a step (fourth step) between the surface of the second resin and the fourth exposed surface. The second step is the same as the fourth step. The size of the fourth step is the same as the size of the second step. Therefore, even if the second inner wall surface 127 has the fourth step, the surface of the second resin and the fourth exposed surface form a substantially common surface.

[0047] like Figure 1As shown, a third conductor layer 130 is formed on the first surface 122 of the second resin insulating layer 120. A via conductor (second via conductor) 140 connecting the second conductor layer 30 and the third conductor layer 130 is formed in the opening 126. The third conductor layer 130 is the same as the second conductor layer 30. The second via conductor 140 is the same as the first via conductor 40. The third conductor layer 130 and the second via conductor 140 are formed by a seed layer 130a and a plating layer 130b on the seed layer 130a, and the seed layer 130a is composed of a first layer 131a and a second layer 131b on the first layer 131a. The first layer 131a forming the third conductor layer 130 and the second via conductor 140 is the same as the first layer 31a of the second conductor layer 30. The second layer 131b forming the third conductor layer 130 and the second via conductor 140 is the same as the second layer 31b of the second conductor layer 30. The plating layer 130b forming the third conductor layer 130 and the second via conductor 140 is the same as the plating layer 30b of the second conductor layer 30. The first layer 131a is in contact with the first surface 122 of the second resin insulating layer 120. The first layer 131a is in contact with the inner wall surface (second inner wall surface) 127. The layers forming the second conductor layer 30 (the first layer 31a, the second layer 31b, the plating layer 30b) and the layers forming the third conductor layer 130 (the first layer 131a, the second layer 131b, the plating layer 130b) have the same thickness and composition. The layers forming the second conductor layer 30 (the first layer 31a, the second layer 31b, the plating layer 30b) and the layers forming the third conductor layer 130 (the first layer 131a, the second layer 131b, the plating layer 130b) are formed of the same elements. The elements included in each layer forming the second conductor layer 30 (first layer 31a, second layer 31b, plating layer 30b) and the elements included in each layer forming the third conductor layer 130 (first layer 131a, second layer 131b, plating layer 130b) have the same amount.

[0048] The length of each side of the printed wiring board 2 is 50 mm or more, preferably 100 mm or more, and 250 mm or less.

[0049] The printed wiring board 2 may have a solder resist layer on the first surface 122 of the second resin insulating layer 120 and the third conductor layer 130. The insulating layer 4 may also form a core material. The embodiment may also have an adhesive layer 100 covering the second surface of the third conductor layer 130. The adhesive layer 100 is sandwiched between the third conductor layer 130 and the solder resist layer.

[0050] [Method for Manufacturing Printed Wiring Board 2 According to Embodiment]

[0051] Figure 5A to Figure 5F A method for manufacturing the printed wiring board 2 according to the embodiment will be described. Figure 5A to Figure 5C and Fig. 5F It is a cross-sectional view. Figure 5D and Figure 5E is an enlarged cross-sectional view. Figure 5A The insulating layer 4 and the conductor layer (first conductor layer) 10 formed on the third surface 6 of the insulating layer 4 are shown. The first conductor layer 10 is formed by a semi-additive method. The first layer 11a and the second layer 11b are formed by sputtering. The first layer 11a and the second layer 11b are formed in a vacuum. The electroplating layer 10b is formed by electroplating.

[0052] like Figure 5B As shown, a resin insulating layer (first resin insulating layer) 20 and a protective film 50 are formed on the insulating layer 4 and the first conductive layer 10. The second surface 24 of the resin insulating layer 20 is opposite to the third surface 6 of the insulating layer 4. The protective film 50 is formed on the first surface 22 of the first resin insulating layer 20. The resin insulating layer 20 has a resin 80 and inorganic particles 90. The inorganic particles 90 are embedded in the resin 80. An example of the inorganic particles 90 is glass particles.

[0053] The protective film 50 completely covers the first surface 22 of the resin insulating layer 20. An example of the protective film 50 is a film made of polyethylene terephthalate (PET). A release agent is formed between the protective film 50 and the resin insulating layer 20.

[0054] like Figure 5C As shown, laser light L is irradiated from above the protective film 50. The laser light L penetrates the protective film 50 and the resin insulating layer 20 at the same time. An opening (opening for a via conductor) 26 that reaches the pad 14 of the first conductor layer 10 is formed. The laser light L is, for example, a UV laser or a CO2 laser. The pad 14 is exposed through the opening 26. When the opening 26 is formed, the first surface 22 is covered with the protective film 50. Therefore, when the opening 26 is formed, even if the resin is scattered, it is possible to suppress the resin from adhering to the first surface 22.

[0055] Figure 5D The inner wall surface 27b of the opening 26 after laser irradiation is shown. By irradiating the resin insulating layer 20 with laser light L, a portion of the second inorganic particles 92 embedded in the resin 80 forms the inner wall surface 27b after laser irradiation. The inner wall surface 27b is formed by the resin 80 and the inorganic particles 90 protruding from the resin 80. Some of the second inorganic particles embedded in the resin insulating layer 20 partially protrude from the inner wall surface 27b. The second inorganic particles 92 forming the inner wall surface 27b after laser irradiation are formed by the protruding portion P protruding from the resin 80 and the portion E embedded in the resin 80. The second inorganic particles 92 forming the inner wall surface 27b are referred to as third protruding particles.

[0056] The protective film is removed. After the protective film 50 is removed, the first surface 22 of the resin insulating layer 20 is cleaned. The resin 80 forming the first surface 22 is removed by a dry process. For example, the first surface 22 of the resin insulating layer 20 is cleaned by reverse sputtering. For example, the first surface 22 of the resin insulating layer 20 is cleaned by sputtering using argon gas (argon sputtering). Figure 5E (a) Figure 5E (b) schematically shows the first surface 22 of the resin insulation layer 20 before and after cleaning. Figure 5E (a) Figure 5E As shown in (b), the resin 80 forming the resin insulating layer 20 is removed by about 20 nm by cleaning based on sputtering or the like. For example, the adhesive material used to bond the protective film 50 to the resin insulating layer 20 is removed. The resin 80 is selectively removed by cleaning. The thickness of the resin 80 is reduced. Some of the inorganic particles 90 are partially exposed from the upper surface 80R of the resin 80 by cleaning. A portion of the second inorganic particles 92 is exposed from the upper surface 80R of the resin 80. Figure 5E (b) represents the first surface 22b after cleaning. Figure 5E As shown in (b), the inorganic particles (second inorganic particles 92) 90 forming the first surface 22b after cleaning are composed of a first portion 91a protruding from the resin 80 and a second portion 91b embedded in the resin 80. The second inorganic particles 92 forming the first surface 22b after cleaning are referred to as first protruding particles.

[0057] In order to control the shape of the inner wall surface, the inner wall surface 27b after laser irradiation is treated. In order to control the shape of the first surface, the first surface 22b after cleaning is treated. It is preferred to selectively remove the first protruding particles and the third protruding particles. Thus, the first inorganic particles 91 are formed by the inorganic particles 90. The third inorganic particles 93 are formed by the inorganic particles 90. For example, by treating the inner wall surface 27b after laser irradiation and the first surface 22b after cleaning with chemicals, the first protruding particles and the third protruding particles are selectively removed. Alternatively, by treating the inner wall surface 27b after laser irradiation and the first surface 22b after cleaning with plasma, the first protruding particles and the third protruding particles are selectively removed. The etching speed of the inorganic particles 90 is greater than the etching speed of the resin 80. For example, the etching speed difference between the two is more than 10 times. Or, the etching speed difference between the two is more than 50 times. Or, the etching speed difference between the two is more than 100 times. By treating the first surface 22b after cleaning, the first inorganic particle 91 having the exposed portion 91P is obtained. By treating the inner wall surface 27b after laser irradiation, the third inorganic particle 93 having the flat portion 93a can be obtained. By controlling the conditions for treating the first surface 22b after cleaning, the embodiment can control the shape of the first surface 22. By controlling the conditions for treating the inner wall surface 27b after laser irradiation, the embodiment can control the shape of the inner wall surface 27. Examples of the conditions are temperature, concentration, time, type of gas, and pressure. The etching speed of the inorganic particle 90 and the etching speed of the resin are controlled.

[0058] The inner wall surface 27b after laser irradiation is treated. For example, the inner wall surface 27b is treated with a plasma containing tetrafluoromethane gas. The inner wall surface 27 of the embodiment is formed by selectively removing the protrusion P. The third inorganic particle 93 is formed by the second inorganic particle 92. The third inorganic particle 93 having a flat portion 93a is formed by selectively removing the protrusion P. The surface forming the flat portion 93a is a roughly flat surface. The surface forming the flat portion 93a is a roughly curved surface. When the second inorganic particle 92 having a spherical shape is cut by a plane, the shape of the third inorganic particle 93 is obtained. Alternatively, the second inorganic particle 92 is cut by a curved surface. The shape of the third inorganic particle 93 is roughly a spherical segment. The inner wall surface 27 is formed by the flat portion 93a and the surface 80a of the resin 80. The exposed surface 93b of the flat portion 93a and the surface 80a of the resin 80 are located on roughly the same plane. For example, when a seed layer 30a is formed on the inner wall surface 27b by sputtering, the protruding portion P hinders the growth of the sputtering film. For example, it is difficult to form a continuous seed layer 30a on the inner wall surface 27b. Alternatively, it is necessary to thicken the thickness of the seed layer 30a. It is believed that a printed wiring board having a third protruding particle cannot form a fine conductor circuit on the first surface 22. In an embodiment, the protruding portion P is removed. The embodiment can make the thickness of the seed layer 30a formed by sputtering thinner. Even if the thickness of the seed layer 30a formed by sputtering is thin, a continuous seed layer 30a can be obtained. The thickness of the seed layer 30a is greater than 0.05μm and less than 0.5μm.

[0059] Forming the opening 26 includes forming inorganic particles (second inorganic particles 92) 90 having a protruding portion P. The protruding portion P protrudes from the resin 80 forming the inner wall surface 27b of the opening 26. The third inorganic particles 93 are formed by removing the protruding portion P of the inorganic particles (second inorganic particles 92) 90. The inner wall surface 27 of the opening 26 includes an exposed surface 93b of the third inorganic particle 93. The exposed surface 93b of the third inorganic particle 93 is formed by removing the protruding portion P.

[0060] The shape of the third inorganic particle 93 obtained by cutting the second inorganic particle 92 having a spherical shape in a plane includes removing the protruding portion P of the inorganic particle 90. The inner wall surface 27 of the actual opening 26 is a substantially curved surface. The flat portion 93a is formed by removing the protruding portion P, so the exposed surface 93b of the flat portion 93a includes a curved surface. That is, the flat portion 93a and the resin 80 form a common surface, including forming the inner wall surface 27 formed by a substantial curved surface.

[0061] The first surface 22b after cleaning is treated. For example, the first surface 22b is treated with a plasma containing a gas of tetrafluoromethane. The first surface 22 of the embodiment is formed by selectively removing the first portion 91a. The first inorganic particles 91 are formed from the second inorganic particles 92. Figure 5EAs shown in (c), by selectively removing the first portion 91a, a first inorganic particle 91 having an exposed portion 91P is formed. The exposed surface (first exposed surface) 91x of the exposed portion 91P is a substantially flat surface. The first exposed surface 91x may also be a substantially curved surface. When the second inorganic particle 92 having a spherical shape is cut by a plane, the shape of the first inorganic particle 91 is obtained. Alternatively, the second inorganic particle 92 is cut by a curved surface. The first surface 22 is formed by the exposed portion 91P and the upper surface 80R of the resin 80. The first exposed surface 91x of the exposed portion 91P is located on substantially the same plane as the upper surface 80R of the resin 80. For example, when a seed layer 30a is formed on the first surface 22b by sputtering, the first portion 91a hinders the growth of the sputtering film. For example, it is difficult to form a continuous seed layer 30a on the first surface 22b. Alternatively, the thickness of the seed layer 30a needs to be thickened. It is believed that a printed wiring board having a first protruding particle cannot form a fine conductor circuit on the first surface 22. In the embodiment, the first portion 91a is removed. The embodiment can reduce the thickness of the seed layer 30a formed by sputtering. Even if the thickness of the seed layer 30a formed by sputtering is thin, a continuous seed layer 30a can be obtained. The thickness of the seed layer 30a is greater than 0.05 μm and less than 0.5 μm.

[0062] Forming the first surface 22 includes forming inorganic particles (second inorganic particles 92) 90 having a first portion 91a. The first portion 91a protrudes from the upper surface 80R of the resin 80. The first inorganic particles 91 are formed by removing the first portion 91a of the inorganic particles (second inorganic particles 92) 90. The first surface 22 includes an exposed surface 91x of the first inorganic particles 91. The exposed surface 91x of the first inorganic particles 91 is formed by removing the first portion 91a.

[0063] The shape of the first inorganic particle 91 obtained by cutting the spherical second inorganic particle 92 in a plane includes removing the first portion 91a of the inorganic particle 90. The exposed portion 91P is formed by removing the first portion 91a, so the exposed surface 91x of the exposed portion 91P includes a curved surface. That is, the exposed surface 91x includes a substantially curved surface.

[0064] For example, using Figure 5E (c) The ratio R (volume of the first inorganic particle / volume of the imaginary sphere) is calculated. Figure 5E The cross-sectional view in FIG. 2 is perpendicular to the first surface 22. The periphery of the first inorganic particle 91 is depicted by solid lines and dotted lines. The first exposed surface 91x is depicted by dotted lines, and the periphery of the portion other than the first exposed surface 91x is depicted by solid lines. Figure 5EA circle (virtual circle) 91M is imagined from the top view of the first inorganic particle 91 in (c). The circumference of the virtual circle 91M is depicted by dotted lines and solid lines. The portion indicated by the dotted line is a portion predicted based on the first inorganic particle 91. The shape of the first inorganic particle 91 is a spherical segment. The origin of the shape of the first inorganic particle 91 is a sphere, so it is relatively easy to predict the virtual circle. Figure 5E The area of ​​the first inorganic particle 91 in (c) is obtained. Figure 5E The ratio of the two (area of ​​the first inorganic particle 91 / area of ​​the imaginary circle 91M) can represent the ratio R. For example, the ratio R is 0.95. Figure 5E The first exposed surface 91x in (c) is covered with a conductor layer.

[0065] The inner wall surface 27b after laser irradiation and the first surface 22b after cleaning are processed simultaneously. Alternatively, the inner wall surface 27b after laser irradiation and the first surface 22b after cleaning are processed separately. In the case of separate processing, both are processed by the same method. Alternatively, both are processed by different methods.

[0066] When the inner wall surface 27b after laser irradiation is processed, the inner wall surface 27b is almost not rough. The inner wall surface 27 has almost no unevenness. The inner wall surface 27 is smoothly formed. The surface 80a of the resin 80 forming the inner wall surface 27 is smoothly formed. The surface 80a of the resin 80 has almost no unevenness. The arithmetic mean roughness (Ra) of the surface 80a of the resin 80 is less than 0.2μm. The size of the unevenness is controlled by controlling the conditions for processing the inner wall surface 27b after laser irradiation.

[0067] When the first surface 22b after cleaning is processed, the first surface 22 is almost not rough. The first surface 22 has almost no unevenness. The first surface 22 is smoothly formed. The upper surface 80R of the resin 80 forming the first surface 22 is smoothly formed. The upper surface 80R of the resin 80 has almost no unevenness. The arithmetic mean roughness (Ra) of the upper surface 80R of the resin 80 is less than 0.2μm. The size of the unevenness is controlled by controlling the conditions for processing the first surface 22b after cleaning.

[0068] The embodiment can clean the inside of the opening 26. The cleaning inside the opening 26 is performed by plasma. That is, the cleaning is performed by a dry process. The cleaning includes a desmearing process. In the case where the processing of the inner wall surface 27b after laser irradiation includes cleaning the inside of the opening 26, the step of cleaning the inside of the opening 26 can be removed in the embodiment. In the case where the processing of the first surface 22b after cleaning includes cleaning the inside of the opening 26, the step of cleaning the inside of the opening 26 can be removed in the embodiment. In the embodiment, the desmearing process can be removed.

[0069] like Fig. 5FAs shown, a seed layer 30a is formed on the first surface 22 of the resin insulating layer 20. The seed layer 30a is formed by sputtering. The formation of the seed layer 30a is performed by a dry process. The first layer 31a is formed on the first surface 22 by sputtering. At the same time, the first layer 31a is formed by sputtering on the inner wall surface 27 and the pad 14 exposed from the opening 26. There is almost no concave portion formed on the first surface 22. Therefore, the first layer 31a on the first surface 22 is formed to be roughly flat. Thereafter, the second layer 31b is formed on the first layer 31a by sputtering. The second layer 31b is formed roughly flat. The first layer 31a and the second layer 31b are formed in a vacuum. The seed layer 30a is also formed on the upper surface of the pad 14 exposed from the opening 26 and the inner wall surface 27 of the opening 26. The first layer 31a is formed of an alloy containing copper and aluminum. Aluminum has high ductility and high ductility. Therefore, the adhesion between the resin insulating layer 20 and the first layer 31a is high. It is considered that even if the resin insulating layer 20 expands and contracts due to thermal cycles, the seed layer 30a containing aluminum can follow the expansion and contraction. Even if the first surface 22 of the resin insulating layer 20 is smooth, the seed layer 30a is difficult to peel off from the resin insulating layer 20. It is considered that aluminum is easily oxidized. It is considered that if the third inorganic particle 93 is an inorganic particle 90 containing oxygen (oxygen element), the first layer 31a formed on the inner wall surface 27 is closely attached to the third inorganic particle 93 via the oxygen in the inorganic particle 90 forming the inner wall surface 27. The first layer 31a is firmly bonded to the inner wall surface 27. The embodiment can improve the adhesion between the inner wall surface 27 and the first layer 31a. The seed layer 30a is difficult to peel off from the inner wall surface 27. The third inorganic particle 93 forming the inner wall surface 27 preferably contains oxygen element. It is considered that if the first inorganic particle 91 is an inorganic particle 90 containing oxygen (oxygen element), the first layer 31a formed on the first surface 22 is closely attached to the first inorganic particle 91 via the oxygen in the inorganic particle 90 forming the first surface 22. The first layer 31a is firmly bonded to the first surface 22. The embodiment can improve the adhesion between the first surface 22 and the first layer 31a. The seed layer 30a is difficult to peel off from the first surface 22. The first inorganic particle 91 forming the first surface 22 preferably contains oxygen element. The first layer 31a may further contain silicon. At this time, silicon is a specific metal, and the first layer 31a is formed by an alloy containing copper, aluminum and silicon. When the inorganic particle 90 is a glass particle, the first layer 31a and the first inorganic particle 91 both contain silicon. It is considered that the two are firmly bonded via silicon. It is considered that the embodiment can further improve the adhesion between the first layer 31a and the first surface 22. The first layer 31a and the third inorganic particle 93 both contain silicon. It is considered that the two are firmly bonded via silicon. It is considered that the embodiment can further improve the adhesive force between the first layer 31a and the inner wall surface 27. The second layer 31b is formed of copper.

[0070] The first surface 22 has almost no concave portion. The inner wall surface 27 has almost no concave portion. The first surface 22 is formed substantially smoothly. The inner wall surface 27 is formed substantially smoothly. Therefore, even if the thickness of the sputtering film (the first layer 31a and the second layer 31b) is thin, the embodiment can form a continuous seed layer 30a. As a result, the embodiment can form fine wiring.

[0071] A plating resist is formed on the seed layer 30a. The plating resist has an opening for forming the first signal wiring 32, the second signal wiring 34 and the pad 36. If the first surface 22 has a recess, the air caused by the recess is easily enclosed between the plating resist and the seed layer 30a. However, in an embodiment, the first surface 22 has almost no recess. Therefore, the seed layer 30a on the first surface 22 is formed to be roughly flat. The seed layer 30a has almost no recess. It is difficult for air to remain between the plating resist and the seed layer 30a. The contact area between the plating resist and the seed layer 30a is large. Even if the width of the plating resist used to form the space between the first signal wiring 32 and the second signal wiring 34 is less than 10μm, the plating resist is difficult to peel off from the upper surface of the seed layer 30a. Even if the width of the plating resist is more than 3μm and less than 8μm, the embodiment can also form the plating resist on the seed layer 30a. Even if the width of the plating resist is 6 μm or less, the plating resist is unlikely to be peeled off from the seed layer 30 a .

[0072] The electroplating layer 30b is formed on the seed layer 30a exposed from the plating resist. The electroplating layer 30b is formed of copper. The electroplating layer 30b fills the opening 26. The first signal wiring 32, the second signal wiring 34 and the pad 36 are formed by the seed layer 30a and the electroplating layer 30b on the first surface 22. The second conductor layer 30 is formed. The via conductor (first via conductor) 40 is formed by using the seed layer 30a and the electroplating layer 30b in the opening 26. The via conductor 40 connects the pad 14 to the pad 36. The first signal wiring 32 and the second signal wiring 34 form a paired wiring. The first via conductor 40 connects the conductor layer (first conductor layer) 10 and the conductor layer (second conductor layer) 30.

[0073] The plating resist is removed. The seed layer 30a exposed from the electroplating layer 30b is removed. The seed layer 30a is removed by wet etching. The etching solution used in the wet etching is an aqueous solution containing a hydrogen peroxide solution and sulfuric acid. By wet etching, the first layer 31a and the second layer 31b are removed simultaneously. The second conductor layer 30 and the via conductor 40 are formed simultaneously.

[0074] The adhesive layer 100 is formed on the upper surface and side surface of the second conductor layer 30. The adhesive layer 100 is formed by immersing the intermediate substrate having the second conductor layer 30 and the via conductor 40 in a chemical solution containing a nitrogen-based organic compound. The pH of the chemical solution is 7 or less. By immersing the intermediate substrate in the chemical solution, the adhesive layer 100 having the smooth film 102 and the protrusion 104 is formed on the upper surface and side surface of the second conductor layer 30. Before the intermediate substrate is immersed in the chemical solution, the oxide film on the upper surface and side surface of the second conductor layer 30 is removed. In a modified example, the adhesive layer 100 is formed by applying the chemical solution on the second conductor layer 30. When the adhesive layer 100 is formed, the intermediate substrate is taken out from the chemical solution. The adhesive layer 100 is dried. The upper surface of the adhesive layer 100 before drying may be smooth. In this case, a part of the adhesive layer is condensed by drying. By condensation, the adhesive layer 100 including the smooth film 102 and the protrusion 104 is formed.

[0075] On the second conductor layer 30 covered by the first surface 22 of the first resin insulation layer 20 and the adhesive layer 100, a resin insulation layer (second resin insulation layer) 120 is formed by the same method as the first resin insulation layer 20. The second resin insulation layer 120 has a first surface 122, a second surface 124 on the opposite side of the first surface 122, and an opening (opening for a via conductor) 126. The second surface 124 of the second resin insulation layer 120 faces the second conductor layer 30. When the opening 126 is formed in the resin insulation layer 120 by the laser L, the laser L removes the adhesive layer 100 covering the second conductor layer 30. Alternatively, the adhesive layer 100 is not completely removed by the laser L. In this case, by cleaning the inside of the opening 126, the adhesive layer 100 at the bottom of the opening 126 is removed. The second conductor layer 30 is exposed through the opening 126. On the first surface 122 of the second resin insulation layer 120, a conductor layer (third conductor layer) 130 is formed by the same method as the second conductor layer 30. A via conductor (second via conductor) 140 connecting the second conductor layer 30 and the third conductor layer 130 is formed in the opening (second opening) 126 by the same method as the first via conductor 40. The printed wiring board 2 of the embodiment is obtained.

[0076] Each resin insulating layer is formed of a resin 80 and inorganic particles 90. The resin forming each resin insulating layer is the same as the resin 80 forming the first resin insulating layer 20. The inorganic particles forming each resin insulating layer are the same as the inorganic particles 90 forming the first resin insulating layer 20. Each resin insulating layer contains first inorganic particles, second inorganic particles, and third inorganic particles, and the first inorganic particles, second inorganic particles, and third inorganic particles in each resin insulating layer are the same as the first inorganic particles, second inorganic particles, and third inorganic particles in the first resin insulating layer 20. Each resin insulating layer has a first surface, and the first surface of each resin insulating layer is the same as the first surface 22 of the first resin insulating layer 20. Each resin insulating layer has an opening (opening for a via conductor), and the opening penetrating each resin insulating layer is the same as the opening 26 penetrating the first resin insulating layer. The inner wall surface of the opening penetrating each resin insulating layer is the same as the inner wall surface 27 of the opening 26 penetrating the first resin insulating layer 20.

[0077] Each conductor layer is formed by a seed layer and an electroplating layer on the seed layer. The seed layer forming each conductor layer is the same as the seed layer 30a forming the second conductor layer 30. The first layer forming each conductor layer is the same as the first layer 31a forming the second conductor layer 30. The second layer forming each conductor layer is the same as the second layer 31b forming the second conductor layer 30. The electroplating layer forming each conductor layer is the same as the electroplating layer 30b forming the second conductor layer 30.

[0078] Each via conductor is formed of a seed layer and a plating layer on the seed layer. The seed layer forming each via conductor is the same as the seed layer 30a forming the first via conductor 40. The first layer forming each via conductor is the same as the first layer 31a forming the first via conductor 40. The second layer forming each via conductor is the same as the second layer 31b forming the first via conductor 40. The plating layer forming each via conductor is the same as the plating layer 30b forming the first via conductor 40.

[0079] In the printed wiring board 2 of the embodiment, even if the thickness of the sputtering film is thin, the embodiment can form a continuous seed layer 30a. The inner wall surface 27 of the opening 26 is formed by the flat portion 93a of the third inorganic particle 93 and the resin 80. The flat portion 93a and the surface 80a of the resin 80 that forms the inner wall surface 27 form a common surface. The inner wall surface 27 is smoothly formed. Therefore, a seed layer 30a of uniform thickness is formed on the inner wall surface 27 of the opening 26. The seed layer 30a is formed thinner. The first surface 22 is formed by the exposed portion 91P of the first inorganic particle 91 and the upper surface 80R of the resin 80. The exposed surface 91x and the upper surface 80R of the resin 80 form a common surface. The first surface 22 is smoothly formed. Therefore, a seed layer 30a of uniform thickness is formed on the first surface 22. The seed layer 30a is formed thinner. When the seed layer 30a is removed, the etching amount is small. Therefore, the etching amount of the plating layer 30b is small. The second conductor layer 30 having the first signal wiring 32 and the second signal wiring 34 has a width as designed. Fine wiring is formed. A high-quality printed wiring board 2 is provided.

[0080] If the first layer 31a of the seed layer 30a contains aluminum and the third inorganic particles 93 contain oxygen, the embodiment can improve the adhesion between the first layer 31a and the inner wall surface 27. Even if the diameter of the opening 26 is small, the via conductor 40 is difficult to peel off from the inner wall surface 27. Therefore, the connection resistance through the via conductor 40 is difficult to increase. Fig. 5F As shown, the diameter D of the via conductor 40 (the diameter of the opening 26) is measured on the pad 14. The diameter D is 20 μm or more and 50 μm or less. Even if the length of each side of the printed wiring board 2 exceeds 50 mm, the connection resistance through the via conductor 40 is unlikely to increase. Even if the length of each side of the printed wiring board 2 is 100 mm or more, the connection resistance is unlikely to increase for a long time. A printed wiring board 2 with high connection reliability is provided.

[0081] The embodiment can reduce the thickness of the first layer 31a forming the via conductor 40. The embodiment can reduce the thickness of the second layer 31b forming the via conductor 40. The first layer 31a and the second layer 31b form a seed layer 30a. The embodiment can increase the volume of the opening for the via conductor after the seed layer is formed. The opening for the via conductor after the seed layer is formed can also be referred to as the opening after the seed layer is formed. By forming a plating layer in the opening after the seed layer is formed, a via conductor composed of a seed layer and a plating layer is formed. Even if the diameter of the opening for the via conductor is small, the plating solution can easily enter the opening for the via conductor after the seed layer is formed. The plating layer forming the via conductor is unlikely to contain voids. A low-resistance via conductor is formed. An example of the opening 260 after the seed layer is formed is as follows Fig. 5F As shown, after the seed layer is formed, the opening 260 is surrounded by the seed layer, and the bottom and side surfaces of the opening 260 are in contact with the seed layer.

[0082] The embodiment can reduce the thickness of the first layer 31a composed of an alloy containing aluminum. The aluminum content in the signal wiring is small and the copper content is large. The embodiment can provide a signal wiring with low resistance. The embodiment can provide a signal wiring with high adhesion to the resin insulating layer and low resistance.

[0083] In the printed wiring board 2 of the embodiment, the first surface 22 of the resin insulating layer 20 has almost no concave portion. The standard deviation of the relative dielectric constant of the portion near the first surface 22 of the resin insulating layer 20 is suppressed from becoming larger. The relative dielectric constant of the first surface 22 of the resin insulating layer 20 does not vary greatly depending on the location. Even if a plurality of signal wirings are in contact with the first surface 22 of the resin insulating layer 20, the embodiment can reduce the difference in propagation speed of the electric signal between the signal wirings. Therefore, noise is suppressed in the printed wiring board 2 of the embodiment. Even if a logic IC is mounted on the printed wiring board 2 of the embodiment, the data transmitted by each signal wiring reaches the logic IC almost at the same time. The embodiment can suppress malfunction of the logic IC. Even if the length of each signal wiring is 5 mm or more, the embodiment can reduce the difference in propagation speed. Even if the length of each signal wiring is 10 mm or more and 20 mm or less, the embodiment can suppress malfunction of the logic IC. The first surface 122 of the second resin insulating layer 120 is also the same as the first surface 22 of the resin insulating layer 20. Therefore, the signal wiring in the third conductor layer 130 also has the same effect as the signal wiring in the second conductor layer 30. A printed wiring board 2 having high quality is provided.

[0084] The printed wiring board 2 of the embodiment has an adhesive layer between the conductor layer and the resin insulating layer. The adhesive layer bonds the conductor layer and the resin insulating layer. Therefore, even if the upper surface and the side surface of the signal wiring are smooth, the resin insulating layer is difficult to peel off from the signal wiring. It is preferable not to make the upper surface and the side surface of the signal wiring rough. The adhesive layer 100 is formed by a substantially smooth smooth film 102 and a protrusion 104 protruding from the smooth film 102. The adhesive layer 100 has concavities and convexities formed by the protrusion 104 and the smooth film 102. The adhesive layer 100 has concavities and convexities formed by a plurality of protrusions 106. Therefore, the second conductor layer 30 and the second resin insulating layer 120 are fully adhered to each other via the adhesive layer 100. A printed wiring board 2 with high quality is provided. For example, even if the length of each side of the printed wiring board 2 is 50 mm or more, the second resin insulating layer 120 is difficult to peel off from the second conductor layer 30. Even when the length of each side of the printed wiring board 2 is 100 mm or more, cracks caused by the adhesive layer 100 are unlikely to occur in the second resin insulating layer 120. Even when the second conductor layer 30 includes a conductor circuit having a width of 5 μm or less, the second resin insulating layer 120 is unlikely to be peeled off from the second conductor layer 30. Even when the second conductor layer 30 includes a conductor circuit having a width of 3 μm or less, cracks caused by the adhesive layer 100 are unlikely to occur in the second resin insulating layer 120.

[0085] The first layer contains silicon as a specific metal, and when the inorganic particles are glass particles, the first layer and the third inorganic particles 93 on the inner wall surface contain silicon. The first layer and the first inorganic particles 91 on the first surface contain silicon. It is believed that the two are firmly bonded via silicon. The seed layer composed of an alloy containing copper, aluminum and silicon is difficult to peel off from the inner wall surface. The seed layer is difficult to peel off from the first surface. The seed layer is difficult to peel off from the resin insulating layer.

[0086] It is considered that if the first layer contains aluminum and the inorganic particles (first inorganic particles 91, second inorganic particles 92, third inorganic particles 93) 90 contain oxygen, the first layer is firmly bonded to the inorganic particles (inorganic particles containing oxygen such as glass particles) 90. When the first layer contains aluminum and the inorganic particles 90 contain oxygen, the first layer can be formed of copper, aluminum, and impurities.

[0087] [Another Example 1 of Implementation]

[0088] In another embodiment 1, the specific metal is selected from titanium, nickel, chromium, tin, and calcium.

[0089] [Another Example 2 of Implementation Method]

[0090] In another embodiment 2, the first layer 11a, 31a of the seed layer 10a, 30a is formed of copper and a second element. The second element is selected from silicon, aluminum, titanium, nickel, chromium, carbon, oxygen, tin and calcium. The first layer 11a, 31a is formed of an alloy containing copper. The second layer 11b, 31b is formed of copper. The amount of copper forming the second layer 11b, 31b is 99.9at% or more. The amount of copper is preferably 99.95at% or more.

[0091] [Modification of the embodiment]

[0092] Figure 6 A modification example of the embodiment is shown. Figure 6 As shown, a printed wiring board 502 of a modified example has a buildup layer 500 on an insulating layer 4. The buildup layer 500 has a plurality of conductor layers and a plurality of resin insulating layers. The conductor layers and the resin insulating layers are alternately stacked. The buildup layer 500 has five conductor layers and four resin insulating layers. The five conductor layers include a first conductor layer 10, a second conductor layer 30, a third conductor layer 130, a fourth conductor layer 230, and a fifth conductor layer 330. The first conductor layer 10, the second conductor layer 30, and the third conductor layer 130 are the same as those in the embodiment. The fourth conductor layer 230 and the fifth conductor layer 330 have the same structure (seed layer and electroplating layer) as the second conductor layer 30. The fourth conductor layer 230 and the fifth conductor layer 330 are formed by the same method as the second conductor layer 30.

[0093] The four resin insulating layers include a first resin insulating layer 20, a second resin insulating layer 120, a third resin insulating layer 220, and a fourth resin insulating layer 320. The first resin insulating layer 20 and the second resin insulating layer 120 are the same as those in the embodiment. The third resin insulating layer 220 and the fourth resin insulating layer 320 have the same structure (resin and inorganic particles) as the first resin insulating layer 20. The first resin insulating layer 20 and the second resin insulating layer 120, the third resin insulating layer 220, and the fourth resin insulating layer 320 are formed by the same method as the resin insulating layer 20 of the embodiment. The first resin insulating layer 20 and the second resin insulating layer 120, the third resin insulating layer 220, and the fourth resin insulating layer 320 have openings 26, 126, 226, and 326.

[0094] The build-up layer 500 has four via conductors 40, 140, 240, 340. The via conductor 40 is formed in the opening 26 to connect the first conductor layer 10 and the second conductor layer 30. The via conductor 140 is formed in the opening 126 to connect the second conductor layer 30 and the third conductor layer 130. The via conductor 240 is formed in the opening 226 to connect the third conductor layer 130 and the fourth conductor layer 230. The via conductor 340 is formed in the opening 326 to connect the fourth conductor layer 230 and the fifth conductor layer 330. The openings (openings for via conductors) 26, 126, 226, 326 formed in the resin insulating layers 20, 120, 220, 320 are the same, and the openings (openings for via conductors) 26, 126, 226, 326 have the same inner wall surface. Three via conductors 140, 240, and 340 are stacked directly above the via conductor 40. The four via conductors 40, 140, 240, and 340 form a stacked via.

[0095] The printed wiring board 502 of the modified example includes stacked vias formed by five conductor layers 10, 30, 130, 230, 330 and four via conductors 40, 140, 240, 340. As the printed wiring board 502 is used, a large stress is applied to the connection portion between the lowermost via conductor 40 and the first conductor layer 10 such as the pad 14. However, in the modified example, the connection reliability between the via conductor 40 and the first conductor layer 10 is high. The connection resistance through the via conductor 40 is unlikely to increase.

[0096] [Another example of modification]

[0097] The buildup layer 500 has 5 or more conductive layers. The buildup layer 500 preferably has 10 or more conductive layers. The number of conductive layers is 20 or less.

[0098] Each cross-sectional view is obtained by cutting the printed wiring board 2 along a plane perpendicular to the first surface 22. When the cross-sectional view includes a conductor circuit, the side surface of the conductor circuit is perpendicular to the cross-sectional view.

[0099] In this specification, the term "plane" is used to refer to the shape of the inner wall surface 27, the shape of the flat portion 93a, and the shape of the third inorganic particle 93. The meaning of the plane used in these terms is as follows: Figure 1 and Figure 3 That is, in Figure 1 and Figure 3 In FIG. 2 , the inner wall surface 27 is drawn substantially straight. Figure 1 and Figure 3 The shape of the inner wall surface 27 in the cross section is substantially a straight line. The plane in this specification includes a substantial straight line in the cross section. Figure 1 and Figure 3As shown in the cross section of the third inorganic particle 93, in the cross section, cutting with a plane includes cutting with a straight line. The plane in this specification does not mean a complete plane, but includes a substantial plane. The substantial plane may also include small bumps and depressions.

Claims

1. A printed wiring board comprising: a first conductor layer; a resin insulating layer having a first surface, a second surface opposite to the first surface, and an opening from the first surface to the second surface, the resin insulating layer being stacked on the first conductor layer in such a manner that the second surface faces the first conductor layer; a second conductor layer formed on the first surface of the resin insulating layer; as well as a via conductor formed in the opening to connect the first conductor layer and the second conductor layer, in, The resin insulating layer comprises resin and inorganic particles, The inorganic particles include first inorganic particles forming the first surface and second inorganic particles embedded in the resin, The first inorganic particle has a substantially flat exposed portion, The resin has an upper surface forming the first surface, The first surface is formed by the upper surface of the resin and the exposed portions of the first inorganic particles.

2. The printed wiring board according to claim 1, wherein The second inorganic particles are in the shape of spheres, The first inorganic particles are formed from the second inorganic particles.

3. The printed wiring board according to claim 2, wherein The ratio of the volume of the first inorganic particles to the volume of a sphere virtualized based on the first inorganic particles (volume of the first inorganic particles / volume of the sphere virtualized based on the first inorganic particles) is 0.6 or more.

4. The printed wiring board according to claim 3, wherein The ratio is 0.8 or more.

5. The printed wiring board according to claim 1, wherein The upper surface is substantially flat.

6. The printed wiring board according to claim 5, wherein The arithmetic mean roughness (Ra) of the upper surface is less than 0.08 μm.

7. The printed wiring board according to claim 1, wherein A step is formed between the upper surface and the exposed portion.

8. The printed wiring board according to claim 1, wherein The inorganic particles further include third inorganic particles forming the inner wall surface of the opening, The inner wall surface is formed by the third inorganic particles and the resin, The third inorganic particle has a flat portion, The flat portion forms the inner wall surface.

9. The printed wiring board according to claim 8, wherein The flat portion and a surface of the resin forming the inner wall surface form a substantially common surface.

10. The printed wiring board according to claim 8, wherein The second inorganic particles are in the shape of spheres, The shape of the third inorganic particle is obtained by cutting the second inorganic particle along a plane.

11. The printed wiring board according to claim 8, wherein In the process of forming the opening, the inorganic particles are formed to have a protruding portion protruding from the resin forming the inner wall surface of the opening, and the third inorganic particles are formed by removing the protruding portion of the inorganic particles.

12. The printed wiring board according to claim 8, wherein In the process of forming the opening, the inorganic particles having the protruding portion are formed from the second inorganic particles, The inner wall surface of the opening includes an exposed surface of the third inorganic particles formed by removing the protruding portion.

13. The printed wiring board according to claim 8, wherein The inorganic particles contain oxygen element.

14. The printed wiring board according to claim 1, wherein The second conductor layer is formed by a seed layer and an electroplating layer on the seed layer, and the seed layer is composed of a first layer and a second layer on the first layer. The first layer and the second layer are formed by sputtering. The first layer is composed of an alloy containing copper and aluminum, The second layer is formed of copper.

15. The printed wiring board according to claim 14, wherein The alloy also contains silicon.

16. The printed wiring board according to claim 1, wherein The printed wiring board further includes an adhesive layer formed on the second conductor layer.

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