Display device

Abstract

The display device includes a display panel and an input sensor including a plurality of conductive patterns. The conductive pattern includes a first sensing electrode including a first sensing pattern and a bridge pattern, a second sensing electrode spaced apart from the first sensing electrode, and dummy patterns each overlapping the second sensing electrode and the first sensing pattern adjacent to the second sensing electrode in the first direction. Each of the bridge patterns is connected to the two first sensing patterns through the first contact holes. When a region in which each of the plurality of dummy patterns overlaps with each of the corresponding first sensing patterns and second sensing electrodes is defined as an overlapping region, the first sensing electrode and the second sensing electrode overlap each other. A dummy hole passing through a conductive pattern disposed on an upper portion among the corresponding first sensing pattern, second sensing electrode, and dummy pattern in a thickness direction is defined in the overlapping region. Each of the bridge patterns is disposed between the two dummy patterns in the second direction. The distance between the two dummy patterns and the bridge pattern disposed therebetween in the second direction is uniform.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to Korean Patent Application No. 10-2023-0105707, filed on August 11, 2023, which is hereby incorporated by reference in its entirety. Technical Field

[0003] The present disclosure relates to a display device. Background Art

[0004] Multimedia devices such as televisions, mobile phones, tablet computers, navigation systems, and game consoles include display devices that display images to users through display screens. The display device may include a display panel that generates images and an input sensor that detects a user's touch.

[0005] The input sensor may be disposed on the display panel and may include a conductor that detects an external input. The conductor may affect the emission efficiency of the display device or may affect the reflectivity of external light incident to the display device. Summary of the invention

[0006] The present disclosure provides a display device with improved visibility.

[0007] The display device of the embodiment includes: a display panel having a plurality of light-emitting areas; and an input sensor disposed on the display panel and including a plurality of conductive patterns, wherein the plurality of conductive patterns include: a first sensing electrode, the first sensing electrode including a plurality of bridge patterns and a plurality of first sensing patterns provided along a first direction, the plurality of bridge patterns connecting adjacent first sensing patterns among the plurality of first sensing patterns; a second sensing electrode spaced apart from the first sensing electrode and including a plurality of second sensing patterns extending along a second direction intersecting the first direction; and a plurality of dummy patterns, each of which is connected on a plane to the second sensing electrode and a first sensing pattern adjacent to the second sensing electrode among the plurality of first sensing patterns in the first direction. The patterns overlap, each of the multiple bridge patterns is connected to two first sensing patterns among the multiple first sensing patterns through a first contact hole, when the area in which each of the multiple dummy patterns overlaps with each of the corresponding first sensing patterns and the second sensing electrodes is defined as an overlapping area, a dummy hole that passes through the corresponding first sensing pattern, the second sensing electrode and the conductive pattern arranged on the upper part among the multiple dummy patterns in the thickness direction is defined in the overlapping area, each of the multiple bridge patterns is arranged between two dummy patterns among the multiple dummy patterns in the second direction, and in the second direction, the distance between the two dummy patterns and the bridge pattern arranged between the two dummy patterns is uniform.

[0008] In an embodiment, the dummy hole may include: a first dummy hole defined in a region where each of the plurality of dummy patterns overlaps with the second sensing electrode; and / or a second dummy hole defined in a region where each of the plurality of dummy patterns overlaps with the corresponding first sensing pattern.

[0009] In an embodiment, each of the plurality of dummy patterns may be connected to any one of the corresponding first sensing patterns and the second sensing electrodes that does not overlap the dummy hole through the second contact hole.

[0010] In an embodiment, the plurality of conductive patterns may further include at least one additional dummy pattern overlapping any one of the corresponding first sensing patterns and the second sensing electrodes and not overlapping another one of the corresponding first sensing patterns and the second sensing electrodes.

[0011] In an embodiment, when a region in which an additional dummy pattern overlaps with any one of the corresponding first sensing pattern and the second sensing electrode is defined as an additional overlapping region, an additional dummy hole that passes through the corresponding first sensing pattern, the second sensing electrode, and the conductive pattern disposed at the upper portion of the additional dummy pattern in the thickness direction may be defined in the additional overlapping region.

[0012] In an embodiment, the first contact holes, the dummy holes, and the additional dummy holes may be arranged at regular intervals in the first direction and the second direction.

[0013] In an embodiment, the additional dummy pattern may be electrically connected to any one of the corresponding first sensing patterns and the second sensing electrodes overlapping the additional dummy pattern through the third contact hole.

[0014] In an embodiment, a distance between two dummy patterns adjacent to each other in the first direction among the plurality of dummy patterns may be substantially the same as a distance between any one bridge pattern among the plurality of bridge patterns and an additional dummy pattern adjacent to the bridge pattern in the first direction.

[0015] In an embodiment, a plurality of bridge patterns may include a first bridge pattern connecting corresponding 1-1st sensing patterns and 1-2nd sensing patterns among a plurality of first sensing patterns to each other, and the first bridge pattern may include: a 1-1st bridge pattern connecting the 1-1st sensing pattern to the 1-2nd sensing pattern; and a 1-2nd bridge pattern spaced apart from the 1-1st bridge pattern along the second direction and connecting the 1-1st sensing pattern to the 1-2nd sensing pattern.

[0016] In an embodiment, the plurality of dummy patterns may include a first dummy pattern disposed between a 1-1 bridge pattern and a 1-2 bridge pattern in the second direction, and a distance between the 1-1 bridge pattern and the first dummy pattern in the second direction may be substantially the same as a distance between the 1-2 bridge pattern and the first dummy pattern in the second direction.

[0017] In an embodiment, a boundary portion may be defined between the first sensing electrode and the second sensing electrode, and a portion of each of the plurality of dummy patterns may overlap the boundary portion.

[0018] In an embodiment, a length of each of the plurality of bridge patterns in the first direction may be substantially the same as a length of each of the plurality of dummy patterns in the first direction.

[0019] In an embodiment, a first length of each of the plurality of bridge patterns in the first direction may be greater than a second length of each of the plurality of dummy patterns in the first direction.

[0020] In an embodiment, when an area in which each of a plurality of bridge patterns overlaps with each of the above-mentioned two first sensing patterns is defined as a bridge overlap area, a bridge dummy hole that passes through the two first sensing patterns and a conductive pattern arranged on the upper portion among the plurality of bridge patterns in a thickness direction may be defined in the bridge overlap area.

[0021] In embodiments, the input sensor may further include a sensing insulating layer disposed between the plurality of bridge patterns and the first sensing pattern, and the first contact hole may pass through the sensing insulating layer.

[0022] In an embodiment, the input sensor may further include a sensing insulating layer disposed between the plurality of bridge patterns and the first sensing pattern, and the dummy hole may expose an upper surface of the sensing insulating layer.

[0023] In an embodiment, each of the plurality of first sensing patterns and the plurality of second sensing patterns may include a plurality of grid lines defining a plurality of openings respectively overlapping with the plurality of light-emitting regions, the plurality of grid lines may include: a first grid line having a first width in the second direction; and a second grid line having a second width greater than the first width in the second direction, and each of the first contact hole and the dummy hole may overlap with the second grid line.

[0024] In an embodiment, the plurality of light-emitting areas may include: a first light-emitting area configured to emit a first color light; a second light-emitting area configured to emit a second color light different from the first color light; and a third light-emitting area configured to emit a third color light different from the first color light and the second color light, the first light-emitting areas and the second light-emitting areas may be alternately arranged along the second direction, the third light-emitting area may be arranged along the first direction separated from the first light-emitting area and the second light-emitting area, and each of the first contact hole and the dummy hole may overlap with the third light-emitting area in the second direction.

[0025] The display device of the embodiment includes: a display panel including a plurality of light-emitting areas; and an input sensor disposed on the display panel and including a plurality of conductive patterns. The plurality of conductive patterns include: a first sensing electrode including a plurality of bridge patterns and a plurality of first sensing patterns provided along a first direction, the plurality of bridge patterns connecting adjacent first sensing patterns among the plurality of first sensing patterns; a second sensing electrode spaced apart from the first sensing electrode and including a plurality of second sensing patterns extending along a second direction intersecting the first direction; a plurality of dummy patterns each overlapping the second sensing electrode and a first sensing pattern adjacent to the second sensing electrode in the first direction among the plurality of first sensing patterns on a plane; and an additional dummy pattern overlapping the first sensing pattern or the second sensing electrode. Each of the plurality of bridge patterns is connected to two first sensing patterns among the plurality of first sensing patterns through a first contact hole. When the region in which each of the plurality of dummy patterns overlaps with each of the corresponding first sensing patterns and the second sensing electrodes is defined as an overlapping region, a first hole recessed in the thickness direction and passing through the corresponding first sensing pattern, the second sensing electrode, and the conductive pattern disposed at the upper portion among the plurality of dummy patterns is defined in the overlapping region. The first sensing pattern or the second sensing electrode includes a second hole overlapping the additional dummy pattern. The first contact hole, the first hole, and the second hole are arranged at regular intervals in the first direction and the second direction.

[0026] The display device of the embodiment includes: a display panel including a plurality of light-emitting areas; and an input sensor disposed on the display panel and including a plurality of conductive patterns. The plurality of conductive patterns include: a first sensing electrode having a first bridge pattern and a 1-1 sensing pattern and a 1-2 sensing pattern provided along a first direction, the first bridge pattern connecting the 1-1 sensing pattern to the 1-2 sensing pattern; a second sensing electrode spaced apart from the first sensing electrode and having a connection pattern and a 2-1 sensing pattern and a 2-2 sensing pattern provided along a second direction crossing the first direction, the connection pattern having an integral shape with each of the 2-1 sensing pattern and the 2-2 sensing pattern; and a first dummy pattern overlapping each of the 1-1 sensing pattern and the connection pattern on a plane. The first bridge pattern is connected to each of the 1-1st sensing pattern and the 1-2nd sensing pattern through a first contact hole, and when an area in which the first dummy pattern overlaps with each of the 1-1st sensing pattern and the connecting pattern is defined as an overlapping area, the overlapping area includes a dummy hole of a conductive pattern arranged on an upper portion that passes through the 1-1st sensing pattern, the connecting pattern, and the first dummy pattern in a thickness direction. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] The accompanying drawings are included to provide a further understanding of the inventive concept and are incorporated into and constitute a part of this specification. The accompanying drawings illustrate embodiments of the inventive concept and together with the description are used to explain the principles of the inventive concept. In the accompanying drawings:

[0028] Figure 1 is a perspective view of a display device according to an embodiment of the inventive concept;

[0029] Figure 2 is a cross-sectional view of a display device according to an embodiment of the inventive concept;

[0030] Figure 3 is a plan view of a display panel according to an embodiment of the inventive concept;

[0031] Figure 4A , Figure 4B and Figure 4C Each is an enlarged plan view of a display area according to an embodiment of the inventive concept;

[0032] Figure 5 is a cross-sectional view of a display device according to an embodiment of the inventive concept;

[0033] Fig. 6A is a plan view of an input sensor according to an embodiment of the inventive concept;

[0034] Figure 6B and Figure 6Care plan views each showing a partial configuration of an input sensor according to an embodiment of the inventive concept;

[0035] Figure 7 is an enlarged plan view showing a portion of an input sensor according to an embodiment of the inventive concept;

[0036] Fig. 8A , Figure 8B and Figure 8C are cross-sectional views each showing a portion of an input sensor according to an embodiment of the inventive concept;

[0037] Fig.9A , Fig. 9B and Fig. 9C are cross-sectional views each showing a portion of an input sensor according to an embodiment of the inventive concept;

[0038] Fig. 10A and Fig. 10B are cross-sectional views each showing a portion of an input sensor according to an embodiment of the inventive concept;

[0039] Fig.11 is an enlarged plan view showing a portion of an input sensor according to an embodiment of the inventive concept; and

[0040] Fig.12 is a cross-sectional view illustrating a portion of an input sensor according to an embodiment of the inventive concept. DETAILED DESCRIPTION

[0041] In this specification, it will be understood that when an element (or region, layer, part, etc.) is referred to as being "on", "connected to" or "coupled to" another element, the element can be directly set on, directly connected to or coupled to the other element, or an intervening element can be set between the element and the other element.

[0042] When an element (layer, film, region, substrate, etc.) is referred to as being "directly disposed" on another element, there is no intervening layer, film, region, or substrate between the element and the other element. For example, "directly disposed" may refer to a configuration without using an additional member such as an adhesive member between two layers or members.

[0043] The same reference numerals or symbols always refer to the same elements. In the accompanying drawings, the thickness, proportions and sizes of the elements are exaggerated for the effective description of the technical content. As used herein, the word "or" means a logical "or", so that the expression "A, B or C" means "A and B and C", "A and B but without C", "A and C but without B", "B and C but without A", "A but without B and without C", "B but without A and without C", and "C but without A and without B", unless the context indicates otherwise.

[0044] It will be understood that although the terms "first", "second", etc. can be used to describe various elements, components, areas, layers or parts in this article, these elements, components, areas, layers or parts should not be limited by these terms. These terms are only used to distinguish an element, component, area, layer or part from another element, component, area, layer or part. Therefore, the first element, component, area, layer or part discussed below can be referred to as the second element, component, area, layer or part without departing from the scope of the present invention. Similarly, the second element, component, area, layer or part can be referred to as the first element, component, area, layer or part. As used in this article, the singular form "one" and "the (said)" are intended to also include plural forms, unless the context clearly indicates otherwise.

[0045] In addition, terms such as "below", "lower", "above" or "upper" may be used to describe the relationship of elements shown in the drawings. These terms have relative concepts and are described based on the directions indicated in the drawings.

[0046] It will be further understood that when used in this specification, the terms "includes," "comprising," and "having" (and their variations (e.g., "containing")) indicate the presence of stated features, integers, steps, operations, elements, parts, or groups thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, parts, or groups thereof.

[0047] Unless otherwise defined, all terms (including technical and scientific terms) used in this article have the same meaning as those commonly understood by ordinary technicians in the field to which the present invention belongs. It will be further understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant field, and will not be interpreted in an idealized or overly formal sense unless explicitly defined in this article.

[0048] Hereinafter, embodiments of the inventive concept are described with reference to the accompanying drawings.

[0049] Figure 1 is a perspective view of a display device DD according to an embodiment of the inventive concept. Figure 1As shown in , the display device DD may display an image through the display surface DD-IS. On a plane, the display surface DD-IS may have a rectangular shape having a long side extending in a first direction DR1 and a short side extending in a second direction DR2 crossing the first direction DR1. However, embodiments of the inventive concept are not limited thereto, and the display surface DD-IS may have various shapes such as a circle or other polygons.

[0050] The third direction DR3 is defined as a direction substantially perpendicular to a plane defined by the first direction DR1 and the second direction DR2. The front surface (or upper surface) and the rear surface (or lower surface) of each of the members constituting the display device DD are substantially opposite to each other in the third direction DR3, and the normal direction of each of the front surface and the rear surface is substantially parallel to the third direction DR3. The distance between the front surface and the rear surface defined based on the third direction DR3 corresponds to the thickness of the member.

[0051] "On a plane" is defined as a state of viewing from a third direction DR3. That is, "on a plane" can be described based on a plane defined by the first direction DR1 and the second direction DR2. In this specification, "on a cross section" can be defined as a state of viewing from the first direction DR1 or the second direction DR2.

[0052] According to an embodiment of the present invention, a display device DD having a flat display surface DD-IS is shown, but the embodiments of the present invention are not limited thereto. The display device DD may include an arc-shaped display surface or a three-dimensional display surface. The three-dimensional display surface may include a plurality of display areas indicating different directions (for example, a bent display surface may be included). The display device DD according to this embodiment may be a flexible display device DD. The flexible display device DD may be a foldable display device that can be folded.

[0053] exist Figure 1 , a display device DD suitable for a tablet computer is exemplarily shown. A camera module, a power module, an electronic module mounted on a mainboard, etc. may be provided in a bracket / housing, etc. together with the display device DD, thereby constituting a tablet computer. The display device DD according to an embodiment of the inventive concept may be applied not only to large electronic devices such as televisions and monitors, but also to small and medium-sized electronic devices such as mobile phones, car navigation systems, game consoles, and smart watches.

[0054] The display surface DD-IS includes an image area DD-DA in which an image is displayed and a bezel area DD-NDA adjacent to the image area DD-DA. The bezel area DD-NDA is an area in which no image is displayed. Figure 1 An icon image is shown as an example of the image.

[0055] like Figure 1 As shown in , the image area DD-DA may have a substantially quadrilateral shape. "Substantially quadrilateral shape" includes not only a quadrilateral shape in a mathematical sense but also a quadrilateral shape in which an arc-shaped boundary is defined in a vertex area (or a corner area) instead of a vertex.

[0056] The border area DD-NDA may surround the image area DD-DA. However, embodiments of the inventive concept are not limited thereto, and the shape of the border area DD-NDA may be changed. For example, the border area DD-NDA may be provided only on one side of the image area DD-DA.

[0057] Figure 2 is a cross-sectional view of a display device DD according to an embodiment of the inventive concept.

[0058] The display device DD may include a display module DM and a window WM disposed on the display module DM. The display module DM and the window WM may be bonded to each other by an adhesive layer PSA. According to an embodiment of the inventive concept, the window WM may be formed by a coating process, the window WM may be in contact with the display module DM, and the adhesive layer PSA may be omitted.

[0059] The display module DM may include a display panel 100, an input sensor 200, and an anti-reflection layer 300. The display panel 100 may include a base layer 110, a driving element layer 120, a light emitting element layer 130, and an encapsulation layer 140.

[0060] The driving element layer 120 is disposed on the upper surface of the base layer 110. The base layer 110 may be a flexible substrate that can be bent, folded, curled, etc. The base layer 110 may be a glass substrate, a metal substrate, or a polymer substrate. However, the embodiments of the present inventive concept are not limited thereto, and the base layer 110 may be an inorganic layer, an organic layer, or a composite material layer. Basically, the base layer 110 has the same shape as that of the display panel 100.

[0061] The base layer 110 may have a multilayer structure. For example, the base layer 110 may include a first synthetic resin layer, a second synthetic resin layer, and an inorganic layer disposed between the first synthetic resin layer and the second synthetic resin layer. Each of the first synthetic resin layer and the second synthetic resin layer may include a polyimide-based resin, and embodiments of the inventive concept are not particularly limited thereto.

[0062] The driving element layer 120 may be disposed on the base layer 110. The driving element layer 120 may include a plurality of insulating layers, a plurality of semiconductor patterns, a plurality of conductive patterns, and signal lines. The driving element layer 120 may include a pixel driving circuit of a pixel.

[0063] The light emitting element layer 130 may be disposed on the driving element layer 120. The light emitting element layer 130 may include a light emitting element. For example, the light emitting element may include an organic light emitting material, an inorganic light emitting material, an organic-inorganic light emitting material, a quantum dot, a quantum rod, a micro-LED or a nano-LED.

[0064] The encapsulation layer 140 may be disposed on the light emitting element layer 130. The encapsulation layer 140 may protect the light emitting element layer 130 (i.e., the light emitting element) from moisture, oxygen, and foreign matter such as dust particles. The encapsulation layer 140 may include at least one inorganic encapsulation layer and at least one organic encapsulation layer. The encapsulation layer 140 may include a stacked structure of a first inorganic encapsulation layer / organic encapsulation layer / a second inorganic encapsulation layer.

[0065] The input sensor 200 may be directly disposed on the display panel 100. The input sensor 200 may detect the user's input, for example, in an electromagnetic or capacitive manner. The display panel 100 and the input sensor 200 may be formed by a continuous process. In this context, "directly disposed" may mean that there is no intermediate component disposed between the input sensor 200 and the display panel 100. For example, there may be no additional adhesive layer disposed between the input sensor 200 and the display panel 100.

[0066] The anti-reflection layer 300 reduces the reflectivity of external light incident from above the window WM. The anti-reflection layer 300 according to the embodiment of the present invention may include a retarder and a polarizer. The retarder may be a film type or a liquid crystal coating type, and may include a λ / 2 retarder or a λ / 4 retarder. The polarizer may also be a film type or a liquid crystal coating type. The film type may include a stretchable synthetic resin film, and the liquid crystal coating type may include liquid crystals arranged in a predetermined arrangement. The retarder and the polarizer may further include a protective film. The retarder and the polarizer themselves or the protective film may be defined as the base layer of the anti-reflection layer 300.

[0067] The anti-reflection layer 300 according to an embodiment of the present inventive concept may include a color filter. The color filter has a predetermined arrangement. The arrangement of the color filter may be determined in consideration of the emission color of the pixel included in the display panel 100. The anti-reflection layer 300 may further include a black matrix adjacent to the color filter. The anti-reflection layer 300 including the color filter may be directly disposed on the display panel 100.

[0068] The window WM according to an embodiment of the inventive concept may include a base layer and a light blocking pattern. The base layer may include a glass substrate, a synthetic resin film, etc. The light blocking pattern partially overlaps the base layer. The light blocking pattern may be disposed on a rear surface of the base layer, and the light blocking pattern may substantially define a border area DD-NDA (see FIG. Figure 1The area where the light blocking pattern is not provided may define an image area DD-DA of the display device DD (see Figure 1 ).

[0069] Figure 3 is a plan view of a display panel 100 according to an embodiment of the inventive concept.

[0070] refer to Figure 3 The display panel 100 may include a plurality of pixels PX, a scan drive circuit SDV, an emission drive circuit EDV, a plurality of signal lines, and a plurality of pads PD1. The plurality of pixels PX are arranged in the display area 100-DA. The driving chip DIC mounted on the non-display area 100-NDA may include a data driving circuit. The display area 100-DA may be connected to Figure 1 The image area DD-DA corresponds to the image area DD-DA, and the non-display area 100-NDA can correspond to Figure 1 In the present specification, “a region or a portion corresponds to another region or a portion” means that the region or a portion overlaps with the other region or a portion, and is not necessarily limited to two different regions or portions having the same area. According to an embodiment of the present inventive concept, like the scan driving circuit SDV and the emission driving circuit EDV, the data driving circuit can also be integrated into the display panel 100.

[0071] The plurality of signal lines may include a plurality of scan lines SCL1 to SCLm, a plurality of data lines DL1 to DLn, a plurality of emission lines EL1 to ELm, first and second control lines SL-C1 and SL-C2, and first and second power lines PL1 and PL2. m and n are natural numbers of at least 2.

[0072] The scan lines SCL1 to SCLm may extend in the first direction DR1 to be electrically connected to the pixels PX and the scan driving circuit SDV. The data lines DL1 to DLn may extend in the second direction DR2 to be electrically connected to the pixels PX and the driving chip DIC. The emission lines EL1 to ELm may extend in the first direction DR1 to be electrically connected to the pixels PX and the emission driving circuit EDV.

[0073] The first power line PL1 receives a first power voltage, and the second power line PL2 receives a second power voltage having a level lower than that of the first power voltage. Although not shown in the drawings, a second electrode (eg, cathode) of the light emitting element is connected to the second power line PL2.

[0074] The first control line SL-C1 may be connected to the scan driving circuit SDV and may extend toward the lower end of the display panel 100. The second control line SL-C2 may be connected to the emission driving circuit EDV and may extend toward the lower end of the display panel 100. The pad PD1 may be disposed in the non-display area 100-NDA near the lower end of the display panel 100 and may be closer to the lower end of the display panel 100 than the driving chip DIC. The pad PD1 may be connected to the driving chip DIC and some of the signal lines.

[0075] The scan driving circuit SDV may generate a plurality of scan signals, and the scan signals may be applied to the pixels PX through the scan lines SCL1 to SCLm. The driving chip DIC may generate a plurality of data voltages, and the data voltages may be applied to the pixels PX through the data lines DL1 to DLn. The emission driving circuit EDV may generate a plurality of emission signals, and the emission signals may be applied to the pixels PX through the emission lines EL1 to ELm. The pixels PX may receive the data voltages in response to the scan signals. In response to the emission signals, the pixels PX may emit light of brightness corresponding to the data voltages to display an image.

[0076] FIG. 4A to FIG. 4C Each is an enlarged plan view of a display area 100 -DA according to an embodiment of the inventive concept.

[0077] refer to Figure 4A , the display area 100-DA may include a plurality of light emitting areas LA1, LA2, and LA3 and a non-light emitting area NLA adjacent to the plurality of light emitting areas LA1, LA2, and LA3. The non-light emitting area NLA sets a boundary of the light emitting areas LA1, LA2, and LA3.

[0078] The light emitting areas LA1, LA2 and LA3 may be arranged to correspond to Figure 3 The pixels PX in FIG. 1 correspond to the pixels PX in FIG. 1 . The pixels PX may each include a light emitting element, and the light emitting areas LA1, LA2, and LA3 may be areas that emit light formed in the light emitting element. Figure 5 The arrangement relationship of the light emitting areas LA1, LA2, and LA3 and the non-light emitting area NLA is described.

[0079] The light-emitting areas LA1, LA2, and LA3 may include a first light-emitting area LA1 (or a first color light-emitting area) forming a first color light, a second light-emitting area LA2 (or a second color light-emitting area) forming a second color light, and a third light-emitting area LA3 (or a third color light-emitting area) forming a third color light. In this embodiment, the first color light may be red light, the second color light may be green light, and the third color light may be blue light.

[0080] The first, second, and third light emitting areas LA1, LA2, and LA3 may have different areas, but the embodiments of the inventive concept are not limited thereto. In this embodiment, the area of ​​the first light emitting area LA1 may be the smallest, and the area of ​​the third light emitting area LA3 may be the largest.

[0081] The first light emitting area LA1, the second light emitting area LA2 and the third light emitting area LA3 may define a unit light emitting area UA. The unit light emitting area UA is a repeated arrangement unit of light emitting areas disposed in the display area 100-DA. In this embodiment, the unit light emitting area UA may include a first unit light emitting area UA1 and a second unit light emitting area UA2.

[0082] In each of the first unit light emitting area UA1 and the second unit light emitting area UA2, the first light emitting area LA1 and the second light emitting area LA2 are disposed at one side of the third light emitting area LA3 in the first direction DR1 (at Figure 4A In each of the first unit light emitting area UA1 and the second unit light emitting area UA2, the second light emitting area LA2 is disposed at one side of the first light emitting area LA1 in the second direction DR2 (at Figure 4A In the example, it is arranged at the lower side of the first light emitting area LA1).

[0083] The first unit light-emitting area UA1 and the second unit light-emitting area UA2 have a third light-emitting area LA3 with different positions relative to the first light-emitting area LA1 and the second light-emitting area LA2 in the second direction DR2. With reference to the first unit light-emitting area UA1, the third light-emitting area LA3 is relatively disposed at the lower side in the second direction DR2 relative to the positions of the first light-emitting area LA1 and the second light-emitting area LA2. With reference to the second unit light-emitting area UA2, the third light-emitting area LA3 is relatively disposed at the upper side in the second direction DR2 relative to the positions of the first light-emitting area LA1 and the second light-emitting area LA2. The first unit light-emitting area UA1 and the second unit light-emitting area UA2 may have the third light-emitting area LA3 with different degrees of offset relative to the first light-emitting area LA1 and the second light-emitting area LA2 in the second direction DR2. In this embodiment, in the second unit light-emitting area UA2, the third light-emitting area LA3 may be relatively more offset. However, embodiments of the inventive concept are not limited thereto, and the first unit light-emitting area UA1 and the second unit light-emitting area UA2 may have the third light-emitting area LA3 with the same degree of offset relative to the first light-emitting area LA1 and the second light-emitting area LA2 in the second direction DR2.

[0084] In the pixel row PXR, the first unit light-emitting area UA1 and the second unit light-emitting area UA2 may be alternately arranged along the first direction DR1. In the pixel column PXC, the first unit light-emitting area UA1 and the second unit light-emitting area UA2 may be alternately arranged along the second direction DR2. Due to such arrangement of the first unit light-emitting area UA1 and the second unit light-emitting area UA2, the third light-emitting area LA3 of the first unit light-emitting area UA1 and the third light-emitting area LA3 of the second unit light-emitting area UA2 are arranged according to a predetermined rule. Two adjacent third light-emitting areas LA3 of the first unit light-emitting area UA1 and the second unit light-emitting area UA2, which are spaced apart from each other by a first distance DT1, are arranged relatively close to each other. The third light-emitting area LA3 of the first unit light-emitting area UA1 and the third light-emitting area LA3 of the second unit light-emitting area UA2, which are spaced apart from each other by the first distance DT1, define a light-emitting area pair UP. In each of the pixel columns PXC, the light-emitting area pairs UP are spaced apart from each other by a second distance DT2. The second distance DT2 is greater than the first distance DT1.

[0085] The reason for forming the light-emitting area pair UP is because of the mask used during deposition. The light-emitting element disposed in the third light-emitting area LA3 of the first unit light-emitting area UA1 and the light-emitting element disposed in the third light-emitting area LA3 of the second unit light-emitting area UA2 include a light-emitting layer in the form of an integral body. That is, the light-emitting layer disposed in the third light-emitting area LA3 of the first unit light-emitting area UA1 and the light-emitting layer disposed in the third light-emitting area LA3 of the second unit light-emitting area UA2 have an integral form and are deposited using one mask. The openings corresponding to the light-emitting area pair UP are defined in the mask. The area between the openings of the mask corresponds to the blocking area. Since the openings are defined to correspond to the light-emitting area pair UP, the number of openings can be reduced, and therefore the width of the blocking area disposed between the openings in the second direction DR2 of the mask can be ensured. By ensuring the width of the blocking area of ​​the mask in the second direction DR2, the occurrence of the defect of the mask sagging during deposition can be suppressed.

[0086] This can be done with Figure 4B The third distance DT3 between the third light emitting areas LA3 shown in FIG. Figure 4B , one type of unit light emitting area UA is set in the display area 100-DA. The third distance DT3 between the third light emitting areas LA3 of adjacent unit light emitting areas UA in the pixel column PXC is less than Figure 4A The second distance DT2 in is used to form Figure 4B The mask for forming the third light emitting area LA3 has a greater number of openings, and thus the width of the blocking area of ​​the mask is relatively reduced. This is because Figure 4B In the mask of the light emitting layer in the third light emitting area LA3 shown in FIG. 1 , openings are defined to respectively correspond to the third light emitting areas LA3 .

[0087] At the same time, Figure 4A and Figure 4B In each of the first and second light emitting areas LA1 and LA2, the pixel columns alternately disposed along the second direction DR2 may be referred to as first unit pixel columns PXC-1. The pixel columns disposed along the second direction DR2 of the third light emitting area LA3 may be referred to as second unit pixel columns PXC-2.

[0088] refer to Figure 4C , one type of unit light emitting area UA0 is arranged in the display area 100-DA. The unit light emitting area UA0 includes a second light emitting area LA2 spaced apart from each other in the first direction DR1 and a first light emitting area LA1 and a third light emitting area LA3 spaced apart from each other in the second direction DR2. The four light emitting areas LA1, LA2 and LA3 of the unit light emitting area UA0 are arranged in a rhombus shape. The unit light emitting areas UA0 in the pixel row PXR are arranged along the first direction DR1. The unit light emitting areas UA0 in the adjacent pixel rows PXR may be arranged in a staggered manner along the first direction DR1. The unit light emitting areas UA0 in the adjacent pixel columns PXC may be arranged in a staggered manner along the second direction DR2.

[0089] Figure 5 is a cross-sectional view of a display device DD according to an embodiment of the inventive concept. Figure 5 It is along Figure 4A A cross-sectional view of the display device DD taken along line II'. Figure 5 In the example, some components of the display device DD (e.g. Figure 2 The anti-reflection layer 300, the adhesive layer PSA and the window WM) are not shown.

[0090] The pixel driving circuit driving the light emitting element LD may include a plurality of pixel driving elements. The pixel driving circuit may include a plurality of transistors S-TFT and O-TFT and a capacitor Cst. As an example of a transistor, Figure 5 A silicon transistor S-TFT and an oxide transistor O-TFT are shown. Figure 5 The pixel driving circuit in is only an example, and the configuration of the pixel driving circuit is not necessarily limited thereto. The pixel driving circuit may also include only one type of transistor among the silicon transistor S-TFT and the oxide transistor O-TFT.

[0091] refer to Figure 5 , the base layer 110 is shown as a single layer. The base layer 110 may include a synthetic resin such as polyimide. The base layer 110 may be formed by coating a synthetic resin layer on an operating substrate (or a carrier substrate). When the display module DM (see Figure 2), the operating substrate may be removed. According to an embodiment of the inventive concept, the base layer 110 may have a multilayer structure including a first synthetic resin layer, a second synthetic resin layer, and at least one inorganic layer.

[0092] refer to Figure 5 , the barrier layer 10br may be disposed on the base layer 110. The barrier layer 10br prevents foreign matter from entering from the outside. The barrier layer 10br may include at least one inorganic layer. The barrier layer 10br may include a silicon oxide layer and / or a silicon nitride layer. Each of these layers may be provided in plural, and the silicon oxide layer and the silicon nitride layer may be alternately stacked.

[0093] The barrier layer 10br may include a lower barrier layer 10br1 and an upper barrier layer 10br2. The first shielding electrode BMLa may be disposed between the lower barrier layer 10br1 and the upper barrier layer 10br2. The first shielding electrode BMLa may be disposed to correspond to the silicon transistor S-TFT. The first shielding electrode BMLa may include a metal such as molybdenum.

[0094] The first shielding electrode BMLa may receive a bias voltage. The first shielding electrode BMLa may also receive a first power supply voltage. The first shielding electrode BMLa may prevent a potential caused by polarization from affecting the silicon transistor S-TFT. The first shielding electrode BMLa may prevent external light from reaching the silicon transistor S-TFT. According to an embodiment of the present inventive concept, the first shielding electrode BMLa may be a floating electrode in a form isolated from another electrode or line.

[0095] The buffer layer 10bf may be disposed on the barrier layer 10br. The buffer layer 10bf may prevent metal atoms or impurities from diffusing from the base layer 110 to the first semiconductor pattern SC1 thereover. The buffer layer 10bf may include at least one inorganic layer. The buffer layer 10bf may include a silicon oxide layer and / or a silicon nitride layer.

[0096] The first semiconductor pattern SC1 may be disposed on the buffer layer 10bf. The first semiconductor pattern SC1 may include a silicon semiconductor. For example, the silicon semiconductor may include amorphous silicon, polycrystalline silicon, etc. For example, the first semiconductor pattern SC1 may include low temperature polycrystalline silicon.

[0097] The electrical characteristics of the first semiconductor pattern SC1 may vary depending on whether it is doped. The first semiconductor pattern SC1 may include a first region having high conductivity and a second region having low conductivity. The first region may be doped with an N-type dopant or a P-type dopant. The second region may be a non-doped region or a doped region doped at a concentration lower than that of the first region. The source region SR1, the channel region AC1 (or active region), and the drain region DE1 of the silicon transistor S-TFT may be formed by the first semiconductor pattern SC1. In cross section, the source region SR1 and the drain region DE1 may extend in opposite directions from the channel region AC1.

[0098] The first insulating layer 10 may be disposed on the buffer layer 10bf. The first insulating layer 10 may cover the first semiconductor pattern SC1. The first insulating layer 10 may be an inorganic layer. The first insulating layer 10 may be a single-layer silicon oxide layer. Not only the first insulating layer 10 but also other inorganic layers of the driving element layer 120 to be described later may have a single-layer or multi-layer structure and may include at least one of the above-mentioned material layers, but the embodiments of the inventive concept are not limited thereto.

[0099] The gate GT1 of the silicon transistor S-TFT is disposed on the first insulating layer 10. The gate GT1 may be a part of the metal pattern. The gate GT1 overlaps the channel region AC1. The gate GT1 may be a mask in the doping process of the first semiconductor pattern SC1. The first electrode CE10 of the capacitor Cst is disposed on the first insulating layer 10. Figure 5 Different from that shown in FIG. 1 , the first electrode CE10 may have an integral shape with the gate electrode GT1 .

[0100] The second insulating layer 20 may be disposed on the first insulating layer 10 and may cover the gate electrode GT1 and the first electrode CE10. According to an embodiment of the inventive concept, an upper electrode overlapping the gate electrode GT1 may be further disposed on the second insulating layer 20. A second electrode CE20 overlapping the first electrode CE10 may be disposed on the second insulating layer 20. In plane, the upper electrode may also have an integral shape with the second electrode CE20.

[0101] The second shielding electrode BMLb is disposed on the second insulating layer 20. The second shielding electrode BMLb may be disposed to correspond to the oxide transistor O-TFT. According to an embodiment of the inventive concept, the second shielding electrode BMLb may also be omitted. According to an embodiment of the inventive concept, the first shielding electrode BMLa may extend to the lower portion of the oxide transistor O-TFT to replace the second shielding electrode BMLb.

[0102] The third insulating layer 30 may be disposed on the second insulating layer 20 and may cover the second shielding electrode BMLb and the second electrode CE20. The second semiconductor pattern SC2 may be disposed on the third insulating layer 30. The second semiconductor pattern SC2 may include a source region SR2, a channel region AC2 (or an active region), and a drain region DE2 of the oxide transistor O-TFT. The second semiconductor pattern SC2 may include a metal oxide semiconductor. The second semiconductor pattern SC2 may include a semiconductor material such as indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), zinc oxide (ZnO x ), indium oxide (In 2 O 3 ) or transparent conductive oxides (TCOs) of indium zinc tin oxide (IZTO).

[0103] The metal oxide semiconductor may include a plurality of regions divided according to whether the transparent conductive oxide is reduced or not. The region where the transparent conductive oxide is reduced (hereinafter, the reduction region) has a higher conductivity than the region where the transparent conductive oxide is not reduced (hereinafter, the non-reduction region). The reduction region is basically used as a source (or source region) / drain (or drain region) or a signal line of a transistor. The non-reduction region basically corresponds to an active region (or channel region) of the transistor. The fourth insulating layer 40 may be disposed on the third insulating layer 30. As shown in FIG. Figure 5 As shown in FIG. 4 , the fourth insulating layer 40 may cover the second semiconductor pattern SC2. According to an embodiment of the inventive concept, the fourth insulating layer 40 may be an insulating pattern overlapping the gate GT2 of the oxide transistor O-TFT and exposing the source region SR2 and the drain region DE2 of the oxide transistor O-TFT.

[0104] The gate GT2 of the oxide transistor O-TFT is disposed on the fourth insulating layer 40. The gate GT2 of the oxide transistor O-TFT may be a part of the metal pattern. The gate GT2 of the oxide transistor O-TFT overlaps the channel region AC2. The fifth insulating layer 50 may be disposed on the fourth insulating layer 40, and the fifth insulating layer 50 may cover the gate GT2. The first insulating layer 10 to the fifth insulating layer 50 may each be an inorganic layer.

[0105] The first connection pattern CNP1 and the second connection pattern CNP2 may be disposed on the fifth insulating layer 50. The first connection pattern CNP1 and the second connection pattern CNP2 may be formed by the same process and may therefore have the same material and the same stack structure. The first connection pattern CNP1 may be connected to the drain region DE1 of the silicon transistor S-TFT through a first pixel contact hole PCH1 passing through the first to fifth insulating layers 10, 20, 30, 40, and 50. The second connection pattern CNP2 may be connected to the source region SR2 of the oxide transistor O-TFT through a second pixel contact hole PCH2 passing through the fourth insulating layer 40 and the fifth insulating layer 50. The connection relationship between the first connection pattern CNP1 and the second connection pattern CNP2 and the silicon transistor S-TFT and the oxide transistor O-TFT is not necessarily limited thereto.

[0106] The sixth insulating layer 60 may be disposed on the fifth insulating layer 50 and may cover the first connection pattern CNP1 and the second connection pattern CNP2. The third connection pattern CNP3 may be disposed on the sixth insulating layer 60. The third connection pattern CNP3 may be connected to the first connection pattern CNP1 through the third pixel contact hole PCH3 passing through the sixth insulating layer 60. The data line DL may be disposed on the sixth insulating layer 60. The seventh insulating layer 70 may be disposed on the sixth insulating layer 60 and may cover the third connection pattern CNP3 and the data line DL. The third connection pattern CNP3 and the data line DL may be formed by the same process and thus may have the same material and the same stacking structure. The sixth insulating layer 60 and the seventh insulating layer 70 may each be an organic layer.

[0107] The light emitting element LD may include an anode AE ​​(or a first electrode), a light emitting layer EL and a cathode CE (or a second electrode). The anode AE ​​of the light emitting element LD may be disposed on the seventh insulating layer 70. The anode AE ​​may be a (semi) transmissive electrode or a reflective electrode. The anode AE ​​may include a stacked structure of ITO / Ag / ITO stacked sequentially. The positions of the anode AE ​​and the cathode CE may be exchanged.

[0108] The pixel definition film PDL may be disposed on the seventh insulating layer 70. The pixel definition film PDL may be an organic layer. The pixel definition film PDL may have a light absorption characteristic, and for example, the pixel definition film PDL may have a black color. The pixel definition film PDL may include a black colorant. The black colorant may include a black pigment or a black dye. The black colorant may include carbon black, a metal such as chromium, or an oxide thereof. The pixel definition film PDL may correspond to a light blocking pattern having a light blocking characteristic.

[0109] The pixel defining film PDL may cover a portion of the anode AE. For example, an opening PDL-OP exposing a portion of the anode AE ​​may be defined in the pixel defining film PDL. The first light emitting area LA1 may be defined to correspond to the opening PDL-OP. Figure 5 Shown with Figure 4A A first light emitting area LA1 corresponding to the first light emitting area LA1 in FIG. Figure 4A The cross section corresponding to the second light emitting area LA2 and the third light emitting area LA3 in FIG. Figure 5 The cross-sections in the first light emitting region LA1 are substantially the same. However, the light emitting layer EL having a material different from that of the light emitting layer EL of the first light emitting region LA1 may be provided in the second light emitting region LA2 and the third light emitting region LA3. Figure 4A In the light emitting area pair UP, the pixel defining film PDL is disposed between the third light emitting area LA3 of the first unit light emitting area UA1 and the third light emitting area LA3 of the second unit light emitting area UA2. The light emitting layer EL disposed in the third light emitting area LA3 of the first unit light emitting area UA1 and the third light emitting area LA3 of the second unit light emitting area UA2 may be disposed on the pixel defining film PDL disposed between the third light emitting area LA3 of the first unit light emitting area UA1 and the third light emitting area LA3 of the second unit light emitting area UA2.

[0110] According to an embodiment of the inventive concept, a hole control layer may be disposed between the anode AE ​​and the light emitting layer EL. The hole control layer may include a hole transport layer and may further include a hole injection layer. An electron control layer may be disposed between the light emitting layer EL and the cathode CE. The electron control layer may include an electron transport layer and may further include an electron injection layer.

[0111] The encapsulation layer 140 may cover the light emitting element LD. The encapsulation layer 140 may include an inorganic encapsulation layer 141, an organic encapsulation layer 142, and an inorganic encapsulation layer 143 stacked sequentially, but the layers constituting the encapsulation layer 140 are not necessarily limited thereto. The inorganic encapsulation layers 141 and 143 may include a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer, etc. The inorganic encapsulation layers 141 and 143 may also each have a multilayer structure. The organic encapsulation layer 142 may include an acrylate organic layer, and the embodiments of the inventive concept are not limited thereto.

[0112] The input sensor 200 includes a plurality of conductive patterns. The input sensor 200 may include at least one insulating layer (or at least one sensor insulating layer) and at least one conductive layer (or at least one sensor conductive layer) including a plurality of conductive patterns. In this embodiment, the input sensor 200 may include a first insulating layer 210 (or a first sensor insulating layer), a first conductive layer 220 (or a first sensor conductive layer), a second insulating layer 230 (or a second sensor insulating layer), a second conductive layer 240 (or a second sensor conductive layer), and a third insulating layer 250 (or a third sensor insulating layer). Figure 5 A plurality of conductive patterns included in each of the first conductive layer 220 and the second conductive layer 240 are schematically illustrated.

[0113] The first insulating layer 210 may be directly disposed on the display panel 100. The first insulating layer 210 may be an inorganic layer including at least any one of silicon nitride, silicon oxynitride, and silicon oxide. The first conductive layer 220 and the second conductive layer 240 may each have a single-layer structure or a multi-layer structure stacked along the third direction DR3. The first conductive layer 220 and the second conductive layer 240 may include conductive lines defining electrodes in a grid form. Depending on the positions of the conductive lines, the conductive lines of the first conductive layer 220 and the conductive lines of the second conductive layer 240 may be connected to each other through contact holes passing through the second insulating layer 230, or may not be connected. The first conductive layer 220 and the second conductive layer 240 may have a first opening area EOP1 corresponding to the first light emitting area LA1.

[0114] The first conductive layer 220 and the second conductive layer 240, each having a single-layer structure, may each include a metal layer or a transparent conductive layer. The metal layer may include molybdenum, silver, titanium, copper, aluminum, or an alloy thereof. The transparent conductive layer may include an indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), zinc oxide (ZnO x ), indium oxide (In 2 O 3 ) or a transparent conductive oxide of indium zinc tin oxide (IZTO). In addition, the transparent conductive layer may include a conductive polymer such as PEDOT, a metal nanowire, graphene, etc.

[0115] The first conductive layer 220 and the second conductive layer 240, each having a multi-layer structure, may each include a metal layer. The metal layer may have a three-layer structure of, for example, titanium / aluminum / titanium. The multi-layer conductive layer may include at least one metal layer and at least one transparent conductive layer. The second insulating layer 230 may be disposed between the first conductive layer 220 and the second conductive layer 240. In this specification, the second insulating layer 230 disposed between the first conductive layer 220 and the second conductive layer 240 may be described as a "sensing insulating layer". The third insulating layer 250 may cover the second conductive layer 240. According to an embodiment of the inventive concept, the third insulating layer 250 may be omitted. The second insulating layer 230 and the third insulating layer 250 may each include an inorganic layer or an organic layer.

[0116] Fig. 6A is a plan view of an input sensor 200 according to an embodiment of the inventive concept. Figure 6B is a plan view illustrating a partial configuration of an input sensor 200 according to an embodiment of the inventive concept. Figure 6C is a plan view illustrating a partial configuration of an input sensor 200 according to an embodiment of the inventive concept. Figure 6B and Figure 6C Conductive patterns disposed at different layers among a plurality of conductive patterns included in the input sensor 200 according to an embodiment of the inventive concept are separately illustrated.

[0117] like Fig. 6A As shown in FIG. 1 , the input sensor 200 includes a sensing area 200-DA and a non-sensing area 200-NDA adjacent to the sensing area 200-DA. The sensing area 200-DA and the non-sensing area 200-NDA are respectively Figure 3 The display area 100 -DA and the non-display area 100 -NDA shown in FIG.

[0118] The input sensor 200 includes the plurality of conductive patterns described previously. The plurality of conductive patterns include first electrodes SE1 (or first sensing electrodes), second electrodes SE2 (or second sensing electrodes), first signal lines SL1 (or first sensor signal lines), and second signal lines SL2 (or second sensor signal lines).

[0119] The first sensing electrode SE1 and the second sensing electrode SE2, which are crossed and insulated from each other, are arranged in the sensing area 200-DA. In the non-sensing area 200-NDA, the first signal line SL1 electrically connected to the first sensing electrode SE1 and the second signal line SL2 electrically connected to the second sensing electrode SE2 are arranged. Either of the first signal line SL1 and the second signal line SL2 transmits a driving signal for detecting an external input from an external circuit to a corresponding electrode, and the other of the first signal line SL1 and the second signal line SL2 outputs a sensing signal. Based on the sensing signal, the change in capacitance between the first sensing electrode SE1 and the second sensing electrode SE2 is measured. In this embodiment, a mutual capacitance type input sensor is exemplarily shown, but the embodiments of the inventive concept are not limited thereto. A self-capacitance type input sensor may also be applied. The self-capacitance type input sensor may include a type of sensing electrode.

[0120] The first sensing electrodes SE1 may be provided in a plurality of rows. The first sensing electrodes SE1 may include a first row sensing electrode E1-1, a second row sensing electrode E1-2, a third row sensing electrode E1-3, and a fourth row sensing electrode E1-4. Fig. 6A Different from that shown in FIG. 1 , the first sensing electrode SE1 may include two or three row sensing electrodes, or may include at least five row sensing electrodes.

[0121] The second sensing electrodes SE2 may be provided in a plurality of columns. The second sensing electrodes SE2 may include a first column sensing electrode E2-1, a second column sensing electrode E2-2, a third column sensing electrode E2-3, a fourth column sensing electrode E2-4, a fifth column sensing electrode E2-5, a sixth column sensing electrode E2-6, and a seventh column sensing electrode E2-7. Fig. 6A Different from that shown in FIG. 1 , the second sensing electrode SE2 may include six or less column sensing electrodes, or may include at least eight column sensing electrodes.

[0122] The first sensing electrode SE1 and the second sensing electrode SE2 may each have a grid form defining a plurality of opening areas. The plurality of opening areas may be connected to, for example, Figure 4A The corresponding light emitting areas among the plurality of light emitting areas LA1, LA2 and LA3 in the embodiment overlap. The second sensing electrode SE2 crosses the first sensing electrode SE1 while the second sensing electrode SE2 and the first sensing electrode SE1 are insulated from each other. Either of the first sensing electrode SE1 and the second sensing electrode SE2 may have an integrated form. In this embodiment, the second sensing electrode SE2 having an integrated form is exemplarily shown.

[0123] The second sensing electrodes SE2 may each include a second sensing pattern SP2 and a connection pattern CP2. The second sensing patterns SP2 may each have an area larger than that of each of the connection patterns CP2, and may each have a rhombus shape. Each of the connection patterns CP2 is disposed between two adjacent second sensing patterns SP2 among the second sensing patterns SP2. The length of each of the connection patterns CP2 may be relatively small, and the connection pattern CP2 may also be omitted. At this time, the second sensing pattern SP2 may extend directly from the adjacent second sensing pattern SP2.

[0124] The first sensing electrodes SE1 may each include a first sensing pattern SP1 and a bridge pattern CP1. Two adjacent first sensing patterns SP1 may be connected by two bridge patterns CP1, but the number of the bridge patterns CP1 is not limited.

[0125] refer to Fig. 6A , the input sensor 200 further includes an additional pattern AP. The additional pattern AP may include a plurality of dummy patterns DMP and a plurality of additional dummy patterns DAP. The additional pattern AP may be provided in plurality and may be disposed throughout the sensing area 200 -DA.

[0126] Each of the dummy patterns DMP may overlap each of the first sensing electrode SE1 and the second sensing electrode SE2 on a plane. Each of the dummy patterns DMP may overlap each of the first sensing pattern SP1 and the second sensing electrode SE2 on a plane. In the input sensor 200 according to the embodiment, a boundary portion CTL may be defined between the first sensing electrode SE1 and the second sensing electrode SE2, and the dummy pattern DMP may overlap at least the boundary portion CTL. At the same time, Fig. 6A It is shown that the dummy patterns DMP overlap the boundary portions CTL between the first sensing pattern SP1 and the second sensing pattern SP2 , respectively, but a plurality of dummy patterns DMP may overlap each of the boundary portions CTL between the first sensing pattern SP1 and the second sensing pattern SP2 .

[0127] The additional dummy pattern DAP may overlap with any one of the first sensing electrode SE1 and the second sensing electrode SE2 on a plane, and may not overlap with the other one of the first sensing electrode SE1 and the second sensing electrode SE2 on a plane. The additional dummy pattern DAP may overlap with any one of the first sensing pattern SP1 and the second sensing pattern SP2 on a plane, and may not overlap with the other one of the first sensing pattern SP1 and the second sensing pattern SP2 on a plane. At the same time, Fig. 6AIt is shown that the additional dummy pattern DAP overlaps the first and second sensing patterns SP1 and SP2 , respectively, but a plurality of additional dummy patterns DAP may overlap each of the first and second sensing patterns SP1 and SP2 .

[0128] The bridge pattern CP1 and the additional pattern AP may have substantially the same shape on a plane. The bridge pattern CP1 and the additional pattern AP may have substantially the same length in the first direction DR1. The bridge pattern CP1, the dummy pattern DMP, and the additional dummy pattern DAP may have substantially the same length in the first direction DR1, and may have substantially the same shape on a plane. Meanwhile, in this specification, "substantially the same" means physically having the same shape and length, etc., and also includes the case where there are differences within a reference error that occur during the process despite the same design.

[0129] The bridge pattern CP1 and the additional pattern AP may be disposed in the entire sensing area 200-DA and may be spaced apart from each other at regular intervals. The bridge pattern CP1 and the additional pattern AP may be spaced apart from each other at regular intervals in each of the first direction DR1 and the second direction DR2 in the entire sensing area 200-DA. That is, when a distance along the first direction DR1 or the second direction DR2 between any one of the bridge patterns CP1 and any one of the additional patterns AP adjacent to the bridge pattern CP1 is defined as a first distance, and a distance along the first direction DR1 or the second direction DR2 between any one of the additional patterns AP and any one of the additional patterns AP and the bridge pattern CP1 adjacent to the additional pattern AP is defined as a second distance, the first distance and the second distance may be substantially the same.

[0130] refer to FIG. 6A to FIG. 6C Among the aforementioned plurality of conductive patterns, the bridge pattern CP1 and the additional pattern AP may be disposed in a first layer, and the second sensing electrode SE2 and the first sensing pattern SP1 may be disposed in a second layer different from the first layer. For example, the bridge pattern CP1 and the additional pattern AP may be included in the previously referenced Figure 5 The first conductive layer 220 described above and may be provided in the previously described Figure 5 The first insulating layer 210 described above, and the second sensing electrode SE2 and the first sensing pattern SP1 may be included in the previously described reference numerals. Figure 5 The second conductive layer 240 described above and may be provided in the previously described Figure 5Alternatively, the bridge pattern CP1 and the additional pattern AP may be included in the second conductive layer 240 and may be disposed on the second insulating layer 230, and the second sensing electrode SE2 and the first sensing pattern SP1 may be included in the first conductive layer 220 and may be disposed on the first insulating layer 210.

[0131] Fig. 6A The first signal line SL1 and the second signal line SL2 in the Figure 5 However, embodiments of the inventive concept are not limited thereto, and the first signal line SL1 and the second signal line SL2 may also be each formed by Figure 5 The first signal line SL1 and the second signal line SL2 may each have a double wiring structure including both a line formed by the first conductive layer 220 and a line formed by the second conductive layer 240 .

[0132] Figure 7 is an enlarged plan view illustrating a portion of an input sensor according to an embodiment of the inventive concept. Figure 7 Shown with Fig. 6A An enlarged view of the portion corresponding to area AA is shown. FIG. 8A to FIG. 8C are cross-sectional views each illustrating a portion of an input sensor according to an embodiment of the inventive concept. Fig. 8A Shown along Figure 7 A cross-sectional view taken along line II-II'. Figure 8B Shown along Figure 7 A cross-sectional view taken along line III-III'. Figure 8C Shown along Figure 7 A cross-sectional view taken along line IV-IV'.

[0133] Reference together Fig. 6A and Figure 7 The input sensor 200 includes a plurality of conductive patterns, and the plurality of conductive patterns include a first sensing electrode SE1 and a second sensing electrode SE2. The first sensing electrode SE1 may include a first sensing pattern SP1 and a bridge pattern CP1. The second sensing electrode SE2 may include a second sensing pattern SP2 and a connection pattern CP2. Figure 7 The 1-1th sensing pattern SP1-1, the 1-2th sensing pattern SP1-2 and the bridge pattern CP1 (or the first bridge pattern) included in each of the first sensing electrodes SE1, the connection pattern CP2, and the 2-1st sensing pattern SP2-1 and the 2-2nd sensing pattern SP2-2 included in each of the second sensing patterns SP2 are exemplarily shown.

[0134] A plurality of opening areas EOP1, EOP2, and EOP3 may be defined in each of the first sensing pattern SP1 and the second sensing pattern SP2. The plurality of opening areas EOP1, EOP2, and EOP3 may include a first opening area EOP1 corresponding to (or overlapping) the first light-emitting area LA1, a second opening area EOP2 corresponding to (or overlapping) the second light-emitting area LA2, and a third opening area EOP3 corresponding to (or overlapping) the third light-emitting area LA3. Meanwhile, a pixel column in which the first light-emitting area LA1 and the second light-emitting area LA2 are alternately disposed along the second direction DR2 may be referred to as a first unit pixel column PXC-1 (see Figure 4A ). The pixel column in which the third light emitting area LA3 is arranged along the second direction DR2 may be referred to as a second unit pixel column PXC-2 (see Figure 4A ).

[0135] In this embodiment, the first light emitting area LA1 may be disposed in the first opening area EOP1, the second light emitting area LA2 may be disposed in the second opening area EOP2, and the third light emitting area LA3 may be disposed in the third opening area EOP3. In the third opening area EOP3, two third light emitting areas LA3 may be commonly arranged along the second direction DR2. Meanwhile, unlike what is shown in the figure, only one third light emitting area LA3 may be disposed in the third opening area EOP3.

[0136] The first sensing pattern SP1 and the second sensing pattern SP2 may each include a plurality of grid lines ML defining a plurality of opening areas EOP1, EOP2, and EOP3. The plurality of grid lines ML may include a first grid line ML1 and a second grid line ML2. The first grid line ML1 and the second grid line ML2 may each extend in a first direction DR1. The first grid line ML1 may have a first width in a second direction DR2, and the second grid line ML2 may have a second width greater than the first width in the second direction DR2. Meanwhile, the plurality of grid lines ML may further include a third grid line ML3 extending along the second direction DR2. The width of the third grid line ML3 in the first direction DR1 may be the same as the first width of the first grid line ML1. Meanwhile, the first grid line ML1 may be a line component parallel to the first opening area EOP1 and the second opening area EOP2 in the second direction DR2, and the second grid line ML2 may be a line component parallel to the third opening area EOP3 in the second direction DR2.

[0137] The plurality of opening areas EOP1, EOP2, and EOP3 may each have a planar area larger than a planar area of ​​a light emitting area overlapped therewith. For example, the planar area of ​​the first opening area EOP1 may be larger than the planar area of ​​the first light emitting area LA1, the planar area of ​​the second opening area EOP2 may be larger than the planar area of ​​the second light emitting area LA2, and the planar area of ​​the third opening area EOP3 may be larger than the planar area of ​​the third light emitting area LA3. Accordingly, the plurality of grid lines ML defining the plurality of opening areas EOP1, EOP2, and EOP3 may not reduce the emission efficiency of light emitted through the light emitting areas LA1, LA2, and LA3.

[0138] The arrangement and shape of the first to third grid lines ML1, ML2 and ML3 may be variously changed according to the arrangement and plane area of ​​the plurality of opening areas EOP1, EOP2 and EOP3 defined by the grid lines ML. In addition, the arrangement and plane area of ​​the plurality of opening areas EOP1, EOP2 and EOP3 may be variously changed according to the arrangement and plane area of ​​the corresponding light emitting areas LA1, LA2 and LA3.

[0139] Meanwhile, for ease of description, the first to third grid lines ML1, ML2, and ML3 are described as separate lines, but the first to third grid lines ML1, ML2, and ML3 may be connected to each other to have an integral shape. That is, the first to third grid lines ML1, ML2, and ML3 may be formed by patterning a plurality of opening areas EOP1, EOP2, and EOP3 on an integral conductive layer.

[0140] In the input sensor 200 according to the embodiment, a boundary portion CTL may be defined between the first sensing electrode SE1 and the second sensing electrode SE2. The boundary portion CTL may be a portion at which at least some of the mesh lines ML are removed. The boundary portion CTL may be provided to insulate the first sensing electrode SE1 from the second sensing electrode SE2.

[0141] The second sensing patterns SP2 and the connection patterns CP2 included in the second sensing electrode SE2 may each include a mesh line ML and may have an integral shape. The connection pattern CP2 may be disposed between two adjacent second sensing patterns SP2 and may have an integral shape with each of the two second sensing patterns SP2. Figure 7 In the embodiment, the 2-1st sensing pattern SP2-1, the 2-2nd sensing pattern SP2-2, and the connection pattern CP2 may each include the mesh lines ML, and may have an integral shape.

[0142] The bridge pattern CP1 electrically connects two adjacent first sensing patterns SP1. The bridge pattern CP1 overlaps the first contact hole CH1 on a plane and electrically connects two adjacent first sensing patterns SP1 through the first contact hole CH1. The bridge pattern CP1 may connect the 1-1st sensing pattern SP1-1 and the 1-2nd sensing pattern SP1-2 adjacent to each other.

[0143] Two adjacent first sensing patterns SP1 may be connected to each other by two bridge patterns CP1. The bridge pattern CP1 may include a 1-1 bridge pattern CP1-1 and a 1-2 bridge pattern CP1-2 connecting the 1-1 sensing pattern SP1-1 to the 1-2 sensing pattern SP1-2. The 1-1 bridge pattern CP1-1 and the 1-2 bridge pattern CP1-2 may be spaced apart from each other along the second direction DR2.

[0144] The bridge pattern CP1 may overlap the two first contact holes CH1, and each of the two first contact holes CH1 may be provided to overlap the aforementioned second unit pixel column PXC-2. The first contact hole CH1 may be provided to overlap the third opening area EOP3 in the second direction DR2. The first contact hole CH1 may be provided to overlap the second grid line ML2.

[0145] The dummy pattern DMP overlaps each of the first sensing electrode SE1 and the second sensing electrode SE2 on a plane. The dummy pattern DMP may overlap each of the first sensing pattern SP1 and the second sensing pattern SP2 on a plane. Alternatively, the dummy pattern DMP may overlap each of the first sensing pattern SP1 and the connection pattern CP2 on a plane. A portion of the dummy pattern DMP may overlap the boundary portion CTL.

[0146] The dummy pattern DMP may include a first dummy pattern DMP1 disposed between the aforementioned 1-1 bridge pattern CP1-1 and the 1-2 bridge pattern CP1-2. The first dummy pattern DMP1 may overlap each of the first sensing pattern SP1 and the connection pattern CP2 on a plane. The dummy pattern DMP may further include a second dummy pattern DMP2 adjacent to any one of the 1-1 bridge pattern CP1-1 and the 1-2 bridge pattern CP1-2 and spaced apart from the other of the 1-1 bridge pattern CP1-1 and the 1-2 bridge pattern CP1-2. The second dummy pattern DMP2 may overlap each of the first sensing pattern SP1 and the second sensing pattern SP2 on a plane.

[0147] The bridge pattern CP1 is disposed between two dummy patterns DMP among the plurality of dummy patterns DMP in the second direction DR2, and the distances in the second direction DR2 between the two dummy patterns DMP and the bridge pattern CP1 disposed between the two dummy patterns DMP are uniform. That is, the bridge pattern CP1 may be disposed between the first dummy pattern DMP1 and the second dummy pattern DMP2 in the second direction DR2, and the distance from the first dummy pattern DMP1 to the bridge pattern CP1 in the second direction DR2 may be substantially the same as the distance from the second dummy pattern DMP2 to the bridge pattern CP1 in the second direction DR2.

[0148] The first dummy pattern DMP1 disposed between the 1-1st bridge pattern CP1-1 and the 1-2nd bridge pattern CP1-2 may have a uniform distance from each of the 1-1st bridge pattern CP1-1 and the 1-2nd bridge pattern CP1-2 in the second direction DR2. That is, a distance from the first dummy pattern DMP1 to the 1-1st bridge pattern CP1-1 in the second direction DR2 and a distance from the first dummy pattern DMP1 to the 1-2nd bridge pattern CP1-2 in the second direction DR2 may be substantially the same.

[0149] In the input sensor 200 according to the embodiment, the distances between the plurality of dummy patterns DMP may be uniform. Figure 7 As shown in the figure, in the first direction DR1, the distance between two adjacent first dummy patterns DMP1 and the distance between two adjacent second dummy patterns DMP2 may be the same as each other. In addition, with respect to the second direction DR2, the distance between the first dummy pattern DMP1 and the second dummy pattern DMP2 disposed thereon and the distance between the first dummy pattern DMP1 and the second dummy pattern DMP2 disposed thereunder may be the same as each other.

[0150] In the input sensor 200 according to the embodiment, the first hole H1 may be provided to overlap with the dummy pattern DMP. The first hole H1 may be provided in a portion where the dummy pattern DMP overlaps with the first sensing pattern SP1 or the second sensing electrode SE2. The first hole H1 may be formed by recessing the conductive pattern disposed at the upper portion among the first sensing pattern SP1 or the second sensing electrode SE2 and the dummy pattern DMP in the third direction DR3 which is the thickness direction. The first hole H1 may be a dummy hole formed by removing a portion of the conductive pattern disposed at the upper portion, or may be a contact hole through which the conductive pattern disposed at the upper portion is connected to the conductive pattern disposed at the lower portion. The dummy patterns DMP may each overlap with two first holes H1. At the same time, at least one dummy hole overlaps with the dummy pattern DMP. The specific shapes of the dummy holes and the contact holes will be described later.

[0151] The first hole H1 may be provided to overlap the aforementioned second unit pixel column PXC- 2 . The first hole H1 may be provided to overlap the third opening area EOP3 in the second direction DR2 . The first hole H1 may be provided to overlap the second grid line ML2 .

[0152] The additional dummy pattern DAP may overlap with any one of the first sensing electrode SE1 and the second sensing electrode SE2, and may not overlap with the other one of the first sensing electrode SE1 and the second sensing electrode SE2. The additional dummy pattern DAP may overlap with any one of the first sensing pattern SP1 and the second sensing pattern SP2, and may not overlap with the other one of the first sensing pattern SP1 and the second sensing pattern SP2. The additional dummy pattern DAP may include a first additional dummy pattern DAP1 overlapping with the first sensing pattern SP1 and a second additional dummy pattern DAP2 overlapping with the second sensing pattern SP2. Meanwhile, in the present specification, the dummy pattern DMP and the additional dummy pattern DAP may be described as an additional pattern AP.

[0153] As previously described, the bridge pattern CP1 and the additional pattern AP may have substantially the same shape on a plane, and may be disposed at regular intervals apart from each other. Figure 7 As shown in , the bridge pattern CP1, the dummy pattern DMP, and the additional dummy pattern DAP may have substantially the same length in the first direction DR1. In addition, in the first direction DR1 or the second direction DR2, the distance between the bridge pattern CP1 and the adjacent different conductive pattern, the distance between the dummy pattern DMP and the adjacent different conductive pattern, and the distance between the additional dummy pattern DAP and the adjacent different conductive pattern may be the same. In an embodiment, the distance between two adjacent first dummy patterns DMP1 in the first direction DR1, the distance between two adjacent second dummy patterns DMP2 in the first direction DR1, and the distance between the bridge pattern CP1 and the first additional dummy pattern DAP1 adjacent to each other in the first direction DR1 may be the same as each other. In an embodiment, the distance between the first dummy pattern DMP1 and the bridge pattern CP1 adjacent to each other in the second direction DR2, the distance between the second dummy pattern DMP2 and the bridge pattern CP1 adjacent to each other in the second direction DR2, and the distance between the first dummy pattern DMP1 and the first additional dummy pattern DAP1 adjacent to each other in the second direction DR2 may be the same as each other.

[0154] In the input sensor 200 according to the embodiment, the second hole H2 may be provided to overlap with the additional dummy pattern DAP. The second hole H2 may be provided in a portion where the additional dummy pattern DAP overlaps with the first sensing pattern SP1 or the second sensing pattern SP2. The second hole H2 may be formed by recessing the conductive pattern disposed at the upper portion among the first sensing pattern SP1 or the second sensing pattern SP2 and the additional dummy pattern DAP in the third direction DR3 which is the thickness direction. The second hole H2 may be a dummy hole formed by removing a portion of the conductive pattern disposed at the upper portion, or may be a contact hole through which the conductive pattern disposed at the upper portion is connected to the conductive pattern disposed at the lower portion. Two second holes H2 may overlap with each of the additional dummy patterns DAP.

[0155] The second hole H2 may be provided to overlap the aforementioned second unit pixel column PXC- 2 . The second hole H2 may be provided to overlap the third opening area EOP3 in the second direction DR2 . The second hole H2 may be provided to overlap the second grid line ML2 .

[0156] Reference together Figure 7 as well as FIG. 8A to FIG. 8C , the bridge pattern CP1 and the additional pattern AP may be disposed in a first layer, and the second sensing electrode SE2 and the first sensing pattern SP1 may be disposed in a second layer different from the first layer. The bridge pattern CP1 and the additional pattern AP may be included in the previously referenced Figure 5 The first conductive layer 220 described above and may be provided in the previously described Figure 5 The first insulating layer 210 described above, and the second sensing electrode SE2 and the first sensing pattern SP1 may be included in the previously described reference numerals. Figure 5 The second conductive layer 240 described above and may be provided in the previously described Figure 5 The second insulating layer 230 is described.

[0157] Meanwhile, the first conductive layer 220 may include a first lower conductive layer CL10, a second lower conductive layer CL20 disposed on the upper side of the first lower conductive layer CL10 and in contact with the first lower conductive layer CL10, and a third lower conductive layer CL30 disposed on the lower side of the first lower conductive layer CL10 and in contact with the first lower conductive layer CL10. According to an embodiment of the inventive concept, the third lower conductive layer CL30 may be omitted. The first lower conductive layer CL10 has a first reflectivity, a first conductivity, and a first thickness. The second lower conductive layer CL20 has a second reflectivity lower than the first reflectivity, a second conductivity lower than the first conductivity, and a second thickness smaller than the first thickness. The first lower conductive layer CL10 having a low resistance substantially corresponds to a path through which a signal propagates. In the input sensor 200 according to the embodiment, by increasing the thickness through a three-layer structure, a plurality of conductive patterns may be disposed in a narrow region on a plane. The second lower conductive layer CL20 having a low reflectivity covers the first lower conductive layer CL10, thereby reducing the reflectivity to external light.

[0158] The second conductive layer 240 may include a first upper conductive layer CL1, a second upper conductive layer CL2 disposed on an upper side of the first upper conductive layer CL1 and in contact with the first upper conductive layer CL1, and a third upper conductive layer CL3 disposed on a lower side of the first upper conductive layer CL1 and in contact with the first upper conductive layer CL1. The first upper conductive layer CL1 of the second conductive layer 240 may include the same material as the first lower conductive layer CL10 of the first conductive layer 220, and may have the same thickness as the first lower conductive layer CL10 of the first conductive layer 220. The second upper conductive layer CL2 of the second conductive layer 240 may include the same material as the second lower conductive layer CL20 of the first conductive layer 220, and may have the same thickness as the second lower conductive layer CL20 of the first conductive layer 220. The third upper conductive layer CL3 of the second conductive layer 240 may include the same material as the third lower conductive layer CL30 of the first conductive layer 220, and may have the same thickness as the third lower conductive layer CL30 of the first conductive layer 220.

[0159] refer to Figure 7 and Fig. 8A , when the area where the 1-1st bridge pattern CP1-1 and the first sensing pattern SP1 overlap each other is defined as the first overlapping area OVA1, the first contact hole CH1 is defined in the first overlapping area OVA1 so that the 1-1st bridge pattern CP1-1 and the first sensing pattern SP1 may be electrically connected to each other. The first contact hole CH1 may pass through the second insulating layer 230. The first sensing pattern SP1 disposed at the upper portion may be electrically connected to the 1-1st bridge pattern CP1-1 through the first contact hole CH1.

[0160] refer to Figure 7 and Figure 8B , when the area where the first dummy pattern DMP1 and the first sensing pattern SP1 overlap each other and the area where the first dummy pattern DMP1 and the connection pattern CP2 overlap each other are defined as the second overlapping area OVA2, at least one dummy hole DMH1 is defined in the second overlapping area OVA2. A portion of the conductive pattern disposed on the upper portion (i.e., the first sensing pattern SP1 or the connection pattern CP2) may be removed to provide the dummy hole DMH1. The dummy hole DMH1 may pass through the conductive pattern disposed on the upper portion in the thickness direction to expose the upper surface of the second insulating layer 230. At the same time, in Figure 8B , the first dummy pattern DMP1 overlapping each of the first sensing pattern SP1 and the connection pattern CP2 is shown as an example, but the same illustration may be applied to the second dummy pattern DMP2. That is, a dummy hole DMH1 may also be provided in each of the first sensing pattern SP1 and the second sensing pattern SP2 overlapping the second dummy pattern DMP2. The dummy hole DMH1 may correspond to the first hole H1 described previously.

[0161] One first dummy pattern DMP1 may overlap two dummy holes DMH1. The dummy hole DMH1 may include a first dummy hole DMH1-1 and a second dummy hole DMH1-2. In an embodiment, the first dummy hole DMH1-1 may be provided in a second overlapping area OVA2 where the first dummy pattern DMP1 overlaps the connection pattern CP2, and the second dummy hole DMH1-2 may be provided in a second overlapping area OVA2 where the first dummy pattern DMP1 overlaps the first sensing pattern SP1.

[0162] refer to Figure 7 and Figure 8C , when the area where the first additional dummy pattern DAP1 and the first sensing pattern SP1 overlap each other is defined as the third overlapping area OVA3, at least one additional dummy hole DAH1 may be defined in the third overlapping area OVA3. A portion of the conductive pattern disposed at the upper portion (i.e., the first sensing pattern SP1) may be removed to provide the additional dummy hole DAH1. The additional dummy hole DAH1 may pass through the conductive pattern disposed at the upper portion in the thickness direction to expose the upper surface of the second insulating layer 230. At the same time, Figure 8C , the first additional dummy pattern DAP1 overlapping the first sensing pattern SP1 is shown as an example, but the same illustration may be applied to the second additional dummy pattern DAP2. That is, the additional dummy hole DAH1 may also be provided in the second sensing pattern SP2 overlapping the second additional dummy pattern DAP2. The additional dummy hole DAH1 may correspond to the second hole H2 described previously.

[0163] One first additional dummy pattern DAP1 may overlap two additional dummy holes DAH1. The additional dummy hole DAH1 may include a first additional dummy hole DAH1-1 and a second additional dummy hole DAH1-2. In an embodiment, the first additional dummy hole DAH1-1 may be provided in one of the third overlapping areas OVA3 where the first additional dummy pattern DAP1 and the first sensing pattern SP1 overlap each other, and the second additional dummy hole DAH1-2 may be provided in the other of the third overlapping areas OVA3.

[0164] Reference together Figure 7 as well as FIG. 8A to FIG. 8C The width of the first contact hole CH1 in the first direction DR1 and the width of each of the dummy hole DMH1 and the additional dummy hole DAH1 in the first direction DR1 may be designed to be similar to each other. Accordingly, the first contact hole CH1, the dummy hole DMH1, and the additional dummy hole DAH1 may have similar external light reflection characteristics.

[0165] In the input sensor 200 according to the embodiment, the first contact hole CH1, the first hole H1, and the second hole H2 may be disposed at regular intervals apart from each other. Figure 7 As shown in , the first contact hole CH1, the first hole H1, and the second hole H2 may be provided at the end of the bridge pattern CP1, the end of the dummy pattern DMP, and the end of the additional dummy pattern DAP, respectively, and may be arranged at regular intervals along the first direction DR1 and the second direction DR2. That is, the first contact hole CH1, the dummy hole DMH1, and the additional dummy hole DAH1 provided in the bridge pattern CP1, the dummy pattern DMP, and the additional dummy pattern DAP, respectively, may be arranged at regular intervals along the first direction DR1 and the second direction DR2.

[0166] The input sensor according to the embodiment may further include an additional pattern arranged at regular intervals corresponding to the bridge pattern connecting the first sensing pattern, and therefore, a defect of viewing the bridge pattern from the outside can be prevented. Since the portion where the bridge pattern and the first sensing pattern overlap each other is the portion where the two-layer conductive pattern is provided, the portion has a relatively high reflectivity compared to other portions, so that if the input sensor includes only the bridge pattern without the additional pattern, the portion where the bridge pattern and the first sensing pattern overlap can be brightly viewed from the outside. In the input sensor according to the embodiment, since the additional pattern corresponding to the bridge pattern is provided in the entire sensing area, the problem of abnormal increase in reflectivity only in the portion where the bridge pattern and the first sensing pattern overlap can be prevented, and thus a visibility defect of a portion being brightly viewed from the outside can be prevented.

[0167] Meanwhile, in the input sensor according to the embodiment, the bridge pattern overlaps with the first contact hole connected to the first sensing pattern. On the contrary, when the first contact hole overlaps with the dummy pattern overlapping each of the first sensing electrode and the second sensing electrode among the additional pattern, a problem in which the first sensing electrode and the second sensing electrode are electrically connected to each other may be caused, and therefore, the first contact hole may not overlap with the dummy pattern. In the input sensor according to the embodiment, instead of the first contact hole, a dummy hole passing through the conductive pattern provided at the upper part in the thickness direction is provided to overlap with the dummy pattern. Since a dummy hole having a reflection characteristic similar to that of the first contact hole is provided in the input sensor according to the embodiment, the defect of the first contact hole provided to overlap with the bridge pattern can be prevented from being viewed from the outside, and therefore the input sensor can have improved visibility. In addition, a display device including the input sensor can have improved visibility and reliability.

[0168] 9A to 9C are cross-sectional views each illustrating a portion of an input sensor according to an embodiment of the inventive concept. Fig.9A Shown along Figure 7 A cross-sectional view taken along line II-II'. Fig. 9B Shown along Figure 7 A cross-sectional view taken along line III-III'. Fig. 9C Shown along Figure 7 A cross-sectional view taken along line IV-IV'. 9A to 9C Each shows the basis and FIG. 8A to FIG. 8C The embodiments shown in FIG. 1 are cross-sectional views of a portion of an input sensor of a different embodiment.

[0169] Reference together Figure 7 as well as 9A to 9C , the second sensing electrode SE2 and the first sensing pattern SP1 may be disposed in a first layer, and the bridge pattern CP1 and the additional pattern AP may be disposed in a second layer different from the first layer. The second sensing electrode SE2 and the first sensing pattern SP1 may be included in the previously referenced Figure 5 The first conductive layer 220 described above and may be provided in the previously described Figure 5 The first insulating layer 210 described above, and the bridge pattern CP1 and the additional pattern AP may be included in the previously described reference Figure 5 The second conductive layer 240 described above and may be provided in the previously described Figure 5 The second insulating layer 230 is described.

[0170] Meanwhile, the first conductive layer 220 may include a first lower conductive layer CL10, a second lower conductive layer CL20 disposed on the upper side of the first lower conductive layer CL10 and in contact with the first lower conductive layer CL10, and a third lower conductive layer CL30 disposed on the lower side of the first lower conductive layer CL10 and in contact with the first lower conductive layer CL10. According to an embodiment of the inventive concept, the third lower conductive layer CL30 may be omitted. The first lower conductive layer CL10 has a first reflectivity, a first conductivity, and a first thickness. The second lower conductive layer CL20 has a second reflectivity lower than the first reflectivity, a second conductivity lower than the first conductivity, and a second thickness smaller than the first thickness. The first lower conductive layer CL10 having a low resistance substantially corresponds to a path through which a signal propagates. In the input sensor 200 according to the embodiment, by increasing the thickness through a three-layer structure, a plurality of conductive patterns may be disposed in a narrow region on a plane. The second lower conductive layer CL20 having a low reflectivity covers the first lower conductive layer CL10, thereby reducing the reflectivity to external light.

[0171] The second conductive layer 240 may include a first upper conductive layer CL1, a second upper conductive layer CL2 disposed on an upper side of the first upper conductive layer CL1 and in contact with the first upper conductive layer CL1, and a third upper conductive layer CL3 disposed on a lower side of the first upper conductive layer CL1 and in contact with the first upper conductive layer CL1. The first upper conductive layer CL1 of the second conductive layer 240 may include the same material as the first lower conductive layer CL10 of the first conductive layer 220, and may have the same thickness as the first lower conductive layer CL10 of the first conductive layer 220. The second upper conductive layer CL2 of the second conductive layer 240 may include the same material as the second lower conductive layer CL20 of the first conductive layer 220, and may have the same thickness as the second lower conductive layer CL20 of the first conductive layer 220. The third upper conductive layer CL3 of the second conductive layer 240 may include the same material as the third lower conductive layer CL30 of the first conductive layer 220, and may have the same thickness as the third lower conductive layer CL30 of the first conductive layer 220.

[0172] refer to Figure 7 and Fig.9A , when the area where the 1-1st bridge pattern CP1-1 and the first sensing pattern SP1 overlap each other is defined as the first overlapping area OVA1, the first contact hole CH1 is defined in the first overlapping area OVA1 so that the 1-1st bridge pattern CP1-1 and the first sensing pattern SP1 may be electrically connected to each other. The first contact hole CH1 may pass through the second insulating layer 230. The 1-1st bridge pattern CP1-1 disposed at the upper portion may be electrically connected to the first sensing pattern SP1 through the first contact hole CH1.

[0173] refer to Figure 7 and Fig. 9B , when the area where the first dummy pattern DMP1 and the first sensing pattern SP1 overlap each other and the area where the first dummy pattern DMP1 and the connection pattern CP2 overlap each other are defined as the second overlapping area OVA2, at least one dummy hole DMH1 is defined in the second overlapping area OVA2. A portion of the conductive pattern (i.e., the first dummy pattern DMP1) disposed on the upper portion may be removed to provide the dummy hole DMH1. The dummy hole DMH1 may pass through the conductive pattern disposed on the upper portion in the thickness direction to expose the upper surface of the second insulating layer 230. At the same time, in Fig. 9B , the first dummy pattern DMP1 overlapping each of the first sensing pattern SP1 and the connection pattern CP2 is shown as an example, but the same illustration may be applied to the second dummy pattern DMP2. That is, the dummy hole DMH1 may also be provided in the second dummy pattern DMP2 overlapping each of the first sensing pattern SP1 and the second sensing pattern SP2. The dummy hole DMH1 may correspond to the first hole H1 described previously.

[0174] One first dummy pattern DMP1 may overlap two dummy holes DMH1. The dummy hole DMH1 may include a first dummy hole DMH1-1 and a second dummy hole DMH1-2. In an embodiment, the first dummy hole DMH1-1 may be provided in the first dummy pattern DMP1 disposed in the second overlap area OVA2 where the first dummy pattern DMP1 and the connection pattern CP2 overlap each other, and the second dummy hole DMH1-2 may be provided in the first dummy pattern DMP1 disposed in the second overlap area OVA2 where the first dummy pattern DMP1 and the first sensing pattern SP1 overlap each other.

[0175] refer to Figure 7 and Fig. 9C , when the area where the first additional dummy pattern DAP1 and the first sensing pattern SP1 overlap each other is defined as the third overlapping area OVA3, at least one additional dummy hole DAH1 may be defined in the third overlapping area OVA3. A portion of the conductive pattern disposed at the upper portion (i.e., the first additional dummy pattern DAP1) may be removed to provide the additional dummy hole DAH1. The additional dummy hole DAH1 may pass through the conductive pattern disposed at the upper portion in the thickness direction to expose the upper surface of the second insulating layer 230. At the same time, Fig. 9C , the first additional dummy pattern DAP1 overlapping the first sensing pattern SP1 is shown as an example, but the same illustration may be applied to the second additional dummy pattern DAP2. That is, the additional dummy hole DAH1 may also be provided in the second additional dummy pattern DAP2 overlapping the second sensing pattern SP2. The additional dummy hole DAH1 may correspond to the second hole H2 described previously.

[0176] One first additional dummy pattern DAP1 may overlap with two additional dummy holes DAH1. The additional dummy hole DAH1 may include a first additional dummy hole DAH1-1 and a second additional dummy hole DAH1-2. In an embodiment, the first additional dummy hole DAH1-1 may be provided in the first additional dummy pattern DAP1 disposed in one of the third overlapping areas OVA3 where the first additional dummy pattern DAP1 and the first sensing pattern SP1 overlap each other, and the second additional dummy hole DAH1-2 may be provided in the first additional dummy pattern DAP1 disposed in the other of the third overlapping areas OVA3.

[0177] Reference together Figure 7 as well as 9A to 9C The width of the first contact hole CH1 in the first direction DR1 and the width of each of the dummy hole DMH1 and the additional dummy hole DAH1 in the first direction DR1 may be designed to be similar to each other. Accordingly, the first contact hole CH1, the dummy hole DMH1, and the additional dummy hole DAH1 may have similar external light reflection characteristics.

[0178] Fig. 10A and Fig. 10B are cross-sectional views each illustrating a portion of an input sensor according to an embodiment of the inventive concept. Fig. 10A Shown along Figure 7 A cross-sectional view taken along line III-III'. Fig. 10B Shown along Figure 7 A cross-sectional view taken along line IV-IV'. Fig. 10A and Fig. 10B Each shows the basis and Figure 8B and Figure 8C The embodiments shown in FIG. 1 are cross-sectional views of a portion of an input sensor of a different embodiment.

[0179] refer to Figure 7 and Fig. 10A , when the area where the first dummy pattern DMP1 and the first sensing pattern SP1 overlap each other and the area where the first dummy pattern DMP1 and the connection pattern CP2 overlap each other are defined as the second overlap area OVA2, at least one dummy hole DMH1 is defined in the second overlap area OVA2. At the same time, one second contact hole CH2 may be provided in the second overlap area OVA2. The dummy hole DMH1 may be provided in any one of the two second overlap areas OVA2, and the second contact hole CH2 may be provided in the other of the two second overlap areas OVA2.

[0180] In an embodiment, since the second contact hole CH2 is provided in the 2-1 overlap area OVA2-1 where the first dummy pattern DMP1 and the connection pattern CP2 overlap each other, the first dummy pattern DMP1 and the connection pattern CP2 may be connected to each other. The second contact hole CH2 may pass through the second insulating layer 230. The connection pattern CP2 disposed at the upper portion may be electrically connected to the first dummy pattern DMP1 through the second contact hole CH2.

[0181] The dummy hole DMH1 may be provided in the 2-2 overlap area OVA2-2 where the first dummy pattern DMP1 and the first sensing pattern SP1 overlap each other. A portion of the conductive pattern (i.e., the first sensing pattern SP1) provided at the upper portion may be removed, thereby providing the dummy hole DMH1. The dummy hole DMH1 may pass through the first sensing pattern SP1 in the thickness direction to expose the upper surface of the second insulating layer 230. In the input sensor 200 according to the embodiment, even if the second contact hole CH2 is provided in one of the two overlap areas overlapping with the first dummy pattern DMP1, the short circuit problem in which the first sensing electrode SE1 and the second sensing electrode SE2 are connected to each other may not occur because the dummy hole DMH1 is provided in the other of the above-mentioned two overlap areas.

[0182] refer to Figure 7 and Fig. 10B , when the area where the first additional dummy pattern DAP1 and the first sensing pattern SP1 overlap each other is defined as the third overlapping area OVA3, at least one third contact hole CH3 may be provided in the third overlapping area OVA3. Since the third contact hole CH3 is provided in the third overlapping area OVA3, the first additional dummy pattern DAP1 and the first sensing pattern SP1 may be connected to each other. The third contact hole CH3 may pass through the second insulating layer 230. The first sensing pattern SP1 disposed at the upper portion may be electrically connected to the first additional dummy pattern DAP1 through the third contact hole CH3. Since the first sensing pattern SP1 is electrically connected to the first additional dummy pattern DAP1 through the third contact hole CH3, the resistance of the first sensing pattern SP1 may be reduced. At the same time, Fig. 10B It is exemplarily shown that the third contact hole CH3 is provided in each of the two third overlap areas OVA3, but the third contact hole CH3 may be provided in only any one of the third overlap areas OVA3, and a dummy hole DAH1 (see Figure 8C ) may be provided in another one of the third overlapping areas OVA3.

[0183] Fig.11 is an enlarged plan view illustrating a portion of an input sensor according to an embodiment of the inventive concept. Fig.11 Shown with Fig. 6AThe enlarged view of the portion corresponding to the area AA shown in FIG. Fig.11 Shown according to Figure 7 The embodiments shown in FIG. 1 are portions of an input sensor of different embodiments. Fig.12 is a cross-sectional view illustrating a portion of an input sensor according to an embodiment of the inventive concept. Fig.12 Shown along Fig.11 A cross-sectional view taken along line V-V'.

[0184] Reference together Fig.11 and Fig.12 ,and Fig. 6A and Figure 7 Unlike the embodiment shown in , in the input sensor 200 according to the embodiment, the bridge pattern CP1 and the additional pattern AP may have different lengths in the first direction DR1. In the embodiment, in the first direction DR1, the bridge pattern CP1 may have a length greater than that of the additional pattern AP. When the length of the bridge pattern CP1 in the first direction DR1 is defined as the first length and the length of the additional pattern AP in the first direction DR1 is defined as the second length, the first length may be greater than the second length. At the same time, the first length of the bridge pattern CP1 may be at least twice the second length of the additional pattern AP. In the first direction DR1, the 1-1 bridge pattern CP1-1' and the 1-2 bridge pattern CP1-2' may each have a length greater than that of the additional pattern AP. The dummy pattern DMP and the second additional dummy pattern DAP2 may have substantially the same length in the first direction DR1.

[0185] In the input sensor 200 according to the embodiment, the bridge pattern CP1 overlaps with the first contact hole CH1' of the bridge pattern CP1 provided for being electrically connected to the first sensing pattern SP1, and further, the additional bridge hole Ha may be provided to overlap with the bridge pattern CP1. The additional bridge hole Ha may be formed by recessing the conductive pattern disposed at the upper portion among the first sensing pattern SP1 and the bridge pattern CP1 in the third direction DR3 which is the thickness direction. The additional bridge hole Ha may be a dummy hole formed by removing a portion of the conductive pattern disposed at the upper portion, or may be a contact hole through which the conductive pattern disposed at the upper portion is connected to the conductive pattern disposed at the lower portion. The bridge patterns CP1 may each overlap with at least one additional bridge hole Ha. The additional bridge hole Ha may be provided to overlap with the aforementioned second unit pixel column PXC-2. The additional bridge hole Ha may be provided to overlap with the third opening area EOP3 in the second direction DR2. The additional bridge hole Ha may be provided to overlap with the second grid line ML2.

[0186] refer to Fig.12, the first contact hole CH1' may be provided in the 1-1 overlap area OVA1-1 among the first overlap areas OVA1-1 and OVA1-2 where the 1-1 bridge pattern CP1-1' and the first sensing pattern SP1 overlap each other, so that the 1-1 bridge pattern CP1-1' and the first sensing pattern SP1 may be electrically connected. At the same time, at least one bridge dummy hole DMH-a may be provided in the 1-2 overlap area OVA1-2 among the first overlap areas OVA1-1 and OVA1-2. The bridge dummy hole DMH-a may correspond to the aforementioned additional bridge hole Ha.

[0187] A portion of the conductive pattern disposed at the upper portion (ie, the first sensing pattern SP1) may be removed to provide a bridge dummy hole DMH-a. The bridge dummy hole DMH-a may pass through the conductive pattern disposed at the upper portion in the thickness direction to expose the upper surface of the second insulating layer 230. At the same time, Fig.12 It is exemplarily shown that the first sensing pattern SP1 is disposed at the upper portion, but unlike what is shown in the figure, when the 1-1 bridge pattern CP1-1' is disposed above the first sensing pattern SP1, a portion of the 1-1 bridge pattern CP1-1' may be removed to provide a bridge dummy hole DMH-a. The bridge dummy hole DMH-a may have similar external light reflection characteristics to the first contact hole CH1'.

[0188] Fig.12 It is exemplarily shown that only a plurality of bridge dummy holes DMH-a are provided in the 1-2nd overlap area OVA1-2, but at least some of the bridge dummy holes DMH-a provided in the 1-2nd overlap area OVA1-2 may be additional contact holes (not shown). That is, since the additional contact holes are provided in the 1-2nd overlap area OVA1-2 instead of the bridge dummy holes DMH-a, the 1-1st bridge pattern CP1-1' may be electrically connected to the first sensing pattern SP1 through the additional contact holes.

[0189] Embodiments of the inventive concept may prevent a defect in which a portion of a conductive pattern of an input sensor included in a display device is abnormally viewed from the outside, and thus, the input sensor including the conductive pattern and the display device may have improved visibility.

[0190] Although the embodiments of the inventive concept have been described, it should be understood that the inventive concept should not be limited to these embodiments, and that a person of ordinary skill in the art may make various changes and modifications within the spirit and scope of the inventive concept as claimed. Therefore, the scope of the inventive concept should not be limited to what is described in the detailed description in the specification, but should be defined by the claims.

Claims

1. A display device, comprising: A display panel including a plurality of light-emitting areas; as well as an input sensor, disposed on the display panel and comprising a plurality of conductive patterns, Wherein, the plurality of conductive patterns include: a first sensing electrode including a plurality of bridge patterns and a plurality of first sensing patterns provided along a first direction, the plurality of bridge patterns connecting adjacent first sensing patterns among the plurality of first sensing patterns; a second sensing electrode spaced apart from the first sensing electrode and including a plurality of second sensing patterns extending along a second direction crossing the first direction; and a plurality of dummy patterns, each of which overlaps on a plane with the second sensing electrode and a first sensing pattern adjacent to the second sensing electrode in the first direction among the plurality of first sensing patterns, Each of the plurality of bridge patterns is connected to two first sensing patterns among the plurality of first sensing patterns through a first contact hole, When a region where each of the plurality of dummy patterns overlaps with each of the corresponding first sensing pattern and the second sensing electrode is defined as an overlapping region, a dummy hole passing through the corresponding first sensing pattern, the second sensing electrode, and the conductive pattern disposed at the upper portion among the plurality of dummy patterns in a thickness direction is defined in the overlapping region, Each of the plurality of bridge patterns is disposed between two dummy patterns among the plurality of dummy patterns in the second direction, and In the second direction, distances between the two dummy patterns and the bridge pattern disposed between the two dummy patterns are uniform.

2. The display device according to claim 1, wherein: The dummy hole comprises: a first dummy hole defined in a region where each of the plurality of dummy patterns overlaps with the second sensing electrode; and / or A second dummy hole is defined in a region where each of the plurality of dummy patterns overlaps with a corresponding first sensing pattern.

3. The display device according to claim 1, wherein: Each of the plurality of dummy patterns is connected to any one of the corresponding first sensing pattern and the second sensing electrode that does not overlap with the dummy hole through a second contact hole.

4. The display device according to claim 1, wherein: The plurality of conductive patterns further include at least one additional dummy pattern that overlaps any one of the corresponding first sensing pattern and the second sensing electrode and does not overlap another one of the corresponding first sensing pattern and the second sensing electrode.

5. The display device according to claim 4, wherein: When an area where the additional dummy pattern overlaps with any one of the corresponding first sensing pattern and the second sensing electrode is defined as an additional overlapping area, an additional dummy hole that passes through the corresponding first sensing pattern, the second sensing electrode, and the conductive pattern disposed on the upper portion among the additional dummy pattern in the thickness direction is defined in the additional overlapping area.

6. The display device according to claim 5, wherein: The first contact holes, the dummy holes, and the additional dummy holes are arranged at regular intervals in the first direction and the second direction.

7. The display device according to claim 4, wherein: The additional dummy pattern is electrically connected to any one of the corresponding first sensing patterns and the second sensing electrodes overlapped with the additional dummy pattern through a third contact hole.

8. The display device according to claim 4, wherein: A distance between two dummy patterns adjacent to each other in the first direction among the plurality of dummy patterns is the same as a distance between any one bridge pattern among the plurality of bridge patterns and the additional dummy pattern adjacent to the bridge pattern in the first direction.

9. The display device according to claim 1, wherein: The plurality of bridge patterns include a first bridge pattern connecting corresponding 1-1th sensing pattern and 1-2th sensing pattern to each other among the plurality of first sensing patterns, and The first bridge pattern comprises: a 1-1 bridge pattern connecting the 1-1 sensing pattern to the 1-2 sensing pattern; and The 1-2 bridge pattern is spaced apart from the 1-1 bridge pattern along the second direction and connects the 1-1 sensing pattern to the 1-2 sensing pattern.

10. The display device according to claim 9, wherein: The plurality of dummy patterns include a first dummy pattern disposed between the 1-1 bridge pattern and the 1-2 bridge pattern in the second direction, and A distance between the 1-1 bridge pattern and the first dummy pattern in the second direction is the same as a distance between the 1-2 bridge pattern and the first dummy pattern in the second direction.

11. The display device according to claim 1, wherein: A boundary portion is defined between the first sensing electrode and the second sensing electrode, and A portion of each of the plurality of dummy patterns overlaps the boundary portion.

12. The display device according to claim 1, wherein: A length of each of the plurality of bridge patterns in the first direction is the same as a length of each of the plurality of dummy patterns in the first direction.

13. The display device according to claim 1, wherein: A first length of each of the plurality of bridge patterns in the first direction is greater than a second length of each of the plurality of dummy patterns in the first direction.

14. The display device according to claim 1, wherein: When a region where each of the plurality of bridge patterns overlaps with each of the two first sensing patterns is defined as a bridge overlapping region, a bridge dummy hole passing through the two first sensing patterns and an upper conductive pattern among the plurality of bridge patterns in the thickness direction is defined in the bridge overlapping region.

15. The display device according to any one of claims 1 to 14, wherein: The input sensor further includes a sensing insulating layer disposed between the plurality of bridge patterns and the first sensing pattern, and The first contact hole passes through the sensing insulating layer.

16. The display device according to any one of claims 1 to 14, wherein: The input sensor further includes a sensing insulating layer disposed between the plurality of bridge patterns and the first sensing pattern, and The dummy hole exposes an upper surface of the sensing insulation layer.

17. The display device according to any one of claims 1 to 14, wherein: Each of the plurality of first sensing patterns and the plurality of second sensing patterns includes a plurality of grid lines defining a plurality of openings respectively overlapping the plurality of light emitting regions, The plurality of grid lines include: a first grid line having a first width in the second direction; and A second grid line has a second width greater than the first width in the second direction, and each of the first contact hole and the dummy hole overlaps the second grid line.

18. The display device according to any one of claims 1 to 14, wherein: The plurality of light emitting areas include: A first light emitting area configured to emit a first color light; a second light emitting area configured to emit a second color light different from the first color light; and a third light emitting area configured to emit a third color light different from the first color light and the second color light, The first light emitting areas and the second light emitting areas are arranged alternately along the second direction, The third light emitting area is arranged along the first direction and is separated from the first light emitting area and the second light emitting area, and Each of the first contact hole and the dummy hole overlaps the third light emitting region in the second direction.

19. A display device comprising: A display panel including a plurality of light-emitting areas; as well as an input sensor, disposed on the display panel and comprising a plurality of conductive patterns, Wherein, the plurality of conductive patterns include: a first sensing electrode including a plurality of bridge patterns and a plurality of first sensing patterns provided along a first direction, the plurality of bridge patterns connecting adjacent first sensing patterns among the plurality of first sensing patterns; a second sensing electrode spaced apart from the first sensing electrode and comprising a plurality of second sensing patterns extending along a second direction crossing the first direction; a plurality of dummy patterns, each of which overlaps on a plane with the second sensing electrode and a first sensing pattern adjacent to the second sensing electrode in the first direction among the plurality of first sensing patterns; and adding a dummy pattern to overlap with the first sensing pattern or the second sensing electrode, Each of the plurality of bridge patterns is connected to two first sensing patterns among the plurality of first sensing patterns through a first contact hole, When a region where each of the plurality of dummy patterns overlaps with each of the corresponding first sensing pattern and the second sensing electrode is defined as an overlapping region, a first hole recessed in the thickness direction and passing through the corresponding first sensing pattern, the second sensing electrode, and the conductive pattern disposed at the upper portion among the plurality of dummy patterns is defined in the overlapping region, The first sensing pattern or the second sensing electrode includes a second hole overlapping the additional dummy pattern, and The first contact hole, the first hole, and the second hole are arranged at regular intervals in the first direction and the second direction.

20. A display device, comprising: A display panel including a plurality of light-emitting areas; as well as an input sensor, disposed on the display panel and comprising a plurality of conductive patterns, Wherein, the plurality of conductive patterns include: a first sensing electrode having a first bridge pattern and a 1-1st sensing pattern and a 1-2nd sensing pattern provided along a first direction, the first bridge pattern connecting the 1-1st sensing pattern to the 1-2nd sensing pattern; a second sensing electrode spaced apart from the first sensing electrode and having a connection pattern and a 2-1st sensing pattern and a 2-2nd sensing pattern provided along a second direction crossing the first direction, the connection pattern having an integral shape with each of the 2-1st sensing pattern and the 2-2 sensing pattern; and a first dummy pattern, overlapping each of the 1-1th sensing pattern and the connection pattern on a plane, The first bridge pattern is connected to each of the 1-1th sensing pattern and the 1-2th sensing pattern through a first contact hole, and When an area where the first dummy pattern overlaps with each of the 1-1st sensing pattern and the connecting pattern is defined as an overlapping area, the overlapping area includes a dummy hole of a conductive pattern disposed on an upper portion that passes through the 1-1st sensing pattern, the connecting pattern, and the first dummy pattern in a thickness direction.

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