Display panel and driving method thereof

Abstract

The invention discloses a display panel and a driving method thereof. The display panel comprises a pixel circuit. The pixel circuit comprises a data writing module, a driving module, a light emitting module and a storage module, the data writing module is connected between the data line and the control end of the driving module; the first end of the driving module is connected with the first power supply; the second end of the driving module is connected with the light-emitting module; the driving module is used for generating driving current. The light-emitting module responds to the driving current to emit light. The first end of the storage module is connected with the control end of the driving module, and the second end of the storage module is connected with a compensation signal; the compensation signal is a sawtooth wave signal, one period of the compensation signal comprises a first ramp signal and a second ramp signal, and in one period of the compensation signal, the duration of the first ramp signal is longer than that of the second ramp signal; the change direction of the voltage in the first ramp signal is different from the change direction of the holding voltage of the first end of the storage module. According to the technical scheme, the display effect of the display panel is improved.

Description

[0001] The present invention claims the priority of application number 202411144701.2 (the filing date of the prior application is August 20, 2024, and the name of the invention is A method for improving the voltage retention rate of a pixel circuit using a ramp signal). Technical Field

[0002] The present invention relates to the field of display technology, and in particular to a display panel and a driving method thereof. Background Art

[0003] With the development of display technology, in addition to active matrix organic light emitting diodes (AMOLED), there are other types of OLED technologies, such as Micro OLED and PMOLED (Passive matrix organic light emitting diodes, Passive matrix OLED), which also have the characteristics of high contrast, fast response time and wide viewing angle, and are suitable for different application fields, such as virtual reality head-mounted displays (VRHMDs) and augmented reality glasses (AR glasses).

[0004] The core of these display technologies is to use organic materials as the light-emitting layer, which emits light under the action of electric current. Unlike traditional liquid crystal displays (LCD), OLED does not require a backlight, so it has a thinner design and higher energy efficiency. In AMOLED and Micro OLED, each pixel consists of one or more transistors and a storage capacitor to control and maintain the data voltage, ensuring that the pixel can stably display the required brightness throughout the frame time.

[0005] Nevertheless, the transistors in the pixel circuit still have leakage current problems. This leakage current will cause the gate voltage of the driver tube recorded by the storage capacitor to change within a frame time, that is, the voltage holding ratio will deteriorate. The voltage holding ratio (VHR) is an indicator of the ability of the pixel circuit to maintain its initial voltage without external voltage update. The general empirical formula in this field can be expressed as:

[0006]

[0007] in:

[0008] Vend can generally be the voltage value at the end of a frame time (or half of a frame time).

[0009] Vstart can generally be a voltage value at the beginning of a frame.

[0010] A voltage holding ratio close to 1 means better image stability. It can be seen that how to reduce the impact of leakage current on display effect is an urgent problem to be solved in OLED display technology. Summary of the invention

[0011] The present invention provides a display panel and a driving method thereof, so as to solve the problem that leakage current in a pixel circuit affects display effect.

[0012] According to one aspect of the present invention, a display panel is provided, the display panel comprising a pixel circuit; the pixel circuit comprises: a data writing module, a driving module, a light emitting module and a storage module;

[0013] The data writing module is connected between the data line and the control end of the driving module, and the data writing module is used to transmit the data voltage on the data line to the driving module;

[0014] The first end of the driving module is connected to a first power source, and the second end of the driving module is connected to the light emitting module; the driving module is used to generate a driving current, and the light emitting module is used to emit light in response to the driving current;

[0015] The first end of the storage module is connected to the control end of the driving module, and the second end of the storage module is connected to the compensation signal; wherein, the compensation signal is a sawtooth wave signal, and one cycle of the compensation signal includes a first ramp signal and a second ramp signal, and in one cycle of the compensation signal, the duration of the first ramp signal is greater than the duration of the second ramp signal; the change direction of the voltage in the first ramp signal is different from the change direction of the holding voltage at the first end of the storage module in the light-emitting stage, and in the light-emitting stage, the compensation signal is the first ramp signal.

[0016] Optionally, the holding voltage of the first end of the storage module gradually increases during the light-emitting phase, and the voltage in the first ramp signal gradually decreases;

[0017] Alternatively, the holding voltage of the first end of the storage module gradually decreases during the light-emitting stage, and the voltage in the first ramp signal gradually increases.

[0018] Optionally, the display panel further includes a plurality of compensation signal generating modules;

[0019] The compensation signal generating module is connected to the second end of the storage module in a row of the pixel circuits, and is used to provide the compensation signal to the storage module; the frequency of the compensation signal is the same as the refresh frequency of the display panel.

[0020] Optionally, the display panel further comprises a plurality of buffers;

[0021] The first input end of the buffer is connected to the output end of the compensation signal generating module, the second input end of the buffer is connected to the output end of the buffer, and the output end of the buffer is connected to the second end of the storage module in a row of the pixel circuits.

[0022] Optionally, the display panel further includes at least one first compensation signal generating module, at least one second compensation signal generating module and a selection module; the compensation signal includes a first compensation signal and a second compensation signal;

[0023] The first input end of the selection module is connected to the first compensation signal generating module, the second input end of the selection module is connected to the second compensation signal generating module, and the output end of the selection module is connected to the second end of the storage module; the first compensation signal generating module is used to generate a first compensation signal, and the second compensation signal generating module is used to generate a second compensation signal; wherein, the first compensation signal and the second compensation signal have the same waveform, and the duration of the cycle of the first compensation signal and the second compensation signal is a preset multiple of the duration of the cycle of a display frame of the display panel; the second compensation signal is delayed by a preset duration relative to the first compensation signal;

[0024] The selection module is used to output the first compensation signal to the second end of the storage module in the mth display frame, and output the second compensation signal to the second end of the storage module in the (m+1)th display frame; wherein m is a positive integer.

[0025] Optionally, the preset duration is the duration of a display frame of the display panel;

[0026] The preset multiple is an integer greater than 1.

[0027] Optionally, the display panel further comprises at least one buffer;

[0028] The first input end of the buffer is connected to the output end of the selection module, the second input end of the buffer is connected to the output end of the buffer, and the output end of the buffer is connected to the second end of the storage module.

[0029] Optionally, the pixel circuit further includes a reset module;

[0030] The reset module is connected between the reset signal line and the first end of the light emitting module, and is used to transmit the reset voltage on the reset signal line to the first end of the light emitting module during the reset phase;

[0031] The compensation signal is in the reset phase at the beginning of each cycle.

[0032] Optionally, the data writing module includes a data writing transistor;

[0033] The control electrode of the data writing transistor is connected to the first scanning line, and the data writing transistor is connected between the data line and the control end of the driving module;

[0034] The driving module comprises a driving transistor, a control electrode of the driving transistor is connected to the data writing transistor, a first electrode of the driving transistor is connected to a first power source, a second electrode of the driving transistor is connected to a first end of the light emitting module, and a second end of the light emitting module is connected to a second power source;

[0035] The storage module comprises a storage capacitor, a first electrode of the storage capacitor is connected to the control electrode of the driving transistor, and a second electrode of the storage capacitor is connected to the compensation signal;

[0036] The light emitting module includes an organic light emitting diode, a first electrode of the organic light emitting diode is connected to a second electrode of the driving transistor, and a second electrode of the organic light emitting diode is connected to the second power supply.

[0037] According to another aspect of the present invention, a method for driving a display panel is provided, for driving the display panel according to any one of the embodiments of the present invention; the method for driving a display panel comprises:

[0038] In the data writing stage, the data writing module transmits the data voltage on the data line to the driving module;

[0039] In the light-emitting stage, a compensation signal is transmitted to the second end of the storage module; the driving module generates a driving current, and the light-emitting module emits light in response to the driving current; wherein the compensation signal is a sawtooth wave signal, and one cycle of the compensation signal includes a first ramp signal and a second ramp signal, and in one cycle of the compensation signal, the duration of the first ramp signal is greater than the duration of the second ramp signal; the direction of change of the voltage in the first ramp signal is different from the direction of change of the holding voltage at the first end of the storage module in the light-emitting stage, and in the light-emitting stage, the compensation signal is the first ramp signal.

[0040] The technical solution of the embodiment of the present invention, by setting the second end of the storage module to access the compensation signal, the compensation signal is a sawtooth wave signal instead of a fixed signal, which can compensate for the voltage change of the first end of the storage module, thereby improving the voltage holding rate of the first end of the storage module, that is, improving the voltage holding rate of the control end of the driving module, thereby maintaining the data voltage of the control end of the driving module, avoiding the voltage change of the control end of the driving module caused by leakage current, ensuring the stability of the driving current generated by the driving module, and improving the stability of the luminous brightness of the light-emitting module, thereby ensuring that the light-emitting module can stably display the required brightness, so that the picture quality of the display panel is improved, and the display effect of the display panel is improved.

[0041] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0043] Figure 1 It is a graph of the change in gate voltage of a driving transistor;

[0044] Figure 2 is a schematic structural diagram of a display panel provided by an embodiment of the present invention;

[0045] Figure 3 is a schematic diagram of a compensation signal provided by an embodiment of the present invention;

[0046] Figure 4 is a structural schematic diagram of another display panel provided by an embodiment of the present invention;

[0047] Figure 5 is a voltage variation curve diagram of the control terminal of the driving module after compensation by the compensation signal provided in an embodiment of the present invention;

[0048] Figure 6 is a structural schematic diagram of another display panel provided by an embodiment of the present invention;

[0049] Figure 7 is a schematic diagram of another compensation signal provided by an embodiment of the present invention;

[0050] Figure 8 is a structural schematic diagram of another display panel provided by an embodiment of the present invention;

[0051] Fig. 9 is a structural schematic diagram of another display panel provided by an embodiment of the present invention;

[0052] Fig.10 is a timing diagram of a pixel circuit provided by an embodiment of the present invention;

[0053] Fig.11 It is a flow chart of a method for driving a display panel provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0054] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0055] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0056] Figure 1 It is a curve diagram of the gate voltage variation of the driving transistor. Figure 1 The graph shows a curve of the gate voltage Vg of the driving transistor changing with time when the data voltage Vdata is 5V, 4V, 3V and 2V respectively within one frame time.

[0057] The inventor has found that the switch tubes between the gate of the driving transistor and the data line of the common pixel circuits on the market are of two types: transmission gate and single-tube switch. The type of switch tube determines the leakage direction of the pixel circuit when it is working, which can be summarized in the voltage holding rate as follows: when the pixel input voltage is at different potentials, the gate voltage (Vgate) of the driving transistor in the pixel circuit with PMOS as the switch tube drifts downward as a whole when it is working (such as Figure 1As shown), the voltage holding rate is less than 1; the gate voltage of the driving transistor of the pixel circuit with NMOS as the switch tube drifts upward as a whole during operation, and the voltage holding rate is greater than 1; the pixel circuit with the transmission gate as the switch has both of the above two characteristics, and the voltage holding rate is less than 1 at a high data voltage, and the voltage holding rate is greater than 1 at a low data voltage.

[0058] Therefore, the voltage holding ratio can be adjusted according to the change of the voltage holding ratio, that is, according to the change of the gate voltage of the driving transistor, so as to maintain the gate voltage of the driving transistor.

[0059] An embodiment of the present invention provides a display panel. Figure 2 is a schematic diagram of a display panel provided by an embodiment of the present invention, with reference to Figure 2 , the display panel includes a pixel circuit 100, and the pixel circuit 100 includes: a data writing module 110, a driving module 120, a light emitting module 130 and a storage module 140;

[0060] The data writing module 110 is connected between the data line Data and the control end of the driving module 120, and the data writing module 110 is used to transmit the data voltage on the data line Data to the driving module 120;

[0061] A first end of the driving module 120 is connected to a first power source VDD, and a second end of the driving module 120 is connected to the light emitting module 130; the driving module 120 is used to generate a driving current, and the light emitting module 130 is used to emit light in response to the driving current;

[0062] The first end of the storage module 140 is connected to the control end of the driving module 120, and the second end of the storage module 140 is connected to the compensation signal V1; Figure 3 is a schematic diagram of a compensation signal provided by an embodiment of the present invention, with reference to Figure 3 , the compensation signal V1 is a sawtooth wave signal, and one cycle of the compensation signal V1 includes a first ramp signal V11 and a second ramp signal V12. In one cycle of the compensation signal V1, the duration of the first ramp signal V11 is greater than the duration of the second ramp signal V12; the change direction of the voltage in the first ramp signal V11 is different from the change direction of the holding voltage at the first end of the storage module 140 in the light-emitting stage. In the light-emitting stage, the compensation signal V1 is the first ramp signal V11.

[0063] Among them, the light-emitting module 130 can be an organic light-emitting diode (OLED). When the data writing module 110 is turned on, the data voltage on the data line Data can be transmitted to the control end of the driving module 120, so that the driving module 120 can generate a driving current according to the data voltage during the light-emitting stage, so that the light-emitting module 130 emits light in response to the driving current. The data writing module 110 includes a transistor of a single polarity (i.e., a single type), that is, the data writing module 110 does not include a CMOS (Complementary Metal Oxide Semiconductor) switch, so that the leakage current caused by the data writing module 110 changes in the same direction, so that the voltage attenuation direction of the control end of the driving module 120 is consistent, which is convenient for voltage compensation.

[0064] The maintained voltage at the first end of the storage module 140 is the voltage at the first end of the storage module 140 when no compensation is performed. The change direction of the maintained voltage at the first end of the storage module 140 during the light-emitting stage is the change direction of the voltage at the first end of the storage module 140 during the light-emitting stage when no compensation is performed.

[0065] Specifically, the storage module 140 has the function of storing voltage, and can maintain the voltage of the control end of the driving module 120. By setting the second end of the storage module 140 to access the compensation signal V1, the change direction of the voltage in the first ramp signal V11 in the compensation signal V1 is different from the change direction of the voltage maintained at the first end of the storage module 140, so that the change of the voltage at the first end of the storage module 140 can be compensated. In addition, the time of the second ramp signal V12 is very short, and the second ramp signal V12 does not overlap with the time of the light-emitting stage, which will not affect the compensation effect. In addition, the amplitude of the compensation signal V1 matches the voltage distortion degree (attenuation degree) of the first end of the storage module 140 without compensation, and the situation under different data voltages can be compensated.

[0066] In this way, the voltage holding rate of the first end of the storage module 140 can be improved, that is, the voltage holding rate of the control end of the driving module 120 can be improved, so that the voltage of the control end of the driving module 120 will not be attenuated by the leakage current, and the data voltage of the control end of the driving module 120 can be maintained, thereby ensuring the stability of the driving current generated by the driving module 120 and improving the stability of the brightness of the light-emitting module 130, thereby ensuring that the light-emitting module 130 can stably display the required brightness, so that the picture quality of the display panel is improved.

[0067] For example, the compensation signal may start from the light-emitting stage, so that the control end of the driving module 120 is compensated during the entire light-emitting period to ensure the stability of the driving current generated by the driving module 120. The compensation signal may also start from before the light-emitting stage, as long as the compensation signal has a fixed slope during the entire light-emitting period, for example, the compensation signal corresponding to the entire light-emitting stage is the first ramp signal V11, so as to ensure the voltage compensation effect on the control end of the driving module 120.

[0068] The technical solution of this embodiment, by setting the second end of the storage module to access the compensation signal, the compensation signal is a sawtooth wave signal instead of a fixed signal, which can compensate for the voltage change of the first end of the storage module, thereby improving the voltage holding rate of the first end of the storage module, that is, improving the voltage holding rate of the control end of the driving module, thereby maintaining the data voltage of the control end of the driving module, avoiding the voltage change of the control end of the driving module caused by leakage current, ensuring the stability of the driving current generated by the driving module, and improving the stability of the light emitting brightness of the light emitting module, thereby ensuring that the light emitting module can stably display the required brightness, so that the picture quality of the display panel is improved, and the display effect of the display panel is improved.

[0069] On the basis of the above technical solution, optionally, the holding voltage of the first end of the storage module 140 gradually increases during the light-emitting stage, and the voltage in the first ramp signal V11 gradually decreases; or, the holding voltage of the first end of the storage module 140 gradually decreases during the light-emitting stage, and the voltage in the first ramp signal V11 gradually increases. In this way, the voltage change direction of the first ramp signal V11 in the compensation signal V1 is opposite to the change direction of the holding voltage of the first end of the storage module 140 during the light-emitting stage, that is, opposite to the voltage attenuation direction of the control end of the driving module 120. When the voltage of the second end of the storage module 140 changes, the voltage of the first end of the storage module 140 will change accordingly, so that the voltage of the control end of the driving module 120 can be compensated, and the voltage holding rate of the control end of the driving module 120 can be improved, so as to maintain the data voltage of the control end of the driving module 120 and avoid the voltage change of the control end of the driving module 120 caused by leakage current.

[0070] For example, when the transistor in the data writing module 110 is an N-type transistor, the slope of the first ramp signal V11 is positive, that is, the voltage of the first ramp signal V11 gradually increases over time. When the transistor in the data writing module 110 is a P-type transistor, the slope of the first ramp signal V11 is negative, that is, the voltage of the first ramp signal V11 gradually decreases over time.

[0071] On the basis of the above technical solutions, the compensation signal may be one signal or two signals. The two solutions are described below respectively, but they are not intended to limit the present application.

[0072] In one embodiment, Figure 4 is a schematic diagram of the structure of another display panel provided by an embodiment of the present invention. Figure 4 , the display panel further includes a plurality of compensation signal generating modules 150;

[0073] The compensation signal generating module 150 is connected to the second end of the storage module 140 in a row of pixel circuits 100 and is used to provide a compensation signal V1 to the storage module 140 ; ​​the frequency of the compensation signal V1 is the same as the refresh frequency of the display panel.

[0074] Specifically, the compensation signal generating module 150 includes a sawtooth wave generating circuit, which can generate a compensation signal V1. The compensation signal V1 can be started at the beginning of the light-emitting phase of each display frame, or before the light-emitting phase of each display frame. The frequency of the compensation signal V1 is the same as the refresh frequency of the display panel, so that the first end of the storage module 140 can be compensated during the light-emitting phase of each display frame, thereby maintaining the data voltage of the control end of the driving module 120 and avoiding voltage changes at the control end of the driving module 120 caused by leakage current.

[0075] The display panel includes a plurality of compensation signal generating modules 150 , the number of the compensation signal generating modules 150 is the same as the number of rows of the pixel circuits 100 , and each compensation signal generating module 150 is connected to a row of storage modules 140 .

[0076] Figure 5 is a voltage variation curve diagram of the control terminal of the driving module after compensation by the compensation signal provided in an embodiment of the present invention, Figure 5 FIG. 2 shows a curve of the voltage Vgate of the control terminal of the driving module 120 changing with time after compensation by the compensation signal V1 when the data voltage Vdata is 5V, 4V, 3V and 2V respectively within one frame time. Figure 5 As shown, after being compensated by the compensation signal V1, the distortion degree (attenuation degree) of the voltage Vgate at the control end of the driving module 120 is reduced, thereby avoiding large fluctuations in the driving current generated by the driving module 120.

[0077] Optionally, refer to Figure 4 , the display panel further includes a plurality of buffers 160;

[0078] The first input terminal of the buffer 160 is connected to the output terminal of the compensation signal generating module, the second input terminal of the buffer is connected to the output terminal of the buffer 160 , and the output terminal of the buffer 160 is connected to the second terminal of the storage module 140 in a row of pixel circuits 100 .

[0079] Specifically, the number of buffers 160 may be the same as the number of compensation signal generating modules 150. The function of the buffer 160 is to isolate the compensation signal generating module 150 from the pixel circuit 100, reduce the load of the pixel circuit 100, and ensure that the compensation signal can be stably and accurately transmitted to the storage module 140.

[0080] In another embodiment, Figure 6 is a structural schematic diagram of another display panel provided by an embodiment of the present invention, Figure 7 is a schematic diagram of another compensation signal provided by an embodiment of the present invention. Optionally, refer to Figure 6 and Figure 7 , the display panel further includes at least one first compensation signal generating module 151, at least one second compensation signal generating module 152 and a selection module 153; the compensation signal V1 includes a first compensation signal V01 and a second compensation signal V02;

[0081] The first input end of the selection module 153 is connected to the first compensation signal generating module 151, the second input end of the selection module 153 is connected to the second compensation signal generating module 152, and the output end of the selection module 153 is connected to the second end of the storage module 140; the first compensation signal generating module 151 is used to generate a first compensation signal V01, and the second compensation signal generating module 152 is used to generate a second compensation signal; wherein the first compensation signal V01 and the second compensation signal V02 have the same waveform, and the duration of the cycle of the first compensation signal V01 and the second compensation signal V02 is a preset multiple of the duration of the cycle of a display frame of the display panel; the second compensation signal V02 is delayed by a preset duration relative to the first compensation signal V01;

[0082] The selection module 153 is used to output the first compensation signal V01 to the second end of the storage module 140 in the mth display frame, and output the second compensation signal V02 to the second end of the storage module 140 in the (m+1)th display frame; wherein m is a positive integer.

[0083] For example, Figure 7 As shown, in the first display frame t1 and the second display frame t2 of the display panel, the first compensation signal V01 is the first ramp signal V11, and in the second display frame t2 and the third display frame t3 of the display panel, the second compensation signal V02 is the first ramp signal V11. Then, in the first display frame t1, the selection module 153 selects the first compensation signal V01 to output to the second end of the storage module 140, and in the second display frame t2, the selection module 153 selects the second compensation signal V02 to output to the second end of the storage module 140. Thus, the first compensation signal V01 and the second compensation signal V02 are alternately output to the second end of the storage module 140, ensuring that the voltage output to the second end of the storage module 140 is not zero.

[0084] in, Figure 7 The pulse signal shown in can be a scanning signal corresponding to the data writing module 110 in the pixel circuit 100, or can be a scanning signal corresponding to the reset module in the pixel circuit 100. It is not limited here. Three pulse signals correspond to three rows of pixel circuits. Figure 7 2 shows a case where the slope of the first ramp signal V11 is positive and the slope of the second ramp signal V12 is negative, but this is not limiting.

[0085] The selection module 153 may include a transmission gate circuit or a multiplexer, which is not limited in this embodiment. The selection module 153 may operate according to a clock signal, and the frequency of the clock signal may be consistent with the refresh frequency of the display panel, so that the first compensation signal V01 may be output to the second end of the storage module 140 in the mth display frame, and the second compensation signal V02 may be output to the second end of the storage module 140 in the m+1th display frame.

[0086] Specifically, by setting the first compensation signal generating module 151 and the second compensation signal generating module 152, the waveforms of the first compensation signal V01 generated by the first compensation signal generating module 151 and the second compensation signal V02 generated by the second compensation signal generating module 152 are the same, and the second compensation signal V02 is delayed by a preset time length relative to the first compensation signal V01. And the selection module 153 outputs the first compensation signal V01 to the second end of the storage module 140 in the mth display frame, and outputs the second compensation signal V02 to the second end of the storage module 140 in the m+1th display frame, that is, the first compensation signal V01 and the second compensation signal V02 can be alternately output to the second end of the storage module 140, so that before the first ramp signal V11 in the first compensation signal V01 changes to the second ramp signal V12, it can switch to the second compensation signal V02 output, that is, output the first ramp signal V11 of the second compensation signal V02. For example, if the slope of the first ramp signal V11 is positive and the slope of the second ramp signal V12 is negative, it can be ensured that the compensation signal output to the second end of the storage module 140 is always a ramp signal with a positive slope, and it can be ensured that the voltage of the compensation signal connected to the second end of the storage module 140 is not zero, thereby ensuring the compensation effect on the first end of the storage module 140 and improving the voltage holding rate of the control end of the driving module 120.

[0087] In this way, the voltage holding rate of the pixel circuit is optimized, the stability and continuity of the luminous brightness of the light-emitting module 130 are improved, the visual flicker is reduced, and the problem of uneven display caused by uneven luminous brightness of the light-emitting module 130 driven by each pixel circuit due to leakage differences among the pixel circuits is improved.

[0088] The display panel may include a first compensation signal generating module 151, a second compensation signal generating module 152 and a selection module 153, and one selection module 153 is connected to the second end of all storage modules 140 in the display panel. The display panel may also include two first compensation signal generating modules 151, two second compensation signal generating modules 152 and two selection modules 153, each selection module 153 is connected to half the number of storage modules 140. The display panel may also include multiple first compensation signal generating modules 151, multiple second compensation signal generating modules 152 and multiple selection modules 153, the number of selection modules 153 is the same as the number of rows of the pixel circuit 100, and each selection module 153 is connected to a row of storage modules 140. The display panel may also include multiple first compensation signal generating modules 151, multiple second compensation signal generating modules 152 and multiple selection modules 153, the number of selection modules 153 is less than the number of rows of the pixel circuit 100, and each selection module 153 is connected to multiple rows of storage modules 140. This embodiment does not limit the number of the first compensation signal generating module 151, the second compensation signal generating module 152 and the selection module 153. For example, the number of the first compensation signal generating module 151, the second compensation signal generating module 152 and the selection module 153 is the same.

[0089] On the basis of the above technical solution, optionally, the preset duration is the duration of a display frame of the display panel;

[0090] The preset multiple is an integer greater than 1.

[0091] Specifically, Figure 7 As shown, the second compensation signal V02 is delayed by the duration of one display frame relative to the first compensation signal V01, so that the second compensation signal V02 can be switched to be output to the second end of the storage module 140 in the second display frame, and the first compensation signal V01 and the second compensation signal V02 are alternately transmitted. And the preset multiple is an integer greater than 1, so that the duration of the cycle of the first compensation signal V01 and the second compensation signal V02 is longer, which can avoid the failure to meet the compensation of one display frame, thereby ensuring the compensation effect on the control end of the driving module 120, so that the driving module 120 stably generates a driving current in the light-emitting stage, and the light-emitting module 130 stably emits light. Optionally, as Figure 7 As shown, the preset multiple is 2. In this way, the compensation requirement can be met, and the period of the compensation signal will not be too long, thereby reducing the difficulty of signal generation.

[0092] On the basis of the above technical solution, optionally, refer to Figure 6 , the display panel further includes at least one buffer 160;

[0093] A first input terminal of the buffer 160 is connected to an output terminal of the selection module 153 , a second input terminal of the buffer 160 is connected to an output terminal of the buffer 160 , and an output terminal of the buffer 160 is connected to a second terminal of the storage module 140 .

[0094] Specifically, the number of buffers 160 may be the same as the number of selection modules 153. The function of the buffer 160 is to isolate the selection module 153 from the pixel circuit 100, reduce the load of the pixel circuit 100, and ensure that the compensation signal can be stably and accurately transmitted to the storage module 140.

[0095] On the basis of the above technical solution, optionally, refer to Figure 6 , the pixel circuit 100 further includes a reset module 170;

[0096] The reset module 170 is connected between the reset signal line Vref and the first end of the light emitting module 130. The reset module 170 is used to transmit the reset voltage on the reset signal line Vref to the first end of the light emitting module 130 during the reset phase.

[0097] The compensation signal V1 is in a reset phase at the beginning of each cycle.

[0098] The second end of the light emitting module 130 is connected to the second power supply VCOM. The first power supply voltage provided by the first power supply VDD is a positive voltage, and the second power supply voltage provided by the second power supply VCOM is a negative voltage or zero. Alternatively, the first power supply voltage provided by the first power supply VDD is a negative voltage or zero, and the second power supply voltage provided by the second power supply VCOM is a positive voltage.

[0099] Specifically, in the reset stage, the reset module 170 is turned on, and the reset module 170 transmits the reset voltage on the reset signal line Vref to the first end of the light emitting module 130, and resets the first end of the light emitting module 130. By setting the compensation signal V1 as the reset stage at the beginning of each cycle, the compensation signal V1 can be a signal that steps to an initial value in the reset stage and maintains a fixed slope in the entire light emitting stage, so that the output of the first compensation signal V01 and the second compensation signal V02 can be switched in the reset stage, ensuring the compensation effect on the control end of the driving module 120 in the entire display frame.

[0100] On the basis of the above technical solutions, the structures that may be included in each module in the pixel circuit 100 are described below, but this is not intended to limit the present application.

[0101] Figure 8 is a structural schematic diagram of another display panel provided by an embodiment of the present invention, Fig. 9 is a schematic diagram of the structure of another display panel provided by an embodiment of the present invention. Figure 8 or Fig. 9 , the data writing module 110 includes a data writing transistor T1;

[0102] The control electrode of the data writing transistor T1 is connected to the first scanning line S1, and the data writing transistor T1 is connected between the data line Data and the control terminal of the driving module 120;

[0103] The driving module 120 includes a driving transistor T2, a control electrode of the driving transistor T2 is connected to the data writing transistor T1, a first electrode of the driving transistor T2 is connected to the first power supply VDD, a second electrode of the driving transistor T2 is connected to the first end of the light emitting module 130, and a second end of the light emitting module 130 is connected to the second power supply VCOM;

[0104] The storage module 140 includes a storage capacitor C1, a first electrode of the storage capacitor C1 is connected to the control electrode of the driving transistor T2, and a second electrode of the storage capacitor C1 is connected to the compensation signal V1;

[0105] The light emitting module 130 includes an organic light emitting diode D1 , a first electrode of the organic light emitting diode D1 is connected to a second electrode of the driving transistor T2 , and a second electrode of the organic light emitting diode D1 is connected to a second power source VCOM.

[0106] The first pole of the organic light emitting diode D1 is the first end of the light emitting module 130, and the second pole of the organic light emitting diode D1 is the second end of the light emitting module 130. The first pole of the organic light emitting diode D1 is the anode, and the second pole of the organic light emitting diode D1 is the cathode; or the first pole of the organic light emitting diode D1 is the cathode, and the second pole of the organic light emitting diode D1 is the anode.

[0107] Specifically, a display frame corresponding to the pixel circuit includes a data writing stage and a light emitting stage. In the data writing stage, the first scanning signal on the first scanning line S1 controls the data writing transistor T1 to turn on, and the data writing transistor T1 transmits the data voltage on the data line Data to the control end of the driving module 120 (that is, the control electrode of the driving transistor T2). In the light emitting stage, the driving transistor T2 generates a driving current according to the data voltage, and the organic light emitting diode D1 emits light in response to the driving current. By connecting the compensation signal V1 to the second electrode of the storage capacitor C1, the compensation signal V1 can be started during the light emitting stage or before the light emitting stage, and the voltage of the first electrode of the storage capacitor C1, that is, the voltage of the control electrode of the driving transistor T2, can be compensated, so that the data voltage of the control electrode of the driving transistor T2 will not be greatly attenuated due to leakage current, thereby ensuring the stability of the driving current.

[0108] It should be noted that Figure 8 and Fig. 9In the figure, the intersection of the first scan line S1 and the data line Data does not mean that the first scan line S1 and the data line Data are connected, and the first scan line S1 and the data line Data may be located in different film layers. Figure 8 and Fig. 9 The data writing transistor T1 is shown as an N-type transistor, but this is not limited. In some other embodiments, the data writing transistor T1 may also be a P-type transistor. Figure 8 and Fig. 9 The driving transistor T2 is shown as an N-type transistor, but this is not limited. In some other embodiments, the driving transistor T2 may also be a P-type transistor.

[0109] Optionally, refer to Fig. 9 The reset module 170 includes a reset transistor T3 , a control electrode of the reset transistor T3 is connected to the second scan line S2 , and the reset transistor T3 is connected between the reset signal line Vref and the first electrode of the organic light emitting diode D1 .

[0110] Specifically, a display frame corresponding to the pixel circuit may also include a reset stage. In the reset stage, the second scan signal on the second scan line S2 controls the reset transistor T3 to turn on, and the reset transistor T3 can transmit the reset voltage on the reset signal line Vref to the first electrode of the organic light emitting diode D1 to reset the first electrode of the organic light emitting diode D1.

[0111] It should be noted that Fig. 9 The case where the reset transistor T3 is an N-type transistor is shown in the figure, but this is not limited to this.

[0112] In some other implementations, the pixel circuit 100 may further include other transistors, such as a light emitting control transistor and a threshold compensation transistor, etc., which is not limited in this embodiment.

[0113] Fig.10 is a timing diagram of a pixel circuit provided by an embodiment of the present invention. Optionally, refer to Fig. 9 and Fig.10 ,The working process of the pixel circuit includes the following stages.

[0114] In the reset phase t11, the second scan signal on the second scan line S2 is at a high level, the reset transistor T3 is turned on, the first scan signal on the first scan line S1 is at a low level, and the data writing transistor T1 is not turned on. The reset transistor T3 can transmit the reset voltage on the reset signal line Vref to the first electrode of the organic light emitting diode D1 to reset the first electrode of the organic light emitting diode D1. In addition, in the reset phase t11, the selection module 153 switches the output compensation signal, outputs the first compensation signal V01 or the second compensation signal V02, and performs voltage compensation on the first electrode of the storage capacitor C1, that is, performs voltage compensation on the control electrode of the driving transistor T2.

[0115] In the data writing stage t12, the second scanning signal on the second scanning line S2 is low level, the reset transistor T3 is not turned on, the first scanning signal on the first scanning line S1 is high level, the data writing transistor T1 is turned on, and the data writing transistor T1 transmits the data voltage to the control electrode of the driving transistor T1.

[0116] In the light-emitting stage t13, the driving transistor T2 generates a driving current according to the data voltage, and the organic light-emitting diode D1 emits light in response to the driving current. In addition, the compensation signal performs voltage compensation on the control electrode of the driving transistor T2, which can maintain the driving current generated by the driving transistor T2 and maintain the light-emitting brightness of the organic light-emitting diode D1 in the entire light-emitting stage, thereby improving the display effect of the display panel.

[0117] An embodiment of the present invention further provides a method for driving a display panel, which is used to drive the display panel provided by any implementation scheme of the present invention. Fig.11 is a flow chart of a method for driving a display panel provided by an embodiment of the present invention, with reference to Fig.11 , the driving method of the display panel includes:

[0118] S101 , in a data writing phase, a data writing module transmits a data voltage on a data line to a driving module.

[0119] Specifically, in the data writing stage, the data writing module is turned on, and the data writing module transmits the data voltage on the data line to the driving module, so that the subsequent driving module responds to the driving current to emit light.

[0120] S102. In the light-emitting stage, a compensation signal is transmitted to the second end of the storage module; the driving module generates a driving current, and the light-emitting module emits light in response to the driving current; wherein the compensation signal is a sawtooth wave signal, and one cycle of the compensation signal includes a first ramp signal and a second ramp signal, and in one cycle of the compensation signal, the duration of the first ramp signal is greater than the duration of the second ramp signal; the direction of change of the voltage in the first ramp signal is different from the direction of change of the holding voltage at the first end of the storage module in the light-emitting stage, and in the light-emitting stage, the compensation signal is the first ramp signal.

[0121] Specifically, the storage module 140 has the function of storing voltage, and can maintain the voltage of the control end of the driving module 120. By setting the second end of the storage module 140 to be connected to the compensation signal V1, the change direction of the voltage in the first ramp signal V11 in the compensation signal V1 is different from the change direction of the voltage maintained at the first end of the storage module 140, so that the change of the voltage at the first end of the storage module 140 can be compensated. Therefore, the voltage holding rate of the first end of the storage module 140 can be improved, that is, the voltage holding rate of the control end of the driving module 120 can be improved, so that the voltage at the control end of the driving module 120 will not be attenuated by the leakage current, and the data voltage at the control end of the driving module 120 can be maintained, thereby ensuring the stability of the driving current generated by the driving module 120, and improving the stability of the light emitting brightness of the light emitting module 130, thereby ensuring that the light emitting module 130 can stably display the required brightness, so that the picture quality of the display panel is improved.

[0122] The compensation signal may start from the light-emitting stage, so that the control end of the driving module 120 is compensated during the entire light-emitting period to ensure the stability of the driving current generated by the driving module 120. The compensation signal may also start from before the light-emitting stage, as long as the compensation signal has a fixed slope during the entire light-emitting period, for example, the compensation signal corresponding to the entire light-emitting stage is the first ramp signal V11, so as to ensure the voltage compensation effect on the control end of the driving module 120.

[0123] Based on the above technical solution, optionally, the compensation signal includes a first compensation signal and a second compensation signal. Before the data writing stage, the driving method of the display panel further includes:

[0124] In the reset phase, the selection module switches the compensation signal output to the second terminal of the storage module.

[0125] Specifically, in the reset stage, the selection module 153 switches the first compensation signal V01 to the second compensation signal V02, or switches the second compensation signal V02 to the first compensation signal V01. The selection module 153 outputs the first compensation signal V01 to the second end of the storage module 140 in the mth display frame, and outputs the second compensation signal V02 to the second end of the storage module 140 in the m+1th display frame. Thus, the first compensation signal V01 and the second compensation signal V02 are alternately output to the second end of the storage module 140, ensuring that the voltage output to the second end of the storage module 140 is not zero.

[0126] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps described in the present invention can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solution of the present invention can be achieved, and this document does not limit this.

[0127] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A display panel, characterized in that: including a pixel circuit; The pixel circuit comprises: a data writing module, a driving module, a light emitting module and a storage module; The data writing module is connected between the data line and the control end of the driving module, and the data writing module is used to transmit the data voltage on the data line to the driving module; The first end of the driving module is connected to a first power source, and the second end of the driving module is connected to the light emitting module; the driving module is used to generate a driving current, and the light emitting module is used to emit light in response to the driving current; The first end of the storage module is connected to the control end of the driving module, and the second end of the storage module is connected to the compensation signal; wherein, the compensation signal is a sawtooth wave signal, and one cycle of the compensation signal includes a first ramp signal and a second ramp signal, and in one cycle of the compensation signal, the duration of the first ramp signal is greater than the duration of the second ramp signal; the change direction of the voltage in the first ramp signal is different from the change direction of the holding voltage at the first end of the storage module in the light-emitting stage, and in the light-emitting stage, the compensation signal is the first ramp signal.

2. The display panel according to claim 1, characterized in that: The holding voltage of the first end of the storage module gradually increases during the light-emitting stage, and the voltage in the first ramp signal gradually decreases; Alternatively, the holding voltage of the first end of the storage module gradually decreases during the light-emitting stage, and the voltage in the first ramp signal gradually increases.

3. The display panel according to claim 1, characterized in that: The display panel further includes a plurality of compensation signal generating modules; The compensation signal generating module is connected to the second end of the storage module in a row of the pixel circuits, and is used to provide the compensation signal to the storage module; the frequency of the compensation signal is the same as the refresh frequency of the display panel.

4. The display panel according to claim 3, characterized in that: The display panel also includes a plurality of buffers; The first input end of the buffer is connected to the output end of the compensation signal generating module, the second input end of the buffer is connected to the output end of the buffer, and the output end of the buffer is connected to the second end of the storage module in a row of the pixel circuits.

5. The display panel according to claim 1, characterized in that: The display panel further includes at least one first compensation signal generating module, at least one second compensation signal generating module and a selection module; the compensation signal includes a first compensation signal and a second compensation signal; The first input end of the selection module is connected to the first compensation signal generating module, the second input end of the selection module is connected to the second compensation signal generating module, and the output end of the selection module is connected to the second end of the storage module; the first compensation signal generating module is used to generate a first compensation signal, and the second compensation signal generating module is used to generate a second compensation signal; wherein, the first compensation signal and the second compensation signal have the same waveform, and the duration of the cycle of the first compensation signal and the second compensation signal is a preset multiple of the duration of the cycle of a display frame of the display panel; the second compensation signal is delayed by a preset duration relative to the first compensation signal; The selection module is used to output the first compensation signal to the second end of the storage module in the mth display frame, and output the second compensation signal to the second end of the storage module in the (m+1)th display frame; wherein m is a positive integer.

6. The display panel according to claim 5, characterized in that: The preset duration is the duration of a display frame of the display panel; The preset multiple is an integer greater than 1.

7. The display panel according to claim 5, characterized in that: The display panel further comprises at least one buffer; The first input end of the buffer is connected to the output end of the selection module, the second input end of the buffer is connected to the output end of the buffer, and the output end of the buffer is connected to the second end of the storage module.

8. The display panel according to any one of claims 1 to 7, characterized in that: The pixel circuit also includes a reset module; The reset module is connected between the reset signal line and the first end of the light emitting module, and is used to transmit the reset voltage on the reset signal line to the first end of the light emitting module during the reset phase; The compensation signal is in the reset phase at the beginning of each cycle.

9. The display panel according to any one of claims 1 to 7, characterized in that: The data writing module includes a data writing transistor; The control electrode of the data writing transistor is connected to the first scanning line, and the data writing transistor is connected between the data line and the control end of the driving module; The driving module comprises a driving transistor, a control electrode of the driving transistor is connected to the data writing transistor, a first electrode of the driving transistor is connected to a first power source, a second electrode of the driving transistor is connected to a first end of the light emitting module, and a second end of the light emitting module is connected to a second power source; The storage module comprises a storage capacitor, a first electrode of the storage capacitor is connected to the control electrode of the driving transistor, and a second electrode of the storage capacitor is connected to the compensation signal; The light emitting module includes an organic light emitting diode, a first electrode of the organic light emitting diode is connected to a second electrode of the driving transistor, and a second electrode of the organic light emitting diode is connected to the second power supply.

10. A method for driving a display panel, characterized in that: Used to drive the display panel according to any one of claims 1 to 9; The driving method of the display panel includes: In the data writing stage, the data writing module transmits the data voltage on the data line to the driving module; In the light-emitting stage, a compensation signal is transmitted to the second end of the storage module; the driving module generates a driving current, and the light-emitting module emits light in response to the driving current; wherein the compensation signal is a sawtooth wave signal, and one cycle of the compensation signal includes a first ramp signal and a second ramp signal, and in one cycle of the compensation signal, the duration of the first ramp signal is greater than the duration of the second ramp signal; the direction of change of the voltage in the first ramp signal is different from the direction of change of the holding voltage at the first end of the storage module in the light-emitting stage, and in the light-emitting stage, the compensation signal is the first ramp signal.

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