Display substrate and manufacturing method thereof, display mother board and display device
By setting a second passivation pattern in the effective display area of the display substrate, etching of edge areas is reduced, and the foreign matter formation problem caused by traditional etching processes is solved, and product performance and yield are improved.
Patent Information
- Application Number
- CN202310966182.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-07-31
- Publication Date
- 2025-02-18
AI Technical Summary
During the preparation of display motherboards for Mini LED and Micro LED, traditional etching processes cause the passivation layer etching in the edge area to produce silicon nitride-like products, which adhere to the pad pattern to form foreign matter, affecting the nickel-copper metal film layer The growth of the product results in a decrease in product performance and yield.
By providing a second passivation pattern on at least one side of the effective display area of the display substrate, the etching area of the edge region is reduced, the silicon fluoride-based product generated during the etching of the first passivation layer is reduced, and the foreign matter film layer is avoided form.
It effectively reduces foreign matter defects, improves the growth of nickel-copper metal film, improves product performance and production yield, and reduces cost and production complexity.
Smart Images
Figure CN119486434A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the field of display technology, and in particular to a display substrate and a manufacturing method thereof, a display motherboard and a display device. Background Art
[0002] With the development of display technology, Mini LED and Micro LED have gradually replaced the market position of traditional display panels with their excellent performance such as lower power consumption, faster response speed, longer life, higher color saturation and contrast. With the popularization of 4K ultra-high definition in the 5G era, the penetration rate of Mini LED and Micro LED will accelerate, and the market potential is huge. Summary of the invention
[0003] The present disclosure provides a display substrate, comprising an effective display area and an edge area located outside the effective display area, the display substrate comprising:
[0004] substrate substrate;
[0005] a metal layer, disposed on one side of the base substrate, located in the effective display area, and comprising a pad pattern; and
[0006] A first passivation layer is arranged on the side of the metal layer away from the base substrate, including a first passivation pattern and a first opening located in the effective display area, and a second passivation pattern located in the edge area, the first opening is used to leak the pad pattern, wherein the second passivation pattern is located on at least one side of the effective display area.
[0007] In some embodiments, the second passivation pattern is located on three sides or four sides of the effective display area.
[0008] In some embodiments, the second passivation pattern has the same thickness as the first passivation pattern.
[0009] In some embodiments, a surface of the first passivation pattern facing away from the base substrate is higher than or equal to a surface of the second passivation pattern facing away from the base substrate.
[0010] In some embodiments, the first passivation layer includes a first sub-passivation layer and a second sub-passivation layer that are stacked, the first sub-passivation layer is disposed close to the base substrate, and the display substrate further includes:
[0011] A first planar layer is arranged between the first sub-passivation layer and the second sub-passivation layer, wherein the orthographic projection of the first planar layer on the base substrate is located within the effective display area, and comprises a second opening, wherein the second opening is used to leak the pad pattern, and the hole wall of the second opening is located at the periphery of the first opening.
[0012] In some embodiments, an angle between a side surface of the first passivation pattern facing the first opening and a plane where the substrate is located is greater than or equal to 60°.
[0013] In some embodiments, the display substrate further comprises:
[0014] A light emitting diode is arranged on a side of the first passivation layer away from the base substrate and connected to the pad pattern.
[0015] The present disclosure provides a display motherboard, comprising: a plurality of display substrates arranged in an array, wherein the display substrates are the display substrates described in any one of the embodiments.
[0016] In some embodiments, the display motherboard further includes a spacing area located at the periphery of the effective display areas of the plurality of display substrates, and the display motherboard includes a first number of display substrates;
[0017] The product of the orthographic projection area of the second passivation pattern on the base substrate and the first number is the first area, and the product of the orthographic projection area of the first opening on the base substrate and the first number is the second area;
[0018] The ratio of a difference between an area of the spacing region and the first area to the second area is less than or equal to 6.
[0019] In some embodiments, the plurality of display substrates are divided into a plurality of substrate groups, and the substrate groups include the same number of the plurality of display substrates;
[0020] In one substrate group, other display substrates belonging to the same substrate group are arranged on the first side of the display substrate;
[0021] The second passivation pattern is located at a second side of the effective display area, and the second side is different from the first side.
[0022] In some embodiments, the substrate set includes two display substrates, and the second side includes three sides other than the first side of the effective display area.
[0023] The present disclosure provides a display device, comprising:
[0024] The display substrate according to any one of the embodiments; and
[0025] The driving component is connected to the display substrate and is used to drive the display substrate to display.
[0026] The present disclosure provides a method for preparing a display substrate, wherein the display substrate comprises an effective display area and an edge area located outside the effective display area, and the preparation method comprises:
[0027] providing a substrate base plate;
[0028] forming a metal layer on one side of the base substrate, the metal layer being located in the effective display area and comprising a pad pattern; and
[0029] A first passivation layer is formed on the side of the metal layer facing away from the base substrate, the first passivation layer includes: a first passivation pattern and a first opening located in the effective display area, and a second passivation pattern located in the edge area, the first opening is used to leak the pad pattern, wherein the second passivation pattern is located on at least one side of the effective display area.
[0030] In some embodiments, the step of forming a first passivation layer on a side of the metal layer facing away from the substrate includes:
[0031] forming a passivation film on a side of the metal layer facing away from the substrate;
[0032] forming a photoresist on a side of the passivation film away from the substrate;
[0033] Using a mask and a baffle in an exposure device, the photoresist is shielded and exposed, and the exposed photoresist is developed to obtain a photoresist pattern, wherein the photoresist pattern covers the first passivation pattern and the second passivation pattern;
[0034] The passivation film not covered by the photoresist pattern is etched to obtain the first passivation layer.
[0035] In some embodiments, the step of forming a passivation film on a side of the metal layer facing away from the substrate includes:
[0036] The passivation film is formed on the side of the metal layer away from the substrate by using a chemical vapor deposition process.
[0037] The above description is only an overview of the technical solution of the present disclosure. In order to more clearly understand the technical means of the present disclosure, it can be implemented according to the contents of the specification. In order to make the above and other purposes, features and advantages of the present disclosure more obvious and easy to understand, the specific implementation methods of the present disclosure are listed below. BRIEF DESCRIPTION OF THE DRAWINGS
[0038] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure or related technologies, the following briefly introduces the drawings required for use in the embodiments or related technical descriptions. Obviously, the drawings described below are some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work. It should be noted that the proportions in the drawings are only for illustration and do not represent the actual proportions.
[0039] Figure 1 The structure diagram of a display motherboard in the related art is exemplarily shown;
[0040] Figure 2a and Figure 2b The schematic diagram of the structure of the first and second display motherboards provided by the present disclosure is exemplarily shown;
[0041] Figure 3 The structural schematic diagram of the third display motherboard provided by the present disclosure is exemplarily shown;
[0042] Figure 4 The cross-sectional structure diagram of the first display substrate provided by the present disclosure is exemplarily shown;
[0043] Figure 5 The cross-sectional structure diagram of the second display substrate provided by the present disclosure is exemplarily shown;
[0044] Figure 6 Four schematic planar structural diagrams of the display substrate provided by the present disclosure are exemplarily shown;
[0045] Figure 7 The cross-sectional structure diagram of the junction between the effective display area and the edge area of the display substrate provided by the present disclosure is exemplarily shown;
[0046] Figure 8 Another cross-sectional structural schematic diagram of a display substrate provided by the present disclosure is exemplarily shown;
[0047] Fig. 9 The flowchart of the steps for preparing the display substrate provided by the present disclosure is exemplarily shown;
[0048] Fig.10 The flowchart of the preparation steps of the first passivation layer provided by the present disclosure is exemplarily shown;
[0049] Fig.11 A schematic diagram of foreign matter contained in a display substrate prepared by the related art is exemplarily shown;
[0050] Fig.12 A partial schematic diagram of a display substrate prepared by the preparation method provided by the present disclosure is exemplarily shown;
[0051] Fig.13 Another partial schematic diagram of a display substrate prepared by the preparation method provided by the present disclosure is exemplarily shown. DETAILED DESCRIPTION
[0052] In order to make the purpose, technical solution and advantages of the embodiments of the present disclosure clearer, the technical solution in the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings in the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. Based on the embodiments in the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.
[0053] Reference Figure 1 , Figure 1 The structure diagram of a display motherboard in the related art is shown as an example. Figure 1 As shown, in the related art, when preparing MLED (including Mini LED and Micro LED), in the process of opening holes in the passivation layer to expose the copper pad, the passivation layer of each display substrate 100 included in the display motherboard is usually etched in its entirety, that is, the spacing area CA between the multiple display substrates 100 is the etching area KA. However, etching the passivation layer is prone to produce silicon nitride products, which will form foreign matter when attached to the exposed pad pattern, resulting in abnormal growth of the nickel-copper metal film layer, affecting product performance.
[0054] To solve the above problems, the applicant conducted an improvement test on the etching method of the display motherboard. The inventor found that if Figure 2a , Figure 2b and Figure 3 As shown, as the etching area KA of the edge region of the display substrate 100 gradually decreases, the foreign matter defects gradually decrease.
[0055] Reference Figure 6 , Figure 6 The schematic diagram of the planar structure of the display substrate provided by the present disclosure is exemplarily shown as follows: Figure 6 As shown, the display substrate 100 provided by the present disclosure includes an effective display area AA and an edge area BA located at the periphery of the effective display area AA.
[0056] In some embodiments, Figure 4 , Figure 5 and Figure 7As shown, the display substrate 100 provided by the present disclosure includes: a base substrate 101; a metal layer 102, which is arranged on one side of the base substrate 101 and is located in the effective display area AA, including a pad pattern 103; and a first passivation layer 104, which is arranged on the side of the metal layer 102 away from the base substrate 101, including a first passivation pattern 105 and a first opening 106 located in the effective display area AA, and the first opening 106 is used to leak the pad pattern 103; and a second passivation pattern 107 located in the edge area BA, wherein the second passivation pattern 107 is located on at least one side of the effective display area AA.
[0057] For example, Figure 6 As shown in FIG. 1 , the edge area BA is located around the effective display area AA and surrounds the effective display area AA. Figure 7 As shown, the edge area BA may include a base substrate 101 and a first passivation layer 104 to protect the metal layer 102 of the active display area AA.
[0058] For example, Figure 6 As shown, the width D1 of the edge area BA may be greater than or equal to 0.5 mm.
[0059] For example, Figure 4 and Figure 5 As shown, the first passivation pattern 105 may be a pattern of the first passivation layer 104 located in the effective display area AA except the first opening 106. The first passivation layer 104 may include a plurality of first openings 106, and the metal layer 102 may include a plurality of pad patterns 103, and the first openings 106 correspond to the positions of the pad patterns 103 one by one, so as to expose the pad patterns 103.
[0060] For example, Figure 6 and 7 As shown, the second passivation pattern 107 may be located on one side, two sides, three sides, or four sides of the effective display area AA.
[0061] For example, when etching is performed on three sides of the effective display area AA (eg Figure 2b The second passivation pattern 107 is located on one side of the effective display area AA (as shown in the middle two rows of display substrates 100). Figure 6 ); when etching is performed on both sides of the effective display area AA (as shown in a in FIG. Figure 2b The first and fourth rows of display substrates 100 are shown in FIG. 1 , and the second passivation pattern 107 is located on both sides of the effective display area AA (as shown in FIG. 1 ). Figure 6 b in FIG); when one side of the effective display area AA is etched (as shown in FIG. Figure 3The second passivation pattern 107 is located on three sides of the effective display area AA (as shown in the display substrate 100 in FIG. 1 ). Figure 6 In the case where the four sides of the effective display area AA are not etched, the second passivation pattern 107 is located on the four sides of the effective display area AA (as shown in c); Figure 6 d in the figure).
[0062] For example, the material of the metal layer 102 may be copper. The material of the first passivation layer 104 may be silicon nitride.
[0063] The present disclosure sets a second passivation pattern 107 on at least one side of the effective display area AA of the display substrate 100, thereby reducing the etching area of the edge area BA compared to the traditional etching process, reducing the silicon fluoride products that may be generated when etching the first passivation layer 104 in the edge area BA, and further reducing the silicon fluoride products adsorbed on the surface of the pad pattern 103, avoiding the formation of a foreign film layer that affects the growth of the metal film layer (nickel-copper film layer) in the gold deposition process, thereby affecting the product performance and yield.
[0064] In some embodiments, Figure 6 As shown, the second passivation pattern 107 is located on three sides of the effective display area AA (such as Figure 6 c in the figure) or four sides (as shown in Figure 6 d in the figure).
[0065] Since the present disclosure aims to solve the problem of abnormal growth of the nickel-copper film layer caused by the generation of silicon fluoride products by etching the first passivation layer 104 in the edge area BA, and to reduce the etching area of the first passivation layer 104 in the edge area BA as much as possible, two solutions can be adopted:
[0066] Solution 1: No etching is performed on the four sides of the effective display area AA, so that the second passivation pattern 107 (such as Figure 6 d in FIG). This solution can further reduce foreign matter defects. In this solution, the first passivation layer 104 on the four sides of the effective display area AA is not etched, and the formation of silicon fluoride products is avoided to the greatest extent, thereby avoiding the formation of a foreign matter film layer on the surface of the pad pattern 103. However, in this solution, each display substrate 100 needs to use a corresponding mask.
[0067] Solution 2: Etching one side of the effective display area AA so that the second passivation pattern 107 (such as Figure 6 In actual production, this solution can also be selected for cost and production capacity considerations. Figure 3As shown, two display substrates 100 vertically adjacent to each other on the display motherboard 11 can share a mask, which reduces the number of masks required for production, and can directly use existing masks without redesigning the mask. In this way, while reducing the etching area of the first passivation layer 104 in the edge area BA as much as possible and improving the formation of foreign matter film on the surface of the pad pattern 103, the cost is reduced and the production capacity and yield are guaranteed.
[0068] In some embodiments, Figure 7 As shown, the second passivation pattern 107 has the same thickness as the first passivation pattern 105 .
[0069] For example, Figure 7 As shown, the thickness H2 of the second passivation pattern 107 is the same as the thickness H1 of the first passivation pattern 105 .
[0070] In some embodiments, the surface of the first passivation pattern 105 facing away from the base substrate 101 is higher than (eg Figure 7 The second passivation pattern 107 is located at a surface that is opposite to the substrate 101 and is equal to or higher than (not shown in the figure).
[0071] In some embodiments, Figure 4 As shown, the first passivation layer 104 may be a single-layer structure, and the single-layer is formed by a one-time film forming and patterning process.
[0072] In some embodiments, Figure 5 As shown, the first passivation layer 104 includes a first sub-passivation layer 1041 and a second sub-passivation layer 1042 which are stacked, and the first sub-passivation layer 1041 is disposed close to the base substrate 101 .
[0073] In some embodiments, Figure 5 As shown, the display substrate 100 provided by the present disclosure further includes:
[0074] The first flat layer 201 is arranged between the first sub-passivation layer 1041 and the second sub-passivation layer 1042. The orthographic projection of the first flat layer 201 on the base substrate 101 is located within the effective display area AA, and includes a second opening 202. The second opening 202 is used to leak the pad pattern 103, and the hole wall of the second opening 202 is located at the periphery of the first opening 106.
[0075] By way of example, the material of the first planar layer 201 may be a transparent organic film.
[0076] For example, Figure 5As shown, the orthographic projection of the hole wall of the first opening 106 on the substrate 101 partially overlaps with the orthographic projection of the hole wall of the second opening 202 on the substrate 101. The first flat layer 201 may include a plurality of second openings 202, and the positions of the second openings 202 correspond to the positions of the pad patterns 103 one by one to expose the pad patterns 103.
[0077] In some embodiments, Figure 4 and Figure 5 As shown, the angle a between the side surface of the first passivation pattern 105 facing the first opening 106 and the plane where the base substrate 101 is located is greater than or equal to 60°.
[0078] In some embodiments, Figure 8 As shown, the display substrate 100 provided by the present disclosure further includes:
[0079] The light emitting diode 301 is disposed on a side of the first passivation layer 104 away from the base substrate 101 and is connected to the pad pattern 103 .
[0080] For example, the light emitting diode 301 may be a sub-millimeter light emitting diode (Mini Light Emitting Diode, Mini LED ) , or it can be a micro light emitting diode (Micro Light Emitting Diode, Micro LED).
[0081] In some embodiments, Figure 4 and Figure 5 As shown, the display substrate 100 provided by the present disclosure further has a buffer layer 401 , a second metal layer 402 , a second passivation layer 403 , and a second planarization layer 404 stacked in sequence between the base substrate 101 and the metal layer 102 .
[0082] like Figure 3 As shown, the present disclosure provides a display motherboard 11, which includes: a plurality of display substrates 100 arranged in an array, and the display substrates 100 are the display substrates 100 as described in any embodiment.
[0083] In some embodiments, Figure 3 As shown, the display motherboard 11 provided by the present disclosure further includes a spacing area CA located at the periphery of the effective display area AA of the plurality of display substrates 100 , wherein the display motherboard 11 includes a first number of display substrates 100 .
[0084] For example, Figure 3 As shown, the display motherboard 11 includes a first number of display substrates 100 arranged in an array, and there are spacing areas CA between adjacent display substrates 100. The first number may be 8.
[0085] In some embodiments, the product of the orthographic projection area of the second passivation pattern 107 on the base substrate 101 and the first number is the first area, and the product of the orthographic projection area of the first opening 106 on the base substrate 101 and the first number is the second area.
[0086] Exemplarily, the first area represents the total area of the edge area BA of the multiple display substrates 100 that are not etched in the display motherboard 11. The first area is the product of the orthographic projection area of all the second passivation patterns 107 on the base substrate 101 and the first number. For example, in the case where the second passivation patterns 107 are located on three sides of the effective display area AA, the first area is the product of the total area of the orthographic projection of the second passivation patterns 107 on the three sides on the base substrate 101 and the first number.
[0087] Exemplarily, the second area represents the total area of the etched openings of the multiple display substrates 100 in the display motherboard 11. The second area is the product of the orthographic projection area of all the first openings 106 on the base substrate 101 and the first number. For example, if the effective display area AA of a display substrate 100 includes three first openings 106, the second area is the product of the total area of the orthographic projection of the three first openings 106 on the base substrate 101 and the first number.
[0088] In some embodiments, a ratio of a difference between an area of the spacing region CA and the first area to the second area is less than or equal to 6.
[0089] Exemplarily, the difference between the area of the spacing area CA and the first area represents the total etched area of the edge areas BA of the plurality of display substrates 100 on the display motherboard 11 .
[0090] In the embodiment of the present disclosure, the ratio of the difference between the area of the spacing area CA and the first area to the second area is less than or equal to 6, which is about 15 times lower than the corresponding ratio of 61 of the display motherboard in the related art. This solves the problem that the silicon fluoride products generated by the etching of the edge area are adsorbed onto the surface of the pad pattern 103 of the effective display area AA to form a foreign film layer, improves the growth of the nickel-copper metal film layer in the gold deposition process, and thus improves the product performance and production yield.
[0091] In some embodiments, Figure 3 As shown, the plurality of display substrates 100 are divided into a plurality of substrate groups 10 , and the substrate groups 10 include the same number of display substrates 100 .
[0092] For example, Figure 3As shown, in the case where a display motherboard 11 includes 8 display substrates 100, these display substrates 100 can be divided into 4 substrate groups 10, each substrate group 10 includes 2 display substrates 100, and the 2 display substrates 100 belonging to the same substrate group 10 share a mask plate, and the existing mask plate can be directly used to reduce costs.
[0093] In some embodiments, Figure 3 As shown, in one substrate group 10 , other display substrates 100 belonging to the same substrate group 10 are disposed on the first side B1 of the display substrate 100 .
[0094] For example, Figure 3 As shown, the first side B1 may be different for each display substrate 100 in the same substrate group 10. For example, for a display substrate 100-1 in a substrate group 10, its first side B1 is a side of the lower edge, and for a display substrate 100-2 in the same substrate group 10, its first side B1 is a side of the upper edge.
[0095] In some embodiments, the second passivation pattern 107 is located at a second side B2 of the active display area AA, and the second side B2 is different from the first side B1.
[0096] For example, Figure 3 As shown, the second side B2 may be any side or multiple sides except the first side B1. For each display substrate 100 in the same substrate group 10, the second side B2 may also be different.
[0097] In some embodiments, Figure 3 As shown, the substrate set 10 includes two display substrates 100 , and the second side B2 includes three sides other than the first side B1 of the effective display area AA.
[0098] For example, Figure 3 As shown, for the display substrate 100-1, its second side B2 includes one side of the upper edge, one side of the left edge, and one side of the right edge; for the display substrate 100-2, its second side B2 includes one side of the lower edge, one side of the left edge, and one side of the right edge.
[0099] like Fig. 9 As shown, the present disclosure provides a method for preparing a display substrate 100, wherein the display substrate 100 includes an effective display area AA and an edge area BA located outside the effective display area AA, and the preparation method includes:
[0100] Step S101: providing a base substrate 101 .
[0101] For example, when preparing the display substrate 100, a base substrate 101 is first provided, and the base substrate 101 can be a glass substrate or a printed circuit board (PCB) substrate. The glass substrate can improve heat dissipation, meet the needs of large-size products, and increase production capacity.
[0102] Step S102 : forming a metal layer 102 on one side of the base substrate 101 . The metal layer 102 is located in the effective display area AA and includes a pad pattern 103 .
[0103] Illustratively, before forming the metal layer 102 on one side of the base substrate 101, a buffer layer 401 is first formed on one side of the base substrate 101, and a second metal layer 402 is formed after plating, exposing, and etching on the side of the buffer layer 401 facing away from the base substrate 101, wherein the material of the second metal layer 402 can be copper material.
[0104] Then, a second passivation layer 403 is formed on the side of the second metal layer 402 away from the buffer layer 401, wherein the material of the second passivation layer 403 includes but is not limited to silicon nitride SiN material. A second planarization layer 404 is formed on the side of the second passivation layer 403 away from the second metal layer 402. The material of the second planarization layer 404 can be a transparent organic film.
[0105] Next, a metal layer 102 is formed on a side of the second planar layer 404 away from the second passivation layer 403 . The metal layer 102 is located in the effective display area AA and includes at least one pad pattern 103 . The material of the metal layer 102 may be copper Cu.
[0106] Step S103: A first passivation layer 104 is formed on the side of the metal layer 102 facing away from the base substrate 101, and the first passivation layer 104 includes: a first passivation pattern 105 and a first opening 106 located in the effective display area AA, and a second passivation pattern 107 located in the edge area BA, the first opening 106 is used to leak the pad pattern 103, wherein the second passivation pattern 107 is located on at least one side of the effective display area AA.
[0107] Exemplarily, a first passivation layer 104 may be formed on the side of the metal layer 102 facing away from the base substrate 101 by a patterning process, and the first passivation layer 104 includes a portion located in the effective display area AA and a portion located in the edge area BA outside the effective display area AA. The first passivation layer 104 located in the effective display area AA includes at least one first passivation pattern 105 and at least one first opening 106, and the first passivation layer 104 located in the edge area BA includes a second passivation pattern 107.
[0108] The present invention protects the metal layer 102 in the priority display area AA through the first passivation layer 104 located in the edge area BA, and sets the second passivation pattern 107 on at least one side of the effective display area AA. Compared with the traditional etching process, the etching area of the edge area BA is reduced, and the silicon fluoride products that may be generated when etching the first passivation layer 104 in the edge area BA are reduced, thereby reducing the silicon fluoride products adsorbed on the surface of the pad pattern 103, avoiding the formation of foreign film layers that affect the growth of the metal film layer (nickel-copper film layer) in the gold deposition process, thereby affecting the product performance and yield.
[0109] The display substrate provided in any embodiment can be prepared by using the preparation method provided in the present disclosure.
[0110] In some embodiments, Fig.10 As shown, in the above step S103, the first passivation layer 104 is formed on the side of the metal layer 102 away from the substrate 101, including the following steps S201 to S204:
[0111] Step S201 : forming a passivation film on a side of the metal layer 102 facing away from the base substrate 101 .
[0112] Step S202 : forming a photoresist on the side of the passivation film facing away from the substrate 101 .
[0113] Step S203 : using a mask and a baffle in an exposure device to shield and expose the photoresist, and developing the exposed photoresist to obtain a photoresist pattern, wherein the photoresist pattern covers the first passivation pattern 105 and the second passivation pattern 107 .
[0114] Step S204 : etching the passivation film not covered by the photoresist pattern to obtain a first passivation layer 104 .
[0115] Exemplarily, when forming the first passivation layer 104, a passivation film is first formed on the side of the metal layer 102 facing away from the substrate 101, a photoresist is formed on the side of the passivation film facing away from the substrate 101, a mask is placed on the side of the photoresist facing away from the passivation film, and a baffle in an exposure device is adjusted to expose the photoresist based on the mask, and the exposed photoresist is developed to obtain a photoresist pattern.
[0116] When adjusting the baffle in the exposure device, whether the baffle shields the photoresist depends on the type of photoresist used. When the photoresist used is a negative photoresist, the photoresist in the illuminated area is retained during the development process, and the illuminated area of the non-illuminated area is developed, so the baffle needs to shield the etching area; when the photoresist used is a positive photoresist, the photoresist in the illuminated area is developed, and the photoresist in the non-illuminated area is retained, so the baffle does not need to shield the etching area.
[0117] Then, the passivation film not covered by the photoresist pattern is etched to obtain the first passivation layer 104 .
[0118] In some embodiments, a chemical vapor deposition process may be used to form a passivation film on a side of the metal layer facing away from the substrate.
[0119] For example, Fig.11 As shown, the display substrate prepared in the related art has foreign matter (circled foreign matter Y in the figure), while the display substrate 100 finally prepared by forming a passivation film using a chemical vapor deposition process has no foreign matter (such as Fig.12 shown).
[0120] Referring to Table 1, Table 1 exemplarily shows the etching parameters of the solution of forming a passivation film using a chemical vapor deposition process provided by the present disclosure, as shown in Table 1:
[0121] Table 1
[0122]
[0123] In some implementations, a physical vapor deposition process may also be used to form a passivation film on a side of the metal layer facing away from the substrate.
[0124] In some implementations, different deposition processes may be used to form a passivation film on multiple display substrates 100 on the same display motherboard 11 , for example, a portion may be formed using a chemical vapor deposition process and another portion may be formed using a physical vapor deposition process.
[0125] For example, the display substrate 100 finally prepared by forming the passivation film using the physical vapor deposition process has no foreign matter (such as Fig.13 shown).
[0126] Referring to Table 2, Table 2 exemplarily shows the etching parameters of the solution of forming a passivation film using a physical vapor deposition process provided by the present disclosure, as shown in Table 2:
[0127] Table 2
[0128]
[0129] The present disclosure provides a display device, including a display substrate 100 as provided in any embodiment; and a driving component connected to the display substrate 100 and used to drive the display substrate 100 to display.
[0130] Those skilled in the art can understand that the display device provided by the present disclosure has the advantages of the above-mentioned display substrate.
[0131] The display device provided by the present disclosure can be: a display motherboard, a mobile phone, a tablet computer, a television, a monitor, a laptop computer, a digital photo frame, a car display device, a smart watch, a fitness wristband, a personal digital assistant, or any other product or component with a display function.
[0132] In the present disclosure, “plurality” means two or more, and “at least one” means one or more, unless otherwise clearly and specifically defined.
[0133] In the present disclosure, the orientation or positional relationship indicated by the terms "upper" and "lower" are based on the orientation or positional relationship shown in the accompanying drawings and are only for the convenience of describing the present disclosure and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present disclosure.
[0134] As used herein, the terms "comprises," "includes," or any other variation thereof are intended to encompass non-exclusive inclusion, such that a process, method, commodity, or device that includes a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, product, or device. In the absence of further limitations, an element defined by the phrase "includes a ..." does not exclude the presence of additional identical elements in the process, method, commodity, or device that includes the element.
[0135] References herein to "one embodiment," "some embodiments," "exemplary embodiments," "one or more embodiments," "example," "an example," "some examples," etc., are intended to indicate that a particular feature, structure, material, or characteristic associated with the embodiment or example is included in at least one embodiment or example of the present disclosure. Schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics may be included in any one or more embodiments or examples in any appropriate manner.
[0136] In this document, relational terms such as first and second, etc. are used merely to distinguish one entity or operation from another entity or operation, but do not necessarily require or imply any such actual relationship or order between these entities or operations.
[0137] When describing some embodiments, the expressions "coupled" and "connected" may be used. For example, when describing some embodiments, the term "connected" may be used to indicate that two or more components are in direct physical or electrical contact with each other. As another example, when describing some embodiments, the term "coupled" may be used to indicate that two or more components are in direct physical or electrical contact. However, the term "coupled" or "communicatively coupled" may also refer to two or more components that are not in direct contact with each other, but still cooperate or interact with each other. The embodiments disclosed herein are not necessarily limited to the contents of this document.
[0138] “At least one of A, B, and C” has the same meaning as “at least one of A, B, or C” and both include the following combinations of A, B, and C: A only, B only, C only, the combination of A and B, the combination of A and C, the combination of B and C, and the combination of A, B, and C.
[0139] “A and / or B” includes the following three combinations: A only, B only, and a combination of A and B.
[0140] As used herein, the term "if" is optionally interpreted to mean "when" or "upon" or "in response to determining" or "in response to detecting," depending on the context. Similarly, the phrases "if it is determined that" or "if [a stated condition or event] is detected" are optionally interpreted to mean "upon determining that" or "in response to determining that" or "upon detecting [a stated condition or event]" or "in response to detecting [a stated condition or event]," depending on the context.
[0141] The use of "for" or "configured to" herein is meant to be open and inclusive language that does not exclude devices adapted or configured to perform additional tasks or steps.
[0142] The use of "based on" or "according to" herein is meant to be open and inclusive. A process, step, calculation or other action based on one or more of the conditions or values may, in practice, be based on other conditions or exceed the values described. A process, step, calculation or other action based on one or more of the conditions or values may, in practice, be based on other conditions or exceed the values described.
[0143] As used herein, "about," "substantially," or "approximately" includes the stated value and an average value that is within an acceptable range of variation from the particular value as determined by one of ordinary skill in the art taking into account the measurements in question and the errors associated with the measurement of the particular quantity (i.e., the limitations of the measurement system).
[0144] As used herein, "parallel", "perpendicular", "equal", and "flush" include the situations described and situations similar to the situations described, the range of which is within an acceptable deviation range, wherein the acceptable deviation range is as determined by a person of ordinary skill in the art taking into account the measurement in question and the errors associated with the measurement of a particular quantity (i.e., the limitations of the measurement system). For example, "parallel" includes absolute parallelism and approximate parallelism, wherein the acceptable deviation range for approximate parallelism may be, for example, a deviation within 5°; "perpendicular" includes absolute perpendicularity and approximate perpendicularity, wherein the acceptable deviation range for approximate perpendicularity may also be, for example, a deviation within 5°. "Equal" includes absolute equality and approximate equality, wherein the acceptable deviation range for approximate equality may be, for example, that the difference between the two being equal is less than or equal to 5% of either one. "Flush" includes absolute flushness and approximate flushness, wherein the acceptable deviation range for approximate flushness may be, for example, that the distance between the two being flush is less than or equal to 5% of the size of either one.
[0145] It will be understood that when a layer or an element is referred to as being on another layer or substrate, it can be directly on the other layer or substrate, or intervening layers may be present between the layer or element and the other layer or substrate.
[0146] Exemplary embodiments are described herein with reference to cross-sectional views and / or plan views that are idealized exemplary drawings. In the drawings, the thickness of layers and regions is exaggerated for clarity. Therefore, variations in shape relative to the drawings due to, for example, manufacturing techniques and / or tolerances are conceivable. Therefore, the exemplary embodiments should not be interpreted as being limited to the shapes of the regions shown herein, but include shape deviations due to, for example, manufacturing. For example, an etched region shown as a rectangle will typically have curved features. Therefore, the regions shown in the drawings are schematic in nature, and their shapes are not intended to illustrate the actual shape of regions of the device, and are not intended to limit the scope of the exemplary embodiments. Unless otherwise specified, the thickness of a film layer refers to the size of the film layer in the direction of its normal.
[0147] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present disclosure, rather than to limit them. Although the present disclosure has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present disclosure.
Claims
1. A display substrate, comprising an effective display area and an edge area located outside the effective display area, the display substrate comprising: substrate substrate; A metal layer, disposed on one side of the base substrate, located in the effective display area, and comprising a pad pattern; as well as A first passivation layer is arranged on the side of the metal layer away from the base substrate, including a first passivation pattern and a first opening located in the effective display area, and a second passivation pattern located in the edge area, the first opening is used to leak the pad pattern, wherein the second passivation pattern is located on at least one side of the effective display area.
2. The display substrate according to claim 1, wherein: The second passivation pattern is located on three sides or four sides of the effective display area.
3. The display substrate according to claim 1, wherein: The second passivation pattern has the same thickness as the first passivation pattern.
4. The display substrate according to claim 1, wherein: A surface of the first passivation pattern facing away from the substrate is higher than or equal to a surface of the second passivation pattern facing away from the substrate.
5. The display substrate according to claim 1, wherein: The first passivation layer includes a first sub-passivation layer and a second sub-passivation layer which are stacked, the first sub-passivation layer is arranged close to the base substrate, and the display substrate further includes: A first planar layer is arranged between the first sub-passivation layer and the second sub-passivation layer, wherein the orthographic projection of the first planar layer on the base substrate is located within the effective display area, and comprises a second opening, wherein the second opening is used to leak the pad pattern, and the hole wall of the second opening is located at the periphery of the first opening.
6. The display substrate according to any one of claims 1 to 5, wherein: An angle between a side surface of the first passivation pattern facing the first opening and a plane where the substrate is located is greater than or equal to 60°.
7. The display substrate according to any one of claims 1 to 5, wherein: The display substrate further comprises: A light emitting diode is arranged on a side of the first passivation layer away from the base substrate and connected to the pad pattern.
8. A display motherboard, comprising a plurality of display substrates arranged in an array, wherein the display substrates are the display substrates according to any one of claims 1 to 7.
9. The display motherboard according to claim 8, wherein: The display motherboard further comprises a spacing area located at the periphery of the effective display area of the plurality of display substrates, the display motherboard comprising a first number of display substrates; The product of the orthographic projection area of the second passivation pattern on the base substrate and the first number is the first area, and the product of the orthographic projection area of the first opening on the base substrate and the first number is the second area; The ratio of a difference between an area of the spacing region and the first area to the second area is less than or equal to 6.
10. The display motherboard according to claim 9, wherein: The plurality of display substrates are divided into a plurality of substrate groups, and the substrate groups include a plurality of display substrates of the same number; In one substrate group, other display substrates belonging to the same substrate group are arranged on the first side of the display substrate; The second passivation pattern is located at a second side of the effective display area, and the second side is different from the first side.
11. The display motherboard according to claim 10, wherein: The substrate group includes two display substrates, and the second side includes other three sides except the first side of the effective display area.
12. A display device, comprising: The display substrate according to any one of claims 1 to 7; as well as The driving component is connected to the display substrate and is used to drive the display substrate to display.
13. A method for preparing a display substrate, the display substrate comprising an effective display area and an edge area located outside the effective display area, the method comprising: providing a substrate base plate; Forming a metal layer on one side of the base substrate, wherein the metal layer is located in the effective display area and includes a pad pattern; as well as A first passivation layer is formed on the side of the metal layer facing away from the base substrate, the first passivation layer includes: a first passivation pattern and a first opening located in the effective display area, and a second passivation pattern located in the edge area, the first opening is used to leak the pad pattern, wherein the second passivation pattern is located on at least one side of the effective display area.
14. The preparation method according to claim 13, wherein: The step of forming a first passivation layer on a side of the metal layer facing away from the substrate includes: forming a passivation film on a side of the metal layer facing away from the substrate; forming a photoresist on a side of the passivation film away from the substrate; Using a mask and a baffle in an exposure device, the photoresist is shielded and exposed, and the exposed photoresist is developed to obtain a photoresist pattern, wherein the photoresist pattern covers the first passivation pattern and the second passivation pattern; The passivation film not covered by the photoresist pattern is etched to obtain the first passivation layer.
15. The preparation method according to claim 14, wherein: The step of forming a passivation film on a side of the metal layer away from the substrate includes: The passivation film is formed on the side of the metal layer away from the substrate by using a chemical vapor deposition process.