Display panel, preparation method of display panel and display device
By forming a connection hole between the protective layer of the display panel and the first electrode and electrically connecting it, the problem of poor display effect of the display panel after the amorphous silicon layer is added is solved, especially after high-temperature reliability verification, the edge display is uneven. The problem was solved and the display effect was significantly improved.
Patent Information
- Application Number
- CN202411746939.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-29
- Publication Date
- 2025-02-18
Smart Images
Figure CN119486512A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of display technology, and in particular to a display panel, a method for preparing a display panel, and a display device. Background Art
[0002] Active Matrix / Organic Light Emitting Diode (AMOLED) is the next generation display technology and is gradually being applied to various terminal display screens. At present, display panels produced by AMOLED technology have the problem of panel ghosting. In order to improve the panel ghosting, an amorphous silicon layer can be added between the barrier layer (BL) and the flexible layer (PI), which can effectively improve the panel ghosting problem.
[0003] However, the display effect of the display panel after adding the amorphous silicon layer is not good. Summary of the invention
[0004] Based on this, it is necessary to provide a display panel, a method for preparing a display panel, and a display device that can improve the display effect after adding an amorphous silicon layer in order to solve the above technical problems.
[0005] In a first aspect, the present application provides a display panel, comprising:
[0006] substrate;
[0007] A protective layer is disposed on one side of the substrate;
[0008] A first insulating layer is disposed on a side of the protective layer facing away from the substrate;
[0009] A connecting hole, the connecting hole at least passing through the first insulating layer, and a portion of the protective layer is exposed through the connecting hole;
[0010] A plurality of first electrodes are arranged on a side of the first insulating layer away from the substrate; parts of the first electrodes correspondingly extend into the connection holes to be electrically connected to the protection layer.
[0011] The display panel provided in the embodiment of the present application electrically connects the protective layer to the first electrode, so that when the first electrode is connected to the power supply potential of the display panel, the protective layer can be connected to the power supply potential of the display panel, thereby balancing the edge pixel potential and the non-edge pixel potential, thereby eliminating the uneven edge display phenomenon caused by the exposed edge of the protective layer, and further improving the display effect of the display panel.
[0012] In one of the embodiments, the display panel further comprises a hole area and an edge area of the hole area surrounding at least a portion of the hole area, and the connection hole is located in the edge area of the hole area; the distance between the central axis position of the connection hole and the boundary of the hole area is not less than the radius of the surface of the side of the connection hole away from the substrate;
[0013] Optionally, the distance between the central axis position of the connection hole and the boundary of the hole area is not less than the sum of the radius of the surface of the connection hole facing away from the substrate and a preset safety distance;
[0014] Optionally, the display panel also includes a display area, and the edge area of the hole area is located between the display area and the hole area; the distance between the central axis position of the connection hole and the boundary of the display area is not less than the radius of the surface of the connection hole facing away from the substrate.
[0015] In one embodiment, the connecting hole is an annular hole, and the central axis position of the annular hole is the position of the central ring of the annular hole.
[0016] In one embodiment, the protective layer is connected to a fixed potential;
[0017] Optionally, the first electrode is connected to a power supply potential in the display panel.
[0018] In one embodiment, the display panel further comprises:
[0019] A metal layer is disposed between the first insulating layer and the first electrode, a portion of the metal layer correspondingly extends into the connection hole to be electrically connected to the protective layer, and a portion of the first electrode correspondingly extends into the connection hole to be electrically connected to the metal layer;
[0020] Optionally, the metal layer is connected to a power supply potential in the display panel;
[0021] Optionally, the material of the metal layer includes source and drain metal material.
[0022] In one embodiment, the display panel further comprises:
[0023] The second insulating layer is arranged on the side of the first electrode away from the substrate; the orthographic projection of the second insulating layer on the substrate covers the orthographic projection of the first electrode electrically connected to the protective layer on the substrate.
[0024] In one embodiment, the material of the protection layer includes amorphous silicon material.
[0025] In a second aspect, the present application also provides a method for preparing a display panel, comprising:
[0026] providing a substrate;
[0027] A protective layer is formed on one side of the substrate; the protective layer surrounds the connection hole;
[0028] forming a first insulating layer on a side of the protective layer facing away from the substrate;
[0029] A connection hole is formed in the first insulating layer, wherein the connection hole at least penetrates the first insulating layer, and a portion of the protective layer is exposed through the connection hole;
[0030] A plurality of first electrodes are formed on a side of the first insulating layer away from the substrate; parts of the first electrodes correspondingly extend into the connection holes to be electrically connected to the protection layer.
[0031] The method for preparing a display panel provided in an embodiment of the present application can connect the protective layer to the first electrode, so that when the first electrode is connected to the power supply potential of the pixel area, the protective layer can be connected to the power supply potential of the pixel area, thereby balancing the edge pixel potential and the non-edge pixel potential, thereby eliminating the phenomenon of uneven edge display caused by the exposed edge of the protective layer, and further improving the display effect of the display panel.
[0032] In one embodiment, the method further comprises:
[0033] A metal layer is formed between the first insulating layer and the first electrode; a portion of the metal layer correspondingly extends into the connection hole to be electrically connected to the protective layer, and a portion of the first electrode correspondingly extends into the connection hole to be electrically connected to the metal layer;
[0034] Optionally, a second insulating layer is formed on a side of the first electrode facing away from the substrate; the orthographic projection of the second insulating layer on the substrate covers the orthographic projection of the first electrode electrically connected to the protective layer on the substrate.
[0035] In a third aspect, the present application further provides a display device, comprising the display panel of the first aspect.
[0036] The display device provided in an embodiment of the present application includes a display panel. The display panel connects a protective layer to a first electrode, so that when the first electrode is connected to the power supply potential of the display panel, the protective layer can be connected to the power supply potential of the display panel, thereby balancing the edge pixel potential and the non-edge pixel potential, thereby eliminating the uneven edge display phenomenon caused by the exposed edge of the protective layer, and further improving the display effect of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS
[0037] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the related technologies, the drawings required for use in the embodiments or the related technical descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.
[0038] FIG. 1( a ) is one of the partial cross-sectional views of a display panel in the related art;
[0039] FIG. 1( b ) is a second partial cross-sectional view of a display panel in the related art;
[0040] FIG2 is a diagram showing the effect of uneven edge display of the display panel of FIG1 (b) after high temperature reliability verification;
[0041] FIG3 is a third partial cross-sectional view of a display panel in the related art;
[0042] FIG4 is one of the partial cross-sectional views of a display panel provided in an embodiment of the present application;
[0043] FIG5 is a partial top view of a display area of a display panel provided in an embodiment of the present application;
[0044] FIG6 is a second partial top view of the display area of the display panel provided in an embodiment of the present application;
[0045] FIG7 is a third partial top view of the display area of the display panel provided in an embodiment of the present application;
[0046] FIG8 is a fourth partial top view of the display area of the display panel provided in an embodiment of the present application;
[0047] FIG9 is a fifth partial top view of the display area of the display panel provided in an embodiment of the present application;
[0048] FIG10 is a second partial cross-sectional view of a display panel provided in an embodiment of the present application;
[0049] FIG11 is a third partial cross-sectional view of a display panel provided in an embodiment of the present application;
[0050] FIG12 is a fourth partial cross-sectional view of a display panel provided in an embodiment of the present application;
[0051] FIG13 is a fifth partial cross-sectional view of a display panel provided in an embodiment of the present application;
[0052] FIG14 is a sixth partial cross-sectional view of a display panel provided in an embodiment of the present application;
[0053] FIG15 is a seventh partial cross-sectional view of a display panel provided in an embodiment of the present application;
[0054] FIG. 16 is a schematic diagram of a process of manufacturing a display panel according to an embodiment of the present application;
[0055] FIG. 17 is a second schematic flow chart of a method for manufacturing a display panel provided in an embodiment of the present application;
[0056] FIG. 18 is a third schematic flow chart of the method for preparing a display panel provided in an embodiment of the present application.
[0057] Description of reference numerals:
[0058] 1. Display panel; 11. Substrate; 12. First flexible layer (PI1); 13. First barrier layer (BL2); 14. Second flexible layer (PI2); 15. Second barrier layer (BL2); 16. Inorganic insulating layer; 161. First inorganic insulating layer (3L-1); 162. Second inorganic insulating layer (3L-2); 17. Gate insulating layer (GI); 18. Capacitor insulating layer (CI); 19. Inorganic layer; 20. First organic layer; 21. Second organic layer; 22. Pixel defining layer (PDL); 23. Spacer layer (SPC); 24. Active layer (Poly); 25. Gate layer (Gate); 26. Capacitor upper plate layer (CAP); 27. First source-drain circuit layer (SD1); 28. Second source-drain circuit layer (SD2); Road layer (SD2) 28; 29, anode layer; 30, interlayer dielectric layer (ILD); 41, substrate; 42, protective layer; 43, first insulating layer; 44, first electrode; 441, first extension portion of first electrode 44; 442, second extension portion of first electrode 44; 443, third extension portion of first electrode 44; 45, metal layer; 451, first extension portion of metal layer 45; 452, second extension portion of metal layer 45; 453, third extension portion of metal layer 45; 46, planarization layer (PLN3); 47, second insulating layer; 50, connection hole; 51, display area; 51a, peripheral area of display area 51; 52, hole area; 53, edge area of hole area; 53', annular safety area; 53'', connection hole area. DETAILED DESCRIPTION
[0059] In order to facilitate the understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. The preferred embodiments of the present application are provided in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the understanding of the disclosure of the present application more thorough and comprehensive.
[0060] It should be understood that although the terms "first", "second", etc. may be used herein to describe various elements, they do not represent any order, quantity or importance, but are only used to distinguish different components. These terms are only used to distinguish one element from another element. For example, without departing from the scope of the present application, the first element may be referred to as the second element, and similarly, the second element may be referred to as the first element. "Including" or "comprising" and similar words mean that the elements or objects appearing before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects.
[0061] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application. The term "and / or" used herein includes any and all combinations of one or more of the related listed items.
[0062] Active Matrix / Organic Light Emitting Diode (AMOLED) is the next generation display technology and is gradually being applied to various terminal display screens. At present, display panels produced by AMOLED technology have the problem of panel ghosting. In order to improve the panel ghosting, an amorphous silicon layer can be added between the barrier layer (BL) and the flexible layer (PI), which can effectively improve the panel ghosting problem.
[0063] Referring to FIG. 1 (a), a display panel based on AMOLED technology may include, from bottom to top, a first flexible layer (PI1) a1, a first barrier layer (BL1) b1, a second flexible layer (PI2) a2, a second barrier layer (BL2) b2, and a semiconductor layer c, such as a silicon nitride layer (SiN), a silicon monoxide layer (SiO), a porous silicon layer (Psi), etc.
[0064] On this basis, in order to improve the panel afterimage, an amorphous silicon layer (aSi) d can be added between the second flexible layer (PI2) a2 and the second barrier layer (BL2) b2, as shown in Figure 1 (b). For the display panel with the amorphous silicon layer d added, after the high temperature reliability (RA) test, the edge of the display panel will have uneven display, as shown in Figure 2, where a black shadow appears at the edge of the display panel, resulting in poor display effect of the display panel.
[0065] When an amorphous silicon layer (aSi) is added, the edge area of the display panel, including the outer edge area of the display panel and the opening area in the display panel, can be referred to as the hole area. For example, the edge of the HIAA area formed by laser-opening active micropore technology, since the side wall of the amorphous silicon layer (aSi) is exposed, factors such as water vapor and static electricity will cause the potential of the edge pixels of the thin film transistor (TFT) to be inconsistent with the potential of the non-edge pixels, resulting in uneven display of the edge area and the non-edge area of the display panel, and black shadows appearing in the edge area of the display panel, resulting in poor display effect of the display panel.
[0066] In view of the above-mentioned technical problems, the embodiments of the present application provide a display panel, a method for preparing a display panel and a display device, which can solve the problem of inconsistent potentials between edge pixels and non-edge pixels of TFT in the display panel caused by edge leakage of an amorphous silicon layer (aSi), improve the display uniformity of the display panel, and thus improve the display effect of the display panel.
[0067] The display panel 1 provided in the embodiment of the present application may be an active matrix organic light emitting diode (AMOLED) display panel, an organic light emitting diode (OLED) display panel, a micro organic light emitting diode (Micro OLED) display panel, a light emitting diode (LED) display panel, a quantum dot light emitting diode (QLED) display panel, a mini light emitting diode (Mini LED) display panel, a micro light emitting diode (Micro LED) display panel, or a liquid crystal (LCD) display panel, etc. The embodiment of the present application is described by taking an AMOLED display panel as an example.
[0068] The following shows the cross-sectional morphology of the display panel 1 after the array process of the current AMOLED process is completed, as shown in FIG3 ; wherein the array process mainly forms an LTPS (low temperature polycrystalline silicon) semiconductor thin film transistor driving circuit by repeatedly stacking film layers of different graphics and the same material through processes such as film formation, exposure, and etching on a substrate.
[0069] Referring to FIG. 3 , the display panel 1 includes a substrate 10 and a driving array layer 20 located on one side of the substrate 10. The driving array layer 20 can be used to form structures such as thin film transistors, storage capacitors, data lines, scan lines, light control lines, and power lines, thereby forming a pixel driving circuit to drive the light-emitting elements to emit light.
[0070] Exemplarily, the base 10 may include a substrate 11; a first flexible layer (PI1) 12, which is arranged on one side of the substrate 11; a first barrier layer (BL1) 13, which is arranged on the side of the first flexible layer (PI1) 12 facing away from the substrate 11; a second flexible layer (PI2) 14, which is arranged on the side of the first barrier layer (BL1) 13 facing away from the substrate 11; a second barrier layer (BL2) 15, which is arranged on the side of the second flexible layer (PI2) 14 facing away from the substrate 11; an inorganic insulating layer 16, which is arranged on the side of the second barrier layer (BL2) 15 facing away from the substrate 11, wherein the inorganic insulating layer 16 includes a first inorganic insulating layer (3L-1), which is arranged on the side of the second barrier layer (BL2) 15 facing away from the substrate 11, and a second inorganic insulating layer (3L-2), which is arranged on the side of the first inorganic insulating layer (3L-1) facing away from the substrate 11.
[0071] Exemplarily, the driving array layer 20 may include a gate insulating layer (GI) 17, which is disposed on a side of the inorganic insulating layer 16 facing away from the substrate 11; a capacitor insulating layer (CI) 18, which is disposed on a side of the gate insulating layer (GI) 17 facing away from the substrate 11; an inorganic layer (or interlayer insulating layer) 19, which is disposed on a side of the capacitor insulating layer (CI) 18 facing away from the substrate 11; a first organic layer 20, which is disposed on a side of the inorganic layer 19 facing away from the substrate 11; a second organic layer 21, which is disposed on a side of the first organic layer 20 facing away from the substrate 11; a pixel defining layer (PDL) 22, which is disposed on a side of the second organic layer 21 facing away from the substrate 11; and a spacer layer (SPC) 23, which is disposed on a side of the pixel defining layer (PDL) 22 facing away from the substrate 11.
[0072] Among them, an active layer 24 is arranged between the second inorganic insulating layer (3L-2) 162 and the gate insulating layer (GI) 17, for example, it can be a polycrystalline silicon layer (Poly); a gate layer (Gate) 25 is arranged between the gate insulating layer (GI) 17 and the capacitor insulating layer (CI) 18; a capacitor upper plate layer (CAP) 26 is arranged between the capacitor insulating layer (CI) 18 and the inorganic insulating layer 19; a first source-drain circuit layer (SD1) 27 is arranged between the inorganic layer 19 and the first organic layer 20; a second source-drain circuit layer (SD2) 28 is arranged between the first organic layer 20 and the second organic layer 21; part or all of the anode layer 29 is arranged between the second organic layer 21 and the pixel defining layer (PDL) 22.
[0073] The first organic layer 20 and the second organic layer 21 may be planarization layers, which have a planarization function. The gate of the thin film transistor in the pixel circuit may be located in the gate layer (Gate) 25, and the source and drain of the thin film transistor may be located in the first source-drain circuit layer (SD1) 27. Multiple conductive structures located in the same conductive film layer can be formed simultaneously by patterning the conductive film layer, thereby simplifying the manufacturing process.
[0074] For example, the substrate 10 may include a flexible substrate or a rigid substrate. The flexible substrate may include materials such as polyimide, and the rigid substrate may include materials such as a glass substrate.
[0075] Based on the structure of the display panel 1 shown in FIG. 3 , an amorphous silicon layer (aSi) (not shown in FIG. 3 ) may be added between the second flexible layer (PI2) 14 and the second barrier layer (BL2) 15 to improve the panel image sticking problem.
[0076] Furthermore, in order to improve the problem of uneven display of the display panel 1 caused by the amorphous silicon layer (aSi) after high-temperature reliability verification, the amorphous silicon layer (aSi) can be connected to the power supply potential (ELVDD) of the pixel in the edge area of the display panel 1, so as to ensure the potential consistency between the edge pixels and non-edge pixels of the TFT, thereby solving the problem of uneven display and improving the display effect.
[0077] Referring to the partial cross-sectional view of the display panel 1 shown in FIG4 , an embodiment of the present application provides a display panel 1, which includes a substrate 41; a protective layer 42, which is arranged on one side of the substrate 41; a first insulating layer 43, which is arranged on the side of the protective layer 42 away from the substrate 41; a connecting hole 50, which at least passes through the first insulating layer 43, and a portion of the protective layer 42 is exposed by the connecting hole 50; and a plurality of first electrodes 44, which are arranged on the side of the first insulating layer 43 away from the substrate 41; wherein a portion of the first electrode 44 extends correspondingly into the connecting hole 50 to be electrically connected to the protective layer 42.
[0078] In some embodiments, the substrate 41 may provide support for other film layers that are subsequently disposed.
[0079] In some embodiments, the protection layer 42 may be the aforementioned amorphous silicon layer (aSi) to improve panel image sticking.
[0080] In some embodiments, one or more connection holes 50 may be enclosed in the edge region of the protective layer 42. When multiple connection holes 50 are enclosed, for each connection hole 50, one or more portions of the first electrodes 44 may be correspondingly extended into each connection hole 50 to be electrically connected to the protective layer 42. The first electrodes 44 connected to each connection hole 50 may be the same first electrodes 44 or different first electrodes 44. It should be noted that the first electrode here does not refer to an anode for powering a pixel, but a metal trace formed of the same material as the anode.
[0081] In some embodiments, when a plurality of connection holes 50 are provided, a plurality of first electrodes 44 and a plurality of connection holes 50 may also be provided correspondingly, and portions of the first electrodes 44 extend into the corresponding connection holes 50 .
[0082] In some embodiments, the radius r1 of the side surface of the connecting hole 50 close to the substrate 41 may be smaller than the radius r2 of the side surface facing away from the substrate 41, as shown in FIG. 4; optionally, the radius r1 of the side surface of the connecting hole 50 close to the substrate 41 may also be greater than or equal to the radius r2 of the side surface facing away from the substrate 41.
[0083] In some embodiments, referring to FIG. 4 , the first electrode 44 includes a first extension portion 441, a second extension portion 442 and a third extension portion 443. The first extension portion 441 covers the side wall of the connecting hole 50, the second extension portion 442 is located at the end of the connecting hole 50 facing the substrate 41, and the third extension portion 443 is located at the side of the first insulating layer 43 away from the substrate 41. The second extension portion 442 and the third extension portion 443 are connected through the first extension portion 441. The thicknesses of the first extension portion 441, the second extension portion 442 and the third extension portion 443 may be the same or different.
[0084] In some embodiments, the thickness d1 of the second extension portion 442 of the first electrode 44 may be less than the thickness d0 of the protective layer 42; the thickness d1 of the second extension portion 442 of the first electrode 44 may also be equal to the thickness d0 of the protective layer 42, see Figure 4; the thickness d1 of the second extension portion 442 of the first electrode 44 may also be greater than the thickness d0 of the protective layer 42.
[0085] In some embodiments, the protective layer 42 can be connected to a fixed potential; for example: for the first electrode 44 extending to the connection hole 50 and electrically connected to the protective layer 42, the third extension portion 443 of the first electrode 44 can be connected to the power supply potential ELVDD in the display panel 1, thereby connecting the protective layer 42 to the power supply potential ELVDD, so as to improve the problem of uneven display at the edge of the display panel 1 after high-temperature reliability verification.
[0086] The display panel provided in the embodiment of the present application electrically connects the protective layer to the first electrode, so that when the first electrode is connected to the power supply potential of the display panel, the protective layer can be connected to the power supply potential of the display panel, thereby balancing the edge pixel potential and the non-edge pixel potential, thereby eliminating the uneven edge display phenomenon caused by the exposed edge of the protective layer, and further improving the display effect of the display panel.
[0087] In some embodiments, as shown in FIG5 , the display panel 1 may include a display area 51, a hole area 52, and a hole area edge area 53 surrounding at least a portion of the hole area, wherein the hole area 52 may be provided with a functional device, and the functional device may include any one or more of a camera, an earpiece, etc. Optionally, the hole area 52 may be provided on the display panel 1 as a circular via hole, an elliptical via hole, or a via hole of other shapes, etc.
[0088] In some embodiments, as shown in FIG. 6 , the edge region of the display panel 1 may include a peripheral region 51a of the display region 51, and may also include a hole region edge region 53 between the display region 51 and the hole region 52. Optionally, a connection hole 50 may be provided in the hole region edge region 53; in the case where the radius r1 of the surface of the side of the connection hole 50 close to the substrate 41 is smaller than the radius r2 of the surface of the side away from the substrate 41, when the connection hole 50 is provided in the hole region edge region 53, the distance d2 between the central axis position of the connection hole 50 and the boundary of the hole region 52 is not less than the radius r2 of the surface of the side of the connection hole 50 away from the substrate 41.
[0089] In some embodiments, when a connection hole 50 is set in the edge area 53 of the hole area, one connection hole 50 can be set, or a plurality of connection holes 50 can be set at equal intervals. Referring to the partial top view of the display panel 1 shown in FIG. 7 , a plurality of connection holes 50 can be set in the edge area 53 of the hole area according to a preset spacing distance.
[0090] In some embodiments, when the radius r1 of the side surface of the connecting hole 50 close to the substrate 41 is smaller than the radius r2 of the side surface away from the substrate 41, when the connecting hole 50 is set in the edge area 53 of the hole area, the distance between the central axis position of the connecting hole 50 and the boundary of the hole area 52 may also be no less than the sum of the radius r2 of the side surface of the connecting hole 50 away from the substrate 41 and the preset safety distance △d.
[0091] The preset safety distance △d is the distance from the boundary of the hole area 52. In the hole area edge area 53 of the display area 51, a ring-shaped safety area 53' can be formed at a preset safety distance △d from the boundary of the hole area 52, which can be used as an anti-cracking area when opening a hole (opening a hole area); the connection hole 50 is arranged in the other area of the hole area edge area 53 except the ring-shaped safety area 53', which can be called the connection hole area 53'', which can avoid adverse effects on the connection hole 50 when opening the hole area 52.
[0092] 8 , the partial top view of the display panel 1 , the hole zone edge region 53 may include an annular safety region 53 ′ and a connection hole region 53 ″, and one or more connection holes 50 may be provided in the connection hole region 53 ″.
[0093] In some embodiments, the connection hole 50 may also be an annular hole; for example, for the situation shown in FIG. 7 or FIG. 8 , a large hole may be opened in the edge region 53 of the hole area or in the connection hole region 53 ″ in the edge region 53 of the hole area to obtain an annular connection hole 50; taking the structure of FIG. 8 as an example, refer to FIG. 9 for a partial top view of the annular connection hole 50 formed in the connection hole region 53 ″. In the case where the connection hole 50 is an annular hole, the central axis position of the annular hole may be the position of the central circular ring of the annular hole, that is, the distance d2 between the position of the central circular ring of the annular hole and the boundary of the hole area 52 is not less than the radius r2 of the surface of the side of the connection hole 50 away from the substrate 41, or the distance between the position of the central circular ring of the annular hole and the boundary of the hole area 52 is not less than the sum of the radius r2 of the surface of the side of the connection hole 50 away from the substrate 41 and the preset safety distance △d.
[0094] In some embodiments, connection holes 50 may be provided not only in the edge region 53 of the hole area, but also in the peripheral region 51a of the display area 51; optionally, one or more connection holes 50 may be provided at the boundary of the peripheral region 51a, or one or more connection holes 50 may be provided at a certain safety distance from the boundary of the peripheral region 51a; optionally, multiple connection holes may be provided at equal intervals, or large holes may be opened in a whole circle to form an annular hole.
[0095] The display panel provided in the embodiment of the present application is easier to implement and operate than setting the connection holes in the peripheral area of the display panel by setting the connection holes in the edge area of the hole area close to the hole area of the display panel, thereby reducing the difficulty of manufacturing the display panel; in addition, setting the connection holes in the edge area of the hole area can also avoid damage to the connection holes and avoid the destructive effects of connecting the protective layer to the power supply potential at the connection holes, thereby ensuring the connection stability between the protective layer and the power supply potential.
[0096] Referring to another partial cross-sectional view of the display panel 1 shown in Figure 10, on the basis of the display panel structure shown in Figure 4, the display panel 1 provided in the embodiment of the present application may further include a metal layer 45, which is arranged between the first insulating layer 43 and the first electrode 44, and a portion of the metal layer 45 extends into the connection hole 50 to be electrically connected to the protective layer 42, and a portion of the first electrode 44 extends into the connection hole 50 to be electrically connected to the metal layer 45.
[0097] In some embodiments, a metal layer 45 may be disposed on a side of the first insulating layer 43 facing away from the substrate 41 , and a plurality of first electrodes 44 may be disposed on a side of the metal layer 45 facing away from the substrate 41 .
[0098] In some embodiments, the metal layer 45 may include a first extension portion 451, a second extension portion 452 and a third extension portion 453, the first extension portion 451 of the metal layer 45 covers the side wall of the connecting hole 50, the second extension portion 452 of the metal layer 45 is located at the end of the connecting hole 50 facing the substrate 41, the third extension portion 453 of the metal layer 45 is located on the side of the first insulating layer 43 away from the substrate 41, the second extension portion 452 of the metal layer 45 and the third extension portion 453 of the metal layer 45 are electrically connected through the first extension portion 451 of the metal layer 45; the thicknesses of the first extension portion 451, the second extension portion 452 and the third extension portion 453 of the metal layer 45 may be the same or different.
[0099] Based on this, the first extension portion 441 of the first electrode 44 covers the first extension portion 451 of the metal layer 45, that is, on the side wall of the connecting hole 50, the second extension portion 442 of the first electrode 44 is located on the side of the second extension portion 452 of the metal layer 45 away from the substrate 41, and the third extension portion 443 of the first electrode 44 is located on the side of the third extension portion 453 of the metal layer 45 away from the substrate 41.
[0100] In some embodiments, the third extension portion 453 of the metal layer 45 may be located in part or all of the side of the first insulating layer 43 away from the substrate 41. In the case where the third extension portion 453 of the metal layer 45 is located in the part of the first insulating layer 43 away from the substrate 41, an insulating material may be used to fill the remaining part of the layer where the metal layer 45 is located, so that when the coverage area of the third extension portion 443 of the first electrode 44 is larger than the coverage area of the third extension portion 453 of the metal layer 45, the first electrode 44 on the side of the metal layer 45 away from the substrate 41 is supported by the insulating material.
[0101] As shown in Figure 11, the insulating material can be a planarization layer (PLN3) 46, and the planarization layer 46 and the metal layer 45 are located on the same layer; optionally, the thickness of the planarization layer 46 can be greater than or equal to the thickness of the metal layer 45. When the thickness of the planarization layer 46 is greater than the thickness of the metal layer 45, the planarization layer 46 can cover the gap between the metal layer 45 and the first electrode 44; alternatively, the first electrode 44 can also cover the thickness difference between the planarization layer 46 and the metal layer 45.
[0102] In some embodiments, for the structure shown in FIG. 10 or FIG. 11, the protective layer 42 can be electrically connected to the first electrode 44 through the metal layer 45. In one case, the power supply potential in the display panel can be connected through the first electrode 44, so that the protective layer 42 is connected to the power supply potential, and the potential of the edge pixels and the non-edge pixels are consistent, so as to achieve the effect of improving the uneven display of the edge. In another case, the metal layer 45 can also be directly connected to the power supply potential in the display panel, that is, the protective layer 42 is directly connected to the power supply potential through the metal layer 45, so that the protective layer 42 is connected to the power supply potential, so that the potential of the edge pixels and the non-edge pixels are consistent, and the effect of improving the uneven display of the edge can also be achieved.
[0103] In some embodiments, the material of the metal layer 45 may include a source-drain metal material (SD2).
[0104] The display panel provided in the embodiment of the present application adds a metal layer between the protective layer and the first electrode. Usually, the thickness of the metal layer is greater than the thickness of the first electrode. The protective layer and the first electrode are connected by the metal layer. This can reduce the material usage of the first electrode, and can flexibly adjust the thickness of the metal layer according to the depth of the connecting hole, thereby reducing the extension of the first electrode to the connecting hole, and can also improve the connection stability between the first electrode and the protective layer.
[0105] Referring to another partial cross-sectional view of the display panel 1 shown in FIG12 , based on the display panel structure shown in FIG4 , the display panel 1 provided in the embodiment of the present application may further include a second insulating layer 47 , which is arranged on the side of the first electrode 44 away from the substrate 41 ; the orthographic projection of the second insulating layer 47 on the substrate 41 covers the orthographic projection of the first electrode 44 electrically connected to the protective layer 42 on the substrate.
[0106] That is, the second insulating layer 47 may be used to cover the side of the first electrode 44 electrically connected to the protection layer 42 away from the substrate 41 , and the second insulating layer 47 may be used to fill the connection hole 50 .
[0107] In some embodiments, the second insulating layer 47 may be a pixel defining layer (PDL).
[0108] In some embodiments, referring to FIG. 12 , the second insulating layer 47 may cover the first extension portion 441 , the second extension portion 442 and the third extension portion 443 of the first electrode 44 , and a surface of the second insulating layer 47 facing away from the substrate 41 may be parallel to a surface of the substrate 41 facing away from the first insulating layer 42 .
[0109] In some embodiments, the surface of the second insulating layer 47 on the side facing away from the substrate 41 may not be parallel to the surface of the substrate 41 on the side facing away from the first insulating layer 42. Optionally, the second insulating layer 47 is divided into a first portion and a second portion, wherein the first portion is the portion of the second insulating layer 47 covering the side of the third extension portion 443 of the first electrode 44 facing away from the substrate 41, and the second portion is the portion of the second insulating layer 47 covering the side of the first extension portion 441 and the second extension portion 442 of the first electrode 44 facing away from the substrate 41; in one case, see FIG. 13 , the surface of the first portion on the side facing away from the substrate 41 is higher than the surface of the second portion on the side facing away from the substrate 41; in another case, see FIG. 14 , the surface of the first portion on the side facing away from the substrate 41 is lower than the surface of the second portion on the side facing away from the substrate 41.
[0110] In some embodiments, the coverage area of the second insulating layer 47 on the side of the third extension portion 443 of the first electrode 44 facing away from the substrate 41 may also be larger than the coverage area of the third extension portion 443 of the first electrode 44 .
[0111] In some embodiments, the coverage height of the second insulating layer 47 on the side of the third extension portion 443 of the first electrode 44 away from the substrate 41 may be greater than, less than, or equal to the coverage height of the third extension portion 443 of the first electrode 44 .
[0112] The display panel provided in the embodiment of the present application is provided with a second insulating layer on the side of the first electrode facing away from the substrate, the second insulating layer fills the connection hole, and the first electrode electrically connected to the protective layer is covered, thereby protecting the first electrode and isolating the conductivity between the first electrode and other materials. In addition, the second insulating layer fills the hole of the connection hole and covers the first electrode, so that the surface of the second insulating layer facing away from the substrate is parallel to the substrate, and a display panel with an insulated and flat surface can also be obtained.
[0113] Referring to another partial cross-sectional view of the display panel 1 shown in FIG. 15 , in the case where the protective layer 42 is amorphous silicon, the protective layer 42 can be disposed between the second flexible layer (PI2) and the second barrier layer (BL2); that is, based on the display panel structure shown in FIG. 3 , a first flexible layer (PI1) 12 is disposed on one side of the substrate 11 (or 41), a first barrier layer (BL2) 13 is disposed on a side of the first flexible layer (PI1) 12 away from the substrate 11 (or 41), and a first barrier layer (BL2) 13 is disposed on a side of the first barrier layer (BL2) 13 away from the substrate 11 (or 41). A second flexible layer (PI2) 14 is disposed on one side of the board 11 (or 41), a protective layer 42 is disposed on the side of the second flexible layer (PI2) 14 facing away from the substrate 11 (or 41), the protective layer 42 encloses and forms a connection hole 50, and a first insulating layer 43 is disposed on the side of the protective layer 42 facing away from the substrate 11 (or 41); wherein the first insulating layer 43 may include a second barrier layer (BL2) 15, an inorganic insulating layer 16, a gate insulating layer (GI) 17, a capacitor insulating layer (CI) 18, and an interlayer dielectric layer (ILD) 30.
[0114] Next, a metal layer 45 is provided on the side of the first insulating layer 43 away from the substrate 11 (or 41), and a portion of the metal layer extends to the connection hole 50 to connect with the protective layer 42; a plurality of first electrodes 44 are provided on the side of the metal layer 45 away from the substrate 11 (or 41), and a portion of the first electrode 44 extends to the connection hole 50 to connect with the metal layer 45; a second insulating layer 47 is provided on the side of the first electrode 44 away from the substrate 11 (or 41), and the orthographic projection of the second insulating layer 47 on the substrate 11 (or 41) covers the orthographic projection of the first electrode 44 on the substrate 11 (or 41) to fill the connection hole 50. In addition, a planarization layer (PLN3) 46 is provided at the same layer position of the metal layer 45 to support the first electrode 44 provided on the side of the metal layer 45 away from the substrate 11 (or 41).
[0115] In some embodiments, for the display panel structure of FIG. 15 , a connection hole 50 may be provided in a hole region edge region 53 between a display region 51 and a hole region 52 of the display panel to connect the protection layer 42 to a power supply potential.
[0116] In some embodiments, the power supply potential of the display panel can be connected to the first electrode 44 at a side position of the hole area edge region 53 away from the hole area 52, and then the first electrode 44 is electrically connected to the protective layer 42, or the first electrode 44 is electrically connected to the protective layer 42 through the metal layer 45, so that the protective layer 42 is connected to the power supply potential of the display panel, thereby ensuring that the potential of the edge pixels is consistent with the potential of the non-edge pixels, improving the problem of uneven edge display, and improving the display effect.
[0117] In some embodiments, when the first electrode 44 extends to the connection hole 50, it can avoid the gate-source routing set in the edge area 53 of the hole area, or be connected by metal routing of multiple first electrodes 44 to extend to the connection hole 50, so as to avoid interrupting the gate-source routing set in the edge area 53 of the hole area, thereby affecting the gate-source routing.
[0118] In some embodiments, when the connection hole 50 is opened in the edge region 53 of the hole area, a large hole can be opened in the edge region 53 of the hole area in a whole circle, as shown in FIG9; or, a plurality of connection holes can be opened at equal intervals, as shown in FIG7 or 8. Optionally, when the large hole is opened in a whole circle, a large hole can be opened in the planarization layer (PLN3) 46 to connect the first electrode 44 with the metal layer 45, and then the metal layer 45 with the protective layer 42 is electrically connected. That is, a connection hole 50 with a hole depth reaching the second flexible layer (PI2) 14 can be opened in the edge region 53 of the hole area, and the side wall of the protective layer 42 (i.e., amorphous silicon) on the side of the second barrier layer (BL2) 15 close to the substrate 41 can be exposed to connect with other metals.
[0119] Optionally, the first electrode 44 can be extended to the connection hole 50 to be electrically connected to the protective layer 42, and the first electrode 44 can be connected to the power supply potential of the display panel, and the power supply potential of the display panel can be led out and connected to the protective layer 42 (i.e., amorphous silicon) through the first electrode 44; alternatively, the metal layer 45 can be extended to the connection hole 50 to be electrically connected to the protective layer 42, and the first electrode 44 can be extended to the connection hole 50 to be electrically connected to the metal layer 45. In this case, the first electrode 44 can be connected to the power supply potential of the display panel, so that the power supply potential of the display panel is led out and connected to the protective layer 42 (i.e., amorphous silicon) through the first electrode 44 and the metal layer 45 in turn; the metal layer 45 can also be connected to the power supply potential of the display panel, so that the power supply potential of the display panel is led out and connected to the protective layer 42 (i.e., amorphous silicon) through the metal layer 45.
[0120] The display panel provided in the embodiment of the present application adds an amorphous silicon layer (aSi) between the second flexible layer (PI2) 14 and the second barrier layer (BL2) 15 to improve the problem of image sticking of the display panel. The amorphous silicon layer (aSi) can also be connected to the power supply potential, thereby solving the problem of uneven display at the edge of the display panel after high-temperature reliability verification, thereby comprehensively improving the display effect of the display panel.
[0121] The following is a description of a method for preparing the display panel 1 provided in an embodiment of the present application.
[0122] The method for preparing the display panel 1 provided in the embodiment of the present application can be used to prepare the display panel 1 in the above embodiment.
[0123] Referring to FIG. 16 , the preparation method may include the following steps:
[0124] S110: providing a substrate.
[0125] 4 to 15 , a substrate 41 is provided, and the substrate 41 can provide support for the remaining film layers that are subsequently arranged.
[0126] S120: forming a protective layer on one side of the substrate.
[0127] 4 to 15 , after providing the substrate 41 , the process may include: forming a protective layer 42 on one side of the substrate 41 . For example, the protective layer 42 may be an amorphous silicon layer. Optionally, the protective layer is an amorphous silicon layer.
[0128] S130: forming a first insulating layer on a side of the protection layer away from the substrate.
[0129] 4-15 , after forming a protective layer 42 on one side of a substrate 41 , the process may include forming a first insulating layer 43 on the side of the protective layer 42 facing away from the substrate 41 ; for example, the first insulating layer may include a second barrier layer (BL2), an inorganic insulating layer (3L-1, 3L-2), a gate insulating layer (GI), a capacitor insulating layer (CI), an interlayer dielectric layer (ILD), etc.
[0130] S140: forming a connection hole in the first insulating layer, wherein the connection hole at least penetrates the first insulating layer, and a portion of the protection layer is exposed through the connection hole.
[0131] 7-9 , one or more connection holes may be provided at the edge of the hole region, the connection holes at least penetrate the first insulating layer, and a portion of the protection layer is exposed through the connection holes.
[0132] S150: forming a plurality of first electrodes on a side of the first insulating layer facing away from the substrate; portions of the first electrodes correspondingly extend into the connection holes and are connected to the protection layer.
[0133] Referring to FIGS. 4 to 15 , after forming the first insulating layer 43 on one side of the substrate 41, a plurality of first electrodes 44 may be formed on the side of the first insulating layer 43 away from the substrate 41, and a portion of the first electrode 44 extends into the connection hole 50 to be electrically connected to the protective layer 42. Specifically, referring to FIG. 4 , the first electrode 44 includes a first extension portion 441, a second extension portion 442, and a third extension portion 443, the first extension portion 441 covers the side wall of the connection hole 50, the second extension portion 442 is located at one end of the connection hole 50 facing the substrate 41, the third extension portion 443 is located at the side of the first insulating layer 43 away from the substrate 41, the second extension portion 442 and the third extension portion 443 are connected through the first extension portion 441, and the thicknesses of the first extension portion 441, the second extension portion 442, and the third extension portion 443 may be the same or different.
[0134] The method for preparing a display panel provided in an embodiment of the present application forms a connection hole when providing a protective layer, so that the first electrode can extend to the connection hole and be electrically connected to the protective layer. When the first electrode is connected to the power supply potential of the display panel, the protective layer can be connected to the power supply potential, thereby ensuring that the potential of the edge pixels is consistent with the potential of the non-edge pixels, thereby improving the problem of uneven edge display and improving the display effect of the display panel.
[0135] In some embodiments, referring to FIG. 17 , the preparation method may further include the following steps:
[0136] S160: forming a metal layer between the first insulating layer and the first electrode; a portion of the metal layer correspondingly extends into the connection hole to be electrically connected to the protection layer, and a portion of the first electrode correspondingly extends into the connection hole to be electrically connected to the metal layer.
[0137] 4 to 15 , after providing the first insulating layer 43, a metal layer 45 may be formed on a side of the first insulating layer 43 facing away from the substrate 41, and a plurality of first electrodes 44 may be formed on a side of the metal layer 45 facing away from the substrate 41. A portion of the metal layer 45 extends to the connection hole 50 to connect to the protective layer 42, and a portion of the first electrode 44 extends to the connection hole 50 to connect to the metal layer 45.
[0138] In some embodiments, referring to FIG. 18 , the preparation method may further include the following steps:
[0139] S170: forming a second insulating layer on a side of the first electrode facing away from the substrate; the orthographic projection of the second insulating layer on the substrate covers the orthographic projection of the first electrode electrically connected to the protective layer on the substrate.
[0140] 4-15 , after providing the first electrode 44 , a second insulating layer 47 may be formed on the side of the first electrode 44 facing away from the substrate 41 , wherein the orthographic projection of the second insulating layer 47 on the substrate 41 covers the orthographic projection of the first electrode 44 electrically connected to the protective layer on the substrate 41 .
[0141] In some embodiments, the second insulating layer 47 may completely fill the connection hole 50, see Figures 12 and 13; the second insulating layer 47 may also partially fill the connection hole 50, see Figure 14. When filling the connection hole 50, the second insulating layer 47 may also cover the first electrode 44, see Figure 12, or Figure 13, or Figure 14, or Figure 15.
[0142] In some embodiments, the second insulating layer 47 may be a pixel defining layer (PDL).
[0143] The embodiment of the present application provides a display device, which includes a display panel 1. The display device can be an electronic paper, a mobile phone, a tablet computer, a television, a display, a laptop computer, a digital photo frame, a smart bracelet, a smart watch, a super personal computer, a navigator, a wireless device, a personal digital assistant (PDA), a handheld or portable computer, a GPS receiver / navigator, a camera, an MP4 video player, a camcorder, a game console, a clock, a calculator, a television monitor, a computer monitor, a car display (for example, an odometer display, etc.), a cockpit controller and / or display, a display of a camera view (for example, a display of a rear-view camera in a vehicle), an electronic billboard or sign, a projector, and other mobile or fixed terminals.
[0144] In the case of using “including”, “having”, and “comprising” described herein, another component may be added unless a clear limiting term such as “only”, “consisting of”, etc. is used. Unless mentioned otherwise, a term in the singular form may include a plural form and should not be understood as being one in number.
[0145] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0146] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be construed as limiting the scope of the patent application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent application shall be subject to the attached claims.
Claims
1. A display panel, characterized in that: include: substrate; A protective layer, disposed on one side of the substrate; A first insulating layer, disposed on a side of the protective layer away from the substrate; a connecting hole, wherein the connecting hole at least penetrates the first insulating layer, and a portion of the protective layer is exposed through the connecting hole; A plurality of first electrodes are arranged on a side of the first insulating layer away from the substrate; parts of the first electrodes correspondingly extend into the connection holes to be electrically connected to the protection layer.
2. The display panel according to claim 1, characterized in that: The display panel further comprises a hole area and a hole area edge area surrounding at least a portion of the hole area, wherein the connection hole is located in the hole area edge area; and the distance between the central axis position of the connection hole and the boundary of the hole area is not less than the radius of a surface of a side of the connection hole away from the substrate; Optionally, the distance between the central axis position of the connection hole and the boundary of the hole area is not less than the sum of the radius of the surface of the connection hole facing away from the substrate and a preset safety distance; Optionally, the display panel also includes a display area, and the edge area of the hole area is located between the display area and the hole area; the distance between the central axis position of the connecting hole and the boundary of the display area is not less than the radius of the surface of the side of the connecting hole away from the substrate.
3. The display panel according to any one of claims 1 to 2, characterized in that: The connecting hole is an annular hole, and the central axis position of the annular hole is the position of the central circle of the annular hole.
4. The display panel according to any one of claims 1 to 2, characterized in that: The protective layer is connected to a fixed potential; Optionally, the first electrode is connected to a power supply potential in the display panel.
5. The display panel according to any one of claims 1 to 2, characterized in that: The display panel further includes: A metal layer is disposed between the first insulating layer and the first electrode, a portion of the metal layer correspondingly extends into the connection hole to be electrically connected to the protection layer, and a portion of the first electrode correspondingly extends into the connection hole to be electrically connected to the metal layer; Optionally, the metal layer is connected to a power supply potential in the display panel; Optionally, the material of the metal layer includes source and drain metal material.
6. The display panel according to any one of claims 1 to 2, characterized in that: The display panel further includes: A second insulating layer is arranged on a side of the first electrode away from the substrate; an orthographic projection of the second insulating layer on the substrate covers an orthographic projection of the first electrode electrically connected to the protective layer on the substrate.
7. The display panel according to any one of claims 1 to 2, characterized in that: The material of the protection layer includes amorphous silicon material.
8. A method for preparing a display panel, characterized in that: include: providing a substrate; forming a protective layer on one side of the substrate; forming a first insulating layer on a side of the protective layer away from the substrate; forming a connection hole in the first insulating layer, wherein the connection hole at least penetrates the first insulating layer, and a portion of the protection layer is exposed through the connection hole; A plurality of first electrodes are formed on a side of the first insulating layer away from the substrate; portions of the first electrodes correspondingly extend into the connection holes to be electrically connected to the protection layer.
9. The preparation method according to claim 8, characterized in that: The method further comprises: A metal layer is formed between the first insulating layer and the first electrode; a portion of the metal layer correspondingly extends into the connection hole to be electrically connected to the protection layer, and a portion of the first electrode correspondingly extends into the connection hole to be electrically connected to the metal layer; Optionally, a second insulating layer is formed on a side of the first electrode facing away from the substrate; the orthographic projection of the second insulating layer on the substrate covers the orthographic projection of the first electrode electrically connected to the protective layer on the substrate.
10. A display device, characterized in that: Comprising the display panel as described in any one of claims 1-7.