Display apparatus and method of manufacturing same

Abstract

The invention relates to a display device and a method of manufacturing the same. The display device includes: a pixel circuit layer disposed on a substrate and including a pixel circuit; a pixel defining layer disposed on the pixel circuit layer and including an opening; a first electrode disposed on the pixel circuit layer, disposed in the opening of the pixel defining layer, and having a portion disposed on a sidewall of the pixel defining layer; a first common layer on the first electrode; an emission layer on the first common layer; a second common layer on the emission layer; and a second electrode on the second common layer, in which an upper surface of the first common layer is at a higher level than an upper surface of the first electrode.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to and the benefit of Korean Patent Application No. 10-2023-0105629 filed on August 11, 2023 in the Korean Intellectual Property Office (KIPO), the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] One or more embodiments relate to a display device in which light emitting quality of a light emitting element is improved by preventing residue of a material for forming a pixel defining layer in an emission region and a method of manufacturing the display device. Background Art

[0004] A display device displays data visually. With the development of electronic devices such as mobile phones, personal digital assistants (PDAs), computers, and large televisions (TVs), various types of display devices applicable thereto have been developed. For example, widely used display devices on the market include liquid crystal display devices and organic light emitting display devices including backlight units that emit light of different colors from respective central regions. In addition, a display device including a quantum dot color conversion layer (QD-CCL) has recently been developed.

[0005] The display device includes a light emitting diode having a thin film transistor and an emission layer, and operates by emitting light from the light emitting diode. The emission layer may be formed in various ways, and may be formed, for example, by using an inkjet process. Summary of the invention

[0006] One or more embodiments include a display device with improved lighting quality and a method of manufacturing the display device. However, such technical issues are examples, and one or more embodiments are not limited thereto.

[0007] Additional aspects will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the presented embodiments of the disclosure.

[0008] According to one or more embodiments, a display device includes: a pixel circuit layer, which is disposed on a substrate and includes a pixel circuit; a pixel defining layer, which is disposed on the pixel circuit layer and includes an opening; a first electrode, which is disposed on the pixel circuit layer, is disposed in the opening of the pixel defining layer, and has a portion disposed on a side wall of the pixel defining layer; a first common layer, which is on the first electrode; an emission layer, which is on the first common layer; a second common layer, which is on the emission layer; and a second electrode, which is on the second common layer, wherein an upper surface of the first common layer is at a higher level than an upper surface of the first electrode.

[0009] The first electrode may include a first portion disposed on the pixel circuit layer and a second portion extending from the first portion and disposed on a sidewall of the pixel defining layer, and an upper surface of the first common layer may be at a higher level than a top of the second portion of the first electrode.

[0010] The opening in the pixel defining layer may include a central region and a peripheral region outside the central region, and the first common layer may be thicker in the central region than in the peripheral region.

[0011] The first common layer may have an upper surface convex upward at a central portion of an upper surface of the first common layer.

[0012] The opening in the pixel defining layer may include a central region and a peripheral region outside the central region, and in the central region, the first common layer may be thicker than the emission layer.

[0013] The first electrode may be disposed only in the opening of the pixel defining layer.

[0014] The pixel defining layer may include a first region adjacent to an upper surface of the pixel defining layer and a second region adjacent to a sidewall of the pixel defining layer, and the pixel defining layer may have liquid repellency in the first region and the second region.

[0015] The pixel defining layer may include an organic material having a fluorine group (—F) in the first region and the second region.

[0016] The first common layer may include a hole injection layer, and the second common layer may include an electron transport layer.

[0017] According to one or more embodiments, a display device includes: a pixel circuit layer, which is arranged on a substrate and includes a pixel circuit; a pixel defining layer, which is arranged on the pixel circuit layer and includes an opening; a first electrode, which is arranged on the pixel circuit layer and in the opening of the pixel defining layer; a first common layer, which is arranged on the first electrode; an emission layer, which is arranged on the first common layer; a second common layer, which is arranged on the emission layer; and a second electrode, which is arranged on the second common layer, wherein the pixel defining layer includes a first area adjacent to an upper surface of the pixel defining layer and a second area adjacent to a side wall of the pixel defining layer, and the pixel defining layer has liquid repellency in the first area and the second area.

[0018] The second region of the pixel defining layer may be above the first electrode, wherein the pixel defining layer may further include a third region adjacent to the sidewall of the pixel defining layer and below the second region, and a fourth region other than the first region, the second region, and the third region, and the fluorine content of the pixel defining layer in the first region or the second region may be greater than the fluorine content of the pixel defining layer in the third region or the fourth region.

[0019] An upper surface of the first common layer may be at a higher level than an upper surface of the first electrode.

[0020] The opening in the pixel defining layer may include a central region and a peripheral region outside the central region, and the first common layer may be thicker in the central region than in the peripheral region.

[0021] The first electrode may include a first portion disposed on the pixel circuit layer and a second portion extending from the first portion and disposed on a sidewall of the pixel defining layer, and an upper surface of the first common layer may be at a higher level than a top of the second portion of the first electrode.

[0022] The first electrode may have a flat upper surface.

[0023] The first common layer may be thicker than the emission layer.

[0024] The first common layer may be thicker than the second common layer.

[0025] In the first and second regions of the pixel defining layer, the pixel defining layer may include an organic material having a fluorine group (—F).

[0026] According to one or more embodiments, a method for manufacturing a display device includes: forming a pixel circuit layer on a substrate; forming a pixel defining layer on the pixel circuit layer, the pixel defining layer including an opening; forming an initial first electrode on the pixel circuit layer and the pixel defining layer; forming a photoresist pattern on the initial first electrode; etching the initial first electrode by using the photoresist pattern as an etching mask; performing a surface treatment process on the pixel defining layer so that a surface area of ​​the pixel defining layer is liquid-repellent; removing the photoresist pattern; forming a first common layer, an emission layer, and a second common layer in the opening of the pixel defining layer; and forming a second electrode on the second common layer.

[0027] Due to the surface treatment process, the upper surface and sidewalls of the pixel defining layer may have liquid repellency.

[0028] Performing the surface treatment process may include using a fluoride-based plasma.

[0029] The initial first electrode may be etched by a wet etching process.

[0030] The emission layer may be formed by an inkjet printing process. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] The above and other aspects, features and advantages of certain embodiments of the present disclosure will become more apparent from the following description taken in conjunction with the accompanying drawings, in which:

[0032] Figure 1 is a schematic perspective view of a display device according to an embodiment;

[0033] Figure 2 is a schematic diagram of an equivalent circuit of a pixel circuit included in a display device according to an embodiment;

[0034] Figure 3A is a schematic cross-sectional view of a display device according to an embodiment;

[0035] Figure 3B yes Figure 3A A schematic enlarged view of region "E" of FIG.

[0036] Figure 4A is a schematic cross-sectional view of a display device according to another embodiment;

[0037] Figure 4B yes Figure 4A A schematic enlarged view of region "F" of FIG.

[0038] Figures 5 to 11 is a schematic cross-sectional view of a method of manufacturing a display device according to an embodiment; and

[0039] Figures 12 to 15 is a schematic cross-sectional view of a method of manufacturing a display device according to another embodiment. DETAILED DESCRIPTION

[0040] Reference will now be made in detail to embodiments, examples of which are shown in the accompanying drawings, wherein the same reference numerals and / or reference signs refer to the same elements throughout. In this regard, the embodiments may have different forms and should not be construed as being limited to the descriptions set forth herein. Therefore, embodiments are described below only by reference to the accompanying drawings to explain the described aspects.

[0041] The term "and / or" includes all combinations of one or more that can be defined by the relevant configuration. For example, "A and / or B" can be understood to mean "A, B, or A and B". For the purpose of this disclosure, the phrase "at least one of A and B" can be interpreted as only A, only B, or A and B. In addition, "at least one of X, Y, and Z" and "at least one selected from the group consisting of X, Y, and Z" can be interpreted as only X, only Y, only Z, or any combination of two or more of X, Y, and Z.

[0042] Since this specification allows various changes and many embodiments, specific embodiments will be shown in the drawings and described in the written description. From the following detailed description of one or more embodiments in conjunction with the drawings, the effects and features of one or more embodiments and methods for achieving them will become apparent. However, the embodiments may have different forms and should not be construed as being limited to the descriptions set forth herein.

[0043] One or more embodiments will be described in more detail below with reference to the accompanying drawings. Regardless of the figure numbers, those elements that are the same or correspond to each other are presented with the same reference numerals, and redundant descriptions thereof are omitted.

[0044] Although terms such as "first" and "second" may be used to describe various elements, these elements must not be limited to the above terms. The above terms are only used to distinguish one element from another element.

[0045] As used herein, singular forms such as “a” and “an” are intended to include plural forms as well, unless the context clearly indicates otherwise.

[0046] It will be understood that the terms “comprising,” “including,” and “having” as used herein specify the presence of stated features or elements, but do not preclude the addition of one or more other features or elements.

[0047] It will be further understood that when a layer, region or element is referred to as being "on" another layer, region or element, it can be directly or indirectly on the other layer, region or element. That is, for example, intervening layers, regions or elements may be present.

[0048] For the convenience of explanation, the size of the elements in the drawings may be exaggerated or reduced. For example, since the size and thickness of the elements in the drawings are arbitrarily shown for the convenience of explanation, the following embodiments are not limited thereto.

[0049] When the embodiment can be implemented differently, a specific process order can be performed differently from the described order. For example, two processes described successively can be performed substantially simultaneously, or in the reverse order of the described order.

[0050] It will be further understood that when layers, regions or elements are referred to as being connected to each other, they may be directly connected to each other or may be indirectly connected to each other through intervening layers, regions or elements therebetween. For example, when layers, regions or elements are referred to as being electrically connected to each other, they may be directly electrically connected to each other or may be indirectly electrically connected to each other through intervening layers, regions or elements therebetween.

[0051] Unless otherwise defined or implied herein, all terms (including technical and scientific terms) used herein have the same meaning as those commonly understood by those skilled in the art to which the present disclosure belongs. It will also be understood that terms (such as those defined in commonly used dictionaries) should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and the present disclosure, and should not be interpreted in an ideal or overly formal sense unless clearly defined as such herein.

[0052] The display device may be a device for displaying an image, and may be a portable mobile device, such as a game console, a multimedia device, or an ultra-small personal computer (PC). The display device described below may include a liquid crystal display device, an electrophoretic display device, an organic light-emitting display device, an inorganic light-emitting display device, a field emission display device, a surface conduction electron emitter display device, a quantum dot display device, a plasma display device, and a cathode ray display device. As a display device according to an embodiment, an organic light-emitting display device is described below as an example. However, the embodiments described herein may include various types of display devices as described above.

[0053] Figure 1 is a schematic perspective view of a display device 1 according to an embodiment.

[0054] refer to Figure 1 , the display device 1 may include a display area DA in which the pixels P are disposed and a non-display area NDA outside the display area DA or adjacent to the display area DA. In an embodiment, the non-display area NDA may completely surround the display area DA. This may be interpreted as meaning that the substrate 100 (refer to FIG. 1 ) included in the display device 1 Figure 3A ) has a display area DA and a non-display area NDA.

[0055] Each pixel P of the display device 1 may be a region capable of emitting light of a specific color, and the display device 1 may provide an image by using the light emitted from the pixel P. For example, each pixel P may emit red light, green light, or blue light.

[0056] like Figure 1 As shown in , the display area DA may have a polygonal shape including a quadrilateral shape. For example, the display area DA may have a rectangular shape whose horizontal length is greater than the vertical length, a rectangular shape whose horizontal length is less than the vertical length, or a square shape. As another example, the display area DA may have various shapes such as an elliptical shape or a circular shape.

[0057] The non-display area NDA may be an area in which no pixel P is disposed. A driver for providing an electrical signal or power to the pixel P may be disposed in the non-display area NDA. Pads (not shown) to which various electronic devices or printed circuit boards may be electrically connected may be disposed in the non-display area NDA. Each pad may be separated from one another in the non-display area NDA and may be electrically connected to a printed circuit board or an integrated circuit device. In the accompanying drawings, the x-axis, the y-axis, and the z-axis are not limited to the three axes of a rectangular coordinate system and may be interpreted in a broader sense. For example, the x-axis, the y-axis, and the z-axis may be perpendicular or substantially perpendicular to each other, or may represent different directions that are not perpendicular to each other. For example, the direction x may be the short side direction of the display device 1, the direction y may be the long side direction of the display device 1, and the direction z may be the thickness direction of the display device 1.

[0058] Figure 2 2 is a schematic diagram of an equivalent circuit of a pixel circuit PC included in the display device 1 according to an embodiment. The pixel circuit PC may be electrically connected to a light emitting diode LED, and one light emitting diode LED may correspond to one pixel P.

[0059] The pixel circuit PC may include a first transistor Td, a second transistor Ts, and a storage capacitor Cst.

[0060] The second transistor Ts as a switching transistor may be electrically connected to the scan line SL and the data line DL, and may be turned on by a switching signal Sn input from the scan line SL to transfer a data signal Dm input from the data line DL to the first transistor Td. The storage capacitor Cst may have one end electrically connected to the second transistor Ts and the other end electrically connected to the driving voltage line PL, and may store a voltage corresponding to a difference between a voltage received from the second transistor Ts and a driving power voltage ELVDD supplied to the driving voltage line PL.

[0061] The first transistor Td as a driving transistor can be electrically connected to the driving voltage line PL and the storage capacitor Cst, and can be configured to control the amount of driving current flowing from the driving voltage line PL to the light emitting diode LED in response to the voltage value stored in the storage capacitor Cst. The light emitting diode LED can emit light with a specific brightness according to the driving current. The opposite electrode of the light emitting diode LED can receive the electrode power voltage ELVSS.

[0062] although Figure 2 The case where the pixel circuit PC includes two thin film transistors and one storage capacitor is shown, but one or more embodiments are not limited thereto. In another embodiment, the pixel circuit PC may include seven thin film transistors and one storage capacitor. In another embodiment, the pixel circuit PC may include two or more storage capacitors.

[0063] Figure 3A is a schematic cross-sectional view of a display device 1 according to an embodiment. Figure 3A is a schematic cross-sectional view in the display area DA of the display device 1 . Figure 3B yes Figure 3A Schematic enlarged view of area "E".

[0064] refer to Figure 3A and Figure 3B The display device 1 may include a light emitting diode LED in the display area DA. The light emitting diode LED may be electrically connected to a pixel circuit PC disposed between the substrate 100 and the light emitting diode LED in a direction perpendicular to the substrate 100 (eg, direction z).

[0065] The display device 1 may include a substrate 100 , a pixel circuit layer PCL on the substrate 100 , a pixel defining layer 120 on the pixel circuit layer PCL, a light emitting diode LED on the pixel circuit layer PCL, and an encapsulation layer 300 on the light emitting diode LED.

[0066] The substrate 100 may include, for example, glass and / or a polymer resin. Examples of polymer resins may include polyethersulfone (PES), polyarylate (PAR), polyetherimide (PEI), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polyphenylene sulfide (PPS), polyacrylate, polyimide (PI), polycarbonate (PC), and / or cellulose acetate propionate (CAP). The substrate 100 including the polymer resin may be flexible, rollable, or bendable. The substrate 100 may have a multilayer structure including a layer containing the above-mentioned polymer resin and an inorganic layer (not shown).

[0067] The pixel circuit layer PCL may include a buffer layer 101 , a first insulating layer 103 , a second insulating layer 105 , a third insulating layer 107 , a thin film transistor TFT, and / or an organic insulating layer 110 .

[0068] The buffer layer 101 may be disposed on the substrate 100 to planarize the upper surface of the substrate 100 and prevent impurities from flowing from the substrate 100. The buffer layer 101 may include an inorganic insulating material such as silicon oxide (SiO x ), silicon nitride (SiN x ) or silicon oxynitride (SiO x N y ). The buffer layer 101 may include a single layer or a multi-layer structure including the above inorganic insulating materials.

[0069] The pixel circuit PC may include at least one thin film transistor TFT and a storage capacitor Cst. The thin film transistor TFT may include a semiconductor layer Act, a gate electrode GE, a source electrode SE, and a drain electrode DE.

[0070] The semiconductor layer Act may be disposed on the buffer layer 101. The semiconductor layer Act may include an oxide semiconductor and / or a silicon semiconductor. In the case where the semiconductor layer Act includes an oxide semiconductor, the semiconductor layer Act may include, for example, an oxide of at least one material selected from the group including indium (In), gallium (Ga), tin (Sn), zirconium (Zr), vanadium (V), hafnium (Hf), cadmium (Cd), germanium (Ge), chromium (Cr), titanium (Ti), and zinc (Zn). For example, the semiconductor layer Act may be an InSnZnO (ITZO) semiconductor layer, an InGaZnO (IGZO) semiconductor layer, etc. In the case where the semiconductor layer Act includes a silicon semiconductor, the semiconductor layer Act may include, for example, amorphous silicon or low temperature polycrystalline silicon (LTPS).

[0071] The gate electrode GE may be disposed on the semiconductor layer Act, and the first insulating layer 103 is between the gate electrode GE and the semiconductor layer Act. The gate electrode GE may overlap with the channel region of the semiconductor layer Act. The gate electrode GE may include a low-resistance metal material. For example, the gate electrode GE may have a single-layer or multi-layer structure including one or more metals selected from aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W) and copper (Cu). The gate electrode GE may be electrically connected to a gate line configured to apply an electrical signal to the gate electrode GE.

[0072] The first insulating layer 103 may be disposed on the buffer layer 101. The first insulating layer 103 may be disposed between the semiconductor layer Act and the gate electrode GE. The first insulating layer 103 may include, for example, an inorganic insulating material such as silicon oxide (SiO 2 ), silicon nitride (SiN x ), silicon oxynitride (SiON), aluminum oxide (Al 2 O 3 ), titanium oxide (TiO 2 ), Tantalum Oxide (Ta 2 O 5 ), hafnium oxide (HfO 2 ) or zinc oxide (ZnO x ). ZnO x It can be ZnO and / or ZnO 2 .

[0073] The second insulating layer 105 may be disposed on the first insulating layer 103. The second insulating layer 105 may cover the gate electrode GE. In a similar manner to the first insulating layer 103, the second insulating layer 105 may include an inorganic insulating material such as silicon oxide (SiO 2 ), silicon nitride (SiN x ), silicon oxynitride (SiON), aluminum oxide (Al 2 O 3 ), titanium oxide (TiO 2 ), Tantalum Oxide (Ta 2 O 5 ), hafnium oxide (HfO 2 ) or zinc oxide (ZnO x ). ZnO x It can be ZnO and / or ZnO 2 .

[0074] The upper electrode CE2 of the storage capacitor Cst may be disposed on the second insulating layer 105. In an embodiment, the upper electrode CE2 may overlap the gate electrode GE. In this regard, the gate electrode GE and the upper electrode CE2 overlapping each other with the second insulating layer 105 therebetween may constitute the storage capacitor Cst. For example, the gate electrode GE may serve as the lower electrode CE1 of the storage capacitor Cst. As described above, the storage capacitor Cst and the thin film transistor TFT may overlap each other. In another embodiment, the storage capacitor Cst and the thin film transistor TFT may not overlap each other.

[0075] The third insulating layer 107 may be disposed on the second insulating layer 105. The third insulating layer 107 may cover the upper electrode CE2. The third insulating layer 107 may include silicon oxide (SiO 2 ), silicon nitride (SiN x ), silicon oxynitride (SiON), aluminum oxide (Al 2 O 3 ), titanium oxide (TiO 2 ), Tantalum Oxide (Ta 2 O 5 ), hafnium oxide (HfO 2 ) or zinc oxide (ZnO x ). ZnO x It can be ZnO and / or ZnO 2 The third insulating layer 107 may have a single-layer or multi-layer structure including the above inorganic insulating material.

[0076] The source electrode SE and the drain electrode DE may each be disposed on the third insulating layer 107. The source electrode SE and the drain electrode DE may be electrically connected to the semiconductor layer Act through contact holes in the first insulating layer 103, the second insulating layer 105, and the third insulating layer 107. The source electrode SE and the drain electrode DE may include a highly conductive material. At least one of the source electrode SE and the drain electrode DE may include a conductive material containing molybdenum (Mo), aluminum (Al), copper (Cu), or titanium (Ti), and may have a multilayer or single-layer structure including the above materials. In an embodiment, at least one of the source electrode SE and the drain electrode DE may have a multilayer structure of Ti / Al / Ti.

[0077] The organic insulating layer 110 may be disposed on the third insulating layer 107. The organic insulating layer 110 may be disposed on the source electrode SE and the drain electrode DE. The organic insulating layer 110 is shown as a single layer, but is not limited thereto and may have a multi-layer structure.

[0078] The organic insulating layer 110 may include an organic material. The organic insulating layer 110 may include an organic insulating material such as a general commercial polymer (e.g., polymethyl methacrylate (PMMA) or polystyrene (PS)), a polymer derivative having a phenolic group, an acrylic polymer, an imide polymer, an aryl ether polymer, an amide polymer, a fluorine polymer, a p-xylene polymer, a vinyl alcohol polymer, and / or a blend thereof. The organic insulating layer 110 may planarize the upper surface of the pixel circuit PC to planarize the surface on which the light emitting diode LED is to be positioned.

[0079] The pixel defining layer 120 may be disposed on the pixel circuit layer PCL. The pixel defining layer 120 may be disposed on the organic insulating layer 110. The pixel defining layer 120 may have an opening 120OP. Figure 3B As shown in , the opening 120OP in the pixel defining layer 120 may have a central area OPC in a central portion of the opening 120OP and a peripheral area OPP outside the central area OPC.

[0080] The opening 120OP in the pixel defining layer 120 may expose the entire first electrode 210. For example, the pixel defining layer 120 may not cover the upper surface of the first electrode 210. The emission layer 220 described below may be in the opening 120OP of the pixel defining layer 120. In an embodiment, the first common layer 215 and the second common layer 225 described below may be in the opening 120OP of the pixel defining layer 120. The second electrode 230 described below may be disposed on the emission layer 220. The stacked structure of the first electrode 210, the first common layer 215, the emission layer 220, the second common layer 225, and the second electrode 230 may constitute a light emitting diode LED. The opening 120OP in the pixel defining layer 120 may correspond to the light emitting diode LED and may define an emission region. The area exposed by the opening 120OP in the pixel defining layer 120 may be defined as an emission region.

[0081] The pixel defining layer 120 may include a first area A1 adjacent to the upper surface of the pixel defining layer 120, a second area A2 and a third area A3 adjacent to the sidewall of the pixel defining layer 120, and a fourth area A4 as a remaining area other than the first area A1, the second area A2, and the third area A3. The second area A2 of the pixel defining layer 120 may be an area that does not overlap with the first electrode 210 in the direction x and / or the direction y. The second area A2 of the pixel defining layer 120 may be an area above the first electrode 210. In other words, the second area A2 of the pixel defining layer 120 may be an area at a higher level than the first electrode 210. The third area A3 of the pixel defining layer 120 may be an area overlapping with the first electrode 210 in the direction x and / or the direction y. The third area A3 of the pixel defining layer 120 may be an area below the second area A2. The first area A1, the second area A2, and the third area A3 of the pixel defining layer 120 may be areas adjacent to the surface of the pixel defining layer 120, and may be referred to as surface areas. The fourth area A4 of the pixel defining layer 120 is an area disposed in a core portion of the pixel defining layer 120 and may be referred to as a core area.

[0082] In an embodiment, the pixel defining layer 120 may include an organic insulating material such as polyimide, polyacrylic acid, or hexamethyldisiloxane (HMDSO). In an embodiment, at least a portion of the pixel defining layer 120 may be liquid repellent. For example, the surface area of ​​the pixel defining layer 120 may be liquid repellent. For example, the pixel defining layer 120 may be liquid repellent in the first area A1 and the second area A2. In this specification, having liquid repellency may mean that the contact angle of the solvent of the ink comprising the light-emitting material for forming the emission layer 220 or the ink comprising the light-emitting material is relatively large during the inkjet process. For example, having liquid repellency may mean that the contact angle of the solvent of the ink comprising the light-emitting material for forming the emission layer 220 or the ink comprising the light-emitting material during the inkjet process is about 90 degrees or more.

[0083] In an embodiment, the pixel defining layer 120 may include a fluorine-based component. For example, the pixel defining layer 120 may include an organic material having a fluorine group (-F) or a fluorine compound. For example, the pixel defining layer 120 may include an organic material having a fluorine group (-F) or a fluorine compound in the first area A1 and the second area A2. For example, the fluorine content in the first area A1 and the second area A2 of the pixel defining layer 120 may be greater than the fluorine content in the third area A3 and the fourth area A4 of the pixel defining layer 120. The fluorine group or fluorine included in the pixel defining layer 120 may improve the liquid repellency of the surface of the pixel defining layer 120.

[0084] The light emitting diode LED may be disposed on the pixel circuit layer PCL. The light emitting diode LED may be disposed on the organic insulating layer 110. The light emitting diode LED may emit, for example, red light, green light, or blue light, or may emit red light, green light, blue light, or white light.

[0085] The light emitting diode LED may be an organic light emitting diode including an organic emission layer. As another example, the light emitting diode LED may be an inorganic light emitting diode including an inorganic emission layer. The light emitting diode LED may have a micrometer-scale or nanometer-scale size. For example, the light emitting diode LED may be a micro light emitting diode. As another example, the light emitting diode LED may be a nanorod light emitting diode. The nanorod light emitting diode may include gallium nitride (GaN). In an embodiment, a color conversion layer may be disposed on the nanorod light emitting diode. The color conversion layer may include quantum dots. As another example, the light emitting diode LED may be a quantum dot light emitting diode including a quantum dot emission layer.

[0086] The light emitting diode LED may include a first electrode 210, a first common layer 215, an emission layer 220, a second common layer 225, and a second electrode 230. The first electrode 210 of the light emitting diode LED may be an anode, and the second electrode 230 may be a cathode, but one or more embodiments are not limited thereto. For example, the light emitting diode LED may be an inverted light emitting diode in which the first electrode 210 is a cathode and the second electrode 230 is an anode. For the convenience of description, the description given below may be based on a light emitting diode LED in which the first electrode 210 is an anode and the second electrode 230 is a cathode.

[0087] The first electrode 210 may be disposed on the organic insulating layer 110. The entire first electrode 210 may be exposed by the opening 120OP in the pixel defining layer 120. The first electrode 210 may be disposed only in the opening 120OP of the pixel defining layer 120. In an embodiment, the first electrode 210 may be disposed on the organic insulating layer 110, and a portion of the first electrode 210 may be disposed on a sidewall of the pixel defining layer 120.

[0088] The first electrode 210 may be electrically connected to the thin film transistor TFT. For example, the first electrode 210 may be electrically connected to the thin film transistor TFT through a contact hole in the organic insulating layer 110 .

[0089] like Figure 3B As shown in FIG. 1 , the first electrode 210 may include a Figure 3A The first portion 210a of the first electrode 210 may be disposed on the upper surface of the organic insulating layer 110. The first portion 210a of the first electrode 210 may be a portion having an upper surface substantially parallel to the upper surface of the substrate 100. The second portion 210b of the first electrode 210 may protrude from the first portion 210a of the first electrode 210. For example, the second portion 210b of the first electrode 210 may be referred to as a protrusion of the first electrode 210. The central portion of the first portion 210a of the first electrode 210 may be in the central region OPC, and the second portion 210b of the first electrode 210 may be in the peripheral region OPP.

[0090] In an embodiment, the upper surface 210U of the first electrode 210 may be uneven. The upper surface 210U of the first electrode 210 may include a first upper surface portion 210Ua in the central region OPC and a second upper surface portion 210Ub in the peripheral region OPP. The first upper surface portion 210Ua may be an upper surface of the first portion 210a of the first electrode 210, and the second upper surface portion 210Ub may be an upper surface of the second portion 210b of the first electrode 210. In an embodiment, the first upper surface portion 210Ua of the first electrode 210 may be substantially parallel to the upper surface of the substrate 100. The second upper surface portion 210Ub of the first electrode 210 may be inclined from the first upper surface portion 210Ua.

[0091] The first electrode 210 may include, for example, a conductive oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In 2 O 3 ), indium gallium oxide (IGO) or aluminum zinc oxide (AZO). The first electrode 210 may include, for example, a reflective layer, the reflective layer including silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), copper (Cu) or a compound thereof. For example, the first electrode 210 may have a double-layer or triple-layer structure including the above reflective layer and at least one conductive oxide layer. In another embodiment, the first electrode 210 may exclude (or not include) silver (Ag) and may include a reflective layer based on an aluminum (Al) compound or based on copper (Cu).

[0092] The first common layer 215 may be disposed in the opening 120OP of the pixel defining layer 120. The first common layer 215 may be disposed on the first electrode 210. The first common layer 215 may be disposed between the first electrode 210 and the emission layer 220. In an embodiment, the first common layer 215 may be disposed only in the opening 120OP of the pixel defining layer 120. In other words, the first common layer 215 may be disposed in an island shape. In another embodiment, similar to the second electrode 230, the first common layer 215 may be shared by the light emitting diode LED. Figure 3A and Figure 3B In the figure, the first common layer 215 is shown as a single layer, but is not limited thereto. The first common layer 215 may include a hole transport layer (HTL) and / or a hole injection layer (HIL). In addition to the HTL and the HIL, the first common layer 215 may also include other functional layers. The first common layer 215 may be formed by an inkjet process.

[0093] The upper surface 215U of the first common layer 215 may be at a higher level than the upper surface 210U of the first electrode 210. The upper surface 215U of the first common layer 215 may be at a higher level than the first upper surface portion 210Ua of the first electrode 210 and the second upper surface portion 210Ub of the first electrode 210. The upper surface 215U of the first common layer 215 may be at a higher level than the top of the first electrode 210. Figure 3A As shown in , the distance Db between the upper surface of the substrate 100 and the upper surface 215U of the first common layer 215 may be greater than the distance Da between the upper surface of the substrate 100 and the uppermost end of the first electrode 210. The upper surface 215U of the first common layer 215 may be at a higher level than the top of the second portion 210b of the first electrode 210. For example, the entire upper surface 215U of the first common layer 215 may be at a higher level than the first electrode 210.

[0094] In the present specification, “A is at a higher level than B” may be defined as A being disposed higher than B in a direction (e.g., direction z) perpendicular to the upper surface of the substrate 100 based on the substrate 100. For example, “A is at a higher level than B” may be defined as a distance between the upper surface of the substrate 100 and A being greater than a distance between the upper surface of the substrate 100 and B.

[0095] Since the upper surface 215U of the first common layer 215 may be higher than the uppermost end of the first electrode 210, a short circuit between the first electrode 210 and the second electrode 230 may be prevented. Therefore, since the upper surface 215U of the first common layer 215 may be higher than the uppermost end of the first electrode 210, the electrical reliability of the display device 1 may be improved.

[0096] In an embodiment, the first common layer 215 may have an upper surface convex upward at its central portion. For example, at least a portion of the upper surface 215U of the first common layer 215 in the peripheral region OPP may be at a lower level than the upper surface 215U of the first common layer 215 in the central region OPC. The thickness Ta of the first common layer 215 in the central region OPC may be greater than the thickness Tb of the first common layer 215 in the peripheral region OPP. In this regard, the thickness of the first common layer 215 in each of the central region OPC and the peripheral region OPP may be defined as an average thickness in each region. Because the sidewalls of the pixel defining layer 120 may exhibit liquid repellency, the height of the upper surface 215U of the first common layer 215 in the region adjacent to the sidewalls of the pixel defining layer 120 may be lower than the height in the central region OPC of the opening 120OP of the pixel defining layer 120.

[0097] The emission layer 220 may be disposed in the opening 120OP of the pixel defining layer 120. The emission layer 220 may be disposed on the first common layer 215. The emission layer 220 may be, for example, an organic emission layer. The organic emission layer may include an organic material including a fluorescent or phosphorescent material that emits red light, green light, blue light, or white light. The organic emission layer may include a low molecular weight organic material or a polymer organic material. The emission layer 220 may be disposed only in the opening 120OP of the pixel defining layer 120. For example, the emission layer 220 may be disposed in an island shape. The emission layer 220 may be formed by an inkjet process.

[0098] In an embodiment, the emission layer 220 may have an upper surface that is convex at a central portion thereof. For example, at least a portion of the upper surface of the emission layer 220 in the peripheral region OPP may be at a lower level than the upper surface of the emission layer 220 in the central region OPC. Because the sidewall of the pixel defining layer 120 may exhibit liquid repellency, the height of the upper surface of the emission layer 220 in the region adjacent to the sidewall of the pixel defining layer 120 may be lower than the height in the central region OPC of the opening 120OP.

[0099] The second common layer 225 may be disposed in the opening 120OP of the pixel defining layer 120. The second common layer 225 may be disposed on the emission layer 220. The second common layer 225 may be disposed between the second electrode 230 and the emission layer 220. In an embodiment, the second common layer 225 may be disposed only in the opening 120OP of the pixel defining layer 120. In other words, the second common layer 225 may be disposed in an island shape. In another embodiment, similar to the second electrode 230, the second common layer 225 may be shared by the light emitting diode LED. Figure 3A and Figure 3B In the figure, the second common layer 225 is shown as a single layer, but is not limited thereto. The second common layer 225 may include an electron transport layer (ETL) and / or an electron injection layer (EIL). In addition to the ETL and the EIL, the second common layer 225 may also include other functional layers. The second common layer 225 may be formed by an inkjet process.

[0100] In an embodiment, the second common layer 225 may have an upper surface that is convex at a central portion thereof. For example, at least a portion of the upper surface of the second common layer 225 in the peripheral region OPP may be at a lower level than the upper surface of the second common layer 225 in the central region OPC. Because the sidewall of the pixel defining layer 120 may exhibit liquid repellency, the height of the upper surface of the second common layer 225 in the region adjacent to the sidewall of the pixel defining layer 120 may be lower than the height in the central region OPC of the opening 120OP of the pixel defining layer 120.

[0101] In the central region OPC, the thickness Ta of the first common layer 215 may be greater than the thickness Tc of the emission layer 220. In the central region OPC, the thickness Ta of the first common layer 215 may be greater than the thickness Td of the second common layer 225.

[0102] The second electrode 230 may be disposed on the second common layer 225. The second electrode 230 may completely cover the substrate 100 in the display area DA. The second electrode 230 may be a light-transmitting electrode or a reflective electrode. The second electrode 230 may include a conductive material having a low work function. For example, the second electrode 230 may include a (semi) transparent layer, the (semi) transparent layer including silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca) or an alloy thereof. As another example, the second electrode 230 may also include a (semi) transparent layer including the above materials such as ITO, IZO, ZnO or In 2 O 3 layer.

[0103] The encapsulation layer 300 may be disposed on the light emitting diode LED. The light emitting diode LED may be covered by the encapsulation layer 300 and prevented from being damaged by external moisture or oxygen. The encapsulation layer 300 may cover the display area DA and may extend outside the display area DA. The encapsulation layer 300 may include at least one inorganic encapsulation layer and at least one organic encapsulation layer. For example, the encapsulation layer 300 may include a first inorganic encapsulation layer 310, an organic encapsulation layer 320, and / or a second inorganic encapsulation layer 330.

[0104] Because the first inorganic encapsulating layer 310 may be formed along the underlying structure, its upper surface may be uneven. The organic encapsulating layer 320 may cover the first inorganic encapsulating layer 310 and, unlike the first inorganic encapsulating layer 310, may have a substantially flat upper surface.

[0105] The first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 may include one or more inorganic materials such as aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride, and silicon oxynitride. The organic encapsulation layer 320 may include a polymer-based material. Examples of polymer-based materials may include acrylic resins, epoxy resins, polyimides, and polyethylene. In an embodiment, the organic encapsulation layer 320 may include acrylate. The organic encapsulation layer 320 may be formed by curing a monomer or applying a polymer.

[0106] In some embodiments, other layers such as a capping layer may be disposed between the first inorganic encapsulating layer 310 and the second electrode 230 .

[0107] Figure 4A is a schematic cross-sectional view of a display device 1 according to another embodiment. Figure 4B yes Figure 4A Schematic enlarged view of area "F". Figure 4A and Figure 4B Shown is a reference Figure 3A and Figure 3B Modifications of the described embodiments. Figure 3A and Figure 3B Redundant description of the implementation scheme of , and changes therein may be described.

[0108] refer to Figure 4A and Figure 4B , the first electrode 210 in the opening 120OP of the pixel defining layer 120 may be disposed on the organic insulating layer 110. In an embodiment, an upper surface 210U of the first electrode 210 may be substantially flat. An upper surface 210U of the first electrode 210 on the organic insulating layer 110 may be substantially parallel to an upper surface of the substrate 100. In an embodiment, the first electrode 210 may not include a protrusion.

[0109] The upper surface 215U of the first common layer 215 may be at a higher level than the upper surface 210U of the first electrode 210. Figure 4A As shown in , a distance Dd between the upper surface of the substrate 100 and the upper surface 215U of the first common layer 215 may be greater than a distance Dc between the upper surface of the substrate 100 and the upper surface 210U of the first electrode 210 .

[0110] In an embodiment, the first common layer 215 may have an upper surface convex upward at a central portion thereof. For example, at least a portion of the upper surface 215U of the first common layer 215 in the peripheral region OPP may be at a lower level than the upper surface 215U of the first common layer 215 in the central region OPC. The thickness Taa of the first common layer 215 in the central region OPC may be greater than the thickness Tbb of the first common layer 215 in the peripheral region OPP. In this regard, the thickness of the first common layer 215 in each of the central region OPC and the peripheral region OPP may be defined as an average thickness in each region.

[0111] Figures 5 to 11 is a schematic cross-sectional view of a method of manufacturing a display device according to an embodiment. Figures 5 to 11 shows the reference Figure 3A and Figure 3B A method of manufacturing an embodiment is described. Figures 5 to 11 Shows the corresponding Figure 3B manufacturing method in the region of .

[0112] First, refer to Figure 3A, a substrate 100 and a pixel circuit layer PCL including a pixel circuit PC on the substrate 100 may be formed. For example, a buffer layer 101, a semiconductor layer Act, a first insulating layer 103, a gate electrode GE, a second insulating layer 105, an upper electrode CE2, a third insulating layer 107, a source electrode SE and a drain electrode DE, and / or an organic insulating layer 110 may be sequentially formed on the substrate 100.

[0113] refer to Figure 5 , can be in the pixel circuit layer PCL (reference Figure 3A A pixel defining layer 120 including an opening 120OP is formed on the organic insulating layer 110. The pixel defining layer 120 may include an organic insulating material such as polyimide, polyacrylic acid, or hexamethyldisiloxane (HMDSO).

[0114] refer to Figure 6 , a preliminary first electrode 210P may be formed on the organic insulating layer 110 and the pixel defining layer 120. The preliminary first electrode 210P may be formed, for example, by a sputtering process.

[0115] The initial first electrode 210P may include, for example, a reflective layer including silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), copper (Cu) or a compound thereof. The initial first electrode 210P may include, for example, a conductive oxide layer such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In 2 O 3 ), indium gallium oxide (IGO) or aluminum zinc oxide (AZO). For example, the preliminary first electrode 210P may have a double-layer or triple-layer structure including the above reflective layer and at least one conductive oxide layer.

[0116] refer to Figure 7 , a photoresist PR may be formed on the pixel defining layer 120 and the organic insulating layer 110. The photoresist PR may be a positive photoresist or a negative photoresist. In the embodiment, for ease of description, a positive photoresist is described as an example. By using a photomask M1 including a light transmitting portion M11 and a light blocking portion M12, a reference Figure 3A The photoresist PR may be exposed corresponding to the position of the described first electrode 210. In some embodiments, the area of ​​a region where the photoresist pattern to be developed is disposed may be changed by changing the degree to which the photoresist PR is exposed to light.

[0117] refer to Figure 8By developing the photoresist PR, a first photoresist pattern PRa may be formed on the preliminary first electrode 210P. The first photoresist pattern PRa may be retained in a region of the photoresist PR corresponding to a position where the first electrode 210 may be formed, and the remaining portion may be removed. The first photoresist pattern PRa may be disposed in the opening 120OP of the pixel defining layer 120.

[0118] refer to Fig. 9 , the initial first electrode 210P can be etched by using the first photoresist pattern PRa as an etching mask, and thus the first electrode 210 can be formed. The etching process for forming the first electrode 210 can be, for example, a wet etching process. Due to the etching process, a portion of the initial first electrode 210P can be removed in an area that does not overlap with the first photoresist pattern PRa. At this point, a portion of the initial first electrode 210P can be removed in an area overlapping with the outer edge of the first photoresist pattern PRa, and thus an undercut profile UC can be formed. Therefore, a first electrode 210 including a first portion 210a disposed on the upper surface of the organic insulating layer 110 and a second portion 210b extending from the first portion 210a and disposed on the sidewall of the pixel defining layer 120 can be formed. The central portion of the first portion 210a of the first electrode 210 can be in the central area OPC of the opening 120OP of the pixel defining layer 120, and the second portion 210b of the first electrode 210 can be in the peripheral area OPP of the opening 120OP of the pixel defining layer 120. The second portion 210 b may be a protrusion extending along the sidewall of the pixel defining layer 120 and protruding from the first portion 210 a .

[0119] The first electrode 210 may be formed after forming the pixel defining layer 120, and thus the first electrode 210 may be disposed only in the opening 120OP of the pixel defining layer 120. For example, the entire upper surface of the first electrode 210 may be exposed by the opening 120OP in the pixel defining layer 120. The pixel defining layer 120 may not cover the upper surface of the first electrode 210.

[0120] refer to Fig.10 , the surface area of ​​the pixel defining layer 120 may be surface treated to have liquid repellency by performing a surface treatment process. For example, due to the plasma surface treatment process, the surface of the pixel defining layer 120 may have liquid repellency. In this regard, due to the first photoresist pattern PRa, the first electrode 210 may not be affected by the surface treatment process. Because the first photoresist pattern PRa may overlap with the first electrode 210 and may cover the first electrode 210, the first electrode 210 may not be affected by the surface treatment process. Therefore, unlike the surface of the pixel defining layer 120, the first electrode 210 may maintain a hydrophilic property or a lyophilic property.

[0121] For example, you can use CF 4 Gas plasma or SF 6 The fluoride-based plasma of the gas plasma performs a surface treatment on the pixel defining layer 120. For example, the pixel defining layer 120 may include an organic material having a fluorine group (-F) or a fluorine compound. For example, the upper surface and sidewalls of the pixel defining layer 120 may include an organic material having a fluorine group (-F). For example, the functional groups of the upper surface and sidewalls of the pixel defining layer 120 may be substituted with fluorine groups (-F).

[0122] A surface treatment process may be performed so that a portion of the upper surface and the side surface of the pixel defining layer 120 may have liquid repellency. An area that does not overlap with the first photoresist pattern PRa and is exposed may be surface treated to have liquid repellency. For example, a first area A1 adjacent to the upper surface of the pixel defining layer 120 and a second area A2 adjacent to the side surface of the pixel defining layer 120 and located above the first electrode 210 may have liquid repellency. For example, the first area A1 and the second area A2 of the pixel defining layer 120 may be surface treated, and therefore, the functional groups on the surface of the pixel defining layer 120 may be replaced with fluorine groups (-F).

[0123] The area overlapping with the first photoresist pattern PRa and not exposed to the plasma gas may not be surface treated. For example, the third area A3 adjacent to the side surface of the pixel defining layer 120 and overlapping with the first electrode 210 in the direction x or the direction y and the fourth area A4 as the remaining area except the first area A1 to the third area A3 may not be surface treated. Therefore, in the case of performing the surface treatment process using fluoride-based plasma, the fluorine content of the pixel defining layer 120 in the first area A1 and the second area A2 may be greater than the fluorine content of the pixel defining layer 120 in the third area A3 and the fourth area A4.

[0124] refer to Fig.11 , the first photoresist pattern PRa may be removed. A first common layer 215, an emission layer 220, and a second common layer 225 may be sequentially formed on the first electrode 210. Each of the first common layer 215, the emission layer 220, and the second common layer 225 may be formed by performing, for example, an inkjet process. The first common layer 215, the emission layer 220, and the second common layer 225 may be formed in the opening 120OP of the pixel defining layer 120. Each of the first common layer 215, the emission layer 220, and the second common layer 225 may form an island pattern shape in the opening 120OP of the pixel defining layer 120. In another embodiment, the first common layer 215 and the second common layer 225 may be formed to be completely disposed on the substrate 100 to be shared by the light emitting diode LED.

[0125] The first common layer 215 is shown as a single layer, but is not limited thereto, and may have a single layer or a multilayer structure. The first common layer 215 may be formed to include a hole transport layer (HTL) and / or a hole injection layer (HIL). In addition to the HTL and the HIL, the first common layer 215 may further include other functional layers.

[0126] The upper surface 215U of the first common layer 215 may be formed at a higher level than the upper surface 210U of the first electrode 210. The upper surface 215U of the first common layer 215 may be formed at a higher level than the first upper surface portion 210Ua of the first electrode 210 and the second upper surface portion 210Ub of the first electrode 210. The upper surface 215U of the first common layer 215 may be at a higher level than the top of the first electrode 210. Since the upper surface 215U of the first common layer 215 may be higher than the uppermost end of the first electrode 210, a short circuit between the first electrode 210 and the second electrode 230 may be prevented.

[0127] Because the second area A2 of the pixel defining layer 120 may have liquid repellency, the height of the upper surface 215U of the first common layer 215 in the area adjacent to the sidewall of the pixel defining layer 120 may be lower than the height in the central area OPC of the opening 120OP of the pixel defining layer 120. For example, the first common layer 215 may be formed to have an upper surface convex upward at its central portion. For example, at least a portion of the upper surface 215U of the first common layer 215 in the peripheral area OPP may be at a lower level than the upper surface 215U of the first common layer 215 in the central area OPC. The thickness Ta of the first common layer 215 in the central area OPC may be formed to be greater than the thickness Tb of the first common layer 215 in the peripheral area OPP.

[0128] The emission layer 220 may be, for example, an organic emission layer. The organic emission layer may include an organic material including a fluorescent or phosphorescent material that emits red, green, blue, or white light. The organic emission layer may be formed to include a low molecular weight organic material or a polymer organic material.

[0129] Because the second area A2 of the pixel defining layer 120 may have liquid repellency, the height of the upper surface of the emission layer 220 in the area adjacent to the sidewall of the pixel defining layer 120 may be lower than that in the central area OPC of the opening 120OP of the pixel defining layer 120. For example, at least a portion of the upper surface of the emission layer 220 in the peripheral area OPP may be formed at a lower level than the upper surface of the emission layer 220 in the central area OPC.

[0130] The second common layer 225 is shown as a single layer, but is not limited thereto, and may have a single layer or a multilayer structure. The second common layer 225 may be formed to include an electron transport layer (ETL) and / or an electron injection layer (EIL). In addition to the ETL and the EIL, the second common layer 225 may also include other functional layers.

[0131] Because the second area A2 of the pixel defining layer 120 may have liquid repellency, the height of the upper surface of the second common layer 225 in the area adjacent to the sidewall of the pixel defining layer 120 may be lower than the height in the central area OPC of the opening 120OP of the pixel defining layer 120. For example, the second common layer 225 may be formed to have an upper surface convex upward at a central portion thereof. For example, at least a portion of the upper surface of the second common layer 225 in the peripheral area OPP may be formed to be at a lower level than the upper surface of the second common layer 225 in the central area OPC.

[0132] The thickness Ta of the first common layer 215 may be formed to be greater than the thickness Tc of the emission layer 220. The thickness Ta of the first common layer 215 may be formed to be greater than the thickness Td of the second common layer 225.

[0133] The second electrode 230 may be formed on the second common layer 225. The second electrode 230 may be formed to completely cover the substrate 100 in the display area DA. The second electrode 230 may be a light-transmitting electrode or a reflective electrode. The second electrode 230 may include a conductive material having a low work function. For example, the second electrode 230 may include a (semi) transparent layer, the (semi) transparent layer including silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca) or an alloy thereof. As another example, the second electrode 230 may also include a (semi) transparent layer including the above materials such as ITO, IZO, ZnO or In. 2 O 3 layer.

[0134] Reference again Figure 3A , an encapsulation layer 300 including at least one inorganic encapsulation layer and at least one organic encapsulation layer may be formed on the light emitting diode LED.

[0135] Figures 12 to 15 is a schematic cross-sectional view of a method of manufacturing a display device according to another embodiment. Figures 12 to 15 shows the reference Figure 4A and Figure 4B A method of manufacturing an embodiment is described. Figures 12 to 15 Shows the corresponding Figure 4B manufacturing method in the region of .

[0136] Figures 12 to 15 shows that by forming a reference Figure 7 The photoresist PR described above is then relatively increased in exposure to reduce the area of ​​the photoresist pattern to be developed. Figures 5 to 7 The previously described production method can be applied in the same way.

[0137] refer to Fig.12 , can be developed by developing the photoresist PR (reference Figure 7 ) to form a second photoresist pattern PRb. The second photoresist pattern PRb may be retained in a region of the photoresist PR corresponding to a position where the first electrode 210 is formed, and the remaining portion may be removed. In this regard, the second photoresist pattern PRb may be formed to be relatively small by relatively increasing the exposure amount of the photoresist PR, and the second photoresist pattern PRb may be formed to be disposed in the opening 120OP of the pixel defining layer 120.

[0138] refer to Fig.13 , the initial first electrode 210P can be etched by using the second photoresist pattern PRb as an etching mask, and thus the first electrode 210 can be formed. The etching process for forming the first electrode 210 can be, for example, a wet etching process. For example, the first electrode 210 can be formed by etching using a wet etching process. Due to the etching process, a portion of the initial first electrode 210P can be removed in an area that does not overlap with the second photoresist pattern PRb. In this regard, a portion of the initial first electrode 210P can be removed in an area that overlaps with the outer edge of the second photoresist pattern PRb, and thus an undercut profile UC can be formed. In an embodiment, because the overlapping area between the second photoresist pattern PRb and the first electrode 210 can be relatively small, the degree to which the initial first electrode 210P is etched can be relatively large. Therefore, the first electrode 210 formed by etching the initial first electrode 210P can have a substantially flat upper surface. In another embodiment, the first electrode 210 can have a substantially flat upper surface, but can include a protrusion in an area adjacent to the pixel defining layer 120.

[0139] refer to Fig.14 , the surface area of ​​the pixel defining layer 120 may be surface treated to have liquid repellency by performing a surface treatment process. The description of the surface treatment process may be similar to that of reference Fig.10 The descriptions given are the same, and therefore, redundant descriptions thereof may be omitted.

[0140] refer to Fig.15, the second photoresist pattern PRb may be removed, and a first common layer 215, an emission layer 220, a second common layer 225, and a second electrode 230 may be sequentially formed on the first electrode 210. The description of the method of forming the first common layer 215, the emission layer 220, the second common layer 225, and the second electrode 230 may be the same as that of reference Fig.11 The descriptions given are mostly the same, and therefore, redundant descriptions thereof may be omitted.

[0141] Even in the case where the upper surface of the first electrode 210 is substantially flat, the height of the upper surface 215U of the first common layer 215 in the region adjacent to the sidewall of the pixel defining layer 120 may be lower than the height in the central region OPC of the opening 120OP of the pixel defining layer 120. For example, the first common layer 215 may be formed to have an upper surface convex upward at a central portion thereof. For example, at least a portion of the upper surface 215U of the first common layer 215 in the peripheral region OPP may be at a lower level than the upper surface 215U of the first common layer 215 in the central region OPC. The thickness Taa of the first common layer 215 in the central region OPC may be formed to be greater than the thickness Tbb of the first common layer 215 in the peripheral region OPP.

[0142] Reference again Figure 4A , an encapsulation layer 300 including at least one of an inorganic encapsulation layer and an organic encapsulation layer may be formed on the light emitting diode LED.

[0143] According to one or more of the above embodiments, a display device can be provided in which the lighting quality is improved by forming the pixel electrode after forming the pixel defining layer. However, one or more embodiments are not limited to this effect.

[0144] The above description is an example of the technical features of the present disclosure, and those skilled in the art to which the present disclosure belongs will be able to make various modifications and changes.Therefore, the embodiments of the present disclosure described above can be implemented individually or in combination with each other.

[0145] Therefore, the embodiments disclosed in the present disclosure are not intended to limit the technical spirit of the present disclosure, but to describe the technical spirit of the present disclosure, and the scope of the technical spirit of the present disclosure is not limited by these embodiments. The protection scope of the present disclosure should be interpreted by the attached claims, and it should be interpreted that all technical spirits within the equivalent scope are included in the scope of the present disclosure.

Claims

1. Display equipment, including: A pixel circuit layer, disposed on the substrate and comprising a pixel circuit; A pixel defining layer, disposed on the pixel circuit layer and comprising an opening; a first electrode disposed on the pixel circuit layer, disposed in the opening of the pixel defining layer, and having a portion disposed on a side wall of the pixel defining layer; a first common layer, on the first electrode; an emission layer, on the first common layer; a second common layer on the emission layer; as well as a second electrode, on the second common layer, The upper surface of the first common layer is at a higher level than the upper surface of the first electrode.

2. The display device according to claim 1, wherein: The first electrode includes a first portion disposed on the pixel circuit layer and a second portion extending from the first portion and disposed on the side wall of the pixel defining layer, and The upper surface of the first common layer is at a higher level than a top of the second portion of the first electrode.

3. The display device according to claim 1, wherein: The opening in the pixel defining layer includes a central area and a peripheral area outside the central area, and The first common layer is thicker in the central region than in the peripheral region.

4. The display device according to claim 1, wherein: The first common layer has an upper surface convex upward at a central portion of the upper surface of the first common layer.

5. The display device according to claim 1, wherein: The opening in the pixel defining layer includes a central area and a peripheral area outside the central area, and In the central region, the first common layer is thicker than the emission layer.

6. The display device according to claim 1, wherein: The first electrode is disposed only in the opening of the pixel defining layer.

7. The display device according to claim 1, wherein: The pixel defining layer includes a first region adjacent to an upper surface of the pixel defining layer and a second region adjacent to a side wall of the pixel defining layer, and The pixel defining layer has liquid repellency in the first region and the second region.

8. The display device according to claim 7, wherein: The pixel defining layer includes an organic material having a fluorine group in the first region and the second region.

9. The display device according to claim 1, wherein: The first common layer includes a hole injection layer, and The second common layer includes an electron transport layer.

10. Display equipment, including: A pixel circuit layer, disposed on the substrate and comprising a pixel circuit; A pixel defining layer, disposed on the pixel circuit layer and comprising an opening; A first electrode, disposed on the pixel circuit layer and in the opening of the pixel defining layer; A first common layer, disposed on the first electrode; An emission layer, arranged on the first common layer; A second common layer is arranged on the emission layer; as well as The second electrode is disposed on the second common layer, wherein: The pixel defining layer includes a first region adjacent to an upper surface of the pixel defining layer and a second region adjacent to a sidewall of the pixel defining layer, and The pixel defining layer has liquid repellency in the first region and the second region.

11. The display device according to claim 10, wherein: The second region of the pixel defining layer is above the first electrode, The pixel defining layer further includes a third region adjacent to the sidewall of the pixel defining layer and below the second region and a fourth region except the first region, the second region and the third region, and A fluorine content of the pixel defining layer in the first region or the second region is greater than a fluorine content of the pixel defining layer in the third region or the fourth region.

12. The display device according to claim 10, wherein: An upper surface of the first common layer is at a higher level than an upper surface of the first electrode.

13. The display device according to claim 10, wherein: The opening in the pixel defining layer includes a central area and a peripheral area outside the central area, and The first common layer is thicker in the central region than in the peripheral region.

14. The display device according to claim 10, wherein: The first electrode includes a first portion disposed on the pixel circuit layer and a second portion extending from the first portion and disposed on the side wall of the pixel defining layer, and An upper surface of the first common layer is at a higher level than a top of the second portion of the first electrode.

15. The display device according to claim 10, wherein: The first electrode has a flat upper surface.

16. The display device according to claim 10, wherein: The first common layer is thicker than the emission layer.

17. The display device according to claim 10, wherein: The first common layer is thicker than the second common layer.

18. The display device according to claim 10, wherein: In the first region and the second region of the pixel defining layer, the pixel defining layer includes an organic material having a fluorine group.

19. A method for manufacturing a display device, the method comprising: forming a pixel circuit layer on a substrate; forming a pixel defining layer on the pixel circuit layer, wherein the pixel defining layer comprises an opening; forming an initial first electrode on the pixel circuit layer and the pixel defining layer; forming a photoresist pattern on the initial first electrode; etching the initial first electrode by using the photoresist pattern as an etching mask; Performing a surface treatment process on the pixel defining layer so that a surface area of ​​the pixel defining layer has liquid repellency; removing the photoresist pattern; forming a first common layer, an emission layer, and a second common layer in the opening of the pixel defining layer; as well as A second electrode is formed on the second common layer.

20. The method according to claim 19, wherein: Performing the surface treatment process includes using a fluoride-based plasma.

21. The method according to claim 19, wherein: The initial first electrode is etched by a wet etching process.

22. The method according to claim 19, wherein: The emission layer is formed by an inkjet printing process.

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