Systems and methods for plasma filtration

By using plasma shields during semiconductor manufacturing, the problems of plasma leakage and metal contamination are solved, and higher quality processes and longer equipment life are achieved.

CN119491202APending Publication Date: 2025-02-21APPLIED MATERIALS INC
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Patent Information

Application Number
CN202411584028.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2017-10-24
Filing Date
2018-10-24
Publication Date
2025-02-21

AI Technical Summary

Technical Problem

The prior art is difficult to effectively filter plasma during semiconductor manufacturing, resulting in plasma leakage and metal contamination in the substrate processing area, affecting process quality and equipment life.

Method used

A plasma shield is used to form an annular member by coupling with the substrate support to define the number and aperture of the plasma holes passing through, eliminate plasma leakage, and neutralize plasma substances at electrical ground.

Benefits of technology

Effectively eliminate plasma effluent in the chamber processing area, reduce metal contamination from sputtering, and greatly improve process quality and equipment life.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present disclosure relates to systems and methods for plasma filtration. Systems and methods may be used to formulate plasma filtration. An exemplary processing chamber may include a showerhead. The processing chamber may include a substrate support. The processing chamber may include a power source electrically coupled with the substrate support and configured to provide power to the substrate support to generate a bias plasma within a processing region defined between the showerhead and the substrate support. The processing system may include a plasma shield coupled with the substrate support and configured to substantially eliminate plasma leakage through the plasma shield. The plasma shield may be coupled with an electrical ground.
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Description

[0001] This application is a divisional application of a Chinese patent application with an application date of October 24, 2018, application number 201811245601.3, and name “System and method for plasma filtration”. Technical Field

[0002] The present technology relates to semiconductor systems, methods and apparatus. More particularly, the present technology relates to systems and methods for filtering plasma within a processing chamber. Background Art

[0003] Integrated circuits may be made by processes that produce complex patterned material layers on substrate surfaces. Producing patterned materials on substrates requires controlled methods for removing exposed materials. Chemical etching is used for a variety of purposes, including transferring patterns in photoresists to underlying layers, thinning layers, or thinning the lateral dimensions of features already present on the surface. It is often desirable to have an etching process that etches one material faster than another, thereby facilitating, for example, a pattern transfer process. This type of etching process is referred to as having selectivity to a first material. Due to the diversity of materials, circuits, and processes, etching processes with selectivity to various materials have been developed.

[0004] Etching processes may be referred to as wet or dry based on the materials used in the process. Wet HF etching preferentially removes silicon oxide over other dielectrics and materials. However, wet processes may have difficulty penetrating some confined trenches and may also sometimes deform the remaining material. Dry etching produced in a localized plasma formed within the substrate processing region may penetrate more confined trenches and present less deformation of the fine remaining structure. However, the localized plasma may damage the substrate via arcing because of the arc discharge.

[0005] Therefore, there exists a need for improved systems and methods that can be used to produce high quality devices and structures. These needs and other needs are addressed by the present technology. Summary of the invention

[0006] Systems and methods may be used to formulate plasma filtration. An exemplary processing chamber may include a showerhead. The processing chamber may include a substrate support. The processing chamber may include a power supply electrically coupled to the substrate support and configured to provide power to the substrate support to generate a bias plasma within a processing region defined between the showerhead and the substrate support. The processing system may include a plasma shield coupled to the substrate support and configured to substantially eliminate plasma leakage through the plasma shield. The plasma shield may be coupled to an electrical ground.

[0007] In some embodiments, the plasma shield may include an annular member extending radially outward from the substrate support. The plasma shield may be characterized by a first thickness around an inner radius of the plasma shield, and the plasma shield may be characterized by a second thickness around an outer radius of the plasma shield that is less than the first thickness. The plasma shield may define a plurality of holes through the plasma shield. The plurality of holes may be defined within a region of the plasma shield characterized by the second thickness. Each of the plurality of holes may be characterized by a profile including a tapered portion that extends at least partially through the plasma shield. The plasma shield may define at least about 500 holes through the plasma shield. Each of the plurality of holes may be characterized by a diameter of less than or about 0.25 inches. A gap may be maintained between a radial edge of the plasma shield and a sidewall of the semiconductor processing chamber. The plasma shield may maintain electrical isolation from an electrostatic chuck portion of the substrate support that is electrically coupled to a power source.

[0008] The present technology also includes an additional semiconductor processing chamber. The chamber may include a chamber sidewall. The chamber may include a showerhead. The chamber may also include a substrate support, and the substrate support may define a processing region of the semiconductor processing chamber together with the showerhead and the chamber sidewall. The substrate support may include a conductive disk. The substrate support may be movable from a first vertical position within the processing region to a second vertical position within the processing region adjacent to the showerhead. The chamber may include a power supply electrically coupled to the conductive disk. The power supply may be adapted to provide energy to the conductive disk to form a bias plasma within the processing region. The chamber may also include a plasma shield coupled to the substrate support along a circumference of the substrate support. The plasma shield may extend radially outward toward the chamber sidewall, and the plasma shield may be maintained at an electrical ground.

[0009] In some embodiments, the plasma shield may be characterized by an inner radius and an outer radius. The plasma shield may be characterized by an inner radius defined at a boundary between an inner region and an outer region of the plasma shield. The plasma shield may define a plurality of holes within the outer region of the plasma shield and extending around the plasma shield. The plasma shield may be coupled to the substrate support at an outer edge of the inner region of the plasma shield. The substrate support may include an edge ring circumscribing the substrate support. The edge ring may be placed on the inner region of the plasma shield. The edge ring may be quartz. The plasma shield may be characterized by a first thickness within the inner region. The plasma shield may be characterized by a second thickness within the outer region, and the plasma shield may define a protrusion at the inner radius. The chamber may include a liner extending along the chamber sidewall from a position adjacent to the showerhead to a position substantially coplanar with the plasma shield when the substrate support is in a second vertical position. The plasma shield may be coated on a first surface facing the showerhead.

[0010] The present technology may also include a method of reducing sputtering during semiconductor processing. The method may include forming a bias plasma of a precursor within a processing region of a semiconductor processing chamber. The method may include directing plasma effluents from the bias plasma to a substrate positioned on a substrate support within the semiconductor processing chamber. The method may also include extinguishing the plasma effluents using a plasma shield coupled around an exterior of the substrate support. The plasma shield may reduce contamination from sputtering of chamber components by greater than about 5%.

[0011] Such techniques may provide several benefits over conventional systems and techniques. For example, a plasma shield according to the present technique may eliminate plasma species from a processing region of a chamber. Additionally, a substrate support of the present technique may combine a plasma shield with a plasma generating component on the substrate support. These and other embodiments, along with most of their advantages and features, are described in more detail in conjunction with the following description and accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] A further understanding of the nature and advantages of the disclosed technology may be realized by reference to the remaining portions of the specification and the accompanying drawings.

[0013] Figure 1 A top plan view of an exemplary processing system is shown in accordance with an embodiment of the present technology.

[0014] Figure 2 A schematic cross-sectional view of an exemplary processing chamber is shown in accordance with an embodiment of the present technology.

[0015] Figure 3 A schematic cross-sectional view of an exemplary processing chamber is shown in accordance with an embodiment of the present technology.

[0016] Figure 4 A schematic top plan view of an exemplary plasma shield is shown in accordance with an embodiment of the present technology.

[0017] FIG. 5A to FIG. 5E Schematic cross-sectional views of exemplary holes that may be formed in a plasma shield in accordance with embodiments of the present technology are shown.

[0018] Figure 6 Exemplary operations in a method according to an embodiment of the present technology are shown.

[0019] Several drawings are included as schematic diagrams. It should be understood that the drawings are for illustrative purposes and are not to be considered to scale unless specifically indicated as to scale. Additionally, as schematic diagrams, the drawings are provided to aid understanding and may not include all aspects or information compared to actual representations, and may include redundant or exaggerated material for illustrative purposes.

[0020] In the accompanying drawings, similar components and / or features may have the same reference label. In addition, various components of the same type may be distinguished by following the reference label with a letter that distinguishes the similar components. If only the first reference label is used in the specification, the description may apply to any of the similar components having the first reference label, regardless of the letter. DETAILED DESCRIPTION

[0021] The present technology includes systems and components for semiconductor processing of fine pitch features. As line pitch decreases, standard lithography processes may be limited and alternative mechanisms may be used in patterning. Conventional techniques have been devoted to these minimal patterning and removal operations, particularly when the exposed material on the substrate may include numerous different features and materials (some to be etched away and some to be retained).

[0022] Atomic layer etching is a method that utilizes a multi-operation process that disrupts or modifies a material surface followed by an etching operation. The etching operation can be performed under chamber conditions that allow removal of the modified material but limit interaction with unmodified material. The method can then be cycled any number of times to etch additional material. Some available chambers can perform both operations in a single chamber. The modification can be performed by utilizing a substrate-level impingement operation followed by a remote plasma operation to enhance an etchant precursor capable of removing only the modified material.

[0023] During the modification operation, a wafer-level plasma may be formed in the processing region. For example, a bias plasma may be formed from a substrate support, which may form a plasma of a precursor in the processing region. The plasma may direct ions to the substrate surface. The bias plasma may be a capacitively coupled plasma, which may produce plasma effluents with a high plasma potential throughout the processing region. The inductively coupled plasma formed above the substrate may provide a more controlled delivery of the plasma effluents, while the capacitively coupled plasma may develop plasma species that may cause impacts on chamber components, which may cause sputtering. These ions and other particles may extend beyond the substrate surface and may also extend beyond the surface of the substrate support.

[0024] Some processing chambers include a pumping system coupled downstream of a substrate support. Often, a gas chamber area is formed around the substrate support, allowing effluent and precursors to flow around the support and out of the chamber. Due to this additional space around the substrate support, plasma materials can also flow around the pedestal and below the pedestal. The chamber coating may not extend completely from the chamber through these return paths. Plasma materials allowed to enter these areas may hit surfaces and components, causing sputtering. This may erode chamber components over time and may also cause metal contamination on the substrate being processed due to the flow pattern in the chamber. Some conventional technologies include plasma filters around the substrate support, which extend to the chamber wall. Although these filters may affect the effluent flow, they may not be able to fully eliminate plasma materials and limit metal contamination in advanced technologies. In addition, these shields may be completely fixed and may not allow the substrate support to move during processing operations. Finally, because the filter is often a conductive component, the filter cannot be used with a processing system that generates a biased plasma because the filter will not be kept at an electrical ground.

[0025] The present technology overcomes these problems by using a plasma shield that can completely eliminate plasma effluent and ionic species from the chamber processing area, thereby allowing for enhanced protection against metal contamination from sputtering. The shield of the present technology is specifically incorporated for use with a substrate support for generating a biased plasma by maintaining the shield of the present technology electrically isolated from the plasma generating electrodes of the substrate support. In addition, a plasma shield according to the present technology can be incorporated to allow the substrate support to be moved without creating an amount of spacing that prevents proper elimination of plasma species.

[0026] Although the remaining disclosure will routinely identify specific etching processes utilizing the disclosed techniques, it will be readily understood that the systems and methods are equally applicable to deposition and cleaning processes that may occur in the described chambers. Thus, the present techniques should not be considered so limited to use with only etching processes.

[0027] Figure 1 A top plan view of one embodiment of a processing system 100 consisting of a deposition chamber, an etch chamber, a bake chamber, and a cure chamber is shown in accordance with an embodiment. Figure 1 The processing tool 100 depicted in FIG. 1 may contain a plurality of processing chambers 114A-114D, a transfer chamber 110, an access chamber 116, an integrated metrology chamber 117, and a pair of load lock chambers 106A-106B. The processing chambers may include Figure 2 Similar structures or components to the described structures or components, as well as additional processing chambers.

[0028] To transport substrates between chambers, the transfer chamber 110 may contain a robot transport mechanism 113. The transport mechanism 113 may have a pair of substrate transport blades 113A attached to the distal ends of the extendable arms 113B, respectively. The blades 113A may be used to transport individual substrates to and from the processing chambers. In operation, one of the substrate transport blades, such as the blade 113A of the transport mechanism 113, may retrieve a substrate W from one of the load lock chambers, such as chambers 106A to 106B, and transport the substrate W to a first stage of processing, for example, an etching process in chambers 114A to 114D as described later. If the chamber is occupied, the robot may wait until the processing is complete, and then remove the processed substrate from the chamber using one blade 113A, and insert a new substrate using a second blade (not shown). Once the substrate has been processed, the substrate may then be moved to a second stage of processing. For each move, the transport mechanism 113 may typically have one blade that carries a substrate and one blade that is idle to perform a substrate exchange. The transport mechanism 113 may wait at each chamber until an exchange can be achieved.

[0029] Once the processing is completed in the processing chamber, the transport mechanism 113 can move the substrate W from the last processing chamber and transport the substrate W to the box in the load lock chamber 106A to 106B. The substrate can be moved from the load lock chamber 106A to 106B to the factory interface 104. The factory interface 104 is generally operable to transfer substrates between the cabin loaders 105A to 105D and the load lock chambers 106A to 106B in an atmospheric pressure clean environment. For example, the clean environment in the factory interface 104 can be generally provided via an air filtration process (such as HEPA filtration). The factory interface 104 may also include a substrate orienter / aligner (not shown) that can be used to properly align the substrate before processing. At least one substrate robot (such as robots 108A to 108B) can be positioned in the factory interface 104 to transport substrates between various locations in the factory interface 104 and to transport substrates to other locations connected thereto. The robots 108A- 108B may be configured to travel along a track system within the enclosure 104 from a first end to a second end of the factory interface 104 .

[0030] The processing system 100 may further include an integrated metrology chamber 117 to provide control signals that may provide adaptive control of any process being performed in the processing chamber. The integrated metrology chamber 117 may include any of a variety of metrology devices to measure various film properties such as thickness, roughness, composition, and the metrology device may also be capable of characterizing grating parameters such as critical dimension, sidewall angle, and feature height under vacuum in an automated manner.

[0031] Now go to Figure 2 , a cross-sectional view of an exemplary processing chamber system 200 according to the present technology is shown. The chamber 200 can be used, for example, in one or more processing chamber sections of the processing chamber section 114 of the system 100 discussed previously. In general, the etching chamber 200 may include a first capacitively coupled plasma source for implementing an ion milling operation and a second capacitively coupled plasma source for implementing an etching operation and implementing an optional deposition operation. The ion milling operation may also be referred to as a modification operation. The chamber 200 may include a grounded chamber wall 240 surrounding a chuck 250. In an embodiment, the chuck 250 may be an electrostatic chuck that clamps the substrate 202 to the top surface of the chuck 250 during processing, but other known clamping mechanisms may also be utilized. The chuck 250 may include an embedded heat exchanger coil 217. In an exemplary embodiment, the heat exchanger coil 217 includes one or more heat transfer fluid channels through which a heat transfer fluid (such as an ethylene glycol / water mixture) may be passed to control the temperature of the chuck 250 and ultimately the temperature of the substrate 202.

[0032] The chuck 250 may include a mesh 249 coupled to a high voltage direct current (DC) power source 248 such that the mesh 249 may carry a DC bias potential to achieve electrostatic clamping of the substrate 202. The chuck 250 may be coupled to a first radio frequency (RF) power source and in one such embodiment, the mesh 249 may be coupled to the first RF power source such that both the DC voltage bias and the RF voltage potential are coupled across a thin dielectric layer on the top surface of the chuck 250. In an illustrative embodiment, the first RF power source may include a first RF generator 252 and a second RF generator 253. The RF generators 252, 253 may operate at any industrially utilized frequency, however in an exemplary embodiment, the RF generator 252 may operate at 60 MHz to provide advantageous directionality. Where a second RF generator 253 is also provided, an exemplary frequency may be 2 MHz.

[0033] In the case of RF powering the chuck 250, an RF return path may be provided by the first showerhead 225. The first showerhead 225 may be disposed above the chuck to distribute the first feed gas into a first chamber region 284 defined by the first showerhead 225 and the chamber wall 240. Thus, the chuck 250 and the first showerhead 225 form a first RF coupled electrode pair to capacitively excite a first plasma 270 of the first feed gas within the first chamber region 284. A DC plasma bias or RF bias generated from the capacitive coupling of the RF powered chuck may generate an ion flow, for example, Ar ions, from the first plasma 270 to the substrate 202, where the first feed gas is Ar, thereby providing an ion milling plasma. The first showerhead 225 may be grounded or alternatively coupled to an RF source 228 having one or more generators that may operate at a frequency different from that of the chuck 250 (e.g., 13.56 MHz or 60 MHz). In the illustrated embodiment, the first showerhead 225 is optionally coupled to a ground or RF source 228 via a repeater 227, which may be automatically controlled during the etching process, such as by a controller (not shown). In the disclosed embodiments, the chamber 200 may not include the showerhead 225 or the dielectric spacer 220, and may instead include only the baffle 215 and the showerhead 210, which are described further below.

[0034] As further shown in the figures, the etching chamber 200 may include a pump stack capable of high throughput at low process pressures. In an embodiment, at least one turbomolecular pump 265, 266 may be coupled to the first chamber region 284 via one or more gate valves 260 and disposed below the chuck 250, opposite the first showerhead 225. The turbomolecular pumps 265, 266 may be any commercially available pumps having a suitable throughput, and more specifically may be appropriately sized to maintain a process pressure of less than or about 10 mTorr or less than or about 5 mTorr at a desired flow rate of the first feed gas (e.g., 50 to 500 sccm of Ar in the case of argon as the first feed gas). In the illustrated embodiment, the chuck 250 may form part of a pedestal that is centered between the two turbopumps 265 and 266, however in an alternative configuration, the chuck 250 may be on a pedestal cantilevered from the chamber wall 240, wherein a single turbomolecular pump has a center aligned with the center of the chuck 250.

[0035] The second showerhead 210 may be disposed above the first showerhead 225. In one embodiment, during processing, a first feed gas source (e.g., argon gas delivered from a gas distribution system 290) may be coupled to a gas inlet 276, and the first feed gas flows through a plurality of holes 280 extending through the second showerhead 210 into a second chamber region 281 and through a plurality of holes 282 extending through the first showerhead 225 into a first chamber region 284. An additional flow distributor or baffle 215 having holes 278 may further distribute the first feed gas flow 216 across the diameter of the etch chamber 200 through the distribution region 218. In an alternative embodiment, the first feed gas may flow directly into the first chamber region 284 via holes 283, as indicated by dashed lines 223, which is isolated from the second chamber region 281.

[0036] The chamber 200 may be reconfigured from the illustrated state to perform etching operations. The secondary electrode 205 may be disposed above the first showerhead 225 with the second chamber region 281 therebetween. The secondary electrode 205 may further form a lid or ceiling of the etching chamber 200. The secondary electrode 205 and the first showerhead 225 may be electrically isolated by the dielectric ring 220 and form a second RF-coupled electrode pair to capacitively discharge a second plasma 292 of a second feed gas within the second chamber region 281. Advantageously, the second plasma 292 may not provide a significant RF bias potential on the chuck 250. At least one electrode of the second RF-coupled electrode pair may be coupled to an RF source to excite the etching plasma. The secondary electrode 205 may be electrically coupled to the second showerhead 210. In an exemplary embodiment, the first showerhead 225 may be coupled to a ground plane or floated and may be coupled to ground via a relay 227, thereby allowing the first showerhead 225 to also be powered by an RF power supply 228 during an ion milling mode of operation. With the first showerhead 225 grounded, an RF power supply 208 having one or more RF generators operating at, for example, 13.56 MHz or 60 MHz may be coupled to the secondary electrode 205 via a repeater 207, which may allow the secondary electrode 205 to be grounded as well during other operating modes, such as during ion milling operations, although the secondary electrode 205 may also remain floating if the first showerhead 225 is powered.

[0037] A second feed gas source, such as nitrogen trifluoride, and a hydrogen source, such as ammonia, may be delivered from a gas distribution system 290 and coupled to the gas inlet 276, such as via dashed line 224. In this mode, the second feed gas may flow through the second showerhead 210 and may be excited in the second chamber region 281. The reactive species may then be transferred to the first chamber region 284 to react with the substrate 202. As further shown, for embodiments where the first showerhead 225 is a multi-channel showerhead, one or more feed gases may be provided to react with the reactive species generated by the second plasma 292. In one such embodiment, a water source may be coupled to the plurality of holes 283. Additional configurations may also be based on the general description provided, but with various components reconfigured. For example, the flow distributor or baffle 215 may be a plate similar to the second showerhead 210 and may be positioned between the secondary electrode 205 and the second showerhead 210. Since any of these plates may operate as electrodes in various configurations for generating a plasma, one or more annular or other shaped spacers may be positioned between one or more of these components, similar to the dielectric ring 220. The second showerhead 210 may also operate as an ion suppression plate in embodiments, and may be configured to reduce, restrict, or inhibit the flow of ionic species through the second showerhead 210 while still allowing the flow of neutral and radical species. One or more additional showerheads or distributors may be included in the chamber between the first showerhead 225 and the chuck 250. Such showerheads may take the shape or structure of any of the distribution plates or structures previously described. Additionally, in embodiments, a remote plasma unit (not shown) may be coupled to the gas inlet to provide plasma effluent to the chamber for use in various processes.

[0038] In an embodiment, the chuck 250 may be movable in a direction perpendicular to the first showerhead 225 along a distance H2. The chuck 250 may be on an actuation mechanism surrounded by a bellows 225 or the like to allow the chuck 250 to be moved closer to or further away from the first showerhead 225 as a means of controlling heat transfer between the chuck 250 and the first showerhead 225, which may be at an elevated temperature of 80° C. to 150° C. or higher. Thus, the etching process may be achieved by moving the chuck 250 relative to the first showerhead 225 between a first predetermined position and a second predetermined position. Alternatively, the chuck 250 may include a lifter 251 for raising the substrate 202 a distance H1 from the top surface of the chuck 250 to control heating by the first showerhead 225 during the etching process. In other embodiments, where the etching process is performed at a fixed temperature (e.g., such as about 90 to 110° C.), the chuck displacement mechanism may be avoided. A system controller (not shown) may alternately energize the first plasma 270 and the second plasma 292 during the etching process by automatically powering the first and second RF coupled electrode pairs alternately.

[0039] The chamber 200 may also be reconfigured to perform deposition operations. The plasma 292 may be generated in the second chamber region 281 by an RF discharge, which may be achieved in any manner described for the second plasma 292. In the case where power is supplied to the first showerhead 225 to generate the plasma 292 during deposition, the first showerhead 225 may be isolated from the grounded chamber wall 240 by the dielectric spacer 230 so as to be electrically floating relative to the chamber wall. In an exemplary embodiment, an oxidant feed gas source (such as molecular oxygen) may be delivered from the gas distribution system 290 and coupled to the gas inlet 276. In an embodiment where the first showerhead 225 is a multi-channel showerhead, any silicon-containing precursor (e.g., such as OMCTS) may be delivered from the gas distribution system 290 and directed into the first chamber region 284 to react with the reactive species from the plasma 292 that passes through the first showerhead 225. Alternatively, the silicon-containing precursor may also flow through the gas inlet 276 together with the oxidant. Chamber 200 is included as a general chamber configuration that can be used for various operations discussed with reference to the present technology. The chamber is not to be considered limited to the present technology, but rather aids in understanding the described processes. Several other chambers known or being developed in the art can be used with the present technology, including any chamber produced by Applied Materials Inc. of Santa Clara, California, or any chamber that can perform the technology described in more detail below.

[0040] Go to Figure 3 , showing a partial schematic diagram of a processing chamber 300 according to an embodiment of the present technology. Figure 3 This may include the above Figure 2 One or more components discussed above may be shown, and further details about the chamber may be shown. Chamber 300 may be used to perform semiconductor processing operations, including modification and etching as previously described. Chamber 300 may show a partial view of a processing region of a semiconductor processing system, and may not include all components, such as the additional cover stack components previously described that are understood to be incorporated in some embodiments of chamber 300.

[0041] As mentioned, Figure 3A portion of a processing chamber 300 may be shown. The chamber 300 may include a showerhead 305, and a substrate support 310. The showerhead 305 and substrate support 310 may define a substrate processing region 320 together with a chamber sidewall 315. The substrate support may include a conductive disk 325, which may be electrically coupled to a power supply 330. The power supply 330 may be configured to provide energy or voltage to the conductive disk 325. This may form a biased plasma of a precursor within the processing region 320 of the semiconductor processing chamber 300. The ions formed within the processing region may be directed to a substrate placed on the substrate support. This may result in modification of the exposed film by disrupting bonding structures and facilitating removal in a subsequent etching operation.

[0042] The chamber 300 may also include a plasma shield 335 coupled to the substrate support 310. The plasma shield 335 may be configured to substantially eliminate plasma leakage through the plasma shield by neutralizing or eliminating plasma effluents that extend beyond the radial or lateral dimensions of the substrate support 310. Although the conductive disk 325 of the substrate support 310 may be coupled to a power source to generate a bias plasma, the plasma shield 335 may be maintained at an electrical ground to allow for neutralization of plasma species. Thus, as will be discussed below, ion species that may otherwise impact and sputter chamber components may be eliminated by a specifically configured plasma shield. Thus, in some embodiments, the plasma shield 335 may be maintained electrically isolated from the conductive disk 325, to which the power source 330 may be coupled. This isolation may be provided by one or more components of the substrate support 310. Additionally, the plasma shield may shorten the ground path through the electrostatic chuck compared to the chamber sidewall 315, which may also be grounded in some embodiments.

[0043] The plasma shield 335 may be placed on a base of the substrate support 310, which may be or include a dielectric or other insulating material that may at least partially isolate the plasma shield 335 from the conductive disk 325. Additionally, an isolator 340 may be positioned around the outer diameter of the conductive disk 325, which may separate the disk from the inner radial edge of the plasma shield 335. An edge ring 345 may be placed on the substrate support 310 and may circumscribe the conductive disk 325. The edge ring may be made of quartz or some other dielectric or insulating material in embodiments and may further insulate the plasma shield 335 from the conductive disk 325. As shown, the isolator 340 may include a flange 342 that may be placed in a channel 344 of the edge ring 345 to provide stability and coupling of the components. As will be discussed further below, the edge ring 345 may then be bolted to the plasma shield 335 or otherwise coupled to the shield.

[0044] The plasma shield 335 may be an annular member that may, in embodiments, extend radially outward from the substrate support toward the chamber sidewall 315. In some embodiments, the plasma shield 335 may not contact the chamber sidewall. For example, a gap may be maintained between the plasma shield 335 and the chamber sidewall 315, such as from a radial edge of the plasma shield to an inner radius of the chamber sidewall. Compared to configurations where the filter may extend from the substrate support to the chamber sidewall, the present technology may not provide contact between the plasma shield 335 and the chamber sidewall 315, which may allow for actuation of the substrate support 310 as previously described. For example, the substrate support 310 may be operable to be raised and lowered or otherwise moved to any vertical position along an axis as previously described, from a first position shown to a second position identified by dashed line 350.

[0045] The processing chamber 300 may also include a liner 355 positioned around the inner radius of the chamber sidewall 315. The liner 355 may extend partially along the sidewall 315 in embodiments. For example, the liner 355 may extend from a first position adjacent to the showerhead 305 to a second position adjacent to or below the dashed line 350. The plasma shield 335 may extend below the top surface of the substrate support 310. Thus, when the substrate support 310 is raised to the second position identified by the dashed line 350, the outer edge of the plasma shield 335 may be positioned below the plane of the dashed line 350. The liner 355 may similarly extend below the dashed line 350 to a position coplanar with the top surface of the outer edge of the plasma shield 335. In this way, the liner and plasma shield may provide a boundary to limit the flow of any effluent or precursor through the gap defined between the outer radial edge of the plasma shield 335 and the inner radial edge of the chamber sidewall 315.

[0046] Figure 4A schematic top plan view of an exemplary plasma shield 400 is shown in accordance with an embodiment of the present technology. The plasma shield 400 can be similar to the plasma shield 335 discussed above, but can provide a view of additional features of the device. Features of the plasma shield 335 and the plasma shield 400 can be discussed interchangeably throughout the present disclosure. The plasma shield 400 can, in some embodiments, be an annular member having an inner edge 405 defined about an inner radius of the plasma shield 400. The plasma shield 400 can also have an outer edge 410 defined about an outer radius of the plasma shield 400. The plasma shield 400 can be characterized by a width between the inner edge 405 and the outer edge 410. The plasma shield 400 can also include an inner radius 415 defined between the inner radius and the outer radius. The inner radius 415 can at least partially define a boundary between an inner region 420 of the plasma shield 400 and an outer region 425 of the plasma shield 400.

[0047] The plasma shield 400 can define a plurality of holes 430 extending through the plasma shield. The holes can be included in the outer region 425 of the plasma shield and, in some embodiments, may not be included in the inner region 420. Figure 3 335, the plasma shield can be coupled to the outer edge of the substrate support 310 along the underside of the interior region 420 of the plasma shield. Additionally, an edge ring 345 can be coupled to the plasma shield and can be placed on the interior region of the plasma shield 335 as shown. The edge ring 345 can not extend beyond the inner radius 415 of the plasma shield to limit interference with the plurality of apertures 430. Thus, the edge ring 345 can be coupled to or coupled to the plasma shield 335, thereby allowing a fixed connection between the components to limit the accumulation of byproducts between the two components.

[0048] In embodiments, the plurality of holes 430 may extend around the outer region 425 of the plasma shield 400. As discussed below with respect to variations of FIG. 5, each of the plurality of holes 430 may be characterized by a profile through the plasma shield. The profile, as well as the number of holes and the size of the holes, may produce several competing effects. For example, to reduce or eliminate the transmission of plasma effluents from the processing region, holes having a reduced diameter may be included to increase impact, thereby allowing the effluents to be neutralized. However, as the hole size decreases, an increase in pressure across the chamber may occur. Although the increase in pressure may further reduce impacts on chamber components, the increase in pressure may affect the processing conditions being performed. Additionally, subsequent processes may also be affected by the increased pressure conditions.

[0049] In some embodiments, the present technology can compensate for this pressure effect by performing subsequent operations (such as removal operations) at a lower substrate support position, which provides access to the gap region between the plasma shield and the chamber sidewall. Nevertheless, the plasma shield of the present technology can produce less than or about 1 Torr of pressure increase within the processing chamber during one or more processing operations, and can cause less than or about 500mTorr, less than or about 250mTorr, less than or about 100mTorr, less than or about 90mTorr, less than or about 80mTorr, less than or about 70mTorr, less than or about 60mTorr, less than or about 50mTorr, less than or about 40mTorr, less than or about 30mTorr, less than or about 25mTorr, less than or about 20mTorr, less than or about 15mTorr, less than or about 10mTorr, less than or about 5mTorr, less than or about 2mTorr, or can have a limited effect on the pressure within the processing chamber.

[0050] The holes 430 may be characterized by a number of profiles and sizes, and may be included in a number of configurations. For example, as shown, the holes 430 may be included in a number of concentric rings around the outer region 425 of the plasma shield 400. The plasma shield may include any number of rings, including 1, 2, 3, 4, 5, or more rings of holes. The holes may be uniform across the plasma shield in embodiments, although the holes may be characterized by different sizes or profiles in different rings on the plasma shield. Depending on the size and distribution (including the size of the plasma shield), the plasma shield 400 may define any number of holes, which may be based on the chamber or substrate being modified. However, in embodiments, the plasma shield 400 may define greater than or about 200 holes, greater than or about 400 holes, greater than or about 500 holes, greater than or about 600 holes, greater than or about 700 holes, greater than or about 800 holes, greater than or about 900 holes, greater than or about 1,000 holes, greater than or about 1,500 holes, or more, although the number of holes may be limited to less than or about 2,000 holes, or less than or about 1,500 holes to ensure elimination or neutralization of plasma effluents.

[0051] In general, the holes may be characterized by a diameter and an aspect ratio, which may depend on the profile of the hole. To provide adequate reduction or elimination of plasma effluents, each hole may be characterized by a diameter at the narrowest cross section of less than or about 0.3 inches, and may be characterized by a diameter of less than or about 0.25 inches, less than or about 0.2 inches, less than or about 0.15 inches, less than or about 0.1 inches, less than or about 0.05 inches, or less, although in embodiments, the narrowest cross section may be maintained greater than or about 0.1 inches or greater to reduce associated pressure increases, which may affect processing operations as previously described. The aspect ratio may be defined as the ratio of the hole height through the plasma shield to the diameter of the hole at the narrowest cross section. In embodiments, the aspect ratio may be less than or about 50:1 to reduce pressure increases across the plasma shield. In some embodiments, the aspect ratio may be less than or about 40:1, less than or about 30:1, less than or about 20:1, less than or about 10:1, less than or about 5:1, less than or about 1:1, or less, although in embodiments the aspect ratio may be maintained at greater than or about 1:1 to ensure proper abatement of plasma effluents.

[0052] See also Figure 3 430 , together with a top plan view of a plasma shield 400, in embodiments of the present technology, an inner region 420 and an outer region 425 may be characterized by different thicknesses. For example, the inner region 420 may be characterized by a first thickness of the plasma shield 400, while the outer region 425 may be characterized by a second thickness of the plasma shield 400. In some embodiments, the second thickness may be less than the first thickness. A recessed protrusion may be defined by the plasma shield 400 about an inner radius 415, the inner radius 415 marking the transition from the first thickness to the second thickness. By including an increased thickness at the inner region 420, a more secure coupling between chamber components may be provided, which may limit warping. Additionally, by maintaining a reduced thickness through the outer region 425 (where the aperture 430 is included), the pressure increase through the chamber caused by the plasma shield may be limited.

[0053] FIG. 5A to FIG. 5E Schematic cross-sectional views of exemplary holes that may be formed in a plasma shield according to embodiments of the present technology are shown. The accompanying drawings provide exemplary views of hole configurations that are intended to illustrate possible hole designs encompassed by embodiments of the present technology. It should be understood that additional and alternative hole designs may also be used. The holes are shown extending through an exemplary plasma shield 505, which may be illustrative of the outer region 425 of the plasma shield previously described. Figure 5AA hole configuration is shown including a tapered portion extending from a first surface 507a of the plasma shield 505a to a second surface 509a. The first surface may be plasma facing in embodiments, and may face a showerhead in embodiments.

[0054] Figure 5B An additional example of a plasma shield 505b is shown including a hole profile including a partial taper from a first surface 507b connected to a cylindrical portion of the hole extending to a second surface 509b. The tapered portion may extend to any depth within the plasma shield before transitioning to the cylindrical portion. Figure 5A and Figure 5B A design is shown that can provide improved ion elimination over other designs by providing a conical area facing the formed plasma. By providing additional surface area for interaction by ions in the plasma effluent, additional contact can be provided that can further eliminate ionic species compared to other designs. In other embodiments, a straight cylindrical path can be formed as each hole, such as in Figure 5C The holes may extend as cylinders from the first surface 507c of the plasma shield 505c directly to the second surface 509c.

[0055] Figure 5D shows the expanded pore formation, which can be shown Figure 5A For example, the holes shown may expand from the first surface 507d to the second surface 509d. Figure 5E Shows a variation of the expansion design, which can be Figure 5B For example, the holes shown may extend from the first surface 507e or plasma shield 505e as cylindrical holes before transitioning to expansions that extend to the second surface 509e. The transition may occur at any depth through the plasma shield.

[0056] In some embodiments, one or more surfaces of the plasma shield may be coated to prevent sputtering or other interactions with precursors delivered through the processing chamber. For example, in some embodiments, all surfaces of the plasma shield may be coated with one or more materials, including oxides or other materials. For example, in some embodiments, the plasma shield may be or include aluminum. The coating may include one or more materials, including passivating the surface to produce anodized aluminum. Additionally, the coating may include a metal oxide (such as yttrium oxide), an electroplated coating (such as nickel plating), or a formed coating (such as a barrier oxide, or a conformal oxide coating).

[0057] The coating may also be formed on some surfaces of the plasma shield, such as the surface facing the plasma. For example, a first surface of the plasma shield 335 facing the showerhead 305 may be coated in some embodiments, while an opposing surface may not be coated. Additionally, the coating may extend over a first surface of the outer region 425 and along the sidewalls of the protrusion defined at the inner radius 415, while the surface of the inner region 420 may remain uncoated. The coating may also be at least partially included within the hole. For example, for a hole including a tapered portion extending from the first surface facing the showerhead, the coating may extend along the surface of the tapered portion extending through the hole. These and other coatings may provide further protection for the plasma shield from the plasma and other precursors used in the chamber.

[0058] The chambers and components of the present technology may be used in various processes in which a plasma may be formed from a biased plasma in a processing region of the chamber. Figure 6 Exemplary operations in a method 600 according to an embodiment of the present technology are shown. At operation 605, the method may include forming a bias plasma of a precursor within a processing region of a semiconductor processing chamber. At operation 610, the method may further include directing plasma effluents from the bias plasma to a substrate positioned on a substrate support within the semiconductor processing chamber. At operation 615, the method may further include extinguishing the plasma effluents using a plasma shield. The plasma shield may be any plasma shield discussed throughout the present technology, and the plasma shield may be coupled around an exterior of the substrate support.

[0059] By utilizing a plasma shield according to embodiments of the present technology, contamination on a substrate from sputtering of chamber components can be reduced by greater than about 5%. The reduction can be related to the materials within the processing chamber and their location relative to the plasma. For example, since aluminum can be present as a multitude of components within the chamber, the present technology has been shown to reduce aluminum contamination by greater than 80%. Additionally, yttrium and nickel contamination have been shown to be reduced by greater than 90% in systems including plasma shields according to the present technology. Other metal contamination that can be reduced can include calcium, chromium, copper, iron, magnesium, molybdenum, sodium, nickel, potassium, yttrium, and zinc. In general, the reduction in contamination due to any such material can be reduced by greater than or about 10%, greater than or about 15%, greater than or about 20%, greater than or about 25%, greater than or about 30%, greater than or about 35%, greater than or about 40%, greater than or about 45%, greater than or about 50%, greater than or about 55%, greater than or about 60%, greater than or about 65%, greater than or about 70%, greater than or about 75%, greater than or about 80%, greater than or about 85%, greater than or about 95%, greater than or about 95%, or more.

[0060] When a plasma shield according to the present technology is employed, the operating window for processing conditions can be extended. For example, plasma power and pressure can affect the energy delivered to the ion species. As the pressure decreases, the mean free path can increase, which can result in more energy being retained by the ions, thereby causing increased impacts on chamber components. Similarly, increased power can deliver more energy to the plasma species. Without a plasma shield, processing conditions can be limited to higher pressures and lower plasma powers within the processing region. However, when a plasma shield according to the present technology is included, the operating pressure can be reduced by less than about 20 mTorr, and can be reduced by less than or about 15 mTorr, less than or about 10 mTorr, or less than or about 5 mTorr. In addition, the plasma power can be increased by more than about 1,000 W in some embodiments. Thus, further process adjustments can be provided by the present technology.

[0061] In the previous description, for the purpose of explanation, several details have been set forth to provide an understanding of various embodiments of the present technology. However, it will be apparent to those skilled in the art that certain embodiments may be practiced without some of these details or with additional details.

[0062] In the case of having disclosed several embodiments, those skilled in the art will appreciate that various modifications, alternative configurations and equivalents may be used without departing from the spirit of the embodiments. In addition, several well-known processes and elements have not been described to avoid unnecessary confusion of the present technology. Thus, the above description should not be considered to limit the scope of the present technology.

[0063] Where a range of values ​​is provided, it is understood that each intervening value between the upper and lower limits of the range is also specifically disclosed, to the smallest fraction of the unit of the lower limit, unless the context clearly indicates otherwise. Any narrower range between any stated value or unstated intervening value in the stated range and any other stated value or intervening value in the stated range is included. The upper and lower limits of these smaller ranges may be individually included in or excluded from the stated range, and each range in which either, none, or both limits are included in the smaller range is also included, depending on any specifically excluded limits in the stated range. Where the stated range includes one or both of the limits, ranges excluding either or both of these included limits are also included.

[0064] As used herein and in the appended claims, the singular forms "a," "an," and "the" include plural references unless the context clearly dictates otherwise. Thus, for example, reference to "a layer" includes a plurality of such layers and reference to "the precursor" includes reference to one or more precursors and equivalents thereof known to those skilled in the art, and so forth.

[0065] Furthermore, when used in this specification and the following claims, the words "comprises," "comprising," and "includes" are intended to specify the presence of stated features, integers, components, or operations, but the words do not exclude the presence or addition of one or more other features, integers, components, operations, actions, or groups.

Claims

1. A semiconductor processing chamber, comprising: Sprinkler heads; a substrate support defining a recess in a first surface of the substrate support and an annular protrusion extending about the recess, wherein the substrate support is movable from a first vertical position within a processing region to a second vertical position within the processing region adjacent the showerhead; a disk defining a substrate support surface, wherein the disk is disposed within the recess; a power supply electrically coupled to the substrate support and configured to provide power to the substrate support to generate a biased plasma within a processing region defined between the showerhead and the substrate support; an isolator placed on the annular protrusion of the substrate support and extending around the disk; as well as a plasma shield disposed radially outward from the isolator on the annular protrusion of the substrate support, the plasma shield being configured to substantially eliminate plasma leakage through the plasma shield, wherein: the plasma shield is coupled to electrical ground, The plasma shield defines a plurality of holes therethrough; and The plasma shield extends below a top surface of the substrate support; and An edge ring circumscribes the substrate support, wherein the edge ring is positioned on the plasma shield.

2. The semiconductor processing chamber of claim 1 wherein the plasma shield comprises an annular member extending radially outward from the disk.

3. The semiconductor processing chamber of claim 2, wherein the plasma shield is characterized by a first thickness around an inner radius of the plasma shield, and wherein the plasma shield is characterized by a second thickness around an outer radius of the plasma shield that is less than the first thickness.

4. The semiconductor processing chamber of claim 3, wherein the plurality of holes are defined within a region of the plasma shield characterized by the second thickness.

5. The semiconductor processing chamber of claim 1, wherein each of the plurality of apertures is characterized by a profile including a tapered portion extending at least partially through the plasma shield.

6. The semiconductor processing chamber of claim 1 wherein the plasma shield defines at least about 500 holes therethrough.

7. The semiconductor processing chamber of claim 1, wherein each hole of the plurality of holes is characterized by a diameter of less than or about 0.25 inches.

8. The semiconductor processing chamber of claim 1 wherein a gap is maintained between a radial edge of the plasma shield and a sidewall of the semiconductor processing chamber.

9. The semiconductor processing chamber of claim 1, wherein the plasma shield is maintained electrically isolated from an electrostatic chuck portion of the substrate support, the electrostatic chuck portion being electrically coupled to the power supply.

10. The semiconductor processing chamber of claim 1 wherein said isolator is a ring-shaped member and wherein said semiconductor processing chamber further comprises an edge ring disposed over said isolator and said plasma shield.

11. A semiconductor processing chamber comprising: chamber sidewalls; Sprinkler heads; a substrate support member, the substrate support member defining a processing region of the semiconductor processing chamber together with the showerhead and the chamber sidewall, wherein the substrate support member includes an inner region recessed from an annular outer region, wherein the substrate support member includes a conductive disk disposed within the inner region, wherein the substrate support member is movable from a first vertical position within the processing region to a second vertical position within the processing region adjacent to the showerhead; a power source electrically coupled to the conductive disk, the power source being adapted to provide energy to the conductive disk to form a biased plasma within the processing region; an annular isolator disposed on the annular outer region of the substrate support and contacting the conductive disk about an inner annular surface of the annular isolator; a plasma shield coupled to the annular outer region of the substrate support along a circumference of the substrate support, wherein: The plasma shield extends radially outward toward the chamber sidewall, The plasma shield defines a plurality of holes therethrough; and the plasma shield being maintained at electrical ground, and wherein the plasma shield extends below a top surface of the substrate support; as well as An edge ring circumscribes the substrate support, wherein the edge ring is positioned on the plasma shield.

12. The semiconductor processing chamber of claim 11, wherein the plasma shield is characterized by an inner radius and an outer radius, and wherein the plasma shield is characterized by an inner radius defined at a boundary between an inner region and an outer region of the plasma shield.

13. The semiconductor processing chamber of claim 12, wherein the plurality of holes extend within the outer region of the plasma shield and around the plasma shield.

14. The semiconductor processing chamber of claim 12, wherein the plasma shield is coupled to the substrate support at an outer edge along an interior region of the plasma shield.

15. The semiconductor processing chamber of claim 12, wherein the edge ring is positioned on the interior region of the plasma shield.

16. The semiconductor processing chamber of claim 10, wherein the edge ring is quartz.

17. The semiconductor processing chamber of claim 12, wherein the plasma shield is characterized by a first thickness within the inner region, the plasma shield is characterized by a second thickness within the outer region, and wherein the plasma shield defines a protrusion at the inner radius.

18. The semiconductor processing chamber of claim 11, further comprising a liner extending along the chamber sidewall from a location adjacent the showerhead to a location substantially coplanar with the plasma shield when the substrate support is in the second vertical position.

19. The semiconductor processing chamber of claim 11, wherein the plasma shield is coated on a first surface facing the showerhead.