Multi-display synchronous display method and device, electronic equipment and storage medium

By obtaining the EDID of the monitor and determining the unsupported target resolution, the problem of inconsistent output after multiple monitors is solved, synchronous display and improved user experience is achieved.

CN119493540APending Publication Date: 2025-02-21JINAN YUSHI INTELLIGENT TECH CO LTD
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Patent Information

Application Number
CN202311034011.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2023-08-16
Publication Date
2025-02-21

AI Technical Summary

Technical Problem

Multiple monitors have inconsistent output after startup, resulting in poor visual display effect.

Method used

By obtaining the EDID of each target display, the first target resolution that is not supported is determined, and the display is controlled to display the resolution before all display parameter sets are sent to ensure that the output color of the startup phase is consistent.

Benefits of technology

It realizes synchronous display of multiple displays in the startup stage and the output stage, improving the visual display effect and user experience.

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Abstract

The invention provides a multi-display synchronous display method and device, electronic equipment and a storage medium, and relates to the technical field of data display, and the method comprises the steps: obtaining EDIDs corresponding to at least two target displays; based on each EDID, determining a first target resolution of a target display corresponding to each EDID, the first target resolution being a resolution not supported by the target display; and sending the respective corresponding first target resolution to each target display, so as to control each target display to display the respective corresponding first target resolution before all the display parameter sets are sent. According to the invention, synchronous display of multiple displays can be realized.
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Description

Technical Field

[0001] The present invention relates to the field of data display technology, and in particular to a multi-display synchronous display method, device, electronic equipment and storage medium. Background Art

[0002] As the size of the splicing controller becomes larger and larger, the number of spliced ​​displays increases. Since the initialization time of the DA (Digital to Analog) chips connected to each display is inconsistent, the output of each display is inconsistent after it is turned on.

[0003] When the display is an LCD (Liquid Crystal Display), the default output color of the LCD is as follows Figure 1 The color A shown. After the card of the spelling controller is started, the corresponding display output color is as follows Figure 1 For a display with a small pitch resolution, the output color of the display is as follows Figure 1 The color B2 shown is similar to the color B1, but has different grayscale values. Therefore, the output of the display is inconsistent after it is turned on, which in turn causes the visual display effect of each display to the user to be poor. Summary of the invention

[0004] The present invention provides a multi-display synchronous display method, device, electronic device and storage medium, which are used to solve the defect of inconsistent output of multiple displays in the prior art and realize synchronous display of multiple displays.

[0005] The present invention provides a multi-display synchronous display method, comprising:

[0006] Obtain the EDID corresponding to at least two target displays;

[0007] Based on each of the EDIDs, determining a first target resolution of a target display corresponding to each of the EDIDs, where the first target resolution is a resolution not supported by the target display;

[0008] The first target resolution corresponding to each target display is sent to each target display, so as to control each target display to display the first target resolution corresponding to each target display before all display parameter sets are sent.

[0009] According to the multi-display synchronous display method provided by the present invention, controlling each of the target displays to display the first target resolution corresponding to each of the target displays comprises:

[0010] For each of the first target resolutions, determining a first blanking parameter corresponding to the first target resolution;

[0011] Based on each of the first blanking parameters, configuring an FPGA chip of a target display corresponding to each of the first target resolutions;

[0012] A first synchronization signal is sent to each of the FPGA chips simultaneously, wherein the first synchronization signal is used to trigger the first blanking parameters corresponding to each of the target displays to take effect, and after all the first blanking parameters take effect, each of the target displays is controlled to display its corresponding first target resolution.

[0013] According to the multi-display synchronous display method provided by the present invention, the method further includes:

[0014] Determine a second target resolution corresponding to each of the target displays, where the second target resolution is a resolution supported by the target display;

[0015] Determine a second blanking parameter corresponding to each of the second target resolutions;

[0016] Sending a display parameter set to each of the FPGA chips;

[0017] After all display parameter sets are sent, configuring the FPGA chip corresponding to each of the target displays based on each of the second blanking parameters;

[0018] A second synchronization signal is sent to each of the FPGA chips simultaneously, wherein the second synchronization signal is used to trigger the second blanking parameters corresponding to each of the target displays to take effect, and after all the second blanking parameters take effect, each of the target displays is controlled to display its corresponding second target resolution.

[0019] According to the multi-display synchronous display method provided by the present invention, the determining, based on each of the EDIDs, a first target resolution of a target display corresponding to each of the EDIDs comprises:

[0020] For each of the EDIDs, traverse the preset resolutions in the preset resolution set, match the currently traversed preset resolution with the EDID, until a preset resolution that does not match the EDID is determined, and determine the preset resolution that does not match the EDID as the first target resolution of the target display corresponding to each of the EDIDs.

[0021] According to the multi-display synchronous display method provided by the present invention, sending a display parameter set to each of the FPGA chips comprises:

[0022] Initialize the DA chip corresponding to each of the FPGA chips;

[0023] Creating a display parameter set corresponding to each of the target displays;

[0024] Each of the display parameter sets is sent to the FPGA chip corresponding to each of the target displays.

[0025] According to the multi-display synchronous display method provided by the present invention, before obtaining the EDIDs corresponding to the at least two target displays, the method further includes:

[0026] Acquire at least two displays and cable connection states corresponding to the at least two displays;

[0027] A display whose cable connection state is a cable inserted state is determined as the target display.

[0028] The present invention also provides a multi-display synchronous display device, comprising:

[0029] An acquisition module, used to acquire EDIDs corresponding to at least two target displays;

[0030] A determination module, configured to determine, based on each of the EDIDs, a first target resolution of a target display corresponding to each of the EDIDs, wherein the first target resolution is a resolution not supported by the target display;

[0031] The sending module is used to send the first target resolution corresponding to each target display, so as to control each target display to display the first target resolution corresponding to each target display before all display parameter sets are sent.

[0032] The present invention also provides an electronic device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the program, the multi-display synchronous display method as described above is implemented.

[0033] The electronic device provided according to the present invention further includes at least one FPGA chip and at least one DA chip, wherein the at least one FPGA chip is connected to the processor, and the FPGA is connected to the at least one DA chip.

[0034] The present invention also provides a computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, the multi-display synchronous display method as described above is implemented.

[0035] The multi-display synchronous display method, device, electronic device and storage medium provided by the present invention obtain the EDID corresponding to each target display and parse the EDID to obtain the first target resolution corresponding to each target display. Through the first target resolution not supported by the target display, each target display is controlled to display the first target resolution corresponding to each target display before all display parameter sets are sent. That is, each target display is in a no-signal state during the startup phase, thereby ensuring that the output color of each target display remains consistent during the startup phase, until each target display synchronously receives an image signal and synchronously outputs the image signal, ensuring that each target display displays synchronously during the startup phase and the output phase, thereby improving the visual display effect of each target display and improving the user experience. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] In order to more clearly illustrate the technical solutions in the present invention or the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0037] Figure 1 It is a display schematic diagram of multiple displays provided by the prior art;

[0038] Figure 2 This is one of the flow charts of the multi-display synchronous display method provided by an embodiment of the present invention;

[0039] Figure 3 This is a second flow chart of the multi-display synchronous display method provided by an embodiment of the present invention;

[0040] Figure 4 is a structural schematic diagram of a multi-display synchronous display device provided by an embodiment of the present invention;

[0041] Figure 5 It is one of the structural schematic diagrams of the electronic device provided by the embodiment of the present invention;

[0042] Figure 6 This is the second structural schematic diagram of the electronic device provided by the embodiment of the present invention. DETAILED DESCRIPTION

[0043] In order to make the purpose, technical solution and advantages of the present invention clearer, the technical solution of the present invention will be clearly and completely described below in conjunction with the drawings of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0044] In view of the problem of inconsistent output of multiple displays in the prior art, an embodiment of the present invention provides a method for synchronous display of multiple displays. Figure 2 FIG. 1 is one of the flow charts of the multi-display synchronous display method provided by an embodiment of the present invention. Figure 2 As shown, the method includes:

[0045] Step 210: Obtain EDIDs corresponding to at least two target displays.

[0046] Optionally, the EDID (Extended Display Identification Data) is a standard for display identification data developed by VESA (Video Electronics Standards Association) when developing the DDC (Digital Display Channel) display data channel communication protocol. The EDID is stored in the DDC memory in the display. When the splicing controller or device host is connected to the display, the EDID stored in the DDC memory of the display is read through the DDC channel. In addition, the EDID includes product parameters and performance parameters of the target display, wherein product parameters include but are not limited to manufacturer information, production year and EDID structure version number, etc., and performance parameters include but are not limited to supported image size, color setting parameters, frequency range limitations, supported resolution, data checksum bytes, etc.

[0047] It should be noted that the above-mentioned splicing controller, that is, the splicing controller, is a device that divides a complete image signal into N blocks and then distributes them to N target displays, thereby improving the display effect by splicing a super large screen image display screen through multiple displays.

[0048] Optionally, the video interface of the target display includes but is not limited to DVI (Digital Visual Interface), VGA (Video Graphics Array) interface, HDMI (High Definition Multimedia Interface) and DP (Display Port), etc. Different video interfaces have different characteristics and bandwidths, resulting in different EDIDs for different video interfaces.

[0049] Step 220: Based on each of the EDIDs, determine a first target resolution of a target display corresponding to each of the EDIDs, where the first target resolution is a resolution not supported by the target display.

[0050] Specifically, by performing field parsing on each EDID, the supported resolution in each EDID can be obtained, and based on the supported resolution, the unsupported resolution in each EDID, that is, the first target resolution that is not supported by each target display, can be further determined.

[0051] Step 230: Send the first target resolution corresponding to each target display to control each target display to display the first target resolution corresponding to each target display before all display parameter sets are sent.

[0052] Specifically, each target display is sent its corresponding first target resolution to ensure that before all display parameter sets are sent, each target display can be controlled to be in a no-signal state through each first target resolution, so that each target display outputs a default color parameter of the target display in the no-signal state, so that each target display outputs consistent color in the no-signal state. After each target display subsequently receives an image signal synchronously, it can synchronously output the image signal from the no-signal state, so that each target display is displayed synchronously in the input state, thereby achieving synchronous display of the entire display process of each target display, thereby improving the visual display effect and user experience.

[0053] Furthermore, before obtaining the EDIDs corresponding to the at least two target displays, the method further includes:

[0054] Acquire at least two displays and cable connection states corresponding to the at least two displays;

[0055] A display whose cable connection state is a cable inserted state is determined as the target display.

[0056] Specifically, before executing step 210, it is necessary to first detect the cable connection status corresponding to each display. If the cable connection status corresponding to the display is a cable plugged in status, it indicates that the display is one of the video display units constituting the above-mentioned ultra-large screen image display screen, and the display is determined as the target display. For the target display, the above steps 210 to 230 are executed to implement the multi-display synchronous display method provided by the embodiment of the present invention. If the cable connection status corresponding to the display is a cable unplugged status, it indicates that the display is not in use, and there is no need to obtain the EDID of the display and detect the cable plugged in status of other displays.

[0057] Further, the determining, based on each of the EDIDs, a first target resolution of a target display corresponding to each of the EDIDs includes:

[0058] For each of the EDIDs, traverse the preset resolutions in the preset resolution set, match the currently traversed preset resolution with the EDID, until a preset resolution that does not match the EDID is determined, and determine the preset resolution that does not match the EDID as the first target resolution of the target display corresponding to each of the EDIDs.

[0059] Specifically, after obtaining the EDID, a preset resolution set is further obtained, which stores at least two preset resolutions that are not supported by most displays. After field parsing of the EDID to obtain the resolution supported by the target display, the preset resolutions in the preset resolution set can be traversed, and the currently traversed preset resolution can be matched with the resolution supported in the EDID, and the first preset resolution in the preset resolution set that does not match the EDID is determined as the first target resolution of the target display corresponding to the EDID.

[0060] Furthermore, the controlling each of the target displays to display the first target resolution corresponding to the respective ones includes:

[0061] For each of the first target resolutions, determining a first blanking parameter corresponding to the first target resolution;

[0062] Based on each of the first blanking parameters, configuring the FPGA chip 550 of the target display corresponding to each of the first target resolutions;

[0063] A first synchronization signal is sent to each of the FPGA chips 550 simultaneously, wherein the first synchronization signal is used to trigger the first blanking parameters corresponding to each of the target displays to take effect, and after all the first blanking parameters take effect, each of the target displays is controlled to display its corresponding first target resolution.

[0064] Specifically, Figure 3 FIG. 2 is a second flow chart of a multi-display synchronous display method provided by an embodiment of the present invention. Figure 3As shown, after the splicing controller is turned on, the DA (Digital to Analog, digital analog conversion) chip 560 is de-reset, and the EDID corresponding to each target display is obtained, and the EDID can be further parsed to obtain the first target resolution corresponding to each target display. After determining the first target resolution corresponding to each target display, the first blanking parameter corresponding to each first target resolution can be further obtained, and the first blanking parameter is an abnormal parameter related to the scanning process of the image. After the FPGA chip 550 connected by the DA chip 560 is initialized by the target display, the first blanking parameter corresponding to the first target resolution not supported by the target display is configured based on the output clock register of the FPGA chip 550, and the first synchronization signal is sent to each FPGA chip 550 at the same time. Through the first synchronization signal, the first blanking parameter configured is triggered to take effect, thereby ensuring that the corresponding target display displays the first target resolution before outputting the image signal, that is, ensuring that each target display is in a no-signal state before outputting the image signal, ensuring that before all display parameter sets are not fully issued, each target display outputs the default color parameter, so as to ensure that each target display displays the same color in a no-signal state, and improve the display effect of each display in the startup phase of the splicing controller. When the image signal is output, the FPGA chip 550 corresponding to at least two target displays is controlled to output the display signal synchronously, so that each target display can synchronously output the image signal from a no-signal state, further improving the display effect of each target display in the output stage of the splicing controller, thereby realizing synchronous display of each target display.

[0065] Further, such as Figure 3 As shown, the method also includes:

[0066] Determine a second target resolution corresponding to each of the target displays, where the second target resolution is a resolution supported by the target display;

[0067] Determine a second blanking parameter corresponding to each of the second target resolutions;

[0068] Sending a display parameter set to each of the FPGA chips 550;

[0069] After all display parameter sets are sent, configuring the FPGA chip 550 corresponding to each of the target displays based on each of the second blanking parameters;

[0070] A second synchronization signal is sent to each of the FPGA chips 550 simultaneously, and the second synchronization signal is used to trigger the second blanking parameters corresponding to each of the target displays to take effect, and after all the second blanking parameters take effect, control each of the target displays to display its corresponding second target resolution.

[0071] Specifically, according to the EDID corresponding to each target display, the supported resolution can be determined, and any supported resolution can be determined as the second target resolution, and the second blanking parameter corresponding to the second target resolution can be obtained by parsing from the EDID, and the second blanking parameter is a normal parameter related to the image scanning process. After that, a display parameter set is sent to each FPGA chip 550, and after all display parameter sets are sent, the register of the FPGA chip 550 is configured according to the second blanking parameter and the output clock to ensure that each target display is in the input state, but the second blanking parameter is an invalid parameter at this time. After the second synchronization signal is synchronously sent to all FPGA chips 550, the second blanking parameter can be triggered to take effect synchronously, so as to control each target display to display the corresponding second target resolution, thereby making each target display synchronously display the image signal to improve the visual display effect.

[0072] Further, sending the display parameter set to each of the FPGA chips 550 includes:

[0073] Initialize the DA chip 560 corresponding to each of the FPGA chips 550;

[0074] Creating a display parameter set corresponding to each of the target displays;

[0075] Each of the display parameter sets is sent to the FPGA chip 550 corresponding to each of the target displays.

[0076] Specifically, before configuring the FPGA chip 550 of the target display according to the second blanking parameter, it is necessary to initialize the DA chip 560 corresponding to the FPGA chip 550. After the initialization of each DA chip 560 is completed, a display parameter set corresponding to each target display is created. The display parameter set includes but is not limited to the data flow direction, cropping parameters and coordinate position corresponding to the image signal. The coordinate position can be understood as the display position of the image signal in the target display, and the coordinate position can be represented by the number of rows and columns in the target display. After creating the display parameter set, the display parameter set corresponding to each target display can be sent serially to the FPGA chip 550 corresponding to each target display. After all display parameter sets are sent to the corresponding FPGA chip 550, each FPGA chip 550 can be further configured according to the second blanking parameter to ensure that each target display can directly and synchronously output the image signal from a no-signal state, thereby improving the visual display effect and user experience.

[0077] The multi-display synchronous display method provided by the embodiment of the present invention obtains the EDID corresponding to each target display and parses the EDID to obtain the first target resolution corresponding to each target display. Through the first target resolution not supported by the target display, each target display is controlled to display the first target resolution corresponding to each target display before all display parameter sets are sent. That is, each target display is in a no-signal state during the startup phase, thereby ensuring that the output color of each target display remains consistent during the startup phase, until each target display synchronously receives an image signal and synchronously outputs the image signal, ensuring that each target display displays synchronously during the startup phase and the output phase, thereby improving the visual display effect of each target display and improving the user experience.

[0078] The multi-display synchronous display device provided by the present invention is described below. The multi-display synchronous display device described below and the multi-display synchronous display method described above can be referred to each other.

[0079] The embodiment of the present invention further provides a multi-display synchronous display device, Figure 4 is a schematic diagram of the structure of a multi-display synchronous display device provided by an embodiment of the present invention, such as Figure 4 As shown, the multi-display synchronous display device 400 includes: an acquisition module 410, a determination module 420 and a sending module 430, wherein:

[0080] An acquisition module 410 is used to acquire EDIDs corresponding to at least two target displays;

[0081] A determination module 420 is configured to determine, based on each of the EDIDs, a first target resolution of a target display corresponding to each of the EDIDs, where the first target resolution is a resolution not supported by the target display;

[0082] The sending module 430 is used to send the first target resolution corresponding to each target display, so as to control each target display to display the first target resolution corresponding to each target display before all display parameter sets are sent.

[0083] The multi-display synchronous display device provided by the embodiment of the present invention obtains the EDID corresponding to each target display and parses the EDID to obtain the first target resolution corresponding to each target display. Through the first target resolution not supported by the target display, each target display is controlled to display the first target resolution corresponding to each target display before all display parameter sets are sent. That is, each target display is in a no-signal state during the startup phase, thereby ensuring that the output color of each target display remains consistent during the startup phase, until each target display synchronously receives an image signal and synchronously outputs the image signal, ensuring that each target display displays synchronously during the startup phase and the output phase, thereby improving the visual display effect of each target display and improving the user experience.

[0084] Optionally, the determination module 420 is specifically configured to:

[0085] For each of the EDIDs, traverse the preset resolutions in the preset resolution set, match the currently traversed preset resolution with the EDID, until a preset resolution that does not match the EDID is determined, and determine the preset resolution that does not match the EDID as the first target resolution of the target display corresponding to each of the EDIDs.

[0086] Optionally, the sending module 430 is specifically configured to:

[0087] For each of the first target resolutions, determining a first blanking parameter corresponding to the first target resolution;

[0088] Based on each of the first blanking parameters, configuring the FPGA chip 550 of the target display corresponding to each of the first target resolutions;

[0089] A first synchronization signal is sent to each of the FPGA chips 550 simultaneously, wherein the first synchronization signal is used to trigger the first blanking parameters corresponding to each of the target displays to take effect, and after all the first blanking parameters take effect, each of the target displays is controlled to display its corresponding first target resolution.

[0090] Optionally, the multi-display synchronous display device 400 further includes a configuration module, which is specifically used to:

[0091] Determine a second target resolution corresponding to each of the target displays, where the second target resolution is a resolution supported by the target display;

[0092] Determine a second blanking parameter corresponding to each of the second target resolutions;

[0093] Sending a display parameter set to each of the FPGA chips 550;

[0094] After all display parameter sets are sent, configuring the FPGA chip 550 corresponding to each of the target displays based on each of the second blanking parameters;

[0095] A second synchronization signal is sent to each of the FPGA chips 550 simultaneously, and the second synchronization signal is used to trigger the second blanking parameters corresponding to each of the target displays to take effect, and after all the second blanking parameters take effect, control each of the target displays to display its corresponding second target resolution.

[0096] Optional, configuration module, specifically for:

[0097] Initialize the DA chip 560 corresponding to each of the FPGA chips 550;

[0098] Creating a display parameter set corresponding to each of the target displays;

[0099] Each of the display parameter sets is sent to the FPGA chip 550 corresponding to each of the target displays.

[0100] Optionally, the multi-display synchronous display device 400 further includes a target display determination module, and the target display determination module is specifically used to:

[0101] Acquire at least two displays and cable connection states corresponding to the at least two displays;

[0102] A display whose cable connection state is a cable inserted state is determined as the target display.

[0103] Figure 5 is one of the structural diagrams of the electronic device provided by the embodiment of the present invention, such as Figure 5 As shown, the electronic device may include: a processor 510, a communication interface 520, a memory 530 and a communication bus 540, wherein the processor 510, the communication interface 520 and the memory 530 communicate with each other through the communication bus 540. The processor 510 may call the logic instructions in the memory 530 to execute the multi-display synchronous display method, which includes:

[0104] Obtain the EDID corresponding to at least two target displays;

[0105] Based on each of the EDIDs, determining a first target resolution of a target display corresponding to each of the EDIDs, where the first target resolution is a resolution not supported by the target display;

[0106] The first target resolution corresponding to each target display is sent to each target display, so as to control each target display to display the first target resolution corresponding to each target display before all display parameter sets are sent.

[0107] Furthermore, Figure 6 FIG. 2 is a second structural diagram of an electronic device provided by an embodiment of the present invention. Figure 6 As shown, the electronic device further includes at least one FPGA chip 550 and at least one DA chip 560 , wherein the at least one FPGA chip 550 is connected to the processor, and the FPGA is connected to the at least one DA chip 560 .

[0108] Specifically, the electronic device can be a splicing controller, which includes a processor, at least one FPGA chip 550 and at least one DA chip 560. The processor is connected to all FPGA chips 550, each FPGA chip 550 is connected to at least one DA chip 560, and each DA chip 560 is connected to a target display. The target display can be an LCD (Liquid Crystal Display) or LED (Light Emitting Diode) screen. The LED screen is a new type of imaging electronic device made of light emitting diodes arranged in sequence. Due to its high brightness, wide viewing angle, long life and other characteristics, it is being widely used in displays in various fields.

[0109] It should be noted that each FPGA chip 550 can be connected to a maximum of four DA chips 560 .

[0110] Optionally, the processor 510 may be a DSP (Digital Signal Processing) chip and an MCU (Micro Controller Unit), etc., which is not limited in the embodiment of the present invention.

[0111] In addition, the logic instructions in the above-mentioned memory 530 can be implemented in the form of a software functional unit and can be stored in a computer-readable storage medium when it is sold or used as an independent product. Based on such an understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art or the part of the technical solution, can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk, etc. Various media that can store program codes.

[0112] On the other hand, the present invention further provides a computer program product, the computer program product includes a computer program, the computer program can be stored in a computer-readable storage medium, when the computer program is executed by a processor, the computer can execute the multi-display synchronous display method provided by the above methods, the method includes:

[0113] Obtain the EDID corresponding to at least two target displays;

[0114] Based on each of the EDIDs, determining a first target resolution of a target display corresponding to each of the EDIDs, where the first target resolution is a resolution not supported by the target display;

[0115] The first target resolution corresponding to each target display is sent to each target display, so as to control each target display to display the first target resolution corresponding to each target display before all display parameter sets are sent.

[0116] In another aspect, the present invention further provides a computer-readable storage medium having a computer program stored thereon, and when the computer program is executed by a processor, the method for synchronous display of multiple displays provided by the above methods is implemented, and the method comprises:

[0117] Obtain the EDID corresponding to at least two target displays;

[0118] Based on each of the EDIDs, determining a first target resolution of a target display corresponding to each of the EDIDs, where the first target resolution is a resolution not supported by the target display;

[0119] The first target resolution corresponding to each target display is sent to each target display, so as to control each target display to display the first target resolution corresponding to each target display before all display parameter sets are sent.

[0120] The device embodiments described above are merely illustrative, wherein the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the scheme of this embodiment. Ordinary technicians in this field can understand and implement it without paying creative labor.

[0121] Through the description of the above implementation methods, those skilled in the art can clearly understand that each implementation method can be implemented by means of software plus a necessary general hardware platform, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solution is essentially or the part that contributes to the prior art can be embodied in the form of a software product, and the computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, a disk, an optical disk, etc., including a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods described in each embodiment or some parts of the embodiments.

[0122] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A multi-display synchronous display method, characterized in that: include: Obtain the EDID corresponding to at least two target displays; Based on each of the EDIDs, determining a first target resolution of a target display corresponding to each of the EDIDs, where the first target resolution is a resolution not supported by the target display; The first target resolution corresponding to each target display is sent to each target display, so as to control each target display to display the first target resolution corresponding to each target display before all display parameter sets are sent.

2. The multi-display synchronous display method according to claim 1, characterized in that: The controlling each of the target displays to display the first target resolution corresponding to each of the target displays comprises: For each of the first target resolutions, determining a first blanking parameter corresponding to the first target resolution; Based on each of the first blanking parameters, configuring an FPGA chip of a target display corresponding to each of the first target resolutions; A first synchronization signal is sent to each of the FPGA chips simultaneously, wherein the first synchronization signal is used to trigger the first blanking parameters corresponding to each of the target displays to take effect, and after all the first blanking parameters take effect, each of the target displays is controlled to display its corresponding first target resolution.

3. The multi-display synchronous display method according to claim 2, characterized in that: The method further comprises: Determine a second target resolution corresponding to each of the target displays, where the second target resolution is a resolution supported by the target display; Determine a second blanking parameter corresponding to each of the second target resolutions; Sending a display parameter set to each of the FPGA chips; After all display parameter sets are sent, configuring the FPGA chip corresponding to each of the target displays based on each of the second blanking parameters; A second synchronization signal is sent to each of the FPGA chips simultaneously, wherein the second synchronization signal is used to trigger the second blanking parameters corresponding to each of the target displays to take effect, and after all the second blanking parameters take effect, each of the target displays is controlled to display its corresponding second target resolution.

4. The multi-display synchronous display method according to any one of claims 1 to 3, characterized in that: The determining, based on each of the EDIDs, a first target resolution of a target display corresponding to each of the EDIDs comprises: For each of the EDIDs, traverse the preset resolutions in the preset resolution set, match the currently traversed preset resolution with the EDID, until a preset resolution that does not match the EDID is determined, and determine the preset resolution that does not match the EDID as the first target resolution of the target display corresponding to each of the EDIDs.

5. The multi-display synchronous display method according to claim 3, characterized in that: The sending of a display parameter set to each of the FPGA chips comprises: Initialize the DA chip corresponding to each of the FPGA chips; Creating a display parameter set corresponding to each of the target displays; Each of the display parameter sets is sent to the FPGA chip corresponding to each of the target displays.

6. The multi-display synchronous display method according to any one of claims 1 to 3, characterized in that: Before obtaining the EDIDs corresponding to the at least two target displays, the method further includes: Acquire at least two displays and cable connection states corresponding to the at least two displays; A display whose cable connection state is a cable inserted state is determined as the target display.

7. A multi-display synchronous display device, characterized in that: include: An acquisition module, used to acquire EDIDs corresponding to at least two target displays; A determination module, configured to determine, based on each of the EDIDs, a first target resolution of a target display corresponding to each of the EDIDs, wherein the first target resolution is a resolution not supported by the target display; The sending module is used to send the first target resolution corresponding to each target display, so as to control each target display to display the first target resolution corresponding to each target display before all display parameter sets are sent.

8. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein: When the processor executes the program, the multi-display synchronous display method as described in any one of claims 1-6 is implemented.

9. The electronic device according to claim 8, characterized in that: It also includes at least one FPGA chip and at least one DA chip, wherein the at least one FPGA chip is connected to the processor, and the FPGA is connected to the at least one DA chip.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the multi-display synchronous display method according to any one of claims 1 to 6 is implemented.