Base64 decoding method and device based on 64 characters
By using the AVX2 instruction set to obtain multiple bytes at once in Base64 decoding and perform decoding processing, the performance bottleneck caused by frequent memory access in traditional decoding methods is solved, and a more efficient decoding rate is achieved.
Patent Information
- Application Number
- CN202411553963.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-01
- Publication Date
- 2025-02-21
AI Technical Summary
When traditional Base64 decoding methods deal with large traffic, the cache is frequently invalidated due to frequent memory access, resulting in memory access delay.
The loading data function of the AVX2 instruction set is used to obtain K bytes at a time, and the decoded value of each byte is determined through the decoding table. The fill data function of AVX2 is summarized and written to the register to reduce the number of memory accesses.
By reducing the number of memory accesses, the system decoding rate of Base64 decoding is improved, and the performance performance in large traffic scenarios is optimized.
Smart Images
Figure CN119494321A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of data processing, and in particular to a 64-character Base64 decoding method and device. Background Art
[0002] Base64 encoding is a method of using 64 printable characters to represent binary data. It is usually used to store and transmit binary data. It is often used in email, HTTP protocol, and other scenarios where binary data needs to be converted to text format. Base64 decoding is the process of restoring Base64-encoded data to the original data, but traditional decoding methods have some limitations, especially when facing modern high-performance computing needs. For example, the decoder needs to frequently access the memory to read the data to be decoded and write the decoded original data to the memory. This frequent memory access may cause the cache to fail frequently when processing large traffic, resulting in memory access delays. Summary of the invention
[0003] The present application provides a Base64 decoding method and device for implementing efficient Base64 decoding.
[0004] In a first aspect, an embodiment of the present application provides a Base64 decoding method, which can be executed by a Base64 decoding device, and the method includes: obtaining K bytes from the data to be decoded in sequence through the load data function of the Advanced Vector Extensions 2 (AVX2) instruction set; K is a positive integer; for each K bytes obtained, determining the decoding value corresponding to each byte in the K bytes through a decoding table; through the fill data function of the AVX2, summarizing the decoding value corresponding to each byte in the K bytes, and writing them into the first register in units of byte length.
[0005] By adopting the above method, K bytes can be obtained at a time through the load data function in AVX2. Compared with the traditional decoding method, more bytes can be obtained at a time, so that when obtaining the same amount of data to be decoded, this scheme obtains the data to be decoded from the space storing the data to be decoded less times. In this way, the number of memory accesses is reduced and the system decoding rate is improved.
[0006] In a possible implementation, before obtaining K bytes from the data to be decoded, it also includes: determining N loop segments corresponding to the data to be decoded according to the K bytes loaded by the loading data function; N is a positive integer; sequentially obtaining K bytes from the data to be decoded, including: according to the loop processing mode, obtaining K bytes corresponding to the i-th loop segment from the data to be decoded, and after the decoded values of the K bytes corresponding to the i-th loop segment are written into the first register, obtaining K bytes corresponding to the i+1-th loop segment from the data to be decoded.
[0007] By adopting the above method, N cyclic segments are determined so that K bytes corresponding to each cyclic segment are automatically cyclically acquired, thereby simplifying the process of sequentially acquiring data from the data to be decoded.
[0008] In a possible implementation, the N loop segments corresponding to the data to be decoded are determined based on the K bytes loaded by the loading function, including: dividing the number of bytes M of the data to be decoded by the K bytes loaded by the loading function; when the remainder is less than a set threshold, the quotient is determined as the N loop segments corresponding to the data to be decoded; when the remainder is not less than the set threshold, the quotient is added by 1 to determine the N loop segments corresponding to the data to be decoded; wherein the K bytes corresponding to the Nth loop segment include the padding data for the data to be decoded.
[0009] The above method provides a processing method when the number of bytes M of the data to be decoded is not an integer multiple of the load K, and determines whether the number of loop segments is the quotient or the quotient plus 1 by the remainder and the set threshold. In this way, the decoding rate of the data to be decoded can be improved.
[0010] In a possible implementation, after determining the quotient value as the N loop segments corresponding to the data to be decoded, it also includes: obtaining the remaining data, the remaining data being the data in the data to be decoded excluding the bytes corresponding to the N loop segments; for each byte in the remaining data, determining the decoding value corresponding to each byte byte by byte through the decoding table, and writing the result into the second register in units of byte length after summarizing.
[0011] In a possible implementation, after writing into the second register, it also includes: splicing the decoding values of each loop segment obtained from the first register and the decoding value obtained from the second register into decoding values corresponding to each byte of the data to be decoded and outputting them.
[0012] In a possible implementation, K bytes are obtained sequentially from the data to be decoded, including: K bytes are obtained sequentially from the data to be decoded and written into a third register; the decoded value corresponding to each byte is 6 bytes; and written into the first register, including: writing the lower 6 bits of the fourth register according to the decoded value corresponding to each byte and filling the high bits with zeros; the fourth register has 8K storage bits; and reading the lower 6 bits of each 8-bit group from the fourth register and outputting them to the first register in units of byte length.
[0013] In a possible implementation, before sequentially acquiring K bytes from the data to be decoded, the method further includes: determining that the number of bytes of the data to be decoded is a multiple of 4 and removing fillers in the data to be decoded.
[0014] By adopting the above method, the Base64 data that is not to be decoded can be quickly screened out by whether the data to be decoded is a multiple of 4. By removing the filler in the data to be decoded, the number of bytes of the original data corresponding to the data to be decoded can be calculated in advance according to the Base64 decoding characteristics.
[0015] In the second aspect, an embodiment of the present application provides a 64-character Base64 decoding device, the device comprising: an acquisition module, used to sequentially acquire K bytes from the data to be decoded through the load data function of AVX2; K is a positive integer; a determination module, used to determine the decoding value corresponding to each byte of the K bytes through a decoding table for each K bytes acquired; a processing module, used to summarize the decoding value corresponding to each byte of the K bytes through the fill data function of AVX2, and write them into the first register in units of byte length.
[0016] In a possible implementation, the determination module is specifically used to determine the N loop segments corresponding to the data to be decoded according to the load amount K bytes of the loading data function; N is a positive integer; the acquisition module is specifically used to obtain the K bytes corresponding to the i-th loop segment from the data to be decoded according to the loop processing mode, and after the decoded values of the K bytes corresponding to the i-th loop segment are written into the first register, obtain the K bytes corresponding to the i+1-th loop segment from the data to be decoded.
[0017] In a possible implementation, the determination module is further specifically used to divide the number of bytes M of the data to be decoded by the load amount K bytes of the loading data function; when the remainder is less than a set threshold, the quotient value is determined as the N loop segments corresponding to the data to be decoded; when the remainder is not less than the set threshold, the quotient value is added by 1 and determined as the N loop segments corresponding to the data to be decoded; wherein the K bytes corresponding to the Nth loop segment include the padding data for the data to be decoded.
[0018] In a possible implementation, the acquisition module is further used to acquire the remaining data, where the remaining data is data in the data to be decoded excluding the bytes corresponding to the N loop segments; the processing module is further used to determine, for each byte in the remaining data, a decoding value corresponding to each byte byte by byte through the decoding table, and write the resultant data into the second register in units of byte length after aggregation.
[0019] In a possible implementation, the device also includes a splicing module, which is used to splice the decoding values of each loop segment obtained from the first register and the decoding values obtained from the second register into decoding values corresponding to each byte of the data to be decoded and output them.
[0020] In a possible implementation, the acquisition module is also specifically used to sequentially acquire K bytes from the data to be decoded and write them into the third register; the decoding value corresponding to each byte is 6 bytes; the processing module is also used to write the lower 6 bits of the fourth register according to the decoding value corresponding to each byte and fill the high bits with zeros; the fourth register has 8K storage bits; the lower 6 bits of each 8-bit group are read from the fourth register and output to the first register in units of byte length.
[0021] In a possible implementation, the determination module is further configured to determine that the number of bytes of the data to be decoded is a multiple of 4 and remove fillers in the data to be decoded.
[0022] In a third aspect, an embodiment of the present application provides a 64-character Base64 decoding device, the device comprising a memory and a processor, the memory being used to store computer programs or instructions; the processor being used to call the computer programs or instructions stored in the memory to execute a method as in any possible implementation of the first aspect.
[0023] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, in which instructions are stored. When a computer reads and executes the instructions, the computer executes a method in any possible implementation of the first aspect.
[0024] In a fifth aspect, an embodiment of the present application provides a computer program product, wherein instructions are stored in the computer program product. When a computer reads and executes the instructions, the computer executes the method in any possible implementation of the first aspect above. BRIEF DESCRIPTION OF THE DRAWINGS
[0025] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.
[0026] Figure 1 A flowchart corresponding to a Base64 decoding method provided in an embodiment of the present application;
[0027] Figure 2 A schematic diagram of determining N cyclic segments corresponding to data to be decoded provided in an embodiment of the present application;
[0028] Figure 3 A schematic diagram of the internal modules of a Base64 decoding device 3000 provided in an embodiment of the present application;
[0029] Figure 4 A structural diagram of a Base64 decoding device 4000 provided in an embodiment of the present application. DETAILED DESCRIPTION
[0030] In order to make the purpose, technical solutions and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present application.
[0031] In order to more clearly describe the Base64 decoding method of the embodiment of the present application, the principle of Base64 encoding is first introduced. Base64 encoding is a widely used data encoding method, which is to split the three bytes of the original data into 4 bytes, and then obtain the corresponding encoded data according to the Base64 decoding table. The Base64 decoding table consists of 64 characters, including 26 uppercase letters, 26 lowercase letters, 10 numbers 0 to 9, and the symbol "+" and the symbol " / ". The Base64 encoding table is shown in Table 1.
[0032] Table 1
[0033]
[0034] The Base64 encoding process is illustrated by taking the text message Man as an example. Man is a string consisting of three letters: M, a, and n. The corresponding code value representation, binary representation, Base64 code number, and Base64 code value of each letter in the string in ASCII encoding are shown in Table 2.
[0035] Table 2
[0036]
[0037] As can be seen from Table 2, the ASCII code value corresponding to M is 77, which is converted to binary as 01001101; similarly, the ASCII code value corresponding to a is 97, which is converted to binary as 01100001; the ASCII code value corresponding to n is 110, which is converted to binary as 01101110. After concatenating the binary codes corresponding to the three characters M, a, and n, and then splitting them into 4 groups, we can get "010011", "010110", "000101", and "101110". Since the data storage in the computer is stored in units of 8 bits, "010011" is stored in the lower 6 bits of an 8-bit position, and the upper 2 bits are filled with 0, so that the value is not changed, and "00010011" is obtained. The binary number corresponding to "00010011" is 19. According to the Base64 decoding table, the Base64 code value corresponding to 19 can be found to be T. According to the same method, we can calculate that the Base64 code value of "011010" is W, the Base64 code value of "000101" is F, and the code value of "101110" is u. Thus, "Man" is encoded as "TWFU" after Base64 encoding. That is, Base64 encoding is performed in units of three bytes. When the total number of bytes to be encoded is not a multiple of three, padding bytes are required to ensure the smooth execution of the encoding. This situation will not be described in detail here.
[0038] Base64 decoding is the process of converting the Base64 code value into the original data. Taking the above example, Base64 decoding is the process of converting "TWFU" into "Man", or into "77", "97", "110", or into "01001101", "01100001", "01101110".
[0039] Currently, traditional Base64 decoding is to take four bytes from the memory at a time for decoding. For example, if the data to be decoded is 32 bytes in total, it needs to be taken from the memory eight times, taking four bytes at a time for decoding. This causes the decoder to frequently access the memory to read data. This frequent memory access may increase the probability of cache failure when processing large amounts of data.
[0040] Based on this, in order to optimize traditional Base64 decoding so as to better cope with scenarios such as large traffic, an embodiment of the present application provides a Base64 decoding method for achieving efficient Base64 decoding.
[0041] Figure 1 A flowchart corresponding to a Base64 decoding method provided in an embodiment of the present application is shown in FIG. 1 , which can be executed by a Base64 decoding device. Figure 1 As shown, the process includes the following steps:
[0042] Step 101, the Base64 decoding device sequentially obtains K bytes from the data to be decoded through the load data function of AVX2, where K is a positive integer.
[0043] Exemplarily, the Base64 decoding device can be a device capable of executing a specific computer program to implement the method provided in the embodiment of the present application, such as a computer, a tablet computer, or a server. AVX2 is an instruction set extension used to enhance the parallel computing capability of the processor. It introduces more single instruction multiple data streams (SIMD), which can operate on multiple data at the same time, speeding up vectorized computing and parallel processing.
[0044] AVX2 includes multiple functions, such as a load data function, which is used to load data from memory. Through the load data function, K bytes are obtained from the data to be decoded in order. Optionally, the load data function can be a _mm256_loadu_si256 function, which is used to load 256 bits (32 bytes) of data from an unaligned memory address; the load data function can also be a _mm256_load_si256, which is used to load 256 (32 bytes) of data from an aligned memory address. If the starting address of a data is an integer multiple of its size, then this address is considered to be aligned. If the starting address of a data is not an integer multiple of its size, then this address is considered to be unaligned. The embodiment of the present application adopts the _mm256_loadu_si256 function. When using this function, 32 bytes can be taken at a time, that is, K is equal to 32 bytes. The embodiment of the present application does not limit the specific load data function. If the data to be decoded is 220 bytes in total, 32 bytes are taken from the 220 bytes in sequence, a total of 6 times, and 28 bytes are left.
[0045] Optionally, before obtaining K bytes from the data to be decoded, the method further includes: determining N loop segments corresponding to the data to be decoded according to the K bytes loaded by the loading data function.
[0046] Exemplarily, based on the total byte amount of the data to be decoded and the load amount k bytes of the loading data function, the N loop segments of the data to be decoded are determined. For example, if the total byte amount of the data to be decoded is 200 bytes and the load amount K bytes is 32 bytes, it can be determined that the data to be decoded corresponds to 6 loop segments, and 8 bytes are left. Optionally, it can also be determined that the data to be decoded corresponds to 5 loop segments, and 40 bytes are left. The remaining 40 bytes are then taken in sequence for 32 bytes.
[0047] After determining the N loop segments corresponding to the data to be decoded, K bytes are sequentially obtained from the data to be decoded, including: according to the loop processing mode, K bytes corresponding to the i-th loop segment are obtained from the data to be decoded, and after the decoded values of the K bytes corresponding to the i-th loop segment are written into the first register, K bytes corresponding to the i+1-th loop segment are obtained from the data to be decoded.
[0048] Exemplarily, the embodiments of the present application can pre-write a loop loading byte script, and the loop loading byte script can be automatically executed in a loop to obtain the bytes corresponding to each loop segment. Using the above example, the total byte amount of the data to be decoded is 200 bytes, the loading amount K is 32 bytes, the data to be decoded corresponds to 6 loop segments, and there are 8 bytes left. Then, the 32 bytes corresponding to the first loop segment can be obtained according to the loop loading byte script. After the decoded value of the 32 bytes corresponding to the first loop segment is written into the first register, the 32 bytes corresponding to the second loop segment are obtained. After the decoded value of the 32 bytes corresponding to the second loop segment is written into the first register, the 32 bytes corresponding to the third loop segment are obtained, and the data to be decoded corresponding to each loop segment is obtained in turn.
[0049] Optionally, Figure 2 A schematic diagram of determining N loop segments corresponding to data to be decoded provided in an embodiment of the present application, such as Figure 2 As shown, according to the loading amount K bytes of the loading data function, determining N loop segments corresponding to the data to be decoded includes the following steps.
[0050] Step 201, divide the number of bytes M of the data to be decoded by the load amount K bytes of the loading data function; Step 202, determine whether the remainder is less than the set threshold; if the remainder is less than the set threshold, execute step 203; if the remainder is not less than the set threshold, execute step 204; Step 203, determine the quotient value as the N loop segments corresponding to the data to be decoded; Step 204, add 1 to the quotient value and determine it as the N loop segments corresponding to the data to be decoded; wherein the K bytes corresponding to the Nth loop segment include the padding data for the data to be decoded.
[0051] Exemplarily, the loading amount K of the loading data function is 32, the number of bytes M of the data to be decoded is 200, the number of bytes of the data to be decoded 200 divided by the loading amount 32 of the loading data function is equal to 6, and the remainder is 8. The set threshold can be half of the loading amount, or other values. For example, if the threshold is set to 18 and the remainder 8 is less than the set threshold 18, then the quotient value 6 is determined as 6 loop segments; if the number of bytes of the data to be decoded is 220, the number of bytes of the data to be decoded 220 divided by the loading amount 32 of the loading data function is equal to 6, and the remainder is 28, then 7 is used as the loop segment, where the 32 bytes corresponding to the 7th loop segment include 28 bytes represented by the remainder and 4 bytes to fill the data to be decoded.
[0052] Optionally, sequentially obtaining K bytes from the data to be decoded includes: sequentially obtaining K bytes from the data to be decoded and writing them into a third register. Exemplarily, before writing the decoded values of the K bytes into the first register, the k bytes may be written into the third register. In the embodiment of the present application, the K bytes obtained from the data to be decoded by the _mm256_loadu_si256 function are written into the third register, and then K bytes are taken out from the third register to decode the K bytes.
[0053] Step 102: The Base64 decoding device determines the decoding value corresponding to each byte in the K bytes obtained each time through a decoding table.
[0054] For each of the 32 bytes obtained, the decoded value corresponding to each byte in the 32 bytes is determined through the Base64 decoding table. Taking one of the 32 bytes, T, as an example, the corresponding number of T in the Base64 decoding table is 19. Since the decoded value corresponding to each byte is 6 bits, the 6-bit decoded value corresponding to 19 is "010011".
[0055] Step 103, the Base64 decoding device summarizes the decoded value corresponding to each byte in the K bytes through the padding data function of AVX2, and writes it into the first register in units of byte length.
[0056] Exemplarily, after determining the decoded value corresponding to each byte in the 32 bytes according to the decoding table, the decoded value corresponding to each byte in the 32 bytes is saved in the storage space through the filling data of AVX2, and then the 6-bit decoded value corresponding to each byte is spliced together in order, and then written into the first register in units of 8 bits. In other words, the 6-bit decoded value corresponding to each byte of the 32 bytes is spliced together. The bits are 192 bits, and the 192 bits are taken once every 8 bits, a total of 24 times, and written into the first register, that is, 24 bytes are generated, and the 24 bytes are the decoded values of the 32 bytes.
[0057] Optionally, the decoded values corresponding to each byte in the K bytes are summarized and written into the first register in units of byte length, including: writing the lower 6 bits of the fourth register according to the decoded values corresponding to each byte and filling the high bits with zeros, the fourth register has 8K storage bits, reading the lower 6 bits of each 8-bit group from the fourth register and outputting them to the first register in units of byte length.
[0058] Exemplarily, the fourth register may have 8*32 bits, and the 6-bit decoded value corresponding to each byte is written into the lower 6 bits of every 8 bits in the fourth register, and the upper two bits of every 8 bits in the fourth register are padded with zeros. Then, the lower 6 bits of every 8 bits are read from the fourth register, concatenated together, and written into the first register in units of 8 bits.
[0059] When the number of bytes M of the data to be decoded is not an integer multiple of K, after writing the decoded value of each byte in the K bytes into the first register, if the remainder of the number of bytes M of the data to be decoded divided by the load amount K bytes of the loading data function is less than the set threshold, then after determining the quotient as the N loop segments corresponding to the data to be decoded, the method further includes: obtaining the remaining data, which is the data other than the bytes corresponding to the N loop segments in the data to be decoded; for each byte in the remaining data, determining the decoded value corresponding to each byte byte by byte through the decoding table, and writing the summed up values into the second register in units of byte length.
[0060] For example, the amount of bytes of data to be decoded is 200, the loading amount K is 32, the loop segment is 6, the remainder is 8, which is less than the set threshold 18. The remaining data is 6 bytes. For the remaining 6 bytes, they are decoded by traditional methods. Since the traditional Base64 decoding method can only obtain 4 bytes at a time, it is necessary to split the remaining 6 bytes into 4 bytes and 2 bytes. Further, the decoding value corresponding to each byte is determined through the decoding table. If the 4 bytes after splitting are TWFU, the Base code numbers corresponding to TWFU are determined to be 19, 22, 5 and 46 respectively through the decoding table. 19, 22, 5 and 46 are converted into the corresponding 6-bit binary numbers "010011", "010110", "000101" and "101110" respectively. "010011", "010110", "000101" and "101110" are spliced together, and then every 8 bits are taken, and "01001101", "01100001" and "01101110" can be obtained, and written into the second register. The remaining 2 bytes are also decoded in the traditional way. In the traditional Base64 decoding, if it is less than 4 bytes, it is supplemented to 4 bytes by filling characters, and then the supplemented 4 bytes are decoded. For example, if the two bytes are QQ, then fill QQ with "=" and "=" to form four bytes of "QQ ==". According to the decoding table, the Base64 code value corresponding to Q is 16, and the 6-bit binary number corresponding to 16 is "010000". "010000" and "010000" are concatenated together to form "010000010000", and then every 8 bits are taken to get "01000001". And write it into the second register, and discard the remaining less than 8 bits.
[0061] Furthermore, after writing into the second register, it also includes: splicing the decoded values of each loop segment obtained from the first register and the decoded value obtained from the second register into the decoded values corresponding to each byte of the data to be decoded and outputting them. In this way, the data to be decoded is split into N loop segments and the remaining data, and the decoded values of the loop segments stored in the first register and the decoded values stored in the second register are spliced to obtain the decoded data corresponding to the data to be decoded.
[0062] After writing the decoded value of each byte in the K bytes into the first register, if the remainder of the number of bytes M of the data to be decoded divided by the load amount K bytes of the loading data function is greater than the set threshold, the quotient value is added by 1 to determine the N loop segments corresponding to the data to be decoded, wherein the K bytes corresponding to the Nth loop segment include the padding data of the data to be decoded. Exemplarily, taking the number of bytes of the data to be decoded as 220, the load amount K as 32, the quotient as 6, the remainder as 28, which is greater than the set threshold 18, 4 padding bytes can be added to the data to be decoded, so that 7 loop segments can be obtained, and the last loop segment includes 28 bytes of data to be decoded and 4 padding bytes. The decoded values of the 7 loop segment data are written into the fourth register and written into the first register in units of byte length. The decoding of the 7th loop segment data includes the decoding of 28 data to be decoded and the decoding of 4 padding bytes. The decoding process of filling 4 bytes in 32 bytes is similar to the above-mentioned decoding process of filling 2 bytes in 4 bytes, and no further elaboration is made here.
[0063] Optionally, before sequentially obtaining K bytes from the data to be decoded, it also includes: determining that the number of bytes of the data to be decoded is a multiple of 4 and removing the filler in the data to be decoded. If the number of bytes of the data to be decoded is not a multiple of 4, it means that the data to be decoded is not obtained through Base64 encoding. If the number of bytes of the data to be decoded is a multiple of 4, it means that the data to be decoded may be obtained by Base64 encoding. In addition, it can be understood that if the data to be decoded includes fillers, the fillers can be removed in advance to simplify the decoding of the data to be decoded. In this way, the amount of data after decoding of the data to be decoded can be calculated based on the amount of bytes of the data to be decoded after removing the fillers and the decoding characteristics of Base64.
[0064] Figure 3 A schematic diagram of the internal modules of a Base64 decoding device 3000 provided in an embodiment of the present application is shown as follows: Figure 3 As shown, the device may include: an acquisition module 301, a determination module 302 and a processing module 303, and optionally, a storage module, the storage module is used to store computer instructions or programs, and the processing module 303 can call the computer instructions or programs in the storage module.
[0065] Among them, the acquisition module 301 is used to obtain K bytes from the data to be decoded in sequence through the loading data function of AVX2; K is a positive integer; the determination module 302 is used to determine the decoding value corresponding to each byte of the K bytes through the decoding table for each K bytes obtained; the processing module 303 is used to summarize the decoding value corresponding to each byte of the K bytes through the filling data function of AVX2, and write them into the first register in units of byte length.
[0066] In a possible implementation, the determination module 302 is specifically used to determine the N loop segments corresponding to the data to be decoded according to the load amount K bytes of the loading data function; N is a positive integer; the acquisition module 301 is specifically used to obtain the K bytes corresponding to the i-th loop segment from the data to be decoded according to the loop processing mode, and after the decoded values of the K bytes corresponding to the i-th loop segment are written into the first register, obtain the K bytes corresponding to the i+1-th loop segment from the data to be decoded.
[0067] In a possible implementation, the determination module 302 is further specifically used to divide the number of bytes M of the data to be decoded by the load amount K bytes of the loading data function; when the remainder is less than a set threshold, the quotient value is determined as the N loop segments corresponding to the data to be decoded; when the remainder is not less than the set threshold, the quotient value is added by 1 and determined as the N loop segments corresponding to the data to be decoded; wherein the K bytes corresponding to the Nth loop segment include the padding data for the data to be decoded.
[0068] In a possible implementation, the acquisition module 301 is further used to acquire the remaining data, where the remaining data is data in the data to be decoded excluding the bytes corresponding to the N loop segments; the processing module 303 is further used to determine, for each byte in the remaining data, a decoding value corresponding to each byte byte by byte through the decoding table, and write the result into the second register in units of byte length after aggregation.
[0069] In a possible implementation, the device also includes a splicing module 304, which is used to splice the decoding values of each loop segment obtained from the first register and the decoding values obtained from the second register into decoding values corresponding to each byte of the data to be decoded and output them.
[0070] In a possible implementation, the acquisition module 301 is also specifically used to sequentially acquire K bytes from the data to be decoded and write them into the third register; the decoding value corresponding to each byte is 6 bytes; the processing module 303 is also used to write the lower 6 bits of the fourth register according to the decoding value corresponding to each byte and fill the high bits with zeros; the fourth register has 8K storage bits; the lower 6 bits of each 8-bit group are read from the fourth register and output to the first register in units of byte length.
[0071] In a possible implementation, the determination module 302 is further configured to determine that the number of bytes of the to-be-decoded data is a multiple of 4 and remove fillers in the to-be-decoded data.
[0072] Figure 4 A schematic diagram of the structure of a Base64 decoding device 4000 provided in an embodiment of the present application. Figure 4As shown, it includes at least one processor 401 and a memory 402 connected to the at least one processor 401. The specific connection medium between the processor 401 and the memory 402 is not limited in the embodiment of the present application. Figure 4 For example, the processor 401 and the memory 402 are connected via a bus. The bus can be divided into an address bus, a data bus, a control bus, etc.
[0073] In the embodiment of the present application, the memory 402 stores instructions that can be executed by at least one processor 401. The at least one processor 401 can implement the steps of the above-mentioned Base64 decoding method by executing the instructions stored in the memory 402.
[0074] The processor 401 is the control center of the computer device, and can use various interfaces and lines to connect various parts of the computer device, and perform resource settings by running or executing instructions stored in the memory 402 and calling data stored in the memory 402. Optionally, the processor 401 may include one or more processing units, and the processor 401 may integrate an application processor and a modem processor, wherein the application processor mainly processes the operating system, user interface, and application programs, and the modem processor mainly processes wireless communications. It is understandable that the above-mentioned modem processor may not be integrated into the processor 401. In some embodiments, the processor 401 and the memory 402 may be implemented on the same chip, and in some embodiments, they may also be implemented separately on independent chips.
[0075] Processor 401 can be a general-purpose processor, such as a central processing unit (CPU), a digital signal processor, an application-specific integrated circuit (ASIC), a field programmable gate array or other programmable logic device, a discrete gate or transistor logic device, a discrete hardware component, and can implement or execute the various methods, steps and logic block diagrams disclosed in the embodiments of the present application. A general-purpose processor can be a microprocessor or any conventional processor, etc. The steps of the method disclosed in the embodiments of the present application can be directly embodied as a hardware processor for execution, or can be executed by a combination of hardware and software modules in the processor.
[0076] The memory 402 is a non-volatile computer-readable storage medium that can be used to store non-volatile software programs, non-volatile computer executable programs and modules. The memory 402 may include at least one type of storage medium, such as a flash memory, a hard disk, a multimedia card, a card-type memory, a random access memory (Random Access Memory, RAM), a static random access memory (Static Random Access Memory, SRAM), a programmable read-only memory (Programmable Read Only Memory, PROM), a read-only memory (Read Only Memory, ROM), an electrically erasable programmable read-only memory (Electrically Erasable Programmable Read-Only Memory, EEPROM), a magnetic memory, a disk, an optical disk, etc. The memory 402 is any other medium that can be used to carry or store a desired program code in the form of an instruction or data structure and can be accessed by a computer, but is not limited thereto. The memory 402 in the embodiment of the present application can also be a circuit or any other device that can realize a storage function, for storing program instructions and / or data.
[0077] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment in combination with software and hardware. Moreover, the present application may adopt the form of a computer program product implemented in one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) that include computer-usable program code.
[0078] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.
[0079] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.
[0080] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.
[0081] Obviously, those skilled in the art can make various changes and modifications to the present application without departing from the spirit and scope of the present application. Thus, if these modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is also intended to include these modifications and variations.
Claims
1. A 64-character Base64 decoding method, characterized in that: The method comprises: Through the load data function of the advanced vector extension instruction set AVX2, K bytes are sequentially obtained from the data to be decoded; K is a positive integer; For each K bytes obtained, determine the decoding value corresponding to each byte in the K bytes through a decoding table; Through the AVX2 fill data function, the decoded value corresponding to each byte in the K bytes is summarized and written into the first register in units of byte length.
2. The method according to claim 1, characterized in that Before obtaining K bytes from the data to be decoded, it also includes: According to the load amount K bytes of the data loading function, determine N loop segments corresponding to the data to be decoded; N is a positive integer; Sequentially obtain K bytes from the data to be decoded, including: According to the loop processing mode, K bytes corresponding to the i-th loop segment are obtained from the data to be decoded. After the decoded values of the K bytes corresponding to the i-th loop segment are written into the first register, K bytes corresponding to the i+1-th loop segment are obtained from the data to be decoded.
3. The method according to claim 2, characterized in that Determining N loop segments corresponding to the data to be decoded according to the K bytes loaded by the data loading function, including: Divide the number of bytes M of the data to be decoded by the load amount K bytes of the load data function; When the remainder is less than a set threshold, the quotient value is determined as the N cycle segments corresponding to the data to be decoded; When the remainder is not less than the set threshold, the quotient is increased by 1 to determine N cyclic segments corresponding to the data to be decoded; wherein K bytes corresponding to the Nth cyclic segment include the padding data for the data to be decoded.
4. The method according to claim 3, characterized in that After determining the quotient value as the N cycle segments corresponding to the data to be decoded, the method further includes: Acquire remaining data, where the remaining data is data other than the bytes corresponding to the N cyclic segments in the data to be decoded; For each byte in the remaining data, the decoding value corresponding to each byte is determined byte by byte through the decoding table, and the decoded value is summarized and written into the second register in units of byte length.
5. The method according to claim 4, characterized in that After writing to the second register, also include: The decoded values of each loop segment obtained from the first register and the decoded value obtained from the second register are concatenated into decoded values corresponding to each byte of the data to be decoded and output.
6. The method according to any one of claims 1 to 5, characterized in that Sequentially obtain K bytes from the data to be decoded, including: Sequentially obtain K bytes from the data to be decoded and write them into the third register; The decoded value corresponding to each byte is 6 bytes; written into the first register, including: Write the decoded value corresponding to each byte into the lower 6 bits of the fourth register and fill the higher bits with zeros; the fourth register has 8K storage bits; The lower 6 bits of each 8-bit group are read from the fourth register and output to the first register in units of byte length.
7. The method according to any one of claims 1 to 5, characterized in that Before sequentially obtaining K bytes from the data to be decoded, it also includes: The number of bytes of the to-be-decoded data is determined to be a multiple of 4 and fillers in the to-be-decoded data are removed.
8. A 64-character Base64 decoding device, characterized in that: include: The acquisition module is used to sequentially acquire K bytes from the data to be decoded through the load data function of AVX2; K is a positive integer; A determination module, configured to determine, for each of the K bytes acquired each time, a decoding value corresponding to each byte in the K bytes through a decoding table; The processing module is used to summarize the decoded value corresponding to each byte in the K bytes through the filling data function of the AVX2, and write the result into the first register in units of byte length.
9. A 64-character Base64 decoding device, characterized in that: include: Memory, used to store computer programs or instructions; A processor, configured to call a computer program or instruction stored in the memory to execute the method according to any one of claims 1 to 7.
10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores instructions, and when a computer reads and executes the instructions, the computer executes the method according to any one of claims 1 to 7.
11. A computer program product, characterized in that The computer program product stores instructions, and when a computer reads and executes the instructions, the computer executes the method according to any one of claims 1 to 7.