Mini-LED Chip Mass Transfer Error Compensation Method Based on Neural Network

Abstract

The present invention relates to the technical field of Mini-LED chip transfer packaging, and proposes a method for compensating the massive transfer error of Mini-LED chips based on a neural network. The compensation method includes the steps of: S1: obtaining the AOI re-inspection result as the first result; S2: sorting the first result according to the transfer order, and performing normalization processing on the sorted first result to obtain the second result; S3: performing adjacent interpolation on the chips with abnormal transfer status identifiers in the second result, and calculating the difference of the path variables of each chip; S4: defining a multi-layer neural network model, constructing a loss function, and using the loss function to update the weights of the multi-layer neural network model until the multi-layer neural network model does not overfit; S5: generating a chip transfer path and inputting it into the multi-layer neural network model to obtain a transfer error prediction value and realizing the massive transfer of chips. Before starting the transfer, the present invention exports the motion path and inputs it into the multi-layer neural network to obtain the predicted transfer error.

Description

Technical Field

[0001] The present invention relates to the technical field of Mini-LED chip transfer packaging, and particularly to a method for compensating the massive transfer error of Mini-LED chips based on a neural network. Background Art

[0002] The process of transferring a large number of Mini-LEDs from their growth wafers to a specified display plane is called the massive transfer process. Since the size of Mini-LED chips is very small, it is necessary to ensure that each chip can be accurately placed at a predetermined position. Excessive transfer errors may lead to defects such as poor contact or missing fixation. Moreover, the massive transfer process needs to ensure high efficiency to meet the requirements of mass production. Due to the small size and high transfer frequency of Mini-LED chips, the sources of transfer errors are more complex and difficult to explicitly calculate using a mathematical model. Flying needle dispensing is one of the Mini-LED massive transfer technologies. In the existing flying needle dispensing technology, the overall translation of the landing points of Mini-LED chips is controlled by adjusting the relative positions of the needles, wafers, and glass substrates.

[0003] However, this compensation method can only minimize the average value of chip transfer errors and cannot control the transfer errors of individual chips. In addition, due to the high massive transfer frequency, it is impossible to perform camera positioning and then needle dispensing for each chip during transfer. Therefore, there is an urgent need for a method for compensating massive transfer errors that pre-compensates each chip before transfer. Summary of the Invention

[0004] Aiming at the above defects, the purpose of the present invention is to propose a method for compensating the massive transfer error of Mini-LED chips based on a neural network, aiming to train a multi-layer neural network using existing transfer results, export the motion path before starting the transfer and input it into the multi-layer neural network to obtain the predicted transfer error, and modify the motion path according to the prediction result to achieve the pre-compensation result.

[0005] To achieve this purpose, the present invention adopts the following technical solutions:

[0006] A method for compensating the massive transfer error of Mini-LED chips based on a neural network, the compensation method comprising the steps of:

[0007] S1: Obtain the AOI re-inspection result as the first result, the first result including the data variables of each chip, the data variables including transfer status flags, X and Y direction transfer errors;

[0008] S2: Remove the irrelevant variables from the data variables, sort the first result according to the transfer order, and perform normalization processing on the sorted first result to obtain the second result;

[0009] S3: Perform adjacent interpolation on the chips with abnormal transfer status in the second result, calculate the chip distance and chip position rotation angle in polar coordinates based on the transfer errors in the X and Y directions, remove extreme values, calculate the angle information of the chips based on the chip position rotation angles on the wafer, and convert it into rectangular coordinate system information to calculate the difference in the path variables of each chip;

[0010] S4: Define a multi-layer neural network model and the corresponding dropout ratio, construct a loss function based on the chip distance in polar coordinates and its predicted value, and the chip position rotation angle and its predicted value, and use the optimizer and the loss function to update the weights of the multi-layer neural network model until there is no overfitting after inputting the chip distance in polar coordinates, the chip position rotation angle, the difference in the path variables, and the second result in the test set into the multi-layer neural network model;

[0011] S5: Generate the chip transfer path, input the chip transfer path into the multi-layer neural network model to obtain the predicted transfer error value, and perform massive transfer of the chips based on the predicted transfer error value.

[0012] Preferably, the data variables further include: substrate row, substrate column, camera X-axis coordinate, camera Y-axis coordinate, substrate X-axis coordinate, substrate Y-axis coordinate, rotated angle of the transferred chip, transfer flag, wafer row, wafer column, wafer X-axis coordinate, wafer Y-axis coordinate, rotated angle of the chip on the wafer, substrate serial number, wafer serial number, die bonding mode, and transfer direction;

[0013] The irrelevant variables include: camera X-axis coordinate, camera Y-axis coordinate, rotated angle of the transferred chip, transfer flag, substrate serial number, wafer serial number, and die bonding mode.

[0014] Further, generating the chip transfer path includes the steps of:

[0015] S51: Rotate the wafer until the chip at the center of the wafer is parallel to the Y-axis of the camera;

[0016] S52: Control the camera to move to the mark points at the four right-angle vertices of each glass substrate to obtain the position coordinates of each glass substrate;

[0017] S53: Control the camera to move to the position of each chip on the wafer to obtain the position coordinates of each chip;

[0018] S54: Adjust the ranges of the substrate row, substrate column, wafer row, and wafer column so that the target position matrix on the glass substrate and the chip matrix on the wafer are of equal size and in one-to-one correspondence;

[0019] S55: Generate the chip transfer path based on the position coordinates of the glass substrate and the position coordinates of the chips on the wafer.

[0020] Further, inputting the chip transfer path into a multi-layer neural network model to obtain a predicted transfer error value, and compensating for massive transfer of the chip according to the predicted transfer error value includes the steps:

[0021] S56: Input the chip transfer path into the multi-layer neural network model updated in step S4 to obtain a predicted transfer error value, and convert the predicted transfer error value into transfer errors in the X-axis direction and the Y-axis direction;

[0022] S57: Subtract the transfer error in the X-axis direction from the X-axis sub-coordinate of the position coordinates of the glass substrate and the chip, and subtract the transfer error in the Y-axis direction from the Y-axis sub-coordinate of the position coordinates of the glass substrate and the chip to obtain an adjusted chip transfer path;

[0023] S58: Make the chip land on the glass substrate according to the adjusted chip transfer path to achieve massive transfer.

[0024] Preferably, after step S58, it further includes performing flying shooting on the chips on the glass substrate to obtain transfer error data.

[0025] Preferably, in step S3, if there are several consecutive chips with abnormal transfer status identifiers in the second data, retrieve the data of the two nearest chips with normal transfer status identifiers forward and backward, and calculate the values of the abnormal rows in the form of equidistant distribution.

[0026] Preferably, in step S3, the path variables include: substrate X-axis coordinate, substrate Y-axis coordinate, wafer X-axis coordinate, and wafer Y-axis coordinate;

[0027] Calculating the difference of the path variables includes:

[0028] Obtain the path variables of the current chip;

[0029] Obtain the path variables of the reference chip;

[0030] Subtract the path variables of the reference chip from the path variables of the current chip to obtain the distances that the glass substrate and the wafer move in the X or Y axis direction respectively.

[0031] Preferably, in step S4, the multi-layer neural network includes an input layer, a fully connected layer, a forgetting layer, and an output layer;

[0032] The forward propagation output of the multi-layer neural network satisfies the relational expression:

[0033] Output = Act(...Act(Act(W 3 ·Act(W 2 ·Act(W 1 ·X + b 1 ) + b 2 ) + b 3)));

[0034] where W i represents the weight matrix, b i represents the bias of layer i, and Act is the activation function.

[0035] Preferably, a loss function is constructed based on the chip distance and its predicted value in polar coordinates and the chip position rotation angle and its predicted value, satisfying the relationship:

[0036]

[0037] where loss represents the calculation result of the loss function, m represents the number of samples, R i and respectively represent the true value and the predicted value of the i-th chip, Theta i and respectively represent the rotated angle after transfer and the predicted rotation angle of the i-th chip.

[0038] Furthermore, an optimizer and the loss function are used to update the weights of the multi-layer neural network model, satisfying the relationship:

[0039]

[0040] where W t+1 represents the weights of the updated multi-layer neural network model, W t represents the weights of the multi-layer neural network model, η represents the learning rate, represents the gradient of loss with respect to the weights.

[0041] One of the above technical solutions has the following advantages or beneficial effects:

[0042] By collecting the actual transfer data of each chip, the present invention ensures the accurate identification and compensation of transfer errors, and solves the problem of unable to position and transfer each chip one by one; considering various error sources in the transfer process of Mini-LED chips, a neural network model is used for complex data processing, which can more effectively capture and compensate errors; through a suitable model structure and dropout mechanism, the generalization ability of the model is improved, and the problem that the sources of transfer errors caused by the small size and high transfer frequency of Mini-LED chips are complex and difficult to be clearly calculated by a mathematical model is solved, so that it performs more stably in practical applications; through an automated pre-compensation method, manual intervention is reduced, and the transfer accuracy of chips is improved without reducing the transfer efficiency of Mini-LED chips. Description of the Drawings

[0043] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the accompanying drawings required for the description of the embodiments or the prior art. Obviously, the accompanying drawings in the following description are only the embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other accompanying drawings can be obtained according to the provided drawings.

[0044] Figure 1 is a flowchart of the method for compensating the massive transfer error of Mini-LED chips based on a neural network provided by an embodiment of the present invention;

[0045] Figure 2 is a flowchart for generating the chip transfer path of the method for compensating the massive transfer error of Mini-LED chips based on a neural network provided by an embodiment of the present invention;

[0046] Figure 3 is a flowchart for realizing massive transfer compensation for chips of the method for compensating the massive transfer error of Mini-LED chips based on a neural network provided by an embodiment of the present invention;

[0047] Figure 4 is a comparison chart of the pre-compensation transfer error and the actual transfer error in the X-axis direction of the method for compensating the massive transfer error of Mini-LED chips based on a neural network provided by an embodiment of the present invention;

[0048] Figure 5 is a comparison chart of the pre-compensation transfer error and the actual transfer error in the Y-axis direction of the method for compensating the massive transfer error of Mini-LED chips based on a neural network provided by an embodiment of the present invention;

[0049] Figure 6 is a comparison chart of the pre-compensation transfer error and the actual transfer error in the plane of the method for compensating the massive transfer error of Mini-LED chips based on a neural network provided by an embodiment of the present invention. Detailed implementation manners

[0050] The following will describe in detail the embodiments of the present invention. The examples of the embodiments are shown in the accompanying drawings, where the same or similar reference numerals represent the same or similar elements or elements with the same or similar functions from beginning to end. The embodiments described below by referring to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as a limitation of the present invention.

[0051] In the description of the present invention, it should be understood that the orientation or positional relationships indicated by the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "axial", "radial", "circumferential", etc. are based on the orientation or positional relationships shown in the drawings. These are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the present invention.

[0052] In addition, the terms "first" and "second" are only used for descriptive purposes and should not be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include one or more of such features. In the description of the present invention, unless otherwise specified, the meaning of "a plurality" is two or more.

[0053] In the description of the present invention, it should be noted that unless otherwise clearly specified and defined, the terms "mounted", "connected", and "coupled" should be understood in a broad sense. For example, it may be a fixed connection, a detachable connection, or an integral connection; it may be directly connected or indirectly connected through an intermediate medium, and it may be the communication inside two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0054] Mini-LED chips are very small in size, so it is necessary to ensure that each chip can be accurately placed in a predetermined position. Excessive transfer errors may lead to defects such as poor contact or missed fixation, and the mass transfer process needs to ensure high efficiency to meet the requirements of large-scale production. Due to the small size and high transfer frequency of Mini-LED chips, the sources of transfer errors are more complex and it is difficult to clearly calculate them using a mathematical model. Flying needle dispensing is one of the Mini-LED mass transfer technologies. In the existing flying needle dispensing technology, the overall translation of the landing points of Mini-LED chips is controlled by adjusting the relative positions of the needle, the wafer, and the glass substrate.

[0055] However, this compensation method can only minimize the average value of chip transfer errors as much as possible and cannot control the transfer errors of single chips. In addition, due to the high mass transfer frequency, it is impossible to perform camera positioning and then needle dispensing for each chip during transfer. Therefore, there is an urgent need for a mass transfer error compensation method that pre-compensates each chip before transfer.

[0056] Now, a mass transfer error compensation method for Mini-LED chips based on a neural network is proposed, as Figure 1 shown. The compensation method includes the steps:

[0057] S1: Obtain the AOI re-inspection result as the first result. The first result includes data variables for each chip, and the data variables include transfer status identifiers, X and Y direction transfer errors;

[0058] In this step, the purpose is to collect the status information of the chips after transfer. Through AOI re-inspection, variables such as the position information and transfer status of each chip can be obtained, providing a basis for subsequent analysis and model training. The physical meanings of the X direction transfer error OffsetX and the Y direction transfer error OffsetY are the distances between the actual positions of each chip on the glass substrate after transfer and the target positions. Taking the target position as the origin, X and Y direction coordinate axes are established, and the X direction transfer error OffsetX and the Y direction transfer error OffsetY represent the plane coordinates (x, y) of the actual positions.

[0059] S2: Remove the irrelevant variables in the data variables, sort the first result according to the transfer order, and perform normalization processing on the sorted first result to obtain the second result;

[0060] Irrelevant variables refer to variables not used in this method. These variables are generated by the machine's built-in software and can be helpful for actual production. However, in the present invention, the existence of irrelevant variables will affect operations such as model learning and generalization, so the irrelevant variables need to be removed first. Subsequently, the data is re-sorted according to the transfer order to ensure the consistency of the time series. Finally, through min-max normalization, all features are linearly scaled to the [0, 1] interval. Normalization processing can reduce the scale differences between features, prevent certain features from dominating during the learning process, thereby improving the accuracy of the model. In addition, it can also reduce the risk of gradient explosion during subsequent model training.

[0061] S3: Perform neighboring interpolation on the chips with abnormal transfer status identifiers in the second result, calculate the chip distance and chip position rotation angle in polar coordinates based on the X and Y direction transfer errors and remove the extreme values, and calculate the angle information of the chips based on the chip position rotation angles on the wafer and convert it into rectangular coordinate system information to calculate the difference of the path variables of each chip;

[0062] Specifically, first, identify and interpolate the chips with abnormal transfer status, and use the average value of all the numerical values in the previous row and the next row as the numerical value of the abnormal row. Secondly, couple the X-direction transfer error OffsetX and the Y-direction transfer error OffsetY, and use these two variables to calculate the distance R of the chip in polar coordinates and the rotation angle Theta of the chip position. Subsequently, remove the extreme values. It should be noted that the extreme values refer to the chips with a distance R of the chip in polar coordinates exceeding 50 μm. These chips can be detected visually, but they are chips in an abnormal state and have no reference value for transfer error prediction. Therefore, it is necessary to remove the extreme values. The chips with abnormal transfer status are the chips with the state identifier State of Missing after the variable transfer in the data. Subsequently, calculate the angle information of the chip using the variable DieAngle of the chip on the wafer. The angle information of the chip includes the sine value SinDieAngle and the cosine value CosDieAngle. Convert the angle information into rectangular coordinate system information. Finally, calculate the difference of the path variable, which is used to represent the movement path of the machine before reaching the current chip position.

[0063] S4: Define a multi-layer neural network model and the corresponding dropout ratio. Construct a loss function based on the chip distance in polar coordinates and its predicted value, and the rotation angle of the chip position and its predicted value. Use an optimizer and the loss function to update the weights of the multi-layer neural network model until there is no overfitting after inputting the chip distance in polar coordinates, the rotation angle of the chip position, the difference of the path variable, and the second result in the test set into the multi-layer neural network model.

[0064] This step is a process of constructing and training a multi-layer neural network model. First, prevent overfitting by defining the model structure and setting an appropriate dropout ratio. The loss function combines the prediction errors of the chip distance and the position rotation angle to ensure that the model can optimize these two objectives simultaneously. Subsequently, use the optimizer to update the model weights and gradually improve the performance of the model. Finally, ensure that the model has no overfitting by verifying the performance of the model on the test set, thereby improving its generalization ability and practical application effect.

[0065] S5: Generate the chip transfer path, input the chip transfer path into the multi-layer neural network model to obtain the predicted transfer error value, and realize the massive transfer of the chips according to the predicted transfer error value.

[0066] After the model training is completed, by inputting the chip transfer path, the error in the actual transfer process can be predicted. This predicted value will guide the adjustment of the position and angle during the transfer process, thereby optimizing the transfer effect. Through precise path planning, the chip position offset caused by the error can be reduced, and the success rate of the transfer can be improved.

[0067] Preferably, the data variables further include: substrate row, substrate column, camera X-axis coordinate, camera Y-axis coordinate, substrate X-axis coordinate, substrate Y-axis coordinate, the rotation angle of the transferred chip, transfer flag, wafer row, wafer column, wafer X-axis coordinate, wafer Y-axis coordinate, the rotation angle of the chip on the wafer, substrate serial number, wafer serial number, die bonding mode, and transfer direction;

[0068] The irrelevant variables include: camera X-axis coordinate, camera Y-axis coordinate, the rotation angle of the transferred chip, transfer flag, substrate serial number, wafer serial number, and die bonding mode.

[0069] Specifically, there is a one-to-one mapping relationship between the camera X and Y-axis coordinates and the substrate X and Y-axis coordinates, and the two have a high degree of collinearity. Variables with a high degree of collinearity should be excluded from the data input to the neural network, otherwise it will cause problems such as difficult weight learning and decreased generalization ability of the model method. Therefore, the camera X-axis coordinate and the camera Y-axis coordinate are removed;

[0070] The transfer flag and the transferred status flag have a high degree of collinearity, and both represent chip transfer / missing. Because variables with a high degree of collinearity should be excluded from the data input to the neural network, the transfer flag is removed; the rotation angle of the transferred chip is the same as the X and Y direction transfer errors, which is the result obtained after transfer. The method proposed in the present invention pre-compensates the machine movement path before transfer, and the input data for training the neural network should also use the data that can be obtained before transfer. Therefore, the rotation angle of the transferred chip needs to be excluded;

[0071] The three variables of substrate serial number, wafer serial number, and die bonding mode are used for material layout and planning in actual production, while the present invention focuses on error compensation during the transfer process of a single wafer. Therefore, these three variables are discarded.

[0072] Further, generating the transfer path of the chip includes the steps of:

[0073] S51: Rotate the wafer until the chip at the center of the wafer is parallel to the Y-axis of the camera;

[0074] S52: Control the camera to move to the mark points at the four right-angled vertices of each glass substrate to obtain the position coordinates of each glass substrate;

[0075] S53: Control the camera to move to the position of each chip on the wafer to obtain the position coordinates of each chip;

[0076] S54: Adjust the ranges of substrate row, substrate column, wafer row, and wafer column so that the target position matrix on the glass substrate and the chip matrix on the wafer are of equal size and in one-to-one correspondence;

[0077] S55: Generate a chip transfer path based on the position coordinates of the glass substrate and the position coordinates of the chips on the wafer.

[0078] Specifically, in semiconductor manufacturing, each chip on the wafer needs to be aligned with the line of sight of the camera during imaging or processing to reduce image distortion and aberration. Rotating the wafer can adjust the angle of the chips, reducing the average rotation angle of all the chips on the wafer and making its center parallel to the Y-axis of the camera, thereby ensuring the best image capture effect. To achieve effective chip transfer, it is necessary to ensure the matching of the dimensions and layouts between the glass substrate and the wafer, that is, the needle of the die bonder corresponds to the coordinate values of four axes each time it drops: the substrate X-axis coordinate RulerX, the substrate Y-axis coordinate RulerY, the wafer X-axis coordinate DieX, and the wafer Y-axis coordinate DieY. This step achieves this goal by adjusting the ranges of rows and columns. The four coordinate axes of the substrate X-axis coordinate RulerX, the substrate Y-axis coordinate RulerY, the wafer X-axis coordinate DieX, and the wafer Y-axis coordinate DieY can form the movement paths of the two main moving parts, namely the glass substrate carrier platform and the wafer platform. By adjusting the row and column ranges of the substrate and the wafer, ensuring the matching of their layouts, improving the consistency and reliability of the overall production, and clarifying the corresponding relationships of the four coordinate axes, the chip transfer can be made more efficient, reducing the transfer time and potential errors.

[0079] Furthermore, input the chip transfer path into the multi-layer neural network model to obtain the predicted transfer error value. The steps for compensating for massive chip transfer based on the predicted transfer error value include:

[0080] S56: Input the chip transfer path into the multi-layer neural network model updated in step S4 to obtain the predicted transfer error value, and convert the predicted transfer error value into the transfer errors in the X-axis direction and the Y-axis direction.

[0081] S57: Subtract the X-axis component coordinate of the position coordinates of the glass substrate and the chips from the transfer error in the X-axis direction, and subtract the Y-axis component coordinate of the position coordinates of the glass substrate and the chips from the transfer error in the Y-axis direction to obtain the adjusted chip transfer path.

[0082] S58: Make the chips land on the glass substrate according to the adjusted chip transfer path to achieve massive transfer.

[0083] Specifically, the multi-layer neural network captures complex patterns by learning a large amount of historical data (such as past transfer paths and corresponding actual positions). When chip transfer path data is input, the model uses its internal weights and activation functions to calculate and generate a predicted transfer error value. For example, after step S55, the chip transfer path is saved as ManualReplanBondingPathOffset.csv, and ManualReplanBondingPathOffset.csv is input into the multi-layer neural network model updated in step S4 to output the predicted transfer error value. Subsequently, the predicted value is converted from polar coordinates to the X-direction transfer error. and the Y-direction transfer error. The calculation formula is as follows:

[0084]

[0085] After obtaining the transfer error, the position is corrected through coordinate calculation. Specifically, the original coordinates of the glass substrate and the chip are respectively subtracted by the predicted transfer errors in the X-axis and Y-axis directions, which can intuitively reflect the deviation between the actual position and the target position, ensuring that the chip can be adjusted along the predetermined path, that is, compensating for the transfer error. For example: the modified substrate X-axis coordinate the modified substrate Y-axis coordinate the modified wafer X-axis coordinate the wafer Y-axis coordinate The modified motion path is saved as BondingDataAddOffset.csv and imported into the mass transfer die bonder.

[0086] In step S58, the die bonder transfers the Mini-LED chips according to BondingDataAddOffset.csv and drops the needles at the corresponding coordinates of each chip, so that the chips land on the glass substrate to achieve mass transfer. As Figure 4 and Figure 5 shown, the solid line represents the true value of the chip transfer error, and the dashed line represents the compensated transfer error after being predicted by the multi-layer neural network and modifying the path. It can be seen that after pre-compensation, the chip transfer error range decreases and the fluctuation decreases; in addition, as Figure 6 shown, the circular scatter points represent the true landing points of the chips relative to the target position, and the triangular scatter points represent the landing points of the chips after pre-compensation. It can be seen that after pre-compensation, the chip transfer error range decreases and the transfer accuracy is higher.

[0087] Preferably, after step S58, it further includes performing fly shooting on the chips on the glass substrate to obtain transfer error data.

[0088] The flying shooting technology can quickly capture the actual position of the chip during the transfer process, compare it with the predetermined position, and monitor the accuracy of the transfer process in real time. Through the obtained transfer error data, the transfer data can be timely fed back, allowing dynamic adjustment in subsequent transfers, thereby improving the overall response speed. Detecting the transfer error in a timely manner can prevent the generation of unqualified products, thereby improving the yield of the final product and reducing the scrap rate.

[0089] Preferably, in step S3, if there are several consecutive chips with abnormal transfer status identifiers in the second data, retrieve the data of the two nearest chips with normal transfer status identifiers forward and backward, and calculate the value of the abnormal row in the form of equidistant distribution.

[0090] Equidistant distribution ensures the smooth transition of data, avoids unnatural fluctuations caused by mutations, makes the overall trend more coherent. Calculating using the method of equidistant distribution usually simplifies the interpolation process, making the implementation more direct and efficient, and making the trend of abnormal data consistent with the surrounding normal data, which helps to improve the reliability of the prediction model.

[0091] Preferably, in step S3, the path variables include: the substrate X-axis coordinate, the substrate Y-axis coordinate, the wafer X-axis coordinate, and the wafer Y-axis coordinate;

[0092] Calculating the difference of the path variables includes:

[0093] Obtain the path variables of the current chip;

[0094] Obtain the path variables of the reference chip;

[0095] Subtract the path variables of the reference chip from the path variables of the current chip to obtain the distances that the glass substrate and the wafer move in the X or Y-axis direction respectively.

[0096] Specifically, for the i-th chip, the current data of the i-th row and the data of the n-th row are taken, and the value of the i-th row path variable is subtracted from the n-th row value, denoted as variables: the substrate X-axis coordinate difference diffRulerXk, the substrate Y-axis coordinate difference diffRulerYk, the wafer X-axis coordinate difference diffDieXk, and the wafer Y-axis coordinate difference diffDieYk, where k = 1, 2, 3... n - 1. The physical meaning of the substrate X-axis coordinate difference diffRulerXk is: when transferring the i-th chip, compared with the i - n-th chip, the distance traveled by the substrate carrier platform in the X-axis direction. The physical meaning of the substrate Y-axis coordinate difference diffRulerYk is: when transferring the i-th chip, compared with the i - n-th chip, the distance traveled by the substrate carrier platform in the Y-axis direction. The physical meaning of the wafer X-axis coordinate difference diffDieXk is: when transferring the i-th chip, compared with the i - n-th chip, the distance traveled by the wafer in the X-axis direction. The physical meaning of the wafer Y-axis coordinate difference diffDieYk is: when transferring the i-th chip, compared with the i - n-th chip, the distance traveled by the wafer in the Y-axis direction.

[0097] Preferably, in step S4, the multi-layer neural network includes an input layer, a fully connected layer, a forgetting layer, and an output layer;

[0098] The forward propagation output of the multi-layer neural network satisfies the relation:

[0099] Output = Act(...Act(Act(W 3 ·Act(W 2 ·Act(W 1 ·X + b 1 ) + b 2 ) + b 3 )));

[0100] Where W i represents the weight matrix, b i represents the bias of layer i, and Act is the activation function.

[0101] Specifically, the forward propagation output of the multi-layer neural network realizes complex non-linear mapping through the application of multiple activation functions. Each layer in the formula is multiplied by the weight matrix W i and the bias b iPerform linear transformation, and then introduce nonlinear features through the activation function Act to improve the expressiveness of the model. The hierarchical structure enables the network to learn complex patterns in the data, improve prediction accuracy and generalization ability, and the network can be continuously optimized by adjusting weights and biases to adapt to different task requirements. Among them, the activation function can be the Relu function, input layer: the mapping of input variables to the fully connected layer, each input node represents a feature variable in the data set, fully connected layer: each neuron is connected to all neurons in the previous layer, used to learn the mapping from input variables to target variables, forgetting layer: randomly set the output of a certain proportion of neurons in the network to zero, forcing the network to learn more robust features, which helps to reduce the overfitting of the model to the training data and improve the generalization ability of the model, output layer: the mapping of the fully connected layer to the target variable, and the dropout ratio refers to the proportion of neurons set to zero in the forgetting layer.

[0102] Preferably, a loss function is constructed based on the chip distance in polar coordinates and its predicted value and the chip position angle and its predicted value, satisfying the relationship:

[0103]

[0104] Among them, loss represents the calculation result of the loss function, m represents the number of samples, and R i and Represent the true value and predicted value of the i-th chip, respectively, Theta i and They represent the post-transfer corner and predicted corner of the i-th chip respectively.

[0105] Specifically, the physical meaning of loss is the average distance from the predicted landing point of all chips to the actual landing point. In the process of training the multi-layer neural network model, the loss is continuously reduced to ensure that the predicted landing point is as close to the actual landing point as possible. Before constructing the loss function, since the transfer error of all chips in a single transfer is affected by the accumulation of motion errors and presents time series characteristics, the re-inspection results of a single transfer should be ensured as a whole epoch input when input into the model. Therefore, it is necessary to create a data loader to input AOI re-inspection results of different lengths into the neural network.

[0106] Furthermore, the optimizer and loss function are used to update the weights of the multi-layer neural network model to satisfy the relationship:

[0107]

[0108] Among them, W t+1 Represents the weight of the updated multi-layer neural network model, W t represents the weight of the multi-layer neural network model, η represents the learning rate, Represents the gradient of the loss with respect to the weights.

[0109] Specifically, the optimizer can be the Adam algorithm for adaptive matrix estimation. The process of using the optimizer and the loss function to update the weights of the multi-layer neural network model can be expressed as: W t+1 = W t - η· To verify whether the model is overfitting, calculate the loss using the predicted values and the true values of the target variables in the test set, and compare the loss corresponding to the test set with the losses corresponding to the training set and the validation set. If the loss corresponding to the test set is similar to the losses corresponding to the training set and the validation set and there is no difference in magnitude, it indicates that the model has generalization ability. Otherwise, it proves that the model is overfitting and the weights of the multi-layer neural network model need to be updated again.

[0110] In the description of this specification, the descriptions referring to terms such as "one embodiment", "some embodiments", "schematic embodiments", "examples", "specific examples", or "some examples", etc., mean that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic expressions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described can be combined in a suitable manner in any one or more embodiments or examples.

[0111] Although the embodiments of the present invention have been shown and described, those of ordinary skill in the art can understand that various changes, modifications, substitutions, and variations can be made to these embodiments without departing from the principles and spirit of the present invention. The scope of the present invention is defined by the claims and their equivalents.

Claims

1. A method for compensating the mass transfer error of Mini-LED chips based on a neural network, characterized in that: The compensation method comprises the steps of: S1: Obtaining an A0I re-inspection result as a first result, the first result including data variables of each chip, the data variables including a transfer state identifier, and transfer errors in the X and Y directions; S2: remove irrelevant variables in the data variables, sort the first results according to the transfer order, and normalize the sorted first results to obtain the second results; S3: performing neighbor interpolation for the chips whose transfer status is marked as abnormal in the second result, and calculating the chip distance and chip position angle in polar coordinates according to the transfer errors in the X and Y directions and removing extreme values, and calculating the chip angle information according to the chip position angle on the wafer and converting it into rectangular coordinate system information, so as to calculate the difference of the path variable of each chip; S4: define a multi-layer neural network model and a corresponding dropout ratio, construct a loss function based on the chip distance in polar coordinates and its predicted value and the chip position angle and its predicted value, and use the optimizer and the loss function to update the weights of the multi-layer neural network model until no overfitting occurs after the chip distance and chip position angle in polar coordinates in the test set, the difference of the path variables, and the second result are input into the multi-layer neural network model; S5: Generate a chip transfer path, input the chip transfer path into a multi-layer neural network model to obtain a transfer error prediction value, and implement a mass transfer of the chip based on the transfer error prediction value.

2. The compensation method according to claim 1, characterized in that: The data variables also include: substrate row, substrate column, camera X-axis coordinate, camera Y-axis coordinate, substrate X-axis coordinate, substrate Y-axis coordinate, chip rotation angle after transfer, whether to transfer mark, wafer row, wafer column, wafer X-axis coordinate, wafer Y-axis coordinate, chip rotation angle on wafer, substrate serial number, wafer serial number, wafer pricking mode and transfer direction; The irrelevant variables include: camera X-axis coordinates, camera Y-axis coordinates, chip rotation angle after transfer, whether to transfer mark, substrate serial number, wafer serial number and wafer pricking mode.

3. The compensation method according to claim 2, characterized in that: The transfer path to generate a chip includes the following steps: S51: Rotate the wafer until the chip at the center of the wafer is parallel to the Y axis of the camera; S52: Control the camera to move to the mark points at the four right-angle vertices of each glass substrate to obtain the position coordinates of each glass substrate; S53: Control the camera to move to the position of each chip on the wafer to obtain the position coordinates of each chip; S54: adjusting the ranges of the substrate rows, substrate columns, wafer rows, and wafer columns so that the target position matrix on the glass substrate and the chip matrix on the wafer are equal in size and correspond one to one; S55: Generate a chip transfer path according to the position coordinates of the glass substrate and the position coordinates of the chip on the wafer.

4. The compensation method according to claim 3, characterized in that: Inputting the chip transfer path into the multi-layer neural network model to obtain the transfer error prediction value, and realizing the massive transfer compensation of the chip according to the transfer error prediction value includes the following steps: S56: Input the chip transfer path into the multi-layer neural network model updated in step S4 to obtain a transfer error prediction value, and convert the transfer error prediction value into a transfer error in the X-axis direction and the Y-axis direction; S57: Subtracting the X-axis sub-coordinates of the position coordinates of the glass substrate and the chip from the transfer error in the X-axis direction, and subtracting the Y-axis sub-coordinates of the position coordinates of the glass substrate and the chip from the transfer error in the Y-axis direction, to obtain an adjusted chip transfer path; S58: The chips are placed on the glass substrate according to the adjusted chip transfer path to achieve mass transfer.

5. The compensation method according to claim 4, characterized in that: After step S58, the process further includes performing a flying shot of the chip on the glass substrate to obtain transfer error data.

6. The compensation method according to claim 1, characterized in that: In step S3, if there are several consecutive chips with abnormal transition status marks in the second data, the data of the two most recent chips with normal transition status marks are retrieved forward and backward, and the values ​​of the abnormal rows are calculated in an equidistant distribution.

7. The compensation method according to claim 1, characterized in that: In step S3, the path variables include: substrate X-axis coordinate, substrate Y-axis coordinate, wafer X-axis coordinate and wafer Y-axis coordinate; Calculating the difference of path variables involves: Get the path variable of the current chip; Obtain the path variables of the control chip; The path variable of the current chip is subtracted from the path variable of the reference chip to obtain the distances moved by the glass substrate and the wafer in the X or Y axis direction, respectively.

8. The compensation method according to claim 1, characterized in that: In step S4, the multi-layer neural network includes an input layer, a fully connected layer, a forgetting layer and an output layer; The forward propagation output of the multi-layer neural network satisfies the relationship: Output = Act(…Act(Act(W3·Act(W2·Act(W1·X+b1)+b2)+b3))); Where W i represents the weight matrix, b i represents the bias of layer i, and Act is the activation function.

9. The compensation method according to claim 1, characterized in that: The loss function is constructed based on the chip distance and its predicted value in polar coordinates and the chip position angle and its predicted value, satisfying the relationship: Among them, loss represents the calculation result of the loss function, m represents the number of samples, and R i and Represent the true value and predicted value of the i-th chip, respectively, Theta i and They represent the post-transfer corner and predicted corner of the i-th chip respectively.

10. The compensation method according to claim 9, characterized in that: Use the optimizer and loss function to update the weights of the multi-layer neural network model to satisfy the relationship: Among them, W t+1 Represents the weight of the updated multi-layer neural network model, W t represents the weight of the multi-layer neural network model, η represents the learning rate, Represents the gradient of loss with respect to weight.

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