Hybrid codec current delay synchronization for asymmetric speakers

Abstract

Embodiments include a method performed by a host device for synchronizing Bluetooth Low Energy (BLE) audio, the method comprising: determining a first codec decoding delay of an audio output device coupled to a first connection of the host device via a first BLE connection, determining a second codec decoding delay of an audio output device of a second connection communicatively coupled to the host device via a second BLE connection, determining a difference between the decoding delays of the first codec and the second codec, determining a compensation delay as a time difference between the first encoding-decoding delay and the second encoding-decoding delay, one of the first BLE connection or the second BLE connection is configured to include a current compensation delay, and audio data is transmitted to an audio output device of the first connection and an audio output device of the second connection via the first BLE connection and the second BLE connection.

Description

Background Art

[0001] User equipment (UE) and consumer devices for transmitting audio data via Bluetooth (BT) / Bluetooth Low Energy (BLE) have become increasingly complex, implementing various communication protocols known as codecs (coders / decoders) to transmit and stream audio data from one device to another. In order to output audio data, these various UEs and consumer products may implement one of many types of codecs that encode audio information for transmission and decode received audio information for use in generating audio output. Many codecs are designed for specific and often proprietary applications, such as low latency, high resolution / high audio quality, high bit rate, lossy or lossless applications, and are incompatible with each other. In addition, different codecs may exhibit different degrees of latency (e.g., from decoding processing delays). Nevertheless, there is a growing market for speakers and devices including wireless speakers that are sold separately (i.e., not linked or limited to specific audio devices) so that consumers can assemble a sound system with multiple speakers of the desired variety. Summary of the invention

[0002] Various aspects include a method for synchronizing Bluetooth Low Energy (BLE) audio transmitted to audio output devices equipped with different codecs, performed by a processor of a computing device used as a host device. Various aspects may include: determining a first codec decoding delay of a first connected audio output device communicatively coupled to the host device via a first BLE connection, determining a second codec decoding delay of a second connected audio output device communicatively coupled to the host device via a second BLE connection, determining a first encoding-decoding delay based on the first codec decoding delay and a first codec encoding delay of the host device for the first BLE connection, determining a second encoding-decoding delay based on the second codec decoding delay and a second codec encoding delay of the host device for the second BLE connection, determining a current compensation delay as a time difference between the first encoding-decoding delay and the second encoding-decoding delay, configuring one of the first BLE connection or the second BLE connection to include the current compensation delay, and sending audio data to the first connected audio output device and the second connected audio output device via the first BLE connection and the second BLE connection.

[0003] In some embodiments, the first BLE connection may include a first connected isochronous stream (CIS) of a connected isochronous group (CIG), and the second BLE connection may include a second CIS of the CIG. In some embodiments, configuring one of the first BLE connection or the second BLE connection to include a current compensation delay may include configuring one of the first BLE connection or the second BLE connection to include the current compensation delay in an isochronous adaptation layer (ISOAL) of the host device. In some embodiments, the first BLE connection implements a first codec type, and the second BLE connection implements a second codec type different from the first codec type.

[0004] In some embodiments, determining a first codec decoding delay for a first connected audio output device may include analyzing a first connection response message received from the first connected audio output device when establishing the first BLE connection, and determining a second codec decoding delay for a second connected audio output device may include analyzing a second connection response message received from the second connected audio output device when establishing the second BLE connection.

[0005] Some aspects may also include sending a first codec decoding delay request message to a first connected audio output device, receiving a first codec decoding delay response message from the first connected audio output device, sending a second codec decoding delay request message to a second connected audio output device, and receiving a second codec decoding delay response message from the second connected audio output device. In such aspects, determining a first codec decoding delay for the first connected audio output device may include analyzing the first codec decoding delay response message, and determining a second codec decoding delay for the second connected audio output device may include analyzing the second codec decoding delay response message.

[0006] Some aspects may further include determining whether a first codec decoding delay is received from a first connected audio output device, and determining whether a second codec decoding delay is received from a second connected audio output device. In such aspects, determining the first codec decoding delay of the first connected audio output device may include: in response to determining that the first codec decoding delay is not received from the first connected audio output device, determining a first default codec decoding delay based on the first codec type of the first BLE connection; and determining the second codec decoding delay of the second connected audio output device may include: in response to determining that the second codec decoding delay is not received from the second connected audio output device, determining the second default codec decoding delay based on the second codec type of the second BLE connection. Additional aspects include a computing device having a processor configured to perform one or more operations of any of the methods outlined above. Additional aspects include a computing device having means for performing the functions of any of the methods outlined above. Additional aspects include a non-transitory processor-readable storage medium having processor-executable instructions stored thereon, the processor-executable instructions being configured to cause a processor of the computing device to perform the operations of any of the methods outlined above. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate exemplary embodiments of the claims and, together with the general description and detailed description given herein, serve to explain the features herein.

[0008] Figure 1 is a system block diagram illustrating an example communication system suitable for implementing any of the various embodiments.

[0009] Figure 2 is a component block diagram illustrating an example computing device 200 suitable for implementing any of the various embodiments.

[0010] Figure 3 is a component block diagram illustrating a software architecture including a Bluetooth Low Energy (BLE) stack implemented by a host device for establishing and maintaining multiple BLE connections for implementing any of the various embodiments.

[0011] Figure 4 is a component block diagram illustrating an example system configured to synchronize BLE audio in accordance with some embodiments.

[0012] Figure 5A is a block diagram illustrating example end-to-end delays of a conventional three-dimensional (3D) spatial audio system including devices with different audio codes.

[0013] Figure 5Bis a block diagram illustrating example end-to-end delays of an asymmetric hybrid 3D spatial audio system including devices with different audio codes in accordance with some embodiments.

[0014] Fig. 6A is a process flow diagram of an example method for synchronizing BLE audio that may be performed by a processor of a host device in accordance with various embodiments.

[0015] Figure 6B and Figure 6C According to some embodiments, it can be used as described for synchronous BLE audio Fig. 6A A process flow diagram of example operations for performing a portion of a method is shown in FIG.

[0016] Figure 7 is a component block diagram illustrating an example computing device suitable for use with the various embodiments.

[0017] Figure 8 is a component block diagram illustrating an example server suitable for use with the various embodiments.

[0018] Fig. 9 is a component block diagram illustrating an example wireless communication device suitable for use with the various embodiments.

[0019] Fig.10 An example wearable computing device in the form of a smart watch is illustrated in accordance with some embodiments. DETAILED DESCRIPTION

[0020] Various embodiments will be described in detail with reference to the accompanying drawings. Wherever possible, the same reference numerals will be used throughout the drawings to refer to the same or similar parts. References to specific examples and implementations are for illustrative purposes and are not intended to limit the scope of the claims.

[0021] Different types of user equipment (UE) and / or commercial computing devices capable of audio output and Bluetooth (BT) and / or Bluetooth Low Energy (BLE) may implement various codec types for transmitting and outputting audio data to various commercially available speakers, headphones, and other audio output devices. Typically, consumers purchase audio output devices manufactured by an original equipment manufacturer (OEM) that is different from the OEM that manufactured their UE, and sometimes consumers purchase audio output devices manufactured by multiple different OEMs.

[0022] This mix and match of audio output devices from different OEMs may cause problems in the rendered audio. This is because the audio output device may use only one audio codec, and different OEMs may use different audio codecs in their audio output device products. Typically, a host device such as a smartphone will be able to implement multiple codec types and therefore send audio data to multiple different types of audio output devices, as described in the Bluetooth Core Specification v5.2. However, different types of codecs implemented in different types of audio output devices may exhibit different latency characteristics due to decoding processing delays. Due to the variation in codec latency, even if the host UE device sends audio data to all connected audio output devices to support synchronized three-dimensional (3D) spatial audio, the sound produced by each of the various types of audio output devices may be produced with slightly varying delays. Therefore, although the host device can be connected to multiple devices using different BLE codecs at the same time, the audio produced by the mix of different OEM audio output devices may be out of sync, which may affect the user experience.

[0023] Various embodiments include methods and processors of a computing device (e.g., a host UE device) for synchronizing BLE audio between multiple audio output devices having different codec types, such that despite differences in codec latency of different audio output devices, the sounds produced by the various audio output devices are synchronized. Various embodiments include a processor of a host device configured to synchronize audio output between various audio output devices connected via BLE by offsetting audio data transmitted to one or more audio output devices based on the slowest end-to-end codec latency (i.e., encoding latency plus decoding latency) among all connected audio output devices. Various embodiments include a processor of a host device that can determine a first codec decoding latency of a first connected audio output device communicatively coupled to the host device via a first BLE connection, determine a second codec decoding latency of a second connected audio output device communicatively coupled to the host device via a second BLE connection, determine a first encoding-decoding latency based on the first codec decoding latency and a first codec encoding latency of the host device for the first BLE connection. And determine a second encoding-decoding latency based on the second codec decoding latency and a second codec encoding latency of the host device for the second BLE connection. In some embodiments, the processor of the host device may determine a current compensation delay as a time difference between a first encoding-decoding delay and a second encoding-decoding delay, configure one of the first BLE connection or the second BLE connection to include the current compensation delay, and send audio data to the first connected audio output device and the second connected audio output device via the first BLE connection and the second BLE connection.

[0024] As used herein, the terms "host device" and "host source device" are used interchangeably to refer to a computing device that transmits encoded (e.g., digital) audio data to an audio output device. Non-limiting examples of computing devices that can be used as host devices include user equipment (UE), such as smart phones, consumer and commercial computing devices (e.g., laptops, desktop computers, and personal computers), home appliance user interfaces, voice-activated auxiliary devices (e.g., Amazon Echo® and Alexa® devices, Google Assistant, etc.), extended reality / augmented / mixed reality (XR, AR, MR) devices, smart TVs, smart boxes, multimedia displays, and smart wearable devices (e.g., smart watches). In some cases, the host device can also be used as an audio output device, which provides audio data to other connected audio output devices and generates sound (or outputs analog audio signals to connected speakers), such as to generate sound synchronized with the sound generated by other connected audio output devices.

[0025] As used herein, the terms "audio output device" and "connected audio output device" refer to a device that is communicatively coupled to a host device (e.g., a UE or other computing device) and includes a codec for decoding received encoded (i.e., digital) audio data and producing audio output (sound). In some products, the audio output device may receive encoded audio data via a BT or BLE transceiver and output an analog audio signal to an analog speaker that produces the audio output. The term "audio output device" used herein is intended to cover devices that may be referred to as "host devices," "endpoint devices," "audio endpoint devices," or "endpoint audio devices" in other contexts (e.g., communication protocols and standards). Non-limiting examples of audio output devices that can receive BT or BLE audio data from UEs and other computing devices include wireless speakers, speakers, smart speakers, multimedia displays, personal hearing devices, and the like.

[0026] The term "codec" is used herein to refer to a computer program or firmware that encodes and / or decodes an audio data stream or data signal. A codec may include encoder functionality that encodes an audio signal for transmission or storage (possibly in encrypted form), and decoder functionality that decodes received encoded audio data into a signal (e.g., an audio signal) for presentation on an audio output device (e.g., a speaker).

[0027] The term "codec type" may be used herein to refer to a type of codec that defines the process of how the codec encodes and decodes data. Examples of codec types may include, but are not limited to, Sub-Band Codec (SBC), Advanced Audio Codec (AAC), aptX, aptX Low Latency (LL), aptX HD, aptX Lossless, aptX Adaptive, Enhanced aptX, aptX Live, aptX Voice, Low Latency Audio Codec (LLAC), LDAC, Low Latency High Definition Audio Codec (LHDC), Low Complexity Communications Codec (LC3), LC3 Plus, and Ultra Audio Transport (UAT).

[0028] The term "system on chip" (SoC) is used herein to refer to a single integrated circuit (IC) chip that includes multiple resources and / or processors integrated on a single substrate. A single SoC may include circuits for digital, analog, mixed signal, and radio frequency functions. A single SoC may also include any number of general and / or special-purpose processors (digital signal processors, modem processors, video processors, etc.), memory blocks (e.g., ROM, RAM, flash memory, etc.), and resources (e.g., timers, voltage regulators, oscillators, etc.). The SoC may also include software for controlling the integrated resources and processors and for controlling peripheral devices.

[0029] The term "system-in-package" (SIP) may be used herein to refer to a single module or package that includes multiple resources, computing units, cores, and / or processors on two or more IC chips, substrates, or SoCs. For example, a SIP may include a single substrate on which multiple IC chips or semiconductor dies are stacked in a vertical configuration. Similarly, a SIP may include one or more multi-chip modules (MCMs) on which multiple ICs or semiconductor dies are packaged into a unified substrate. A SIP may also include multiple independent SoCs coupled together via high-speed communication circuits and packaged in close proximity (such as on a single motherboard or in a single computing device). The proximity of the SoCs facilitates high-speed communication and sharing of memory and resources.

[0030] Three-dimensional (3D) spatial audio technology creates an immersive audio experience for users, which aims to replicate how users perceive sound in the real world. Such technology goes beyond conventional "surround sound" systems and can allow users to experience spatial audio from any direction, sometimes based on the relative position of the user relative to the audio output device within the system. A 3D spatial audio experience can be created by implementing multiple synchronized audio output devices, which can output audio signals based on audio data streamed from a single source (such as a host device). Users can place audio output devices in various locations, such as in different corners of the room and at different heights. In order to enable users to design their own 3D spatial audio listening experience, wireless smart speakers are sold individually or in small quantities. Consumers can now purchase as many wireless smart speakers as they want, and use wireless communication links (e.g., BT or BLE links) to connect their host devices (e.g., smart phones) to the speakers so that the speakers can be placed anywhere. Then, to create a synchronized 3D spatial audio experience, each of the audio output devices establishes a wireless communication link to the host device, which the user can configure to output certain channels (e.g., left channel, right channel, front channel, rear channel, bass channel, treble channel, and other channels) to specific speakers. To ensure that the sound is synchronized, the host device can also be informed of the distance between the various speakers and the location of the desired listening area so that the host device can send audio data to each speaker so that the sound heard by the user from all speakers is synchronized. The use of multiple dispersed speakers coupled to a host device configured to provide a synchronized immersive 3D spatial audio experience can be deployed in a variety of places, including homes and commercial properties such as shopping malls, theaters, and theme parks.

[0031] Wireless audio output devices that can be used in synchronized immersive 3D spatial audio systems are manufactured by several different OEMs, where the products are designed for different purposes (i.e., high-resolution audio, lossless audio, low-latency audio, etc.). As previously mentioned, different audio output devices may use different audio codecs to decode audio data received from a host device. For example, Amazon, Xiaomi, Apple, Huawei, OPPO, VIVO, SS, Baidu, and Simalaya all produce wireless speakers as Internet of Things (IoT) products, which may use different codecs. Wireless audio output devices are typically sold or provided as a single unit rather than in pairs or multiple units. In order to provide spatial audio, multiple audio output devices need to be positioned within the same audio environment (i.e., the same room and / or within the user's listening distance).

[0032] As mentioned above, different types of codecs have different encoding and decoding times. For example, a device implementing the aptX-HD codec exhibits different encoding and decoding times (or delays) from a device implementing the LC3 codec. The audio codec decoding delay or delay between various codecs can range from 40ms to 400ms. Therefore, trying to create a 3D spatial audio experience using multiple connected audio output devices from different OEMs using various codecs may result in unsynchronized audio output. The conventional solution to this problem in 3D spatial audio deployment involves limiting multiple audio output devices to the same brand, type and / or model, so that each audio device device in the 3D spatial audio system uses the same codec. However, this limits the flexibility of the user or installer in selecting audio output devices, and some users may not be aware of this problem when purchasing equipment for their system.

[0033] Various embodiments provide an asymmetric hybrid device 3D spatial audio solution by aligning audio gaps that differ due to variations in codec encoding / decoding delays (or latency) to produce synchronized 3D spatial audio by different types of audio output devices. Various embodiments enable users to create synchronized 3D spatial audio experiences with multiple audio output devices having different BLE audio codecs. In particular, various embodiments may utilize a framework of multiple connected isochronous streams (CIs) of a connected isochronous group (CIG) (see BLE Core Specification v5.2) to create synchronized 3D spatial audio with multiple audio output devices having different codecs. Such a system, referred to as an asymmetric hybrid 3D spatial audio system, may provide synchronized BLE audio using audio output devices having different codecs by offsetting or introducing latency to CIS data packets of a BLE connection (i.e., in a CIS channel of each audio output device) of an audio output device having a faster encoding and / or decoding time to align its audio output with one or more audio output devices having the slowest encoding and / or decoding time within the asymmetric hybrid 3D spatial audio system.

[0034] For example, a host device (e.g., UE) may identify the currently active (i.e., connected) BLE audio output device and its associated audio codec type (e.g., LDAC, ACC, aptX, etc.). The host device may send a query to each connected BLE audio output device requesting the codec decoding delay of the device. In some embodiments, if the BLE audio output device does not provide a codec decoding delay value in response to the query, the host source device may use a codec-specific default decoding delay value. In some embodiments, the codec-specific default decoding delay value may be based on the brand or model of the connected audio output device, such as obtained from a lookup table stored in a memory of the host device. The host device may then calibrate or configure the delay of each BLE channel in the BLE isochronous adaptation layer (ISOAL) of the BLE transceiver. The delay calibration process may take into account both the audio codec encoding delay and the audio codec decoding delay so as to introduce delay into each channel. Then, during audio streaming, the host source device may send audio data for each channel in a separate CIS corresponding to each BLE audio output device, where each CIS is part of the same CIG. Each BLE audio output device will then produce sound that is synchronized with all audio streams, as if there were no differences in codec latency between the various audio output devices.

[0035] Figure 1 1 is a system block diagram showing an example communication system suitable for implementing any of the various embodiments. The communication system 100 may be a short-range communication network including a plurality of devices capable of wireless communication. For example, the communication system 100 may be a BLE communication system including a host device 102 and connected audio output devices 106a-106d. The connected audio output devices 106a-106d may be audio output devices capable of BLE communication and outputting audio signals based on audio data originating from the host device 102. The connected audio output devices 106a-106d may be communicatively coupled to the host device 102 via wireless connections 104a-104d. For ease of explanation, the communication system 100 includes four different types of connected audio output devices 106a-106d that communicate with the host device 102. However, fewer or more connected audio output devices 106 may be implemented within an asymmetric hybrid 3D spatial audio system.

[0036] The host device 102 may be any device capable of establishing and maintaining multiple simultaneous BLE communications with connected audio output devices 106a-106d according to various BLE codecs. The connected audio output device 106 may include any device capable of connecting to the host device 102 via BLE and outputting an audio signal derived from audio data received from the host device 102. The connected audio output device 106 may include user equipment (UE) and consumer and / or commercial computing devices such as smartphones, XR, AR, MR devices, personal computers, smart TVs, smart boxes, smart speakers, multimedia displays, smart wearable devices, personal hearing devices, or any other device capable of audio output and BLE communication.

[0037] The wireless connections 104a-104d may be BLE connections established via a handshake process between the host device 102 and each connected audio output device 106a-106d. The host device 102 may query or determine the preferred codec type of each of the connected audio output devices 106a-106d, and may establish each of the wireless connections 104a-104d respectively according to each codec type. The wireless connections 104a-104d may be established according to the preferred codec implemented by each connected audio output device 106a-106d. For example, the host device 102 may be a smartphone capable of implementing various BLE codecs such as LDAC, ACC, LC3, and aptX HD, and each connected audio output device 106a-106d may implement a different codec.

[0038] As shown, the connected audio output device 106a may be a smart phone communicatively coupled to the host device 102 via a wireless connection 104a implementing an Advanced Audio Coding (ACC) audio codec, the connected audio output device 106b may be a smart box communicatively coupled to the host device 102 via a wireless connection 104b implementing an LC3 codec, the connected audio output device 106c may be a multimedia system (e.g., a smart TV) communicatively coupled to the host device 102 via a wireless connection 104c implementing an aptX HD codec, and the connected audio output device 106d may be a speaker communicatively coupled to the host device 102 via a wireless connection 104d implementing an LDAC codec.

[0039] As another example, multiple connected audio output devices 106 may share the same codec type, but one device within the communication system 100 may have a different codec type. The host device 102 may accordingly establish wireless connections 104a-104d with two connected audio output devices that implement one codec type and another connected audio output device that implements a different codec type. The host device 102 may support as many wireless connections 104a-104d and as many codec types as defined by the modem and audio codec capabilities of the host device 102.

[0040] The host device 102 may send audio data to the connected audio output devices 106a-106d according to the specific codec implemented by each wireless connection 104a-104d. For example, the host device 102 may send audio data to the connected audio output device 106a using ACC, the host device 102 may send audio data to the connected audio output device 106b using LC3, the host device 102 may send audio data to the connected audio output device 106c using aptX HD, and the host device 102 may send audio data to the connected audio output device 106d using LDAC. The host device 102 may transmit the same audio data or audio data stream to each connected audio output device 106a-106d at offset / aligned intervals so that the connected audio output devices 106a-106d output audio signals in a synchronized manner based on the audio data.

[0041] In some embodiments, the host device 102 may also be used as an audio output device to output audio signals based on audio data in a manner synchronized with other connected audio output devices 106a-106d. For example, the host device 102 may transmit audio data to the connected audio output devices 106a-106d for synchronized audio output, and may also utilize the same audio data to output audio signals synchronized with the audio output from the connected audio output devices 106a-106d. Thus, the host device 102 may be used as an additional audio speaker within an asymmetric hybrid 3D spatial audio system.

[0042] The host device 102 may encode audio data to be transmitted to the connected audio output devices 106a-106d via the wireless connections 104a-104d (i.e., across the CIS channels). The host device 102 may have a different codec encoding delay corresponding to each wireless connection 104a-104d, where the codec encoding delay is the total time for the host device 102 to encode the audio data according to the codec type of the wireless connection 104.

[0043] The host device 102 may determine or obtain a codec decoding delay, which is a time value or duration that the connected audio output device 106 takes to decode the encoded audio data received from the host device 102. The codec decoding delay may depend on or be defined by the type of codec implemented by the connected audio output device 106. Thus, each wireless connection 104a-104d may have an encoding-decoding delay (i.e., the sum of the time it takes the host device 102 to encode the audio data plus the time it takes the connected audio output device 106 to decode the encoded audio data) based on the codec of each wireless connection 104a-104d.

[0044] In some embodiments, the host device 102 may receive a decoding delay value from each connected audio output device 106a-106d as part of a response message for respectively initializing the wireless connection 104a-104d. In some embodiments, the host device may send a request message to the connected audio output device 106 after establishing the wireless connection 104, requesting a response message including the decoding delay value. In some embodiments, if the connected audio output device 106 does not know its decoding delay or cannot provide the decoding delay value to the host device 102, the host device 102 may utilize a default decoding delay value based on the codec type of the connected audio output device 106, thereby determining an estimated encoding-decoding delay that is close to the actual encoding-decoding delay.

[0045] Figure 2 1 is a component block diagram illustrating an example computing device 200 suitable for implementing any of the various embodiments. The various embodiments may be implemented on a number of single-processor and multi-processor computer systems, including system-on-chip (SoC) or system-in-package. The computing device 200 may be implemented as a host device (e.g., host device 102). In some embodiments, the computing device 200 may be implemented as a connected audio output device (e.g., connected audio output devices 106a-106d) communicatively coupled to the host device.

[0046] Reference Figure 1-Figure 2, the illustrated example computing device 200 (which may be a system-in-package in some embodiments) includes two SoCs 202, 204 coupled to a clock 206, a voltage regulator 208, at least one subscriber identity module (SIM) 268 and / or a SIM interface, and a wireless transceiver 266 configured to send and receive wireless communications to / from a network computing device (such as a base station and / or a wireless device with BLE capabilities (e.g., a connected audio output device 106a-106d)) via an antenna (not shown). In some embodiments, the first SoC 202 operates as a central processing unit (CPU) of a computing device, which executes instructions of a software application by performing arithmetic, logic, control, and input / output (I / O) operations specified by the instructions. In some embodiments, the second SoC 204 may operate as a dedicated processing unit. For example, the second SoC 204 may operate as a dedicated 5G processing unit responsible for managing high-capacity, high-speed (e.g., 5Gbps, etc.) and / or very high frequency short wavelength (e.g., 28GHz millimeter wave spectrum, etc.) communications.

[0047] The first SoC 202 may include a digital signal processor (DSP) 210, a modem processor 212, a graphics processor 214, an application processor (AP) 216, one or more co-processors 218 (e.g., vector co-processors) connected to one or more of the processors, a memory 220, a custom circuit 222, system components and resources 224, an interconnect / bus module 226, one or more sensors 230 (e.g., accelerometers, temperature sensors, pressure sensors, optical sensors, infrared sensors, analog sound sensors, etc.), a thermal management unit 232, and a thermal power envelope (TPE) component 234. The second SoC 204 may include a 5G modem processor 252, a power management unit 254, an interconnect / bus module 264, multiple mmWave transceivers 256, a memory 258, and various additional processors 260 (e.g., application processors, packet processors, etc.).

[0048] Each processor 210, 212, 214, 216, 218, 252, 260 may include one or more cores, and each processor / core may perform operations independently of other processors / cores. For example, the first SoC 202 may include a processor that executes a first type of operating system (e.g., FreeBSD, LINUX, OS X, etc.) and a processor that executes a second type of operating system (e.g., MICROSOFT WINDOWS 10). In addition, any one or all of the processors 210, 212, 214, 216, 218, 252, 260 may be included as part of a processor cluster architecture (e.g., a synchronous processor cluster architecture, an asynchronous or heterogeneous processor cluster architecture, etc.).

[0049] The first SoC 202 and the second SoC 204 may include various system components, resources, and custom circuits for managing sensor data, analog-to-digital conversion, wireless data transmission, and for performing other specialized operations, such as decoding data packets and processing encoded audio and video signals for presentation in a web browser. For example, the system components and resources 224 of the first SoC 202 may include power amplifiers, voltage regulators, oscillators, phase-locked loops, peripheral bridges, data controllers, memory controllers, system controllers, access ports, timers, and other similar components for supporting processors and software clients running on the computing device. The system components and resources 224 and / or custom circuits 222 may also include circuits for interfacing with peripheral devices (such as cameras, electronic displays, wireless communication devices, external memory chips, etc.).

[0050] The first SoC 202 and the second SoC 204 can communicate via an interconnect / bus module 250. The various processors 210, 212, 214, 216, 218 can be interconnected to one or more memory elements 220, system components and resources 224, and custom circuits 222 and thermal management units 232 via an interconnect / bus module 226. Similarly, the processor 252 can be interconnected to a power management unit 254, a millimeter wave (mmWave) transceiver 256, a memory 258, and various additional processors 260 via an interconnect / bus module 264. The interconnect / bus modules 226, 250, 264 can include reconfigurable logic gate arrays and / or implement a bus architecture (e.g., CoreConnect, AMBA, etc.). Communications can be provided by advanced interconnects such as high-performance networks on chip (NoCs).

[0051] The first and / or second SoC 202, 204 may further include an input / output module (not illustrated) for communicating with resources external to the SoC, such as a clock 206, a voltage regulator 208, one or more wireless transceivers 266, and at least one SIM 268 and / or a SIM interface (i.e., an interface for receiving one or more SIM cards). Resources external to the SoC (e.g., clock 206, voltage regulator 208) may be shared by two or more of the internal SoC processors / cores. At least one SIM 268 (or one or more SIM cards coupled to one or more SIM interfaces) may store information supporting multiple subscriptions (including a first 5G NR subscription and a second 5G NR subscription, etc.).

[0052] In addition to the example computing device 200 discussed above, various embodiments may be implemented in a wide variety of computing systems that may include a single processor, multiple processors, multi-core processors, or any combination thereof.

[0053] Figure 3 is a component block diagram illustrating a software architecture 300 including a BLE stack implemented by a host device for establishing and maintaining multiple BLE connections for implementing any of the various embodiments. Figure 1-Figure 3, the host device 102 and the connected audio output devices 106a-106d may implement a software architecture 300 to facilitate communication between the host device 102 and the connected audio output devices 106a-106d of a communication system (e.g., the communication system 100). The software architecture 300 may be implemented by the host device 102 for at least the purpose of encoding (segmenting and reassembling) audio data, and by the connected audio output devices 106a-106d for at least the purpose of decoding (segmenting and reassembling) the encoded audio data received from the host device 102. The software architecture 300 may be distributed among one or more processors (e.g., the processors 212, 214, 216, 218, 252, 260). Although shown with respect to one BLE stack, in a multi-transceiver computing device, the software architecture 300 may include multiple protocol stacks, each of which may be associated with a different transceiver (e.g., two protocol stacks associated with two transceivers, respectively, in a dual-transceiver wireless communication device). Although described below with reference to the BLE communication layer, the software architecture 300 may support any of the various standards and protocols for wireless communication and / or may include additional protocol stacks that support any of the various wireless communication standards and protocols. Various features of the software architecture 300 are described in more detail in "Bluetooth Core Specification Version 5.2, Vol. 6, Parts A and G - Isochronous Adaptation Layer".

[0054] The software architecture 300 may include an upper layer 302, an isochronous adaptation layer 304 (shown as an ISO adaptation layer (ISOAL)), and a lower layer 306 that may include a baseband resource manager. The upper layer 302 may generate and / or receive isochronous data 308 in data packets referred to as service data units (SDUs) 322. Note that the SDUs 322 in the ISOAL 304 are independent of the SDUs in the L2CAP layer. The interface between the upper layer 302 and the ISOAL 304 may be a host controller interface (HCI) or a proprietary interface (not shown). The ISOAL 304 may provide a mechanism so that the timing for generating or receiving isochronous data 320 in the upper layer 302 may be independent of the timing used in the CIS logical transport used to carry the isochronous data.

[0055] ISOAL 304 may include a multiplexer 310, a segmentation / reassembly module 312, a segmentation / reassembly module 314, and an encapsulation module 316, all of which are within or controlled by ISO adaptation manager 318. ISOAL 304 may convert upper layer isochronous data units 320 into lower layer isochronous data packets (and vice versa). ISOAL 304 may provide segmentation, segmentation, reassembly, and reassembly services for converting SDUs 322 from upper layers into protocol data units 324, 326 of baseband resource manager 308, and vice versa. ISOAL 304 may accept or generate SDUs 322 at a rate supported by the controller, each SDU 322 having a length up to a maximum length (i.e., MAX_SDU). SDUs 322 may be transmitted to and from upper layer 302 using HCI ISO data packets or by implementing specific transports.

[0056] The segmentation process may divide the SDU into one or more fragments, which are carried by one or more unframed PDUs 318 in the CIS of the CIG. The fragments may include isochronous data. An SDU 322 with a length less than or equal to Max_PDU may be sent in a single unframed PDU 318. An SDU 322 with a length greater than Max_PDU may be sent in multiple fragments in multiple unframed PDUs 318. The segmentation process may use the minimum number of unframed PDUs 318 to send the SDU 322. The reassembly process may generate the SDU 322 from one or more fragments received from the unframed PDU 324. The segmentation process may divide the SDU 322 into one or more segments, which are carried by one or more framed PDUs 326 in the CIS of the CIG. The segment may contain a segment header and may include Time_Offset and isochronous data. The reassembly process may combine data from one or more segments received in the framed PDU 326 and may generate one or more SDUs 322.

[0057] Each CIS can be part of a CIG. A CIG can have one or more CISs. Multiple CISs in a CIG can have a common timing reference based on the master timing and be synchronized in time. The common timing reference of multiple CISs can help devices synchronize their input or output data (i.e., audio data). For example, when it is necessary to simultaneously render the left and right channels of an audio stereo stream received by separate devices, multiple CISs in a CIG can be scheduled sequentially or in an interleaved arrangement. Therefore, multiple CISs can be scheduled across multiple BLE connections (e.g., wireless connections 104a-104d) to simultaneously output audio data to multiple connected audio output devices (e.g., connected audio output devices 106a-106d).

[0058] A CIG may include two or more CISs having the same ISO_Interval and expected to have a time relationship at the application layer, or include a single CIS. A CIG begins to exist when its first CIS is created, and ceases to exist when all of its constituent CISs have been terminated. A host of a master device (e.g., host device 102) may assign an identifier (e.g., CIS_ID) to each CIG. For example, a host device 102 linked to a connected audio output device 106a via a wireless connection 104a may represent the connected audio output device 106a with an identifier CIS0, a host device 102 linked to a connected audio output device 106b via a wireless connection 104b may represent the connected audio output device 106b with an identifier CIS1, a host device 102 linked to a connected audio output device 106c via a wireless connection 104c may represent the connected audio output device 106c with an identifier CIS2, and a host device 102 linked to a connected audio output device 106d via a wireless connection 104d may represent the connected audio output device 106d with an identifier CIS3.

[0059] The CIS_ID may be sent to the master of a slave device (e.g., connected audio output devices 106a-106) via both link layers as part of creating each CIS in a CIG, but is not used by the link layers. All CISs in a CIG may have the same master device, but may have different slave devices. All CISs in a CIG may have different CIS_IDs, but if a CIS is terminated or considered lost, another CIS with the same CIS_ID may be created in the same CIG.

[0060] Various embodiments may configure the CIS defined by the software architecture 300 to include current compensation delays in one or more CIS channels within the ISOAL 304. Each wireless connection 104a-104d may be a BLE connection that includes a CIS of a CIG. The host device 102 may configure the CIS or introduce delays within a CIS channel corresponding to a connected audio output device 106 to ensure that all connected audio output devices 106a-106d having a CIS within the same CIG output audio synchronously.

[0061] In some embodiments, host device 102 may configure the CIS to implement a delay before audio data is transmitted by host device 102 to connected audio output device 106, so that connected audio output device 106 may receive the audio data at the delayed time and then decode the audio data. For example, host device 102 may configure the CIS to include a current compensation delay before a CIS data packet (i.e., audio data).

[0062] In some embodiments, the host device 102 may configure the CIS to implement a delay or delay message or instruction after the connected audio output device 106 receives and decodes a CIS data packet (i.e., audio data) so that the connected audio output device 106 may decode the audio data and wait for a time interval equal to the delay or defined by the delay message before outputting an audio signal based on the decoded audio data.

[0063] Figure 4 is a component block diagram illustrating an example system 400 configured for synchronized BLE audio according to some embodiments. Figure 1-Figure 4 , the system 400 may include one or more computing devices 402 (e.g., host devices 102, 200; connected audio output devices 106a-106d) and external resources 418, which may communicate via a wireless communication network 424. The external resources 418 may include information sources external to the system 400, external entities participating in the system 400, or other resources. In some implementations, some or all of the functionality attributed herein to the external resources 418 may be provided by resources included in the system 400. The system 400 may include multiple hardware, software, and / or firmware components that operate together to provide the functionality attributed herein to the processor 422.

[0064] The computing device 402 may include an electronic memory 420 that may be configured to store information related to the functions implemented by the transmit-receive module 430, the codec encode / decode delay module 432, the encode-decode delay module 434, the current compensation delay module 436, the wireless communication settings module 438, the CIS / CIG configuration module 440, the audio codec module 442, the codec encode / decode module 444, and any other instruction modules.

[0065] Electronic storage 420 may include non-transitory storage media that electronically stores information. Electronic storage 420 may include one or both of a system storage device that is provided integrally with system 400 (i.e., substantially non-removable) and / or a removable storage device that is removably connectable to system 400 via, for example, a port (e.g., a universal serial bus (USB) port, a FireWire port, etc.) or a drive (e.g., a disk drive, etc.).

[0066] In various embodiments, electronic storage 420 may include one or more of charge-based storage media (e.g., EEPROM, RAM, etc.), solid-state storage media (e.g., flash drives, etc.), optically readable storage media (e.g., optical disks, etc.), magnetically readable storage media (e.g., magnetic tape, magnetic hard drives, floppy drives, etc.), and / or other electronically readable storage media. Electronic storage 420 may include one or more virtual storage resources (e.g., cloud storage, virtual private networks, and / or other virtual storage resources). Electronic storage 420 may store software algorithms, information determined by processor 422, and / or other information that enables system 400 to function as described herein.

[0067] The computing device 402 may be configured by machine-readable instructions 406. The machine-readable instructions 406 may include one or more instruction modules. The instruction modules may include computer program modules. The instruction modules may include one or more of a send-receive module 430, a codec encoding / decoding delay module 432, a codec-decoding delay module 434, a current compensation delay module 436, a wireless communication setting module 438, a CIS / CIG configuration module 440, an audio codec module 442, a codec encoding / decoding module 444, and other instruction modules (not shown). The computing device 402 may include a processor 422 configured to implement the machine-readable instructions 406 and corresponding modules.

[0068] Processor 422 may include one or more local processors that may be configured to provide information processing capabilities in system 400. As such, processor 422 may include one or more of a digital processor, an analog processor, a digital circuit designed to process information, an analog circuit designed to process information, a state machine, and / or other mechanisms for electronically processing information. Figure 4 422 is shown as a single entity, but this is for illustrative purposes only. In some embodiments, processor 422 may include multiple processing units. These processing units may be physically located within the same device, or processor 422 may represent processing functions of multiple devices distributed in system 400.

[0069] In some embodiments, the processor 422 executing the send-receive module 430 may be configured to transmit and receive information with the external resource 418 via the wireless communication network 424. In some embodiments, the processor 422 executing the send-receive module 430 may be configured to send audio data to the first connected audio output device and the second connected audio output device via the first BLE connection and the second BLE connection. In some embodiments, the processor 422 executing the send-receive module 430 may be configured to send a first codec decoding delay request message to the first connected audio output device. In some embodiments, the processor 422 executing the send-receive module 430 may be configured to receive a first codec decoding delay response message from the first connected audio output device. In some embodiments, the processor 422 executing the send-receive module 430 may be configured to send a second codec decoding delay request message to the second connected audio output device. In some embodiments, the processor 422 executing the send-receive module 430 may be configured to receive a second codec decoding response message from the second connected audio output device.

[0070] In some embodiments, the processor 422 executing the codec encode / decode delay module 432 may be configured to determine a first codec decode delay for a first connected audio output device communicatively coupled to the host device via a first BLE connection. In some embodiments, the processor 422 executing the codec encode / decode delay module 432 may be configured to determine a second codec decode delay for a second connected audio output device communicatively coupled to the host device via a second BLE connection. In some embodiments, the processor 422 executing the codec encode / decode delay module 432 may be configured to determine whether the first codec decode delay is received from the first connected audio output device.

[0071] In some embodiments, the processor 422 executing the encoding-decoding delay module 434 can be configured to determine the first encoding-decoding delay based on the first codec decoding delay and the first codec encoding delay of the host device for the first BLE connection. In some embodiments, the processor 422 executing the encoding-decoding delay module 434 can be configured to determine the second encoding-decoding delay based on the second codec decoding delay and the second codec encoding delay of the host device for the second BLE connection.

[0072] In some embodiments, the processor 422 executing the current compensation delay module 436 can be configured to determine the current compensation delay as a time difference between the first encoding-decoding delay and the second encoding-decoding delay. In some embodiments, the processor 422 executing the current compensation delay module 436 can be configured to configure one of the first BLE connection or the second BLE connection to include the current compensation delay.

[0073] In some embodiments, processor 422 executing wireless communication setup module 438 may be configured to establish a wireless connection between the host device and a plurality of connected audio output devices.

[0074] In some embodiments, the processor 422 executing the CIS / CIG configuration module 440 may be configured to configure one of the first BLE connection or the second BLE connection to include the current compensation delay. In some embodiments, the processor 422 executing the CIS / CIG configuration module 440 may be configured to send audio data to the first connected audio output device and the second connected audio output device via the first BLE connection and the second BLE connection. In some embodiments, the processor 422 executing the CIS / CIG configuration module 440 may be configured to configure one of the first BLE connection or the second BLE connection to include the current compensation delay.

[0075] In some embodiments, the processor 422 executing the audio codec module 442 may be configured to determine a codec encoding delay and a default codec decoding delay based on a codec type of a connected audio output device.

[0076] In some embodiments, the processor 422 executing the codec encoding / decoding module 444 may be configured to encode and decode audio data using a codec.

[0077] Processor 422 may execute modules 430 - 444 and / or other modules via software, hardware, firmware, some combination of software, hardware, and / or firmware, and / or other mechanisms for configuring processing capabilities on processor 422 .

[0078] The description of the functionality provided by the different modules 430-444 is for illustrative purposes and is not intended to be limiting, as any of the modules 430-444 may provide more or less functionality than described. For example, one or more of the modules 430-444 may be eliminated, and some or all of their functionality may be provided by other modules in the modules 430-444. As another example, the processor 422 may execute one or more additional modules that may perform some or all of the functionality attributed below to one of the modules 430-444.

[0079] Figure 5A is a block diagram illustrating example end-to-end delays of a conventional 3D spatial audio system including devices with different audio codes. Figure 5B is a block diagram illustrating example end-to-end delays of an asymmetric hybrid 3D spatial audio system including devices with different audio codes according to some embodiments. Figures 1 to 5B , Figure 5A 1 illustrates the timing issues that arise when attempting to implement multiple devices with different codecs in a single 3D spatial audio system, where the ISOAL 304 of the host device 102 defines CISs within the same CIG, each corresponding to a separate connected audio output device. Figure 5B A current compensation delay determined or calculated by the host device 102 is shown for synchronizing the audio output of multiple devices with different codecs in a single 3D spatial audio system, where the ISOAL of the host device 102 defines CISs within the same CIG, each corresponding to a separate connected audio output device.

[0080] Figure 5A and Figure 5B A diagram is shown including a schematic process corresponding to stages of a timing diagram, including stages involving: (i) a host device (e.g., host device 102) encoding audio data, (ii) the host device sending audio data to a connected audio output device (e.g., connected audio output device 106a-106d), (iii) the connected audio output device decoding the audio data, and (iv) a current compensation delay introduced at the ISOAL level (e.g., added to a CIS channel, the CIS being configured to implement the delay). The connected audio output devices 106a-106d are illustrated as having a corresponding timing diagram, wherein each connected audio output device 106a-106d outputs an analog audio signal based on the decoded audio data at the end of the "connected audio output device decoding audio data" stage.

[0081] The accompanying drawings illustrate a situation where the host device 102 has enumerated a single CIG including a CIS (e.g., CIS0, CIS1, CIS2, CIS3) for each BLE connection (e.g., wireless connection 104a-104d) to each connected audio output device 106a-106d, respectively. The accompanying drawings also illustrate a situation where the transmission time of the encoded audio data from the host device 102 to each connected audio output device 106a-106d is equal. The various codec encoding and decoding delay times are merely illustrative and do not represent any actual delay times that may be standardized by codec type or proprietary codec implementation. In addition, four connected audio output devices 106a-106d are shown as communicating with the host device 102 and having CIS within the same CIG. However, fewer or more connected audio output devices may be implemented within an asymmetric hybrid 3D spatial audio system (e.g., communication system 100).

[0082] refer to Figure 5A , the host device 102 is unaware of the codec decoding delay time of each CIS corresponding to each connected audio output device 106a-106d. Thus, although the host device 102 may initiate encoding of audio data at the same time (i.e., at the beginning of the ISO interval), the audio output resulting from each connected audio output device implementing a different codec will be out of sync. This is due to variations in codec encoding delays between the various codec types implemented by the connected audio output devices 106a-106d, but also due to variations in codec decoding delays. For example, host device 102 may have created the following CISs for a single CIG: (i) CIS0, corresponding to a connected audio output device 106a, having a preferred ACC codec with a codec encoding delay of 30 ms and a codec decoding delay of 300 ms; (ii) CIS1, corresponding to a connected audio output device 106b, having a preferred codec LC3 with a codec encoding delay of 20 ms and a codec decoding delay of 100 ms; (iii) CIS2, corresponding to a connected audio output device 106c, having a preferred LDAC codec with a codec encoding delay of 20 ms and a codec decoding delay of 200 ms; and (iv) CIS3, corresponding to a connected audio output device 106d, having a preferred aptX HD codec with a codec encoding delay of 40 ms and a codec decoding delay of 250 ms.

[0083] Because the codec encoding and decoding delay times differ between the connected audio output devices 106a-106d, the audio output by each connected audio output device 106a-106d will be offset by the difference in the total encoding-decoding delay time. For example, the encoding-decoding delay time of the connected audio output device 106a implementing ACC is 330ms (30ms+300ms), the encoding-decoding delay time of the connected audio output device 106b implementing LC3 is 120ms (20ms+100ms), the encoding-decoding delay time of the connected audio output device 106c implementing LDAC is 220ms (20ms+200ms), and the encoding-decoding delay time of the connected audio output device 106d implementing aptX HD is 290ms (40ms+250ms). Using the encoding-decoding delay time of connected audio output device 106a as a reference point, connected audio output device 106b will output an audio signal 210ms before connected audio output device 106a, connected audio output device 106c will output an audio signal 110ms before connected audio output device 106a, and connected audio output device 106d will output an analog signal 40ms before connected audio output device 106d.

[0084] For this reason, conventional 3D spatial audio systems (such as Figure 5A ) must utilize audio output devices with the same audio settings, wireless settings, and BLE codec to avoid synchronization issues.

[0085] Figure 5BIt is shown that the host device 102 according to various embodiments has received, obtained, measured or determined the codec decoding delay and codec encoding delay of each connected audio output device 106a-106d. For example, the host device 102 may receive the codec decoding delay value from each connected audio output device 106a-106d as a part of the response message for respectively initializing the wireless connection 104a-104d and enumerating CIS0-CIS3. In some embodiments, after establishing the wireless connection 104, the host device may send a request message to the connected audio output device 106, requesting a response message including the codec decoding delay value. In some embodiments, if the connected audio output device 106 does not know its codec decoding delay or cannot provide the codec decoding delay value to the host device 102, the host device 102 can utilize the default decoding delay value according to the codec type of the connected audio output device 106, thereby determining the estimated codec-decoding delay close to the actual codec-decoding delay. The host device 102 can obtain, measure or determine each codec encoding delay time based on the codec used to establish each wireless connection 104a-104d. For example, the host device 102 can query the connected audio output device 106 for the codec type, and can determine (e.g., in a lookup table of standardized codecs) the codec encoding delay corresponding to the codec type preferred by the connected audio output device 106.

[0086] After obtaining the codec encoding delay and codec decoding delay corresponding to the codec type for each connected audio output device 106a-106d, the host device 102 can calculate or determine the encoding-decoding delay on each wireless connection 104a-104d based on the codec encoding delay and the codec decoding delay. Figure 5A In the aforementioned example described, the host device 102 can calculate or determine that the encoding-decoding delay time of the connected audio output device 106a implementing ACC is 330ms (30ms+300ms), the encoding-decoding delay time of the connected audio output device 106b implementing LC3 is 120ms (20ms+100ms), the encoding-decoding delay time of the connected audio output device 106c implementing LDAC is 220ms (20ms+200ms), and the encoding-decoding delay time of the connected audio output device 106d implementing aptX HD is 290ms (40ms+250ms).

[0087] The host device may determine which codec delay among the connected audio output devices 106a-106 has the largest codec delay, and calibrate the CIS channels of the connected audio output devices 106 with a faster codec delay to synchronize the audio output of all connected audio output devices. For example, the host device 102 may determine that the longest or maximum codec delay of CIS0 corresponding to the connected audio output device 106 is 330ms. The host device 102 may then determine a current compensation delay for each CIS channel that is faster or shorter than the maximum codec delay, wherein the current compensation delay may be calculated as the difference between the codec delay of the CIS and the determined maximum codec delay.

[0088] In some embodiments, if the encoding-decoding delay of a CIS channel is equal to the maximum encoding-decoding delay, the current compensation delay of the channel is equal to zero, and no delay is introduced into the CIS and / or the CIS is not reconfigured to achieve delay. For example, the host device 102 may calculate or determine that the current compensation delay (PCD0) of the connected audio output device 106a is 0ms (330ms-330ms), the current compensation delay (PCD1) of the connected audio output device 106b is 210ms (330ms-120ms), the current compensation delay (PCD2) of the connected audio output device 106c is 110ms (330ms-220ms), and the current compensation delay (PCD3) of the connected audio output device 106d is 40ms (330ms-290ms).

[0089] After determining the current compensation delay of each CIS, the host device 102 can insert the current compensation delay into each CIS or configure each CIS to include the corresponding current compensation delay. For example, no current compensation delay is introduced into CIS0 as a limiting stream with maximum encoding-decoding delay. The host device 102 can configure CIS1 to include a current compensation delay of 210ms, CIS2 to include a current compensation delay of 110ms, and CIS3 to include a current compensation delay of 40ms. Thus, with the addition of the current compensation delay, the connected audio output devices 106a-106d CIS can be calibrated to a uniform 330ms, and the connected audio output devices 106a-106d can output audio signals in a synchronized manner after each device completes decoding of the encoded audio data received from the host device 102 on each CIS.

[0090] As shown, the CIS may be configured to include a current compensation delay that is initiated after the host device 102 transmits audio data to each connected audio output device 106a-106d, such that each connected audio output device 106 configured with the current compensation delay begins decoding the encoded audio data after a duration equal to the corresponding current compensation delay time. In some embodiments, the host device 102 may configure the CIS to include or insert the current compensation delay between the encoding phase and the transmission phase, such that the host device 102 encodes the audio data according to each codec, waits for a duration equal to the corresponding current compensation delay of each CI, and then transmits the encoded audio data to the connected audio output devices 106a-106d.

[0091] In some embodiments, the connected audio output device 106 may not know its codec decoding delay or may not be able to provide the codec decoding delay to the host device 102. The host device 102 may then utilize a default decoding delay value based on the codec type of the connected audio output device 106 (e.g., from a lookup table of standardized codecs) to determine an estimated encoding-decoding delay that is equal to or close to the actual encoding-decoding delay.

[0092] Fig. 6A is a process flow diagram of an example method 600a for synchronizing BLE audio that may be performed by a processor of a host device in accordance with various embodiments. Figure 6B and Figure 6C is a process flow diagram of example operations 600b and 600c that may be performed as part of the method 600a for synchronizing BLE audio as described, according to some embodiments. Figure 1-6C , the method 600a and operations 600b and 600c may be performed by a processor (e.g., 210, 212, 214, 216, 218, 252, 260, 422) of a host device (e.g., 102, 200, 402). In some embodiments, the processor (e.g., 210, 212, 214, 216, 218, 252, 260, 422) may be configured to perform operations via processor-executable instructions stored in a non-transitory processor-readable medium (e.g., 220, 258, 420). The apparatus for performing the operations of the method 600a and each of the operations 600b and 600c may be a processor of the system 100, 200, 400, such as reference 102, 200, 400, etc. Figure 1-Figure 5B Processors 210, 212, 214, 216, 218, 252, 260, 422, etc. are described.

[0093] In block 602, a processor of a host device (e.g., 102) may perform operations including determining a first codec decoding delay of a first connected audio output device (e.g., 106a-106d) communicatively coupled to the host device via a first BLE connection (e.g., wireless connections 104a-104d). In some embodiments, the host device may determine the first codec decoding delay of the first connected audio output device by analyzing a first connection response message (e.g., a wireless connection establishment message, a handshake message) received from the first connected audio output device when the first BLE connection is established. In some embodiments, the first BLE connection may include a first CIS of the CIG. For example, the host device 102 may receive a codec decoding delay value as part of a response message from each connected audio output device 106a-106d for respectively initializing the wireless connections 104a-104d and enumerating the CIS. In some embodiments, after establishing the wireless connection 104, the host device may send a request message to the connected audio output device 106 for requesting a response message including a codec decoding delay value. In some embodiments, if the connected audio output device 106 does not know its codec decoding delay or cannot provide the codec decoding delay value to the host device 102, the host device 102 can use a default decoding delay value according to the codec type of the connected audio output device 106 to determine an estimated codec-decoding delay that is close to the actual codec-decoding delay. The host device 102 can obtain, measure, or determine each codec encoding delay time based on the codec used to establish each wireless connection. For example, the host device 102 can query the connected audio output device 106 for the codec type, and can determine (e.g., in a lookup table of standardized codecs) the codec encoding delay corresponding to the codec type preferred by the connected audio output device 106. The device for performing the operation of box 602 can include a processor (e.g., 210, 212, 214, 216, 218, 252, 260, 422) of the host device (e.g., 102, 200, 402) that executes the codec encoding / decoding delay module 432.

[0094] In block 604, a processor of a host device (e.g., 102) may perform operations including determining a second codec decoding delay of a second connected audio output device (e.g., 106a-106d) communicatively coupled to the host device via a second BLE connection (e.g., wireless connections 104a-104d). In block 604, the host device may determine the second codec decoding delay of the second connected audio output device using the same operations and alternatives as those described in block 602. In some embodiments, the operations in blocks 602 and 604 may be performed in the same operation, such as by obtaining all codec decoding delays of all connected audio output devices when establishing a communication link with the device. An apparatus for performing the operations of block 604 may include a processor (e.g., 210, 212, 214, 216, 218, 252, 260, 422) of a host device (e.g., 102, 200, 402) executing a codec encoding / decoding delay module 432.

[0095] In block 606, a processor of a host device (e.g., 102) may perform operations including determining a first codec-decoding delay based on a first codec-decoding delay and a first codec-encoding delay of the host device for a first BLE connection (e.g., wireless connection 104a-104d). In some embodiments, the first codec-decoding delay may be a time value equal to the sum of the first codec-encoding delay and the first codec-decoding delay. An apparatus for performing the operations of block 606 may include a processor (e.g., 210, 212, 214, 216, 218, 252, 260, 422) of a host device (e.g., 102, 200, 402) executing a codec-decoding delay module 434.

[0096] In block 608, a processor of a host device (e.g., 102) may perform operations including determining a second encoding-decoding delay based on a second codec decoding delay and a second codec encoding delay of the host device for a second BLE connection (e.g., wireless connection 104a-104d). In some embodiments, the second encoding-decoding delay may be a time value equal to the sum of the second codec encoding delay and the second codec decoding delay. An apparatus for performing the operations of block 608 may include a processor (e.g., 210, 212, 214, 216, 218, 252, 260, 422) of a host device (e.g., 102, 200, 402) executing the encoding-decoding delay module 434.

[0097] In block 610, a processor of a host device (e.g., 102) may perform operations including determining a current compensation delay as a time difference between a first encoding-decoding delay and a second encoding-decoding delay. The current compensation delay may be a time value that may be implemented by a CIS to delay an audio transmission, reception, encoding, and / or decoding process so that the audio output is synchronized with another CIS channel. An apparatus for performing the operations of block 610 may include a processor (e.g., 210, 212, 214, 216, 218, 252, 260, 422) of a host device (e.g., 102, 200, 402) executing a current compensation delay module 436.

[0098] In box 612, a processor of a host device (e.g., 102) may perform operations including configuring one of a first BLE connection or a second BLE connection to include a current compensation delay. In some embodiments, configuring one of the first BLE connection or the second BLE connection to include a current compensation delay may include configuring one of the first BLE connection or the second BLE connection to include the current compensation delay in the ISOAL of the host device. For example, the host device may configure a CIS with a faster encoding-decoding delay compared to a CIS with a slower encoding-decoding delay to implement the current compensation delay so that multiple audio outputs of multiple CISs are aligned. An apparatus for performing the operations of box 612 may include a processor (e.g., 210, 212, 214, 216, 218, 252, 260, 422) of a host device (e.g., 102, 200, 402) that executes a current compensation delay module 436 and a CIS / CIG configuration module 440.

[0099] In box 614, the processor of the host device (e.g., 102) can perform operations including the following: sending audio data to the first connected audio output device and the second connected audio output device via the first BLE connection and the second BLE connection, wherein each BLE connection includes its assigned compensation delay. As a result of configuring one of the first BLE connection or the second BLE connection with the current compensation delay, the first connected audio output device and the second connected audio output device can output an audio signal based on the audio data in a synchronized manner. The device for performing the operation of box 614 may include a processor (e.g., 210, 212, 214, 216, 218, 252, 260, 422) of the host device (e.g., 102, 200, 402) that executes the current compensation delay module 436 and the send / receive module 430 and the CIS / CIG configuration module.

[0100] Figure 6B Operations 600b are shown that may be performed as part of a method 600a for synchronizing BLE audio in accordance with some embodiments. Figure 1-6B , the processor of the host device (e.g., 102, 200, 402) may perform operations including: in block 616, sending a first codec decoding delay request message to the first connected audio output device. The means for performing the operations of block 616 may include a processor (e.g., 210, 212, 214, 216, 218, 252, 260, 422) of the host device (e.g., 102, 200, 402) executing the sending / receiving module 430.

[0101] In block 618, a processor of a host device (e.g., 102) may perform operations including receiving a first codec decoding delay response message from a first connected audio output device (e.g., 106a-106d). In some embodiments, the host device may determine a first codec decoding delay of the first connected audio output device by analyzing the first codec decoding delay response message. Means for performing the operations of block 618 may include a processor (e.g., 210, 212, 214, 216, 218, 252, 260, 422) of a host device (e.g., 102, 200, 402) executing a send / receive module 430.

[0102] In block 620, a processor of the host device (e.g., 102, 200, 402) may perform operations including sending a second codec decoding delay request message to a second connected audio output device. Means for performing the operations of block 620 may include a processor (e.g., 210, 212, 214, 216, 218, 252, 260, 422) of the host device (e.g., 102, 200, 402) executing the send / receive module 430.

[0103] In block 622, a processor of a host device (e.g., 102) may perform operations including receiving a second codec decoding delay response message from a second connected audio output device (e.g., 106a-106d). In some embodiments, the host device may determine a second codec decoding delay of the second connected audio output device by analyzing the second codec decoding delay response message. Means for performing the operations of block 622 may include a processor (e.g., 210, 212, 214, 216, 218, 252, 260, 422) of a host device (e.g., 102, 200, 402) executing the present send / receive module 430.

[0104] Following the operations in block 622, the processor may perform the operations in block 602 of method 600a as described.

[0105] Figure 6COperations 600c are shown that may be performed as part of method 600a for synchronizing BLE audio in accordance with some embodiments. Figure 1-6C , the processor of the host device (e.g., 102, 200, 402) may perform operations including the following: In block 624, determine whether a first codec decoding delay is received from the first connected audio output device. In some embodiments, determining the first codec decoding delay of the first connected audio output device may include: in response to determining that the first codec decoding delay is not received from the first connected audio output device, determining a first default codec decoding delay based on the first codec type of the first BLE connection. In some embodiments, the processor of the host device may determine the default codec decoding delay for each connected audio output device by looking up the corresponding device-specific codec decoding delay in a data table stored in a memory of the host device using the brand, model, or other identifier of each device. In some embodiments, such a data table of device-specific codec decoding delays may be provided to the host device during manufacturing, via an over-the-air update, via downloading a table from a remote server, or as part of a product connection process, wherein the data table is stored in a non-volatile memory. In some embodiments, the host device may access an external database (such as a remote server) via a network (e.g., the Internet) and download an appropriate default device-specific codec decoding delay, such as by sending brand, model, or other device information to the remote server and receiving default information in a response. Other methods of determining an appropriate default device-specific codec decoding delay may be implemented in block 624. Means for performing the operations of block 624 may include a processor (e.g., 210, 212, 214, 216, 218, 252, 260, 422) of a host device (e.g., 102, 200, 402) executing the codec encode / decode delay module 432 and the audio codec module 442.

[0106] In block 626, a processor of a host device (e.g., 102) may perform operations including determining whether a second codec decoding delay is received from a second connected audio output device. In some embodiments, determining the second codec decoding delay for the second connected audio output device may include: in response to determining that the second codec decoding delay is not received from the second connected audio output device, determining a second default codec decoding delay based on a second codec type of the second BLE connection. The processor of the host device may determine an appropriate default device-specific codec decoding delay for the second connected audio output device using the same alternative method described in block 624 for the first connected audio output device. The means for performing the operations of block 626 may include a processor (e.g., 210, 212, 214, 216, 218, 252, 260, 422) of a host device (e.g., 102, 200, 402) executing the codec encoding / decoding delay module 432 and the audio codec module 442.

[0107] Following the operations in block 622 , the processor may perform the operations in block 602 of method 600 as described.

[0108] Various embodiments (including but not limited to the above reference Figure 1-6C The described embodiments) can be implemented in a variety of computing systems, including laptop computer 700, an example of which is shown in FIG. Figure 7 Reference Figure 1-Figure 7 , the laptop computer may include a touchpad touch surface 717 that serves as a pointing device for the computer and can therefore receive drag, scroll, and flick gestures similar to those implemented on computing devices equipped with a touch screen display and as described above. The laptop computer 700 will typically include a processor 702 coupled to a volatile memory 712 and a disk drive 713 of large capacity non-volatile memory such as flash memory. In addition, the computer 700 may have one or more antennas 708 for sending and receiving electromagnetic radiation, which may be connected to a wireless data link and / or a cellular telephone transceiver 716 coupled to the processor 702. The computer 700 may also include a floppy disk drive 714 and a compact disc (CD) drive 715 coupled to the processor 702. The laptop computer 700 may include a touchpad 717, a keyboard 718, and a display 719 all coupled to the processor 702. Other configurations of computing devices may include a computer mouse or trackball coupled to the processor as is known (e.g., via a USB input), which may also be used in conjunction with various embodiments.

[0109] Figure 88 is a component block diagram of a network computing device 800 suitable for various embodiments. Such a network computing device may include at least Figure 8 Components shown in . Reference Figure 1-Figure 8 , the network computing device 800 may include a processor 801 coupled to a volatile memory 802 and a large capacity non-volatile memory (such as a disk drive 803).

[0110] The network computing device 800 may also include a peripheral memory access device, such as a floppy disk drive, a compact disk (CD), or a digital video disk (DVD) drive 806, coupled to the processor 801. The network computing device 800 may also include a network access port 804 (or interface) coupled to the processor 801 for establishing a data connection with a network, such as the Internet and / or a local area network coupled to other system computers and servers.

[0111] Fig. 9 is a component block diagram of a computing device 900 suitable for use with various embodiments. Figure 1-Figure 9 , various embodiments may be implemented on various computing devices 900 (eg, computing devices 102, 320, 402), examples of which are described in Fig. 9 900 is shown in the form of a smart phone. The computing device 900 may include a first SoC 202 (e.g., SoC-CPU) coupled to a second SoC 204 (e.g., SoC with 5G capabilities). The first SoC 202 and the second SoC 204 may be coupled to an internal memory 916, a display 912, and a speaker 914. The first SoC 202 and the second SoC 204 may also be coupled to at least one SIM 268 and / or SIM interface, which may store information supporting a first 5G NR subscription and a second 5G NR subscription, the first 5G NR subscription and the second 5G NR subscription supporting services on a 5G non-standalone (NSA) network.

[0112] The computing device 900 may include an antenna 904 for sending and receiving electromagnetic radiation, which may be connected to a wireless transceiver 266 coupled to one or more processors in the first and / or second SoCs 202, 204. The computing device 900 may also include a menu selection button or rocker switch 920 for receiving user input.

[0113] The computing device 900 also includes a sound coding / decoding (CODEC) circuit 910 that digitizes the sound received from the microphone into a data packet suitable for wireless transmission and decodes the received sound data packet to generate an analog signal, which is provided to the speaker to generate sound. In addition, one or more of the processors in the first SoC 202 and the second SoC 204, the wireless transceiver 266, and the CODEC 910 may include a digital signal processor (DSP) circuit (not shown separately).

[0114] Various embodiments may be implemented within various computing devices, such as wearable computing devices. Fig.10 An example wearable computing device in the form of a smart watch 1000 is shown according to some embodiments. The smart watch 1000 may include a processor 1002 coupled to internal memories 1004 and 1006. The internal memories 1004, 1006 may be volatile or non-volatile memories, and may also be secure and / or encrypted memories, or unsecure and / or unencrypted memories, or any combination thereof. The processor 1002 may also be coupled to a touch screen display 1020, such as a resistive sensing touch screen, a capacitive sensing touch screen, an infrared sensing touch screen, etc. In addition, the smart watch 1000 may have one or more antennas 1008 for sending and receiving electromagnetic radiation, which may be connected to one or more wireless data links 1012, such as one or more Bluetooth transceivers, Peanut transceivers, Wi-Fi transceivers, ANT+ transceivers, etc., which may be coupled to the processor 1002. The smart watch 1000 may also include physical virtual buttons 1022 and 1010 for receiving user input and a slide sensor 1016 for receiving user input.

[0115] The touch screen display 1020 may be coupled to a touch screen interface module that is configured to receive signals from the touch screen display 1020 indicating the location on the screen where a user's fingertip or stylus is touching the surface, and output information about the coordinates of the touch event to the processor 1002. In addition, the processor 1002 may be configured with processor-executable instructions to correlate the image presented on the touch screen display 1020 with the location of the touch event received from the touch screen interface module in order to detect when the user has interacted with a graphical interface icon (e.g., a virtual button).

[0116] The processor 1002 may be any programmable microprocessor, microcomputer, or one or more multi-processor chips that can be configured by software instructions (applications) to perform various functions (including the functions of various embodiments). In some devices, multiple processors may be provided, such as one processor dedicated to wireless communication functions and one processor dedicated to running other applications. Typically, software applications may be stored in internal memory before they are accessed and loaded into the processor 1002. The processor 1002 may include internal memory sufficient to store application software instructions. In many devices, the internal memory may be volatile or non-volatile memory (such as flash memory) or a mixture of the two. For the purposes of this description, a general reference to memory refers to memory accessible by the processor 1002, including internal memory or removable memory inserted into a mobile device and memory within the processor 1002 itself.

[0117] The processors of the computer 700, the network computing device 800, the computing device 900, and the smart watch 1000 may be any programmable microprocessor, microcomputer, or multi-processor chip that can be configured by software instructions (applications) to perform various functions, including the functions of the various embodiments described below. In some mobile devices, multiple processors may be provided, such as one processor within the SoC 204 dedicated to wireless communication functions and one processor within the SoC 202 dedicated to running other applications. Software applications may be stored in the memory 220, 916 before they are accessed and loaded into the processor. The processor may include internal memory sufficient to store application software instructions.

[0118] Example 1. A method for synchronizing Bluetooth Low Energy (BLE) audio performed by a processor of a host device, comprising: determining a first codec decoding delay of a first connected audio output device communicatively coupled to the host device via a first BLE connection; determining a second codec decoding delay of a second connected audio output device communicatively coupled to the host device via a second BLE connection; determining a first encoding-decoding delay based on the first codec decoding delay and a first codec encoding delay of the host device for the first BLE connection; determining a second encoding-decoding delay based on the second codec decoding delay and a second codec encoding delay of the host device for the second BLE connection; determining a current compensation delay as a time difference between the first encoding-decoding delay and the second encoding-decoding delay; configuring one of the first BLE connection or the second BLE connection to include the current compensation delay; and sending audio data to the first connected audio output device and the second connected audio output device via the first BLE connection and the second BLE connection.

[0119] Example 2. The method of Example 1, wherein the first BLE connection comprises a first connected isochronous stream (CIS) of a connected isochronous group (CIG), and the second BLE connection comprises a second CIS of the CIG.

[0120] Example 3. A method according to any of Examples 1 or 2, wherein configuring one of the first BLE connection or the second BLE connection to include the current compensation delay comprises: configuring one of the first BLE connection or the second BLE connection to include the current compensation delay in an isochronous adaptation layer (ISOAL) of the host device.

[0121] Example 4. The method of any of Examples 1-3, wherein the first BLE connection implements a first codec type and the second BLE connection implements a second codec type different from the first codec type.

[0122] Example 5. A method according to any one of Examples 1-4, wherein: determining a first codec decoding delay of a first connected audio output device includes analyzing a first connection response message received from the first connected audio output device when a first BLE connection is established; and determining a second codec decoding delay of a second connected audio output device includes analyzing a second connection response message received from the second connected audio output device when a second BLE connection is established.

[0123] Example 6. The method according to any one of Examples 1-5, further comprising: transmitting a first codec decoding delay request message to a first connected audio output device; receiving a first codec decoding delay response message from the first connected audio output device; sending a second codec decoding delay request message to a second connected audio output device; and receiving a second codec decoding delay response message from the second connected audio output device, wherein: determining the first codec decoding delay of the first connected audio output device includes analyzing the first codec decoding delay response message, and determining the second codec decoding delay of the second connected audio output device includes analyzing the second codec decoding delay response message.

[0124] Example 7. The method according to any one of Examples 1-5, further comprising: determining whether a first codec decoding delay is received from a first connected audio output device; and determining whether a second codec decoding delay is received from a second connected audio output device, wherein: determining the first codec decoding delay of the first connected audio output device comprises: in response to determining that the first codec decoding delay is not received from the first connected audio output device, determining a first default codec decoding delay based on a first codec type of the first BLE connection; and determining the second codec decoding delay of the second connected audio output device comprises: in response to determining that the second codec decoding delay is not received from the second connected audio output device, determining a second default codec decoding delay based on a second codec type of the second BLE connection.

[0125] As used in this application, the terms "component", "module", "system", etc. are intended to include computer-related entities configured to perform specific operations or functions, such as but not limited to hardware, firmware, a combination of hardware and software, software, or software in execution. For example, a component can be but not limited to a process, a processor, an object, an executable file, an execution thread, a program, and / or a computer running on a processor. As an illustration, both applications and computing devices running on a computing device can be referred to as components. One or more components can reside in a process and / or an execution thread, and a component can be located on a processor or core and / or distributed between two or more processors or cores. In addition, these components can be executed from various non-temporary computer-readable media on which various instructions and / or data structures are stored. Components can communicate through local and / or remote processing, function or procedure calls, electronic signals, data packets, memory reads / writes, and other known network, computer, processor, and / or processing-related communication methods.

[0126] Many different cellular and mobile communication services and standards are available or expected in the future, all of which can be implemented and benefit from various embodiments. Such services and standards include, for example, the Third Generation Partnership Project (3GPP), Long Term Evolution (LTE) system, third generation wireless mobile communication technology (3G), fourth generation wireless mobile communication technology (4G), fifth generation wireless mobile communication technology (5G) and next generation 3GPP technology, Global System for Mobile Communications (GSM), Universal Mobile Telecommunications System (UMTS), 3GSM, General Packet Radio Service (GPRS), Code Division Multiple Access (CDMA) system (e.g., cdmaOne, CDMA1020TM), Enhanced Data Rates for GSM Evolution (EDGE), Advanced Mobile Phone System (AMPS), Digital AMPS (IS-136 / TDMA), Evolution Data Optimized (EV-DO), Digital Enhanced Cordless Telecommunications (DECT), Worldwide Interoperability for Microwave Access (WiMAX), Wireless Local Area Network (WLAN), Wi-Fi Protected Access I and II (WPA, WPA2) and Integrated Digital Enhanced Network (iDEN). Each of these technologies involves, for example, the transmission and reception of voice, data, signaling and / or content messages. It should be understood that any reference to terminology and / or technical details related to individual telecommunication standards or technologies is for illustrative purposes only and is not intended to limit the scope of the claims to a particular communication system or technology unless specifically recited in the claim language.

[0127] The various embodiments shown and described are provided as examples only to illustrate the various features of the claims. However, the features shown and described with respect to any given embodiment are not necessarily limited to the associated embodiment and may be used or combined with other embodiments shown and described. In addition, the claims are not intended to be limited by any one example embodiment. For example, one or more operations of a method may replace or be combined with one or more operations of a method.

[0128] The foregoing method descriptions and process flow charts are provided only as illustrative examples, and are not intended to require or imply that the operations of the various embodiments must be performed in the order presented. As will be appreciated by those skilled in the art, the order of operations in the foregoing embodiments may be performed in any order. Words such as "thereafter", "then", "next" are not intended to limit the order of operations; these words are only used to guide the reader through the description of the method. In addition, any reference to a claim element in the singular form, such as using the article "one", "an" or "the" should not be interpreted as limiting the element to the singular.

[0129] The various illustrative logical blocks, modules, circuits, and algorithmic operations described in conjunction with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or a combination of both. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and operations have been generally described above with respect to their functionality. Whether such functionality is implemented as hardware or software depends on the specific application and the design constraints imposed on the entire system. Those skilled in the art may implement the described functionality in different ways for each specific application, but such implementation decisions should not be interpreted as resulting in a departure from the scope of the claims.

[0130] The hardware for implementing the various illustrative logics, logic blocks, modules, and circuits described in conjunction with the embodiments disclosed herein may be implemented or executed with a general purpose processor, a digital signal processor (DSP), an application specific integrated circuit, a field programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. A general purpose processor may be a microprocessor, but in an alternative, the processor may be any conventional processor, controller, microcontroller, or state machine. The processor may also be implemented as a combination of computing devices, for example, a combination of a DSP and a microprocessor, a plurality of microprocessors, a combination of one or more microprocessors and a DSP core, or any other such configuration. Alternatively, some operations or methods may be performed by circuits specific to a given function.

[0131] In one or more embodiments, the functions described may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored as one or more instructions or codes on a non-transitory computer-readable medium or a non-transitory processor-readable medium. The operation of the method or algorithm disclosed herein may be embodied in a processor-executable software module, which may reside on a non-transitory computer-readable or processor-readable storage medium. A non-transitory computer-readable or processor-readable storage medium may be any storage medium that can be accessed by a computer or processor. As an example and not limitation, such non-transitory computer-readable or processor-readable media may include RAM, ROM, EEPROM, flash memory, CD-ROM or other optical disk storage, disk storage or other magnetic storage devices, or any other medium that can be used to store desired program codes in the form of instructions or data structures and can be accessed by a computer. As used herein, disks and optical disks include compact disks (CDs), laser optical disks, optical optical disks, digital versatile disks (DVDs), floppy disks, and Blu-ray disks, wherein disks typically reproduce data magnetically, and optical disks reproduce data optically with lasers. Combinations of the above items are also included within the scope of non-transitory computer-readable and processor-readable media. Additionally, the operations of a method or algorithm may reside as one or any combination or set of codes and / or instructions on a non-transitory processor-readable medium and / or computer-readable medium, which may be incorporated into a computer program product.

[0132] The foregoing description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the claims. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be applied to other embodiments without departing from the scope of the claims. Therefore, the present invention is not intended to be limited to the embodiments shown herein, but should be consistent with the widest scope consistent with the appended claims and the principles and novel features disclosed herein.

Claims

1. A computing device, comprising: Bluetooth Low Energy (BLE) transceiver; as well as a processor coupled to the BLE transceiver and configured to: determining a first codec decoding delay of a first connected audio output device communicatively coupled to the computing device via a first BLE connection; determining a second codec decoding delay of a second connected audio output device communicatively coupled to the computing device via a second BLE connection; determining a first codec-decode delay based on the first codec decoding delay and a first codec encoding delay of the computing device for the first BLE connection; determining a second codec-decode delay based on the second codec decoding delay and a second codec encoding delay of the computing device for the second BLE connection; determining a current compensation delay as a time difference between the first encoding-decoding delay and the second encoding-decoding delay; configuring one of the first BLE connection or the second BLE connection to include the current compensation delay; and Audio data is sent to the first connected audio output device and the second connected audio output device via the first BLE connection and the second BLE connection.

2. The computing device of claim 1, wherein: The first BLE connection includes a first connected isochronous stream (CIS) of a connected isochronous group (CIG), and the second BLE connection includes a second CIS of the CIG.

3. The computing device of claim 1, wherein: The processor is also configured to configure one of the first BLE connection or the second BLE connection to include the current compensation delay by configuring one of the first BLE connection or the second BLE connection to include the current compensation delay in an isochronous adaptation layer (ISOAL) of the computing device.

4. The computing device of claim 1, wherein: The first BLE connection implements a first codec type and the second BLE connection implements a second codec type different from the first codec type.

5. The computing device of claim 1, wherein: The processor is further configured to: determining the first codec decoding delay of the audio output device of the first connection by analyzing a first connection response message received from the audio output device of the first connection when establishing the first BLE connection; as well as The second codec decoding delay of the audio output device of the second connection is determined by analyzing a second connection response message received from the audio output device of the second connection when the second BLE connection is established.

6. The computing device of claim 1 , wherein the processor is further configured to: Sending a first codec decoding delay request message to the first connected audio output device; receiving a first codec decoding delay response message from the first connected audio output device; Sending a second codec decoding delay request message to the audio output device of the second connection; receiving a second codec decoding delay response message from the second connected audio output device, determining the first codec decoding delay of the first connected audio output device by analyzing the first codec decoding delay response message, and The second codec decoding delay of the second connected audio output device is determined by analyzing the second codec decoding delay response message.

7. The computing device of claim 1 , wherein the processor is further configured to: determining whether the first codec decoding delay is received from the first connected audio output device; determining whether the second codec decoding delay is received from the second connected audio output device; in response to determining that the first codec decoding delay is not received from the first connected audio output device, determining the first codec decoding delay for the first connected audio output device by determining a first default codec decoding delay based on a first codec type of the first BLE connection; as well as In response to determining that the second codec decoding delay is not received from the second connected audio output device, determining the second codec decoding delay for the second connected audio output device by determining a second default codec decoding delay based on a second codec type of the second BLE connection.

8. A method for synchronizing Bluetooth Low Energy (BLE) audio performed by a processor of a host device, comprising: determining a first codec decoding delay of a first connected audio output device communicatively coupled to the host device via a first BLE connection; determining a second codec decoding delay of a second connected audio output device communicatively coupled to the host device via a second BLE connection; determining a first codec-decode delay based on the first codec decoding delay and a first codec encoding delay of the host device for the first BLE connection; determining a second codec-decode delay based on the second codec decoding delay and a second codec encoding delay of the host device for the second BLE connection; determining a current compensation delay as a time difference between the first encoding-decoding delay and the second encoding-decoding delay; configuring one of the first BLE connection or the second BLE connection to include the current compensation delay; and Audio data is sent to the first connected audio output device and the second connected audio output device via the first BLE connection and the second BLE connection.

9. The method according to claim 8, wherein: The first BLE connection includes a first connected isochronous stream (CIS) of a connected isochronous group (CIG), and the second BLE connection includes a second CIS of the CIG.

10. The method according to claim 8, wherein: Configuring one of the first BLE connection or the second BLE connection to include the current compensation delay includes configuring one of the first BLE connection or the second BLE connection to include the current compensation delay in an isochronous adaptation layer (ISOAL) of the host device.

11. The method according to claim 8, wherein: The first BLE connection implements a first codec type and the second BLE connection implements a second codec type different from the first codec type.

12. The method according to claim 8, wherein: Determining the first codec decoding delay of the first connected audio output device includes: analyzing a first connection response message received from the first connected audio output device when establishing the first BLE connection; and Determining the second codec decoding delay of the second connected audio output device includes analyzing a second connection response message received from the second connected audio output device when establishing the second BLE connection.

13. The method according to claim 8, further comprising: Sending a first codec decoding delay request message to the first connected audio output device; receiving a first codec decoding delay response message from the first connected audio output device; Sending a second codec decoding delay request message to the audio output device of the second connection; as well as receiving a second codec decoding delay response message from the second connected audio output device, in: determining the first codec decoding delay of the first connected audio output device comprises analyzing the first codec decoding delay response message, and Determining the second codec decoding delay of the second connected audio output device includes analyzing the second codec decoding delay response message.

14. The method according to claim 8, further comprising: determining whether the first codec decoding delay is received from the first connected audio output device; as well as determining whether the second codec decoding delay is received from the second connected audio output device, in: Determining the first codec decoding delay for the first connected audio output device includes: in response to determining that the first codec decoding delay is not received from the first connected audio output device, determining a first default codec decoding delay based on a first codec type for the first BLE connection; and Determining the second codec decoding delay for the second connected audio output device includes: in response to determining that the second codec decoding delay is not received from the second connected audio output device, determining a second default codec decoding delay based on a second codec type of the second BLE connection.

15. A computing device comprising: means for determining a first codec decoding delay of a first connected audio output device communicatively coupled to the computing device via a first Bluetooth Low Energy (BLE) connection; means for determining a second codec decoding delay of an audio output device communicatively coupled to a second connection of the computing device via a second BLE connection; means for determining a first codec-decode delay based on the first codec decoding delay and a first codec encoding delay of the computing device for the first BLE connection; means for determining a second encoding-decoding delay based on the second codec decoding delay and a second codec encoding delay of the computing device for the second BLE connection; means for determining a current compensation delay as a time difference between said first encoding-decoding delay and said second encoding-decoding delay; means for configuring one of the first BLE connection or the second BLE connection to include the current compensation delay; as well as Means for sending audio data to the first connected audio output device and the second connected audio output device via the first BLE connection and the second BLE connection.

16. The computing device of claim 15, wherein: The first BLE connection includes a first connected isochronous stream (CIS) of a connected isochronous group (CIG), and the second BLE connection includes a second CIS of the CIG.

17. The computing device of claim 15, wherein: The means for configuring one of the first BLE connection or the second BLE connection to include the current compensation delay includes: means for configuring one of the first BLE connection or the second BLE connection to include the current compensation delay in an isochronous adaptation layer (ISOAL) of the computing device.

18. The computing device of claim 15, wherein: The first BLE connection implements a first codec type and the second BLE connection implements a second codec type different from the first codec type.

19. The computing device of claim 15, wherein: The means for determining the first codec decoding delay of the first connected audio output device comprises: means for analyzing a first connection response message received from the first connected audio output device when establishing the first BLE connection; and Means for determining the second codec decoding delay of the second connected audio output device include means for analyzing a second connection response message received from the second connected audio output device when establishing the second BLE connection.

20. The computing device of claim 15, further comprising: means for sending a first codec decoding delay request message to the audio output device of the first connection; means for receiving a first codec decoding delay response message from the first connected audio output device; means for sending a second codec decoding delay request message to the audio output device of the second connection; as well as means for receiving a second codec decoding delay response message from the second connected audio output device, in: means for determining said first codec decoding delay of said first connected audio output device comprises means for analyzing said first codec decoding delay response message, and The means for determining the second codec decoding delay of the second connected audio output device comprises means for analyzing the second codec decoding delay response message.

21. The computing device of claim 15, further comprising: means for determining whether a decoding delay of the first codec is received from the audio output device of the first connection; as well as means for determining whether said second codec decoding delay is received from said second connected audio output device, in: The means for determining the first codec decoding delay of the first connected audio output device comprises: means for determining a first default codec decoding delay based on a first codec type of the first BLE connection in response to determining that the first codec decoding delay is not received from the first connected audio output device; and Means for determining the second codec decoding delay for the audio output device of the second connection include means for determining a second default codec decoding delay based on a second codec type of the second BLE connection in response to determining that the second codec decoding delay is not received from the audio output device of the second connection.

22. A non-transitory processor-executable medium having stored thereon processor-executable instructions configured to cause a processor of a computing device to perform operations comprising: determining a first codec decoding delay of a first connected audio output device communicatively coupled to the computing device via a first synchronous Bluetooth Low Energy (BLE) connection; determining a second codec decoding delay of a second connected audio output device communicatively coupled to the computing device via a second BLE connection; determining a first codec-decode delay based on the first codec decoding delay and a first codec encoding delay of the computing device for the first BLE connection; determining a second codec-decode delay based on the second codec decoding delay and a second codec encoding delay of the computing device for the second BLE connection; determining a current compensation delay as a time difference between the first encoding-decoding delay and the second encoding-decoding delay; configuring one of the first BLE connection or the second BLE connection to include the current compensation delay; and Audio data is sent to the first connected audio output device and the second connected audio output device via the first BLE connection and the second BLE connection.

23. The non-transitory processor executable medium of claim 22, wherein: The first BLE connection includes a first connected isochronous stream (CIS) of a connected isochronous group (CIG), and the second BLE connection includes a second CIS of the CIG.

24. The non-transitory processor executable medium of claim 22, wherein: The stored processor-executable instructions are also configured to cause the processor of the computing device to perform operations such that configuring one of the first BLE connection or the second BLE connection to include the current compensation delay includes: configuring one of the first BLE connection or the second BLE connection to include the current compensation delay in an isochronous adaptation layer (ISOAL) of the computing device.

25. The non-transitory processor executable medium of claim 22, wherein: The stored processor-executable instructions are further configured to cause the processor of the computing device to perform operations such that the first BLE connection implements a first codec type and the second BLE connection implements a second codec type different from the first codec type.

26. The non-transitory processor executable medium of claim 22, wherein: The stored processor-executable instructions are further configured to cause the processor of the computing device to perform operations such that: Determining the first codec decoding delay of the first connected audio output device includes: analyzing a first connection response message received from the first connected audio output device when establishing the first BLE connection; and Determining the second codec decoding delay of the second connected audio output device includes analyzing a second connection response message received from the second connected audio output device when establishing the second BLE connection.

27. The non-transitory processor executable medium of claim 22, wherein: The stored processor-executable instructions are further configured to cause the processor of the computing device to perform operations further including: Sending a first codec decoding delay request message to the first connected audio output device; receiving a first codec decoding delay response message from the first connected audio output device; Sending a second codec decoding delay request message to the audio output device of the second connection; as well as receiving a second codec decoding delay response message from the second connected audio output device, The stored processor executable instructions are further configured to cause the processor of the computing device to perform operations such that: determining the first codec decoding delay of the first connected audio output device comprises analyzing the first codec decoding delay response message, and Determining the second codec decoding delay of the second connected audio output device includes analyzing the second codec decoding delay response message.

28. The non-transitory processor executable medium of claim 22, wherein: The stored processor-executable instructions are further configured to cause the processor of the computing device to perform operations further including: determining whether the first codec decoding delay is received from the first connected audio output device; as well as determining whether the second codec decoding delay is received from the second connected audio output device, The stored processor executable instructions are further configured to cause the processor of the computing device to perform operations such that: Determining the first codec decoding delay for the first connected audio output device includes: in response to determining that the first codec decoding delay is not received from the first connected audio output device, determining a first default codec decoding delay based on a first codec type for the first BLE connection; and Determining the second codec decoding delay for the second connected audio output device includes: in response to determining that the second codec decoding delay is not received from the second connected audio output device, determining a second default codec decoding delay based on a second codec type of the second BLE connection.

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