Solid-state imaging device

By designing glass members and resin members with appropriate thickness and width ratios in the solid-state imaging device, the thermal stress problem caused by the high thermal expansion coefficient of the resin is solved, and effective protection of the cover glass is achieved, and cracking or peeling is avoided.

CN119498034APending Publication Date: 2025-02-21SONY SEMICON SOLUTIONS CORP
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Patent Information

Application Number
CN202380044729.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2022-07-14
Filing Date
2023-05-22
Publication Date
2025-02-21

AI Technical Summary

Technical Problem

The thermal expansion coefficient of the resin is higher than that of the glass, resulting in thermal stress at the interface between the cover glass and the resin, which may lead to cracking or peeling of the cover glass.

Method used

A solid-state imaging device is designed in which the thickness of the glass member is more than 40% of the thickness of the resin member, and the protruding width of the glass member is 15% to 93% of the width of the resin member to reduce the curling caused by thermal stress and internal pressure changes song.

Benefits of technology

It effectively suppresses the cracking of the cover glass or the peeling of the resin, and improves the stability and reliability of the solid-state imaging device.

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Abstract

Provided is a solid-state imaging device capable of suppressing cracking or peeling of a cover glass. A solid-state imaging device according to the present invention comprises: a photoelectric conversion element having a light receiving surface; a glass member provided above the light receiving surface; and a first resin member covering a side surface of the photoelectric conversion element and a side surface of the glass member. Here, in a plan view viewed from a first direction substantially perpendicular to the light receiving surface, the area of the photoelectric conversion element is 59 mm2 or more. Further, the glass member protrudes from the photoelectric conversion element by a first width in a second direction substantially parallel to the light receiving surface, the first width being 15% to 93% of a width of the first resin member in the second direction. The thickness of the glass member is 40% or more of the thickness of the first resin member in the first direction.
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Description

Technical Field

[0001] The present invention relates to a solid-state imaging device. Background Art

[0002] Solid-state imaging devices such as CMOS (complementary metal oxide semiconductor) image sensors (CIS) may have a cover glass on the light receiving surface side of the sensor chip. The cover glass is arranged at a certain distance from the light receiving surface of the sensor chip, and a resin is provided on the side of the cover glass.

[0003] Citation List

[0004] Patent Literature

[0005] Patent Document 1: Japanese Patent Application Laid-Open No. 2009-188191 Summary of the invention

[0006] Problems to be solved by the present invention

[0007] The coefficient of thermal expansion (CTE) of resin is higher than that of glass. Therefore, thermal stress is generated at the interface between the cover glass and the resin. In addition, the internal pressure of the space between the sensor chip and the cover glass changes, so the cover glass may warp. This thermal stress or warping of the cover glass may cause the cover glass to crack or peel off.

[0008] In view of the above, the present invention provides a solid-state imaging device capable of suppressing cracking or peeling of a cover glass.

[0009] Technical solutions to the problem

[0010] A solid-state imaging device according to one aspect of the present invention includes: a photoelectric conversion element having a light receiving surface; a glass member disposed above the light receiving surface; and a first resin member covering a side surface of the photoelectric conversion element and a side surface of the glass member. Here, in a plan view observed from a first direction substantially perpendicular to the light receiving surface, the area of ​​the photoelectric conversion element is 59 mm 2 The glass member protrudes from the photoelectric conversion element along a second direction substantially parallel to the light receiving surface by a first width, the first width being 15% to 93% of the width of the first resin member in the second direction. Furthermore, the thickness of the glass member is 40% or more of the thickness of the first resin member in the first direction.

[0011] The side surface of the glass member is covered with the first resin member.

[0012] The thickness of the glass member is equal to or smaller than the thickness of the first resin member.

[0013] The solid-state imaging device further includes a second resin member provided between the glass member and the photoelectric conversion element on an outer edge of the photoelectric conversion element and forming a space between the glass member and the photoelectric conversion element.

[0014] The first resin member and the second resin member are provided over the entire outer edge of the photoelectric conversion element and seal the space.

[0015] The glass member protrudes from the photoelectric conversion element by the first width in the second direction over the entire outer edge of the photoelectric conversion element.

[0016] The thickness of the glass member in the first direction is 40% or more of the thickness of the first resin member at the entire outer edge of the photoelectric conversion element.

[0017] The solid-state imaging device further includes a wiring substrate, the photoelectric conversion element being mounted on a first surface of the wiring substrate, and the first resin member being provided on a surface of the wiring substrate so as to surround the periphery of the photoelectric conversion element.

[0018] The solid-state imaging device further includes a metal bump provided on a second surface of the wiring substrate opposite to the first surface.

[0019] The solid-state imaging device further includes a metal wire that electrically connects wiring of the wiring substrate and the photoelectric conversion element, and the metal wire is covered with the first resin member. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 is a cross-sectional view showing a configuration example of the solid-state imaging device according to the first embodiment.

[0021] Figure 2 is a schematic diagram showing a configuration example of a semiconductor chip.

[0022] Figure 3 is a block diagram showing an example of a circuit configuration of a semiconductor chip.

[0023] Figure 4 is an equivalent circuit diagram showing a configuration example of a pixel.

[0024] Figure 5 is a cross-sectional view showing a configuration example of an end portion of the solid-state imaging device according to the first embodiment.

[0025] Figure 6 is a plan view showing an arrangement example of a semiconductor chip, a mold resin, and a cover glass.

[0026] Figure 7 The diagram shows the occurrence of cracking of the cover glass or peeling of the mold resin 17 with respect to the chip size of the semiconductor chip.

[0027] Figure 8 The diagram shows how cracks occur at the end of the cover glass when the protruding width and thickness of the cover glass are changed.

[0028] Fig. 9 is a graph showing interface stress between a mold resin and a cover glass.

[0029] Fig.10 is a graph showing interface stress between a mold resin and a cover glass.

[0030] Fig.11 : is a schematic diagram showing an example of a method for manufacturing the solid-state imaging device according to the present embodiment.

[0031] Fig.12 yes Fig.11 A schematic diagram showing an example of a method for manufacturing a solid-state imaging device described below.

[0032] Fig.13 yes Fig.12 A schematic diagram showing an example of a method for manufacturing a solid-state imaging device described below.

[0033] Fig.14 yes Fig.13 A schematic diagram showing an example of a method for manufacturing a solid-state imaging device described below.

[0034] Fig.15 yes Fig.14 A schematic diagram showing an example of a method for manufacturing a solid-state imaging device described below.

[0035] Fig.16 yes Fig.15 A schematic diagram showing an example of a method for manufacturing a solid-state imaging device described below.

[0036] Fig.17 yes Fig.16 A schematic diagram showing an example of a method for manufacturing a solid-state imaging device described below.

[0037] Fig.18 yes Fig.17 A schematic diagram showing an example of a method for manufacturing a solid-state imaging device described below.

[0038] Fig.19 : is a schematic diagram showing an example of a method for manufacturing the solid-state imaging device according to the second embodiment.

[0039] Fig. 20 is a cross-sectional view showing a configuration example of a solid-state imaging device according to a second embodiment.

[0040] Fig.21 is a block diagram showing an example of a schematic configuration of a vehicle control system.

[0041] Fig. 22 1 is a diagram showing an example of the installation position of the imaging unit. DETAILED DESCRIPTION

[0042] Hereinafter, specific embodiments according to the present technology will be described in detail with reference to the accompanying drawings. The accompanying drawings are schematic or conceptual, and the proportions of the various parts, etc. are not necessarily the same as the actual situation. In this specification and the accompanying drawings, constituent elements similar to the aforementioned constituent elements appearing in the drawings already described above are represented by the same reference numerals, and their detailed descriptions are appropriately omitted.

[0043] (First embodiment)

[0044] Figure 1 1 is a cross-sectional view showing a configuration example of a solid-state imaging device 1 according to a first embodiment. The solid-state imaging device 1 includes a wiring substrate 11, a semiconductor chip 12, metal bumps 14, a color filter 15, an on-chip lens 16, a molded resin 17, a cover glass 18, and a sealing member 19. For example, the solid-state imaging device 1 is used to Figure 1 The semiconductor package of the CIS converts the incident light in the direction indicated by the arrow into an electrical signal.

[0045] The wiring substrate 11 has a multilayer wiring structure obtained by laminating an insulating layer and a wiring layer (see Figure 5 ). The semiconductor chip 12 is mounted on the first face F1 of the wiring substrate 11. On the second face F2 of the wiring substrate 11 located on the side opposite to the first face F1, a plurality of metal bumps 14 for electrical connection with an external substrate (not shown) are provided. The metal bumps 14 are connected to the above-mentioned wiring layer, and are electrically connected to the semiconductor chip 12 via the above-mentioned wiring layer or metal wires. As for the metal bumps 14, for example, a conductive material such as solder is used.

[0046] The semiconductor chip 12 as a photoelectric conversion element has a light receiving surface for receiving incident light. A red (R), green (G) or blue (B) color filter 15 and an on-chip lens 16 are provided on the light receiving surface of the semiconductor chip 12.

[0047] The cover glass 18 is disposed above the semiconductor chip 12 and protects the light receiving surface of the semiconductor chip 12. As for the cover glass 18, for example, a transparent material such as glass, silicon nitride, sapphire, or resin is used. The cover glass 18 allows incident light to pass through the light receiving surface of the semiconductor chip 12.

[0048] A sealing member 19 as a second resin member is provided between the cover glass 18 and the semiconductor chip 12 along the outer edge of the semiconductor chip 12. The sealing member 19 forms a space 20 between the cover glass 18 and the light receiving surface of the semiconductor chip 12. As for the sealing member 19, for example, a resin material such as an acrylic resin, a styrene resin, or an epoxy resin is used.

[0049] A molded resin 17 as a first resin member is provided on the side of the solid-state imaging device 1, and covers the side FS12 of the semiconductor chip 12, the side FS18 of the glass member 18, and the side FS19 of the sealing member 19. The molded resin 17 is provided on the first surface F1 of the wiring substrate 11 so as to extend over the outer edge of the wiring substrate 11. For example, a resin can be used as the molded resin 17.

[0050] The space 20 is sealed by the semiconductor chip 12 , the cover glass 18 , and the sealing member 19 .

[0051] Figure 2 1 is a schematic diagram showing a configuration example of the semiconductor chip 12. For example, the semiconductor chip 12 is a stacked chip of an upper substrate 12a and a lower substrate 12b. Figure 2 As shown in A in FIG. 1 , the upper substrate 12a is provided with a pixel region 21 in which pixels for performing photoelectric conversion are arranged two-dimensionally and a control circuit 22 for controlling the pixels, and the lower substrate 12b is provided with a logic circuit 23 such as a signal processing circuit for processing pixel signals output from the pixels. Alternatively, as Figure 2 As shown in B in FIG. 1 , only the pixel region 21 may be disposed on the upper substrate 12 a , and the control circuit 22 and the logic circuit 23 may be disposed on the lower substrate 12 b .

[0052] In this way, in the semiconductor chip 12, the logic circuit 23 or one or both of the control circuit 22 and the logic circuit 23 can be provided on the lower substrate 12b which is different from the upper substrate 12a where the pixel region 21 is provided. Therefore, compared with the case where the pixel region 21, the control circuit 22, and the logic circuit 23 are arranged on one substrate in the planar direction, the size of the solid-state imaging device 1 can be reduced.

[0053] Figure 31 is a block diagram showing an example of a circuit configuration of a semiconductor chip 12. The semiconductor chip 12 includes: a pixel region 21 in which pixels 32 are arranged in a two-dimensional array; a vertical drive circuit 34; a column signal processing circuit 35; a horizontal drive circuit 36; an output circuit 37; a control circuit 38; and input / output terminals 39, etc.

[0054] The pixel 32 includes: a photodiode as a photoelectric conversion device; and a plurality of pixel transistors. Figure 4 An example of the circuit configuration of the pixel 32 will be described.

[0055] The control circuit 38 receives an input clock and data for giving instructions for an operation mode and the like, and outputs data such as internal information of the semiconductor chip 12. That is, the control circuit 38 generates a clock signal and a control signal as a reference for the operation of the vertical drive circuit 34, the column signal processing circuit 35, the horizontal drive circuit 36, etc., based on the vertical synchronization signal, the horizontal synchronization signal, and the main clock. The control circuit 38 outputs the generated clock signal and control signal to the vertical drive circuit 34, the column signal processing circuit 35, the horizontal drive circuit 36, etc.

[0056] For example, the vertical drive circuit 34 includes a shift register, selects a predetermined pixel drive wiring 40, supplies a pulse for driving the pixel 32 to the selected pixel drive wiring 40, and drives the pixel 32 in a row unit. That is, the vertical drive circuit 34 sequentially selects and scans each pixel 32 in the pixel area 21 in a row unit in the vertical direction, and supplies a pixel signal based on a signal charge generated by the photoelectric conversion portion of each pixel 32 according to the amount of light received to the column signal processing circuit 35 via the vertical signal line 41.

[0057] The column signal processing circuit 35 is arranged corresponding to each column of the pixels 32, and performs signal processing such as noise removal for each pixel column for signals output from a row of pixels 32. For example, the column signal processing circuit 35 performs signal processing such as correlated double sampling (CDS) processing and analog-to-digital (AD) conversion processing for removing fixed pattern noise inherent to pixels.

[0058] The horizontal drive circuit 36 ​​includes, for example, a shift register, sequentially selects each of the column signal processing circuits 35 by sequentially outputting horizontal scanning pulses, and causes each of the column signal processing circuits 35 to output a pixel signal to the horizontal signal line 42 .

[0059] The output circuit 37 performs signal processing on the signals sequentially supplied from each of the column signal processing circuits 35 via the horizontal signal line 42, and outputs the signal after the signal processing. For example, there may be a case where the output circuit 37 sometimes performs only buffering, or the output circuit 37 sometimes performs black level adjustment, column difference correction, various digital signal processing, etc. The input / output terminal 39 exchanges signals with the outside.

[0060] The semiconductor chip 12 structured as described above is a CIS of what is called a column AD system in which a column signal processing circuit 35 for performing CDS processing and AD conversion processing is arranged corresponding to each pixel column.

[0061] Figure 4 : is an equivalent circuit diagram showing a configuration example of the pixel 32. The pixel 32 shows a configuration capable of realizing an electronic global shutter function.

[0062] The pixel 32 includes a photodiode 51 as a photoelectric conversion device, a first transfer transistor 52 , a memory unit (MEM) 53 , a second transfer transistor 54 , a floating diffusion region (FD) 55 , a reset transistor 56 , an amplifier transistor 57 , a selection transistor 58 , and a discharge transistor 59 .

[0063] The photodiode 51 is a photoelectric conversion unit that generates and accumulates charges (signal charges) corresponding to the amount of light received. The anode terminal of the photodiode 51 is grounded, and the cathode terminal of the photodiode 51 is connected to the storage unit 53 via the first transfer transistor 52. In addition, the cathode terminal of the photodiode 51 is also connected to the discharge transistor 59 for discharging unnecessary charges.

[0064] When the first transfer transistor 52 is in an on state by the transfer signal TRX, the first transfer transistor 52 reads the charge generated by the photodiode 51 to transfer the charge to the storage section 53. The storage section 53 is a charge holding section that temporarily holds the charge before the charge is transferred to the FD55.

[0065] When the second transfer transistor 54 is in an on state by the transfer signal TRG, the second transfer transistor 54 reads the charge held in the storage section 53 to transfer the charge to the FD 55 .

[0066] FD55 is a charge holding section that holds the charge read from the storage section 53 so as to read the charge out as a signal. When the reset transistor 56 is turned on by the reset signal RST, the reset transistor 56 resets the potential of the FD55 by discharging the charge accumulated in the FD55 to the constant voltage source VDD.

[0067] The amplifier transistor 57 outputs a pixel signal corresponding to the potential of the FD 55. That is, the amplifier transistor 57 constitutes a source follower circuit together with the load MOS 60 as a constant current source, and a pixel signal indicating a level corresponding to the charge accumulated in the FD 55 is output from the amplifier transistor 57 to the column signal processing circuit 35 ( Figure 3 ). For example, the load MOS 60 is arranged in the column signal processing circuit 35.

[0068] When the pixel 32 is selected with the selection signal SEL, the selection transistor 58 enters an on state, and outputs a pixel signal of the pixel 32 to the column signal processing circuit 35 via the vertical signal line 41 .

[0069] When the discharge transistor 59 is in an on state by the discharge signal OFG, the discharge transistor 59 discharges unnecessary charges accumulated in the photodiode 51 to the constant voltage source VDD.

[0070] Transfer signals TRX and TRG, a reset signal RST, a discharge signal OFG, and a selection signal SEL are supplied from the vertical drive circuit 34 via the pixel drive wiring 40 .

[0071] The operation of pixel 32 will now be briefly described.

[0072] First, before starting exposure, when a high-level discharge signal OFG is supplied to the discharge transistor 59 , the discharge transistor 59 enters an on state, discharges the charge accumulated in the photodiode 51 to the constant voltage source VDD, and resets the photodiodes 51 of all pixels.

[0073] After the photodiode 51 is reset, when the discharge transistor 59 is turned off by the discharge signal OFG of a low level, all pixels of the pixel region 21 start to be exposed.

[0074] When a predetermined exposure time determined in advance has elapsed, in all pixels of the pixel area 21 , the first transfer transistor 52 is in an on state by the transfer signal TRX, and the charge accumulated in the photodiode 51 is transferred to the storage section 53 .

[0075] After the first transfer transistor 52 is turned off, the charges held in the storage section 53 of each of the pixels 32 are sequentially read to the column signal processing circuit 35 in row units. In this reading operation, the second transfer transistor 54 of the pixel 32 of the read row is in an on state with the transfer signal TRG, and the charges stored in the storage section 53 are transferred to the FD 55. Then, when the selection transistor 58 is in an on state with the selection signal SEL, a signal indicating a level corresponding to the charges accumulated in the FD 55 is output from the amplification transistor 57 to the column signal processing circuit 35 via the selection transistor 58.

[0076] As described above, in pixel 32, the exposure time is set to be the same in all pixels of pixel area 21, and after the exposure is completed, the charge is temporarily retained in the storage unit 53, so that a global shutter operation (video recording) can be implemented in which the charge is read sequentially from the storage unit 53 in units of rows.

[0077] Note that the circuit configuration of the pixel 32 is not limited to Figure 4 The configuration shown may also employ a circuit configuration that does not include the storage unit 53 and can perform a so-called rolling shutter operation, for example.

[0078] In addition, the pixel 32 may have a shared pixel structure in which some pixel transistors are shared by a plurality of pixels. For example, a configuration may be adopted in which the first transfer transistor 52, the storage unit 53, and the second transfer transistor 54 are provided in units of the pixel 32, and the FD 55, the reset transistor 56, the amplification transistor 57, and the selection transistor 58 are shared by a plurality of pixels such as four pixels.

[0079] Figure 51 is a cross-sectional view showing a configuration example of the end of the solid-state imaging device 1 according to the first embodiment. The wiring substrate 11 has a multilayer wiring structure obtained by stacking an insulating layer 111 and a wiring layer 112. A solder resist 114 is provided on the first face F1 and the second face F2 of the wiring substrate 11. At the first face F1 side, the semiconductor chip 12 is bonded to the solder resist 114 using a bonding layer 115. In addition, on the first face F1, a pad 120 is provided in an area where the solder resist 114 is not provided. The pad 120 is connected to the wiring layer 112. For example, a conductive material such as copper is used for the pad 120. On the other hand, at the second face F2 side, a metal bump 14 is provided in an area where the solder resist 114 is not provided. The metal bump 14 is connected to the wiring layer 112. A through hole 113 is provided in the wiring substrate 11. The through hole 113 penetrates the insulating layer 111 of the wiring substrate 11 between the first face F1 and the second face F2. The wiring layer 112 is provided on the inner wall surface of the through hole 113, and the insulating layer 111 is buried inside the wiring layer 112. Therefore, the wiring layer 112 on the first face F1 side is electrically connected to the wiring layer 112 on the second face F2 side via the through hole 113. As for the wiring layer 112, for example, a conductive material such as copper is used.

[0080] The color filter 15 and the on-chip lens 16 are provided on the light receiving surface F12a of the semiconductor chip 12. In addition, the pad 140 is provided on the light receiving surface F12a of the semiconductor chip 12, and the metal wire 130 is connected to the pad 140. The metal wire 130 electrically connects the pad 140 and the pad 120. As for the metal wire 130, for example, a conductive material such as a gold wire is used. As for the pad 140, for example, a conductive material such as copper is used.

[0081] The sealing member 19 is disposed between the semiconductor chip 12 and the cover glass 18 along the outer edge of the semiconductor chip 12. The sealing member 19 covers and protects the joint between the pad 140 and the metal wire 130. In addition, the sealing member 19 is disposed over the entire outer edge of the semiconductor chip 12 and seals the space between the semiconductor chip 12 and the cover glass 18.

[0082] The cover glass 18 is supported by the sealing member 19 , and is fixed above the light receiving surface F12 a of the semiconductor chip 12 .

[0083] The molded resin 17 is provided along the outer edges of the semiconductor chip 12, the cover glass 18, and the wiring layer 112 so as to cover the side FS12 of the semiconductor chip 12, the side FS17 of the cover glass 18, and the side FS19 of the sealing member 19. Therefore, the molded resin 17 protects the end of the cover glass 18 and the end of the semiconductor chip 12. In addition, the molded resin 17 covers and protects the joint between the pad 120 and the metal wire 130. The molded resin 17 is provided over the entire outer edge of the semiconductor chip 12 and seals the space between the semiconductor chip 12 and the cover glass 18.

[0084] Here, the end of the cover glass 18 protrudes in the X direction and / or the Y direction substantially parallel to the light receiving surface F12a of the semiconductor chip 12. The protruding width W18 of the cover glass 18 is 15% to 93% of the width W17 of the molded resin 17 in the X or Y direction. The protruding width W18 of the cover glass 18 is the distance from the side surface FS12 of the semiconductor chip 12 (that is, the interface between the side surface FS12 of the semiconductor chip 12 and the molded resin 17) to the side surface FS18 of the cover glass 18 in the X or Y direction. The width W17 of the molded resin 17 is the distance from the side surface FS12 of the semiconductor chip 12 (that is, the interface between the side surface FS12 of the semiconductor chip 12 and the molded resin 17) to the side surface FS17 of the molded resin 17 in the X or Y direction.

[0085] In addition, the thickness T18 of the cover glass 18 is not less than 40% of the thickness T17 of the molded resin 17 in the Z direction. In addition, the thickness T18 of the cover glass 18 is equal to or less than the thickness T17 of the molded resin 17 in the Z direction. The thickness T18 of the cover glass 18 is the distance from the bottom surface of the cover glass 18 (that is, the interface between the bottom surface of the cover glass 18 and the space 20, the sealing member 19, or the molded resin 17) to the upper surface of the cover glass 18 in the Z direction. The thickness T17 of the molded resin 17 is the distance from the bottom surface of the molded resin 17 (that is, the interface between the bottom surface of the molded resin 17 and the first surface F1 of the wiring substrate 11) to the upper surface of the molded resin 17 in the Z direction. Note that reference will be made later to Figure 7 The protruding width W18 and thickness T18 of the cover glass 18 will be described.

[0086] Figure 61 is a plan view showing an example of the arrangement of the semiconductor chip 12, the molded resin 17, and the cover glass 18. In the present embodiment, the cover glass 18 protrudes along the X direction and the Y direction substantially parallel to the light receiving surface F12a of the semiconductor chip 12 over the entire outer edge of the light receiving surface F12a. However, as described above, the protruding width W18 is 15% to 93% of the width W17 of the molded resin 17 in the X or Y direction. Therefore, the molded resin 17 is arranged over the entire outer edge of the cover glass 18 and the semiconductor chip 12 in a manner surrounding the periphery of the semiconductor chip 12. In addition, the sealing member 19 is arranged over the entire outer edge of the cover glass 18 and the semiconductor chip 12. Therefore, the sealing member 19 and the molded resin 17 are arranged over the entire outer edge of the space 20, and the space 20 is sealed.

[0087] Figure 7 1 is a diagram showing the occurrence of cracks in the cover glass 18 or peeling of the mold resin 17 relative to the chip size of the semiconductor chip 12. The vertical axis represents the length of the semiconductor chip 12 in the Y direction in a plan view viewed from the Z direction. The horizontal axis represents the length of the semiconductor chip 12 in the X direction in a plan view viewed from the Z direction.

[0088] Region R2 is a region where cracking of the cover glass 18 or peeling of the mold resin 17 does not occur. Region R3 is a region where cracking of the cover glass 18 or peeling of the mold resin 17 occurs. Figure 7 , it can be seen that, in the plan view observed from the Z direction, the chip size of the semiconductor chip 12 (the area of ​​the light receiving surface F12a) is related to the cracking of the cover glass 18. When the chip size of the semiconductor chip 12 (the area of ​​the light receiving surface F12a) is about 59 mm 2 When the chip size of the semiconductor chip 12 (the area of ​​the light receiving surface F12a) is smaller than about 59 mm, the cover glass 18 may be broken or the mold resin 17 may be peeled off. 2 When the chip size of the semiconductor chip 12 (the area of ​​the light receiving surface F12a) exceeds about 59 mm, cracking of the cover glass 18 or peeling of the mold resin 17 hardly occurs. 2 When the cover glass 18 is not formed, cracks are likely to occur at the end of the cover glass 18, or the molded resin 17 is easily peeled off from the cover glass 18.

[0089] Figure 81 is a graph showing the occurrence of cracks at the end of the cover glass 18 when the protruding width W18 and the thickness T18 of the cover glass 18 are changed. The vertical axis represents the ratio (%) of the thickness T18 of the cover glass 18 to the thickness T17 of the mold resin 17. The horizontal axis represents the ratio (%) of the protruding width W18 of the cover glass 18 to the width W17 of the mold resin 17. Note that samples S1 and S2 include a BGA (ball grid array) using a mold resin 17 and a BGA using a potting resin.

[0090] When the chip size of the semiconductor chip 12 is set to about 59 mm 2 And when the package of the solid-state imaging device 1 was actually observed, in sample S1, the protruding width W18 of the cover glass 18 was less than 15% of the width W17, and therefore, cracking of the cover glass 18 or peeling of the molded resin 17 occurred. In sample S2, the protruding width W18 of the cover glass 18 exceeded 93% of the width W17, and therefore, due to designs such as glass mounting accuracy, glass size tolerance, and package outer size tolerance, the periphery of the cover glass 18 could not be covered by the molded resin 17. Alternatively, when the package is singulated, cracking or peeling of the molded resin 17 may occur. In some of the samples S1 and in the sample S2, the thickness T18 of the cover glass 18 exceeded 40% of the thickness T17, and therefore, cracking of the cover glass 18 or peeling of the molded resin 17 occurred.

[0091] On the other hand, when the protruding width W18 of the cover glass 18 is 15% to 93% of the width W17 and the thickness T18 of the cover glass 18 is 40% to 100% of the thickness T17, cracking of the cover glass 18 or peeling of the mold resin 17 hardly occurs. Figure 8 Under the condition within the range of region R1 in , the side stress of the cover glass 18 can be reduced, and cracking of the cover glass 18 or peeling of the mold resin 17 hardly occurs.

[0092] The reason why the cracking of the cover glass 18 or the peeling of the molded resin 17 is suppressed as described above is as follows. That is, by increasing the thickness of the cover glass 18, the warping of the cover glass 18 with respect to the change in the internal pressure of the space 20 is suppressed. When the warping of the cover glass 18 is suppressed, the stress concentration between the end of the cover glass 18 and the molded resin 17 can be suppressed. In addition, by making the end of the cover glass 18 protrude toward the molded resin 17, the thermal stress caused by the difference in thermal expansion coefficient between the cover glass 18 and the molded resin 17 can be suppressed from concentrating on the interface between the side surface FS18 of the cover glass 18 and the molded resin 17. Therefore, the cracking of the cover glass 18 or the peeling of the molded resin 17 can be suppressed.

[0093] like Figure 8 As shown, it can be seen that the protruding width W18 and thickness T18 of the cover glass 18 are related to the width W17 and thickness T17 of the mold resin 17. In the structure within the range of region R1, stress concentration on the end of the cover glass 18 is reduced, and cracking of the cover glass 18 can be suppressed.

[0094] The chip size of the semiconductor chip 12 is less than about 59 mm 2 In the case of chip size falling Figure 7 Therefore, the cover glass 18 is hardly broken and the mold resin 17 is hardly peeled off. Therefore, even if the protruding width W18 and the thickness T18 of the cover glass 18 are Figure 8 There will be no problem outside the range of area R1.

[0095] However, in the case where the chip size of the semiconductor chip 12 is approximately 59 mm 2 In the above cases, the chip size falls within Figure 7 Therefore, the cover glass 18 is preferably within the region R3 of the cover glass 18, and thus cracking of the cover glass 18 and peeling of the molded resin 17 are likely to occur. Therefore, the protruding width W18 and the thickness T18 of the cover glass 18 are preferably within the region R3 of the cover glass 18. Figure 8 Thus, cracking of the cover glass 18 and peeling of the mold resin 17 can be suppressed.

[0096] Fig. 9 and Fig.10 is a diagram showing the interface stress between the mold resin 17 and the cover glass 18 .

[0097] Fig. 9 The vertical axis of the graph shown in represents the stress at the interface between the mold resin 17 and the cover glass 18 . Fig. 9 The horizontal axis of the graph shown in represents the ratio of the protruding width W18 of the cover glass 18 to the width W17 of the molded resin 17. When the difference between the thermal expansion coefficient of the molded resin 17 and the thermal expansion coefficient of the cover glass 18 is large, the interface stress between the molded resin 17 and the cover glass 18 increases. When the interface stress between the molded resin 17 and the cover glass 18 is large, cracking of the cover glass 18 may be caused. For example, due to a reflow process (e.g., 260° C.) or a thermal cycle test (e.g., −55° C.) after forming the molded resin 17, the interface stress between the molded resin 17 and the cover glass 18 increases, and the cover glass 18 may crack or the molded resin 17 may peel off from the cover glass 18.

[0098] according to Fig. 9As shown in the figure, it can be seen that the interface stress between the molded resin 17 and the cover glass 18 is reduced by fixing the width W17 of the molded resin 17 and increasing the protruding width W18 of the cover glass 18. In other words, it can be considered that by increasing the protruding width W18 of the cover glass 18, the stress applied to the cover glass 18 is relieved, and the occurrence of cracking of the cover glass 18 or peeling of the molded resin 17 is reduced.

[0099] Fig.10 The vertical axis of the graph shown in Fig. 9 The vertical axis is the same. Fig.10 The horizontal axis of the graph shown in represents the ratio of the thickness T18 of the cover glass 18 to the thickness T17 of the mold resin 17 .

[0100] according to Fig.10 As shown in the figure, it can be seen that the interface stress between the molded resin 17 and the cover glass 18 is reduced by fixing the thickness T17 of the molded resin 17 and increasing the thickness T18 of the cover glass 18. In other words, it can be considered that by increasing the thickness T18 of the cover glass 18, the stress applied to the cover glass 18 is relieved, and the occurrence of cracking of the cover glass 18 or peeling of the molded resin 17 is reduced.

[0101] In summary, according to the present embodiment, under the condition that the cover glass 18 is not broken or the mold resin 17 is not peeled off, it is preferable to use the semiconductor chip 12 with a chip size of about 59 mm. 2 In the above cases (in Figure 7 The protruding width W18 of the cover glass 18 is 15% to 93% of the width W17, and the thickness T18 of the cover glass 18 is 40% to 100% of the thickness T17 (in the region R3 in FIG. 1 ). Figure 8 Under this condition, it can be seen that cracking of the cover glass 18 or peeling of the mold resin 17 can be effectively suppressed.

[0102] Furthermore, by setting the protruding width W18 of the cover glass 18 to 15% to 93% of the width W17 of the mold resin 17, as shown in FIG. Figure 5 As shown, the mold resin 17 can cover the side surface FS18 of the cover glass 18. Therefore, it is possible to suppress the incidence of light from the side surface FS18 of the cover glass 18, and to suppress flare caused by diffuse reflection of light.

[0103] (Method of Manufacturing Solid-State Imaging Device 1)

[0104] Figures 11 to 18 1 is a schematic diagram showing an example of a method of manufacturing the solid-state imaging device 1 according to the present embodiment. Figures 11 to 18 An end portion of the solid-state imaging device 1 is shown.

[0105] The semiconductor chips 12 are formed by singulating a semiconductor wafer processed in a previous process of a semiconductor control process in a dicing process.

[0106] Next, if Fig.11 As shown, the semiconductor chip 12 is bonded to the first surface F1 of the wiring substrate 11 by using a bonding layer 115. As the bonding layer 115, for example, a die attach film (DAF) or the like can be used. The bonding layer 115 is pre-attached to the back surface F12b side of the semiconductor chip 12. By placing the semiconductor chip 12 on the first surface F1 of the wiring substrate 11 and performing a heat treatment, the semiconductor chip 12 is bonded to the first surface F1 of the wiring substrate 11 by using the bonding layer 115. Note that the bonding layer 115 is a liquid bonding agent, and the semiconductor chip 12 can also be fixed to the wiring substrate 11 by a curing process using an outer line or the like.

[0107] Next, after the semiconductor chip 12 and the wiring substrate 11 are plasma cleaned, Fig.12 As shown, by using the wire bonding technology, the pad 120 provided on the first surface F1 of the wiring substrate 11 and the pad 140 provided on the light receiving surface F12a of the semiconductor chip 12 are connected by the metal wire 130. Thus, the semiconductor chip 12 is electrically connected to any of the wiring layers 112 of the wiring substrate 11.

[0108] Next, if Fig.13 As shown, the sealing member 19 is supplied to the outer edge of the semiconductor chip 12, and the cover glass 18 is placed on the sealing member 19. For example, the sealing member 19 is a thermoplastic resin, which covers the pad 140 and the connection part of the metal wire 130 and the pad 140 by heat treatment, thereby fixing the cover glass 18 above the light receiving surface F12a of the semiconductor chip 12. Alternatively, the sealing member 19 is a liquid resin, and is supplied to the pad 140 and the connection part of the metal wire 130 and the pad 140. After the cover glass 18 is placed on the sealing member 19, the sealing member 19 is hardened by curing means such as ultraviolet rays. Thereby, the sealing member 19 covers the pad 140 and the connection part of the metal wire 130 and the pad 140, and fixes the cover glass 18 above the light receiving surface F12a of the semiconductor chip 12.

[0109] The sealing member 19 fixes the cover glass 18 above the light receiving surface F12a of the semiconductor chip 12 with a space 20. Therefore, the cover glass 18 does not contact the on-chip lens 16 on the light receiving surface F12a of the semiconductor chip 12, and can transmit incident light to the light receiving surface F12a.

[0110] Next, by using mold forming technology, such as Fig.14 As shown, mold resin 17 is supplied to side surface FS18 of cover glass 18, side surface FS19 of sealing member 19, side surface FS12 of semiconductor chip 12, and first surface F1 of wiring substrate 11. Thus, mold resin 17 seals pad 120, metal wire 130, and the connection portion between them.

[0111] For example, Fig.15 The wiring substrate 11 on which a plurality of semiconductor chips 12 have been mounted is shown before being sealed with resin. Fig.16 The wiring substrate 11 after being sealed with resin is shown. In this way, the mold resin 17 is not supplied to the surface of the cover glass 18, but is buried in the space between the adjacent semiconductor chips 12 or the space between the adjacent cover glasses 18. Therefore, the metal wire 130 and the like can be protected by the mold resin 17 without causing the mold resin 17 to adhere to the surface of the cover glass 18. The mold resin 17 is cured in the curing process.

[0112] Next, if Fig.17 As shown in FIG. 1 , metal bumps 14 are formed on the second surface F2 side of the wiring substrate 11. Next, as shown in FIG. Fig.18 As shown in FIG. 1 , the wiring substrate 11 is cut from the second surface F2 side of the wiring substrate 11 using a dicing blade 80. Thus, each semiconductor chip 12 is singulated, and the process is completed. Figure 1 or Figure 5 The package of the solid-state imaging device 1 is shown.

[0113] (Second embodiment)

[0114] Fig.19 1 is a schematic diagram showing an example of a method for manufacturing the solid-state imaging device 1 according to the second embodiment. In the manufacturing method of the first embodiment, the semiconductor chip 12 is sealed with a molded resin 17 by using a mold molding technique. In contrast, in the second embodiment, Fig.15 and Fig.16In the process shown, the resin 17 is formed by potting. That is, liquid resin is supplied (potted) between the adjacent semiconductor chips 12 or between the adjacent cover glasses 18 on the wiring substrate 11, and cured by ultraviolet rays or the like. As a result, the resin 17 is buried between the adjacent semiconductor chips 12 or between the adjacent cover glasses 18. That is, a Fig.14 and Fig.16 However, in the case of the potting method, the surface of the liquid resin does not become flat due to surface tension and is not flush with the surface of the cover glass 18. For example, in the case of the potting method, the resin 17 has an inclined surface TP that is inclined obliquely downward from the surface of the cover glass 18. Other processes of the second embodiment may be similar to those in the configuration of the first embodiment.

[0115] Fig. 20 1 is a cross-sectional view showing a configuration example of the solid-state imaging device 1 according to the second embodiment. As described above, even the resin 17 formed by the potting method can obtain the same Figures 7 to 10 Note that since the side surface FS18 of the cover glass 18 is covered with the resin 17, an effect of suppressing flare is obtained.

[0116] (Application example of mobile object)

[0117] The technology of the present invention (the present technology) can be applied to various products. For example, the technology of the present invention can be implemented as a device mounted on any type of mobile body such as an automobile, an electric car, a hybrid car, an automatic two-wheeled vehicle, a bicycle, a personal mobility vehicle, an airplane, an unmanned aerial vehicle, a ship, a robot, etc.

[0118] Fig.21 : is a block diagram showing an example of a schematic configuration of a vehicle control system as an example of a moving body control system to which the technology according to the present invention is applicable.

[0119] The vehicle control system 12000 includes a plurality of electronic control units interconnected via a communication network 12001. Fig.21 In the example shown, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an external information detection unit 12030, an internal information detection unit 12040, and an integrated control unit 12050. In addition, as a functional configuration of the integrated control unit 12050, a microcomputer 12051, a sound / image output unit 12052, and an in-vehicle network interface (I / F: interface) 12053 are shown.

[0120] The drive system control unit 12010 controls the operation of the devices related to the drive system of the vehicle according to various programs. For example, the drive system control unit 12010 functions as a control device for various devices such as: a drive force generating device for generating a vehicle drive force such as an internal combustion engine, a drive motor, etc.; a drive force transmitting mechanism for transmitting the drive force to the wheels; a steering mechanism for adjusting the steering angle of the vehicle; and a braking device for generating a vehicle braking force, etc.

[0121] The body system control unit 12020 controls the operation of various devices equipped on the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for various devices such as: a keyless entry system; a smart key system; a power window device; or various lights such as headlights, reverse lights, brake lights, turn signals, fog lights, etc. In this case, radio waves emitted from a portable device that replaces the key or signals from various switches can be input to the body system control unit 12020. The body system control unit 12020 receives these input radio waves or signals and controls the door lock device, power window device, lights, etc. of the vehicle.

[0122] The vehicle exterior information detection unit 12030 detects information outside the vehicle equipped with the vehicle control system 12000. For example, the vehicle exterior information detection unit 12030 is connected to the camera unit 12031. The vehicle exterior information detection unit 12030 causes the camera unit 12031 to capture an image of the vehicle exterior and receives the captured image. Based on the received image, the vehicle exterior information detection unit 12030 can perform processing for detecting objects such as people, vehicles, obstacles, signs, text on the road surface, etc., or processing for detecting the distance to the object.

[0123] The imaging unit 12031 is an optical sensor that can receive light and output an electrical signal corresponding to the amount of light received. The imaging unit 12031 can output the electrical signal as an image, or can output the electrical signal as distance measurement information. In addition, the light received by the imaging unit 12031 can be visible light, or can be non-visible light such as infrared rays.

[0124] The in-vehicle information detection unit 12040 detects information about the interior of the vehicle. For example, the in-vehicle information detection unit 12040 is connected to a driver state detection unit 12041 for detecting the driver's state. For example, the driver state detection unit 12041 includes a camera for photographing the driver. Based on the detection information input from the driver state detection unit 12041, the in-vehicle information detection unit 12040 can calculate the driver's fatigue level or the driver's concentration level, or can determine whether the driver is dozing off.

[0125] Based on the information outside or inside the vehicle acquired by the vehicle exterior information detection unit 12030 or the vehicle interior information detection unit 12040, the microcomputer 12051 can calculate the control target value of the driving force generation device, the steering mechanism or the braking device, and output a control instruction to the drive system control unit 12010. For example, the microcomputer 12051 can perform coordinated control aimed at realizing the functions of ADAS (Advanced Driver Assistance System), the functions of which include: collision avoidance or impact mitigation of the vehicle, following driving based on vehicle-to-vehicle distance, vehicle constant speed driving, vehicle collision warning, vehicle lane departure warning, etc.

[0126] In addition, based on the information outside or inside the vehicle obtained by the external information detection unit 12030 or the internal information detection unit 12040, the microcomputer 12051 can perform coordinated control such as automatic driving to enable the vehicle to drive autonomously without relying on the driver's operation by controlling the driving force generating device, steering mechanism or braking device, etc.

[0127] In addition, based on the information outside the vehicle obtained by the vehicle exterior information detection unit 12030, the microcomputer 12051 can output a control instruction to the body system control unit 12020. For example, based on the position of the preceding vehicle or oncoming vehicle detected by the vehicle exterior information detection unit 12030, the microcomputer 12051 can perform coordinated control such as switching the headlights from high beam to low beam to achieve anti-glare.

[0128] The sound / image output unit 12052 sends an output signal of at least one of sound and image to an output device capable of visually or auditorily notifying the vehicle occupants or the outside of the vehicle of information. Fig.21 In the illustrated example, as output devices, an audio speaker 12061, a display portion 12062, and an instrument panel 12063 are illustrated. For example, the display portion 12062 may include at least one of an onboard display and a head-up display.

[0129] Fig. 22 12031 is a diagram showing an example of the installation position of the camera unit 12031.

[0130] exist Fig. 22 In the figure, the camera unit 12031 includes camera units 12101, 12102, 12103, 12104 and 12105.

[0131] For example, the camera units 12101, 12102, 12103, 12104 and 12105 are arranged at the positions of the front bumper, side mirrors, rear bumper, trunk door and the upper part of the windshield in the vehicle 12100. The camera unit 12101 arranged at the front bumper and the camera unit 12105 arranged at the upper part of the windshield in the vehicle mainly obtain images in front of the vehicle 12100. The camera units 12102 and 12103 arranged at the side mirrors mainly obtain images on the side of the vehicle 12100. The camera unit 12104 arranged at the rear bumper or the trunk door mainly obtains images behind the vehicle 12100. The camera unit 12105 arranged at the upper part of the windshield in the vehicle is mainly used to detect the front vehicle, pedestrians, obstacles, signal lights, traffic signs, lanes, etc.

[0132] Notice, Fig. 22 An example of the imaging range of the imaging units 12101 to 12104 is shown. The imaging range 12111 indicates the imaging range of the imaging unit 12101 provided at the front bumper. The imaging ranges 12112 and 12113 respectively indicate the imaging ranges of the imaging units 12102 and 12103 provided at the side mirrors. The imaging range 12114 indicates the imaging range of the imaging unit 12104 provided at the rear bumper or the trunk door. For example, by superimposing the image data captured by the imaging units 12101 to 12104, it is possible to obtain a bird's-eye view image of the vehicle 12100 viewed from above.

[0133] At least one of the imaging units 12101 to 12104 may have a function capable of acquiring distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera composed of a plurality of imaging elements, or may be an imaging element having pixels for phase difference detection.

[0134] For example, based on the distance information obtained from the camera units 12101 to 12104, the microcomputer 12051 can obtain the distance to each solid object within the camera ranges 12111 to 12114 and the change in the distance over time (relative speed relative to the vehicle 12100), thereby extracting the following solid object as the leading vehicle: it is particularly the closest solid object on the driving path of the vehicle 12100 and is a solid object that travels at a predetermined speed (for example, 0 km / h or more) in the same direction as the vehicle 12100. In addition, the microcomputer 12051 can set the inter-vehicle distance that should be ensured in advance with respect to the leading vehicle, and can perform automatic braking control (including follow-up stop control), automatic acceleration control (including follow-up start control), etc. Therefore, it is possible to perform coordinated control such as automatic driving that enables the vehicle to travel autonomously without relying on the driver's operation.

[0135] For example, based on the distance information obtained from the camera units 12101 to 12104, the microcomputer 12051 can classify the three-dimensional object data related to the three-dimensional object into three-dimensional object data of two-wheeled vehicles, ordinary cars, large vehicles, pedestrians, telephone poles and other three-dimensional objects, extract the classified three-dimensional object data, and use the extracted three-dimensional object data to automatically avoid obstacles. For example, the microcomputer 12051 identifies obstacles around the vehicle 12100 as obstacles that the driver of the vehicle 12100 can visually perceive and obstacles that the driver of the vehicle 12100 is difficult to visually perceive. Then, the microcomputer 12051 determines the collision risk used to represent the degree of danger of collision with each obstacle. In the case where the collision risk is equal to or greater than the set value and there is a possibility of collision, the microcomputer 12051 issues a warning to the driver via the audio speaker 12061 or the display unit 12062, or performs forced deceleration or evasive steering via the drive system control unit 12010. Therefore, the microcomputer 12051 can provide assisted driving for avoiding collisions.

[0136] At least one of the imaging units 12101 to 12104 may be an infrared camera capable of detecting infrared rays. For example, the microcomputer 12051 may identify a pedestrian by determining whether a pedestrian exists in the image captured by the imaging units 12101 to 12104. For example, such identification of a pedestrian is performed by: a process of extracting feature points from the image captured by the imaging units 12101 to 12104 as infrared cameras; and a process of performing pattern matching processing on a series of feature points representing the contour of an object to determine whether the object is a pedestrian. When the microcomputer 12051 determines that a pedestrian exists in the image captured by the imaging units 12101 to 12104 and thus identifies the pedestrian, the sound / image output unit 12052 may control the display unit 12062 to display a square contour line for emphasis superimposed on the identified pedestrian. The sound / image output unit 12052 can also control the display unit 12062 to display an icon representing a pedestrian, etc. at a desired location.

[0137] An example of a vehicle control system to which the technology according to the present invention is applicable has been described above. For example, the technology according to the present invention can be applied to the camera unit 12031 and the like in the above-mentioned configuration.

[0138] Note that this technology can also adopt the following technical solutions.

[0139] (1) A solid-state imaging device comprising:

[0140] a photoelectric conversion element having a light receiving surface;

[0141] a glass member disposed above the light receiving surface; and

[0142] a first resin member covering a side surface of the photoelectric conversion element and a side surface of the glass member,

[0143] The area of ​​the photoelectric conversion element is 59 mm in a plan view observed from a first direction substantially perpendicular to the light receiving surface. 2 above,

[0144] The glass member protrudes from the photoelectric conversion element in a second direction substantially parallel to the light receiving surface by a first width that is 15% to 93% of a width of the first resin member in the second direction, and

[0145] The thickness of the glass member is 40% or more of the thickness of the first resin member in the first direction.

[0146] (2) The solid-state imaging device according to (1) above, wherein:

[0147] The side surface of the glass member is covered with the first resin member.

[0148] (3) The solid-state imaging device according to (1) or (2), wherein:

[0149] The thickness of the glass member is equal to or smaller than the thickness of the first resin member.

[0150] (4) The solid-state imaging device according to any one of (1) to (3) above, further comprising:

[0151] A second resin member is provided between the glass member and the photoelectric conversion element on an outer edge of the photoelectric conversion element and forms a space between the glass member and the photoelectric conversion element.

[0152] (5) The solid-state imaging device according to (4) above, wherein:

[0153] The first resin member and the second resin member are provided over the entire outer edge of the photoelectric conversion element and seal the space.

[0154] (6) The solid-state imaging device according to any one of (1) to (5), wherein:

[0155] The glass member protrudes from the photoelectric conversion element by the first width in the second direction over the entire outer edge of the photoelectric conversion element.

[0156] (7) The solid-state imaging device according to any one of (1) to (6), wherein:

[0157] The thickness of the glass member in the first direction is 40% or more of the thickness of the first resin member at the entire outer edge of the photoelectric conversion element.

[0158] (8) The solid-state imaging device according to any one of (1) to (7) above, further comprising:

[0159] a wiring substrate, wherein the photoelectric conversion element is mounted on a first surface of the wiring substrate,

[0160] The first resin member is provided on the surface of the wiring substrate so as to surround the periphery of the photoelectric conversion element.

[0161] (9) The solid-state imaging device according to (8) above, further comprising:

[0162] A metal bump is provided on a second surface of the wiring substrate opposite to the first surface.

[0163] (10) The solid-state imaging device according to (8) or (9), further comprising:

[0164] a metal wire that electrically connects the wiring of the wiring substrate and the photoelectric conversion element,

[0165] wherein the metal wire is covered by the first resin member.

[0166] Note that the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the gist of the present disclosure. In addition, the effects described in this specification are merely examples and are not restrictive, and other effects may also be provided.

[0167] Reference numerals list

[0168] 1: Solid-state imaging device

[0169] 11: Wiring board

[0170] 12: Semiconductor chips

[0171] 14: Metal bumps

[0172] 15: Color filter

[0173] 16: On-chip lens

[0174] 17: Molding resin

[0175] 18: Cover glass

[0176] 19: Sealing components

[0177] 111: Insulation layer

[0178] 112: Wiring layer

Claims

1. A solid-state imaging device, comprising: a photoelectric conversion element having a light receiving surface; a glass member disposed above the light receiving surface; and a first resin member covering a side surface of the photoelectric conversion element and a side surface of the glass member, The area of ​​the photoelectric conversion element is 59 mm in a plan view observed from a first direction substantially perpendicular to the light receiving surface. 2 above, The glass member protrudes from the photoelectric conversion element in a second direction substantially parallel to the light receiving surface by a first width that is 15% to 93% of a width of the first resin member in the second direction, and The thickness of the glass member is 40% or more of the thickness of the first resin member in the first direction.

2. The solid-state imaging device according to claim 1, wherein The side surface of the glass member is covered with the first resin member.

3. The solid-state imaging device according to claim 1, wherein The thickness of the glass member is equal to or smaller than the thickness of the first resin member.

4. The solid-state imaging device according to claim 1, further comprising: A second resin member is provided between the glass member and the photoelectric conversion element on an outer edge of the photoelectric conversion element and forms a space between the glass member and the photoelectric conversion element.

5. The solid-state imaging device according to claim 4, wherein: The first resin member and the second resin member are provided over the entire outer edge of the photoelectric conversion element and seal the space.

6. The solid-state imaging device according to claim 1, wherein The glass member protrudes from the photoelectric conversion element by the first width in the second direction over the entire outer edge of the photoelectric conversion element.

7. The solid-state imaging device according to claim 1, wherein The thickness of the glass member in the first direction is 40% or more of the thickness of the first resin member at the entire outer edge of the photoelectric conversion element.

8. The solid-state imaging device according to claim 1, further comprising: a wiring substrate, wherein the photoelectric conversion element is mounted on a first surface of the wiring substrate, The first resin member is provided on the surface of the wiring substrate so as to surround the photoelectric conversion element.

9. The solid-state imaging device according to claim 8, further comprising: A metal bump is provided on a second surface of the wiring substrate opposite to the first surface.

10. The solid-state imaging device according to claim 8, further comprising: a metal wire that electrically connects the wiring of the wiring substrate and the photoelectric conversion element, wherein the metal wire is covered by the first resin member.

Citation Information

Patent Citations

  • Semiconductor device and manufacturing method thereof

    JP2009188191A