Workload awareness of controller

Abstract

The invention relates to workload awareness of a controller. A device in communication with a plurality of memory devices storing a plurality of data sets and a host, the device including one or more circuitry to: receive a plurality of messages related to the plurality of data sets; determining an amount of information corresponding to each of the plurality of data sets; identifying an action for each message of the plurality of messages, the action including at least one of an update to the plurality of data sets or an access to the plurality of data sets; updating a table to reflect the reception of the plurality of messages; and determining a pattern associated with the plurality of messages.

Description

Technical Field

[0001] The present disclosure relates to workload awareness of a controller. Background Art

[0002] The present disclosure relates to logical drives. A logical drive and / or its components can store data. Summary of the invention

[0003] In one aspect, the present disclosure relates to a system, the system comprising: a plurality of memory devices storing a plurality of data sets, each of the plurality of memory devices comprising a physical medium for storing the plurality of data sets; and a device in communication with the plurality of memory devices and a host, the device comprising: one or more circuits comprising a processor and a memory, and the one or more circuits being configured to: receive a plurality of messages related to the plurality of data sets from the host; in response to receiving the plurality of messages, determine, using the processor, an amount of information corresponding to each of the plurality of data sets; identify, using the processor, an action for each of the plurality of messages based on characteristics of the plurality of messages, the action comprising at least one of an update to the plurality of data sets or an access to the plurality of data sets; update, using the processor, a table located in the memory to reflect the receipt of the plurality of messages based on the amount of information and the action; and in response to updating the table, determine, using the processor, a pattern associated with the plurality of messages, the pattern indicating at least one of: a number of messages related to an update of the plurality of data sets; a number of messages related to an access to the plurality of data sets; a number of messages corresponding to a given amount of information; or a number of messages included in the plurality of messages.

[0004] On the other hand, the present disclosure relates to a device that communicates with multiple memory devices storing multiple data sets and a host, each of the multiple memory devices including a physical medium for storing the multiple data sets, and the device includes one or more circuits, including a processor and a memory, and the one or more circuits are configured to: receive multiple messages related to the multiple data sets from the host; in response to receiving the multiple messages, use the processor to determine the amount of information corresponding to each of the multiple data sets; use the processor to identify an action for each of the multiple messages based on characteristics of the multiple messages, the action including at least one of updating the multiple data sets or accessing the multiple data sets; use the processor to update a table located in the memory based on the amount of information and the action to reflect the receipt of the multiple messages; and in response to updating the table, use the processor to determine a pattern associated with the multiple messages, the pattern indicating at least one of the following: the number of messages related to the update of the multiple data sets; the number of messages related to the access of the multiple data sets; the number of messages corresponding to a given amount of information; or the number of messages included in the multiple messages.

[0005] On the other hand, the present disclosure relates to a method, which includes: receiving, by one or more circuits including a processor and a memory, a plurality of messages related to a plurality of data sets stored by a plurality of memory devices from a host, each of the plurality of memory devices including a physical medium for storing the plurality of data sets; in response to receiving the plurality of messages, determining, by the one or more circuits using the processor, an amount of information corresponding to each of the plurality of data sets; identifying, by the one or more circuits using the processor, an action for each of the plurality of messages based on characteristics of the plurality of messages, the action including at least one of updating the plurality of data sets or accessing the plurality of data sets; updating, by the one or more circuits using the processor, a table located in the memory to reflect the receipt of the plurality of messages based on the amount of information and the action; and in response to updating the table, determining, by the one or more circuits using the processor, a pattern associated with the plurality of messages, the pattern indicating at least one of: the number of messages related to updating the plurality of data sets; the number of messages related to accessing the plurality of data sets; the number of messages corresponding to a given amount of information; or the number of messages included in the plurality of messages. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] Various objects, aspects, features and advantages of the present disclosure will become more apparent and better understood by referring to the detailed description taken in conjunction with the accompanying drawings, wherein the same reference characters identify corresponding elements throughout. In the drawings, the same reference numerals generally represent identical, functionally similar and / or structurally similar elements.

[0007] Figure 1 is a block diagram of a system for monitoring workload according to some embodiments.

[0008] Figure 2 A system including multiple portions for defining logical drives according to some embodiments.

[0009] Figure 3 According to some embodiments, Figure 1 A block diagram of the components of the system described in .

[0010] Figure 4 is a table for monitoring workload according to some embodiments.

[0011] Figure 5 is a flow diagram of a process for monitoring workload according to some embodiments. DETAILED DESCRIPTION

[0012] Some embodiments relate to systems and methods for accessing workload information related to input / output (I / O) messages between a host and a controller. For example, an I / O message may refer to a message transmitted by a host to a controller. An I / O message may be a read request (e.g., providing access to a given piece of information). During a given interaction between a host and a controller (e.g., an I / O message exchange between the host and the controller), a record of the interaction (e.g., information related to the interaction) may not be generated. A controller may not generate a record of the interaction due in part to a configuration and / or arrangement of the controller. For example, a controller may not be able to access memory space for storing a record of the interaction.

[0013] Understanding and / or awareness of the workload of a controller (e.g., the number of I / O messages and / or a given I / O message type) may be beneficial because several decision points regarding the operation of the controller may be improved in response to the workload awareness. For example, resource distribution (e.g., allocation of memory, computing resources, etc.) may be improved in response to the workload awareness. Although I / O messages may be executed and / or flow through a given path (e.g., from a host to a controller, and then to a memory device), the given path may not provide an opportunity to record the executed I / O messages.

[0014] Establishing a system and / or configuration to provide workload awareness may provide several advantages. For example, workload awareness may result in the creation of a baseline for a given controller for detecting when a given controller performs abnormal operations (e.g., performs actions in an amount that is different from the baseline). As another example, workload awareness may provide intelligent and / or adaptive decisions regarding workflow allocation. Workload awareness may also provide improvements regarding machine learning (ML). For example, an ML model may be trained based on training data including workload-aware data to identify a baseline workload expectation for a given controller, and when a given controller is calibrated and / or configured, the ML model may allocate a certain amount of memory based on the baseline workload expectation.

[0015] Some additional advantageous capabilities that may result from workload awareness include: the ability of the controller to adjust the bad block table size of the logical drive and / or memory device based on I / O accumulation and I / O rate; the ability of the controller to switch write coalescing (e.g., allocate and deallocate memory space) based on predicted utilization, resource distribution, and / or queue depth; dynamic rate control of I / O background operations (e.g., rebuild, check consistency, etc.); buffer class reassignment of logical drives based on I / O rate; switch resource-based metering based on I / O size; and / or calculate the ratio of diverted I / O to total I / O for decision making. The logical drive may include at least one of an array of physical disk drives, a redundant array of independent disks (RAID) array. The logical drive may be implemented as one or more portions of a physical memory device. The logical drive may also span multiple physical memory devices and / or be implemented across multiple physical memory devices.

[0016] Some technical solutions of the present application provide a system, which includes a device that provides workload awareness by tracking operations and / or interactions about I / O messages. The device can generate a record of operations and store the record of operations to create workload awareness. For example, the device can access a table (e.g., a register, a database, etc.), and the device can update a given part of the table in response to detecting a given operation. Continuing with this example, the device can update a first part of a table related to a read request. The device can implement several techniques to access workload information. For example, the device may include processing circuits and / or hardware having resources allocated to access workload information by monitoring interactions between the device and a host. In other words, the device may include hardware that executes a given firmware, which can cause the hardware to generate a record of interactions.

[0017] As described herein, some technical solutions provided by the device include adjustment of the size of a bad block table. The bad block table can be used to process, record and / or otherwise handle bad blocks. A bad block may refer to and / or include at least one of a bad sector, a portion of a logical drive that no longer provides reliable data storage, and / or an area of ​​a logical drive that has been damaged. A bad block may be the result of damage caused during the manufacturing process, long-term use, various operations, and / or external forces applied to the logical drive. Damage caused to the logical drive may cause and / or result in the generation of bad blocks by the logical drive.

[0018] The device may communicate with a host. For example, the device may communicate with an application running on a given operating system, and the host (e.g., a component that hosts and / or implements a given operating system) may provide one or more requests (e.g., I / O messages) to the device. The host may refer to and / or include a switch, a router, and / or other possible packet delivery devices. The host may refer to and / or include a computing system, a computing device, and / or a computer that is running and / or executing an application. In some embodiments, the device and the host may be implemented in a single computing device and / or system. In some embodiments, the device may be implemented and / or contained in a first computing device, and the host may be implemented and / or contained in a second computing device.

[0019] In some embodiments, communication between the device and the host may be direct (e.g., the device is directly connected to the host) and / or indirect (e.g., communication signals from the host to the device, and vice versa, are transmitted through one or more intermediate components and / or networks). Communication between the host and the device may include the device and the host being electrically coupled to each other. In some embodiments, communication between components may include the exchange of signals. Signals may transmit and / or convey information. For example, signals may convey electronic data. In some embodiments, signals may include one or more communication formats. For example, signals may be transmitted via wired communication. As another example, signals may be transmitted via wireless communication.

[0020] A system may refer to and / or include at least one of an application specific integrated circuit (ASIC), a capacitive load component, a display driver, a touch screen, a keyboard sensor, a mobile device, a computing device, a computer, a desktop computer, a laptop computer, a server, and / or other possible touch controllers. In some embodiments, a device may refer to and / or include at least one of an integrated circuit, a general purpose processor, a multi-core processor, a software programmable device, a programmable logic controller, and / or other possible circuit systems and / or hardware. Similarly, the functionality of the device may be stored in a memory as software, firmware, and / or instructions, and when the instructions stored in the memory (e.g., software, firmware, and / or instructions) are executed by a processor, the processor is caused to perform the functionality of the device (e.g., the processor may monitor interactions to create a workload awareness of the device).

[0021] In some embodiments, one or more circuits may refer to and / or include a memory storing instructions that, when executed by one or more processors, cause the one or more processors to perform operations based on the instructions. In some embodiments, one or more circuits may refer to an integrated circuit, a general purpose processor, a multi-core processor, a software programmable device, a programmable logic controller, and / or other possible circuit systems and / or hardware.

[0022] In some embodiments, a message may refer to and / or include at least one of the following: an I / O message, a request to perform a write operation, a request to perform a read operation, a request to access information, a request to provide information, a request to view information, a request to record information, a request to replace information, a request to update information, and / or other possible read / write operations. In some embodiments, a data set may refer to and / or include a collection of information, binaries, instructions, variables, values, shared libraries, and / or program code. In some embodiments, access to a data set may refer to and / or include providing access to information stored in, located in, and / or associated with a data set. In some embodiments, updating a data set may refer to and / or include adjusting, modifying, and / or changing information located in and / or stored in a data set.

[0023] In some embodiments, the amount of information may refer to and / or include at least one of the following: the size of a given data set (e.g., information stored in memory), the number of bits associated with a message, the number of bits associated with a corresponding action (e.g., the number of bits to write a given information, the number of bits to read a given information, etc.), the amount of space to store information associated with one or more messages (e.g., memory space, memory resources, etc.), and / or the size of a packet. An action may refer to and / or include steps taken and / or performed by a circuit system to perform an operation associated with a message (e.g., an operation performed by a processor to perform a read of information, an operation performed by a processor to perform a write of information, etc.). In some embodiments, a memory device may refer to and / or include at least one of the following: a device for storing data and / or computer code, a storage device, a database, a device capable of storing instructions and / or information, a logical drive, a physical drive, an array of logical drives, a solid-state drive, a hard disk drive, a hard disk storage device, a random access memory (RAM), a read-only memory (ROM), a flash memory, a dynamic random access memory (DRAM) bank, and / or various types of computer storage media.

[0024] In some embodiments, a table may refer to and / or include at least one of: a map, one or more bits corresponding to various types of information, a data structure including one or more rows storing various types of information, an array including sets of various types of information, a database storing various types of information, and / or other possible data storage devices. In some embodiments, a portion of a table may refer to and / or include at least one of: a set of bits, a row within a table, a column within a table, and / or various identifiable aspects of a table. In some embodiments, a pattern may refer to and / or include at least one of: a total number of I / O messages received, a total number of messages received related to a request type (e.g., number of read requests, number of write requests, etc.), a total amount of data received (e.g., total number of bits associated with a message, total number of bytes, etc.), and / or a total amount of messages with a given amount of information (e.g., total number of messages including messages associated with a given number of bits).

[0025] Some embodiments relate to a system. The system may include a plurality of memory devices. The plurality of memory devices may store a plurality of data sets. Each memory device of the plurality of memory devices may include a physical medium for storing the plurality of data sets. The system may also include a device. The device may communicate with the plurality of memory devices and a host. The device may include one or more circuits. The one or more circuits may include a processor and a memory. The one or more circuits receive a plurality of messages related to the plurality of data sets from the host. The one or more circuits may also determine, in response to receiving the plurality of messages, using the processor, an amount of information corresponding to each of the plurality of data sets. The one or more circuits may also use the processor to identify an action for each of the plurality of messages based on characteristics of the plurality of messages, the action including at least one of an update to the plurality of data sets or an access to the plurality of data sets. The one or more circuits may also use the processor to update a table located in the memory based on the amount of information and the action to reflect the receipt of the plurality of messages, and in response to updating the table, use the processor to determine a pattern associated with the plurality of messages. The pattern may indicate at least one of: a number of messages related to updating of the plurality of data sets, a number of messages related to accessing of the plurality of data sets, a number of messages corresponding to a given amount of information, or a number of messages included in the plurality of messages.

[0026] In some embodiments, the pattern may indicate a first number of messages related to updating of the plurality of data sets, and the pattern may indicate a second number of messages related to accessing of the plurality of data sets.

[0027] In some embodiments, the one or more circuits may also receive from the host a second plurality of messages related to the plurality of data sets. The one or more circuits may also use the processor to identify actions for corresponding messages in the second plurality of messages based on characteristics of the second plurality of messages. The one or more circuits may also use the processor to detect differences between the plurality of messages and the second plurality of messages based on the pattern, and in response to detecting the differences, use the processor to identify a second plurality of memory devices to transfer at least one message in the second plurality of messages.

[0028] In some embodiments, the one or more circuits may also, in response to a transition of at least one message in the second plurality of messages, update, using the processor, a second table located in the memory to reflect the transition. The one or more circuits may also, using the processor, determine that a number of transitions exceeds a threshold based on the second table, and, in response to determining that the number of transitions exceeds the threshold, use the processor to perform one or more actions to resolve the number of transitions.

[0029] In some embodiments, the one or more circuits may also use the processor to identify, based on the pattern, at least a portion of the plurality of memory devices to assign to a given one of the actions. The one or more circuits may also use the processor to monitor the pattern based on characteristics of the second plurality of messages in response to receiving the second plurality of messages. The one or more circuits may also use the processor to detect, based on the processor, a number of instances associated with utilization of the at least a portion of the plurality of memory devices, and in response to detecting the number of instances, use the processor to identify a change to the pattern.

[0030] In some embodiments, the one or more circuits may, in response to identifying the change in the mode, use the processor to deallocate at least a portion of the multiple memory devices and use the processor to process at least one message of the second multiple messages using at least a portion of the multiple memory devices.

[0031] In some embodiments, a first message in the plurality of messages may be associated with a first data set in the plurality of data sets having a first amount of information. The first message in the plurality of messages may be associated with an update to the first data set. The one or more circuits may reflect the receipt of the first message in the plurality of messages by: updating, using the processor, a first number of messages from a first value to a second value, the first number of messages being associated with the update of the plurality of data sets, and the second value of the first number of messages being indicative of the receipt of the first message; and updating, using the processor, a second number of messages from a third value to a fourth value, the second number of messages corresponding to the first amount of information, and the fourth value of the second number of messages being indicative of the receipt of the first message.

[0032] In some embodiments, the one or more circuits may use the processor to perform one or more actions to process the plurality of messages. The one or more circuits may also, in response to performing the one or more actions, detect, using the processor, at least one message from the plurality of messages associated with a memory device of the plurality of memory devices that includes a bad block, and in response to detecting the at least one message, update, using the processor, a second table located in the memory corresponding to memory devices of the plurality of memory devices that have bad blocks from a first size to a second size to account for the memory device that includes the bad block.

[0033] In an embodiment, the table may include multiple parts, and the one or more circuits may use the processor to update the table located in the memory based on the amount of information and the action to reflect the receipt of the multiple messages in the following manner: in response to detecting a first message in the multiple messages indicating a first update to a first data set in the multiple data sets, using the processor to update a first part of the multiple parts to include a reception indication of the first message; in response to detecting a second message in the multiple messages indicating a first access to a second data set in the multiple data sets, using the processor to update a second part of the multiple parts to include a reception indication of the second message; using the processor to update a third part of the multiple parts based on the amount of information associated with at least one of the first message or the second message to reflect an indication of at least one of the first message or the second message corresponding to the amount of information; and using the processor to update a fourth part of the multiple parts to indicate an indication of the first message and an indication of the second message.

[0034] Some embodiments relate to a device. The device may communicate with a plurality of memory devices storing a plurality of data sets and a host. Each memory device of the plurality of memory devices may include a physical medium for storing the plurality of data sets. The device may include one or more circuits. The one or more circuits may include a processor and a memory. The one or more circuits may receive a plurality of messages related to the plurality of data sets from the host. The one or more circuits may also determine, in response to receiving the plurality of messages, using the processor, an amount of information corresponding to each of the plurality of data sets. The one or more circuits may also use the processor to identify an action for each of the plurality of messages based on characteristics of the plurality of messages, the action including at least one of an update to the plurality of data sets or an access to the plurality of data sets. The one or more circuits may also use the processor to update a table located in the memory based on the amount of information and the action to reflect the receipt of the plurality of messages, and in response to updating the table, use the processor to determine a pattern associated with the plurality of messages. The pattern may indicate at least one of: a number of messages related to updating of the plurality of data sets, a number of messages related to accessing of the plurality of data sets, a number of messages corresponding to a given amount of information, or a number of messages included in the plurality of messages.

[0035] In some embodiments, the pattern may indicate a first number of messages related to updating of the plurality of data sets, and the pattern may indicate a second number of messages related to accessing of the plurality of data sets.

[0036] In some embodiments, the one or more circuits may also receive from the host a second plurality of messages related to the plurality of data sets. The one or more circuits may also use the processor to identify actions for corresponding messages in the second plurality of messages based on characteristics of the second plurality of messages. The one or more circuits may also use the processor to detect differences between the plurality of messages and the second plurality of messages based on the pattern, and in response to detecting the differences, use the processor to identify a second plurality of memory devices to transfer at least one message in the second plurality of messages.

[0037] In some embodiments, the one or more circuits may also, in response to a transition of at least one message in the second plurality of messages, update, using the processor, a second table located in the memory to reflect the transition. The one or more circuits may also, using the processor, determine that a number of transitions exceeds a threshold based on the second table, and, in response to determining that the number of transitions exceeds the threshold, use the processor to perform one or more actions to resolve the number of transitions.

[0038] In some embodiments, the one or more circuits may also use the processor to identify, based on the pattern, at least a portion of the plurality of memory devices to assign to a given one of the actions. The one or more circuits may also use the processor to monitor the pattern based on characteristics of the second plurality of messages in response to receiving the second plurality of messages. The one or more circuits may also use the processor to detect, based on the processor, a number of instances associated with utilization of the at least a portion of the plurality of memory devices, and in response to detecting the number of instances, use the processor to identify a change to the pattern.

[0039] In some embodiments, the one or more circuits may also, in response to identifying the change in the mode, use the processor to deallocate at least a portion of the multiple memory devices, and use the processor to process at least one message of the second multiple messages using at least a portion of the multiple memory devices.

[0040] In some embodiments, a first message in the plurality of messages may be associated with a first data set in the plurality of data sets having a first amount of information. The first message in the plurality of messages may be associated with an update to the first data set. The one or more circuits may reflect the receipt of the first message in the plurality of messages by: updating, using the processor, a first number of messages from a first value to a second value, the first number of messages being associated with the update of the plurality of data sets, and the second value of the first number of messages being indicative of the receipt of the first message; and updating, using the processor, a second number of messages from a third value to a fourth value, the second number of messages corresponding to the first amount of information, and the fourth value of the second number of messages being indicative of the receipt of the first message.

[0041] In some embodiments, the one or more circuits may use the processor to perform one or more actions to process the plurality of messages. The one or more circuits may also, in response to performing the one or more actions, detect, using the processor, at least one message from the plurality of messages associated with a memory device of the plurality of memory devices that includes a bad block, and in response to detecting the at least one message, update, using the processor, a second table located in the memory corresponding to memory devices of the plurality of memory devices that have bad blocks from a first size to a second size to account for the memory device that includes the bad block.

[0042] Some embodiments relate to a method. The method may include receiving, by one or more circuits including a processor and a memory, a plurality of messages from a host relating to a plurality of data sets stored by a plurality of memory devices. Each of the plurality of memory devices may include a physical medium for storing the plurality of data sets. The method may also include, in response to receiving the plurality of messages, determining, by the one or more circuits, using the processor, an amount of information corresponding to each of the plurality of data sets. The method may also include identifying, by the one or more circuits, using the processor, an action for each of the plurality of messages based on characteristics of the plurality of messages, the action including at least one of an update to the plurality of data sets or an access to the plurality of data sets. The method may also include updating, by the one or more circuits, using the processor, a table located in the memory to reflect the receipt of the plurality of messages based on the amount of information and the action, and determining, by the one or more circuits, using the processor, a pattern associated with the plurality of messages in response to updating the table. The pattern may indicate at least one of: a number of messages relating to an update of the plurality of data sets, a number of messages relating to an access to the plurality of data sets, a number of messages corresponding to a given amount of information, or a number of messages included in the plurality of messages.

[0043] In some embodiments, the method may further include identifying, by the one or more circuits, using the processor, based on the pattern, at least a portion of the plurality of memory devices to allocate to a given one of the actions. The method may further include, in response to receiving a second plurality of messages, monitoring, by the one or more circuits, using the processor, the pattern based on characteristics of the second plurality of messages. The method may further include detecting, by the one or more circuits, using the processor, a number of instances associated with utilization of the at least a portion of the plurality of memory devices, and in response to detecting the number of instances, identifying, by the one or more circuits, using the processor, a change to the pattern.

[0044] In some embodiments, the method may also include, in response to identifying the change in the mode, de-allocating, by the one or more circuits, at least a portion of the multiple memory devices using the processor, and processing, by the one or more circuits, at least a portion of the multiple memory devices using the processor to process at least one message of the second multiple messages.

[0045] Figure 1A block diagram of a system 100 is depicted according to some embodiments. System 100 may include a host 105, a controller 110, and a logical drive 140. In some embodiments, controller 110 may include and / or be implemented as a device described herein. In some embodiments, controller 110 may perform operations similar to the devices described herein. In some embodiments, host 105 may include a host described herein. In some embodiments, logical drive 140 may include and / or be implemented as a logical drive described herein.

[0046] The controller 110 may communicate with the host 105. For example, the controller 110 and the host 105 may exchange messages and / or otherwise communicate with each other. For example, the host 105 may provide one or more input / output (I / O) messages to the controller 110. The I / O messages may be transmitted to the controller 110 via the host 105. Figure 1 Controller 110 may communicate with logical drive 140. For example, controller 110 may be able to access information stored by logical drive 140. Continuing with this example, controller 110 may interface with logical drive 140, and when interfaced with logical drive 140, controller 110 may access information.

[0047] The I / O message may include and / or refer to the requests described herein. For example, the I / O message may include one or more write operation requests. The controller 110 may communicate with the logical drive 140. For example, the controller 110 may access and / or provide information to the logical drive 140 by executing and / or otherwise performing one or more operations. As another example, the controller 110 may perform a given action based on and / or in response to receiving one or more I / O messages. Continuing with this example, the controller 110 may perform a first given operation based on a first I / O message related to a write request, and the controller 110 may perform a second given operation based on a second I / O message related to a read request.

[0048] The controller 110 includes a processing circuit 115 and a message tracker 135. The processing circuit 115 may refer to and / or include at least one of the circuits and / or processing circuits described herein. The processing circuit 115 includes at least one processor 120 and a memory 125. The memory 125 may be one or more devices (e.g., RAM, ROM, flash memory, hard disk storage device) for storing data and / or computer code for completing and / or facilitating the various processes described herein. The memory 125 may be or include non-transient volatile memory, non-volatile memory, and non-transitory computer storage media. The memory 125 may include a database component, an object code component, a script component, or any other type of information structure for supporting the various activities and information structures described herein. The memory 125 may be communicatively coupled to the processor 120 and include computer code or instructions (e.g., firmware or software) for executing one or more processes described herein. The processor 120 may be implemented as one or more application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), a processing component group, or other suitable electronic processing components. Memory 125 may store one or more instructions that, when executed by processor 120, cause processor 120 to perform one or more of the various operations described herein. Memory 125 may store table 130. Table 130 may refer to and / or include various tables and / or data structures described herein. In some embodiments, table 130 may be located in memory 125. For example, memory 125 may hold, store and / or maintain table 130. In some embodiments, processing circuit 115 may update table 130.

[0049] Message tracker 135 may interface with processing circuit 115 and / or otherwise communicate with processing circuit 115. For example, message tracker 135 may be communicatively coupled with processing circuit 115. In some embodiments, processing circuit 115 may include message tracker 135. In some embodiments, processing circuit 115 may perform functionality similar to message tracker 135. For example, memory 125 may store firmware that, when executed by processor 120, causes processor 120 to perform operations similar to message tracker 135.

[0050] The message tracker 135 may monitor the interaction between the host 105 and the controller 110. For example, the message tracker 135 may detect and / or identify the receipt of an I / O message, and the message tracker 135 may update the table 130 to reflect the receipt of the I / O message. In some embodiments, the message tracker 135 may analyze, review, check, and / or otherwise examine the I / O message and / or information related to the I / O message (e.g., metadata). For example, the message tracker 135 may examine a first I / O message and determine that the first I / O message is related to a read request. Continuing with this example, the message tracker 135 may update a portion of the table 130 related to the read request to include an indication of the first I / O message. In some embodiments, updating one or more portions of the table 130 to include an indication of an I / O message may refer to and / or include incrementing a counter (e.g., increasing a count), updating a set of bits, increasing a count in a register, and / or other possibilities.

[0051] The logical drive 140 may include one or more logical drives 140. For example, the logical drive 140 may include multiple logical drives. The logical drive 140 may include multiple parts. The multiple parts may include the parts described herein. The multiple parts may refer to one or more parts of a given logical drive 140, and / or the multiple parts may refer to a collection of parts for one or more logical drives 140. The multiple parts may include multiple sections. For example, the first section may include one or more sections. In some embodiments, the multiple sections may be located in multiple rows of the logical drive. For example, a section may refer to and / or include one or more stripes, and the stripes may be located in one or more rows of the logical drive 140. The logical drive 140 may store and / or maintain information in one or more sections. For example, a first piece of information may be located in a first section, and a second piece of information may be located in a second section. In some embodiments, the logical drive 140 may include and / or be implemented as a physical medium. For example, the logical drive 140 may be implemented across physical disk drives, and the physical disk drives (e.g., physical media) may store information. In some embodiments, the physical media comprising and / or implementing the logical drive 140 may store one or more data sets. For example, the physical media may store at least one of the data sets described herein. In some embodiments, the physical media may refer to and / or comprise a RAID array. In some embodiments, the physical media may comprise at least one of the storage devices described herein. For example, the physical media may comprise a solid state drive.

[0052] Processing circuit 115 may receive one or more messages. For example, processing circuit 115 may receive a first message and a second message. In some embodiments, the message received by processing circuit 115 may refer to and / or include an I / O message. For example, processing circuit 115 may receive a first I / O message and a second I / O message. In some embodiments, the I / O message may be related to multiple data sets. For example, the first message may be related to a first data set located in a given segment and / or a given portion of logical drive 140. Processing circuit 115 may receive a message from host 105. For example, host 105 may transmit a first message to processing circuit 115, and processing circuit 115 may receive the first message.

[0053] The message tracker 135 may determine an amount of information corresponding to one or more data sets. For example, the message tracker 135 may determine that a first data set includes and / or is about a given number of bits and / or bytes. Continuing with this example, the first data set may be located within the logical drive 140. In some embodiments, the message tracker 135 may determine one or more amounts of information. For example, the message tracker 135 may determine a first amount of information related to the first data set, and the message tracker 135 may determine a second amount of information related to the second data set. In some embodiments, the amounts of information may be different. For example, the first data set may be larger than the second data set (e.g., include more information).

[0054] In some embodiments, message tracker 135 may determine the amount of information in response to receipt of an I / O message. For example, message tracker 135 may identify one or more data sets based on the I / O message, and message tracker 135 may determine the amount of information of the one or more data sets. In some embodiments, message tracker 135 may determine the amount of information of the one or more data sets based on the size of the data sets (e.g., the number of bits).

[0055] As a non-limiting example, the processing circuit 115 may receive a first message, and the first message may be related to a read request (e.g., to access a given piece of information). In this non-limiting example, the message tracker 135 may detect that the processing circuit 115 received the first message. Continuing with this non-limiting example, the message tracker 135 may determine the amount of information associated with the first message (e.g., the read request). In this non-limiting example, the message tracker 135 may determine the amount of information by detecting that the first message is a read request and by detecting the amount of information associated with the read request (e.g., determining the size of the data set that the read request is attempting to access).

[0056] The message tracker 135 may identify an action for one or more messages. For example, the message tracker 135 may identify a first action for a first message, and the message tracker 135 may identify a second action for a second message. In some embodiments, the action for one or more messages may include operations, steps, and / or activities that may be performed to execute and / or implement the messages. For example, the first message may be a read request, and the action for the read request may include the processing circuit 115 accessing information located in the logical drive 140. Continuing with this example, the first message may be related to a given piece of information, and the action may include the processing circuit 115 accessing the given piece of information. As another example, the second message may be a write request, and the action for the write request may include the processing circuit 115 updating the information located in the logical drive 140. Continuing with this example, the second message may include and / or otherwise identify a given piece of information, and the processing circuit 115 may provide the given piece of information to the logical drive 140. In some embodiments, the message tracker 135 may identify an action based on characteristics of the message. For example, the first message may be a read request and the read request may include a first information type (e.g., characteristics), and the second message may be a write request and the write request may include a second information type (e.g., characteristics). Continuing with this example, the message tracker 135 may determine that the first message is a read request in response to detecting that the first message includes the first information type, and the message tracker 135 may determine that the second message is a write request in response to detecting that the second message includes the second information type.

[0057] Message tracker 135 may update the table to reflect the receipt of one or more messages. For example, message tracker 135 may update table 130. In some embodiments, message tracker 135 may update table 130 to reflect the receipt of one or more messages by updating a given portion of table 130 that is related to a given message. For example, a first portion of table 130 may be related to a read request, and message tracker 135 may update (e.g., increment, adjust, and / or otherwise change) the first portion to reflect the receipt of the read request. Continuing with this example, the first portion may include a set of bits, and message tracker 135 may update table 130 to reflect the receipt of the read request by adjusting the bits to adjust the quantity (as indicated by the set of bits) from a first value to a second value.

[0058] In some embodiments, the message tracker 135 may update the table to reflect the receipt of one or more messages based on the information volume and the action. For example, the processing circuit 115 may receive a first read request (e.g., a first message), and the read request may be associated with a data set including a given number of bits (e.g., information volume). In this example, the message tracker 135 may update a first portion of the table 130 to reflect the receipt of the read request (e.g., the first portion is related to the read request), and the message tracker 135 may update a second portion of the table 130 to reflect the information volume (e.g., the second portion of the table is related to a message having a given information volume).

[0059] The message tracker 135 may determine a pattern associated with one or more messages. For example, the message tracker 135 may determine that the controller 110 receives twice as many read requests as write requests. In some embodiments, the pattern may refer to and / or include at least one of workload, workload perception, and / or operation records. The message tracker 135 may determine the pattern by at least one of analyzing, inspecting, reviewing, and / or examining the table 130. For example, the message tracker 135 may update a first portion of the table 130 in response to a subsequent read request received by the processing circuit 115, and the message tracker 135 may update a second portion of the table 130 in response to a subsequent write request received by the processing circuit 115. Continuing with this example, the message tracker 135 may determine the pattern by comparing the first portion to the second portion (e.g., which portion contains a larger number). As another example, the message tracker 135 may determine the pattern by integrating, combining, and / or otherwise merging the information contained in the portions of the table 130. For example, message tracker 135 may determine the number of read requests received by processing circuit 115, and message tracker 135 may determine the number of write requests received by processing circuit 115. Continuing with this example, message tracker 135 may combine the number of read requests and the number of write requests.

[0060] In some embodiments, message tracker 135 may update table 130 within a given amount of time (e.g., 1 day, 1 month, 1 year, etc.), and during the given amount of time, message tracker 135 may continue to update table 130 in response to processing circuit 115 receiving messages. For example, message tracker 135 may update the table for 1 month, and after completing updating the table for 1 month, message tracker 135 may determine a pattern.

[0061] In some embodiments, the pattern indicates the number and / or amount of messages. For example, the pattern may indicate the number of messages (messages received by processing circuit 115) related to a given action. In some embodiments, the pattern may indicate at least one of the following: the number of messages related to updates, the number of messages related to accesses, the number of messages corresponding to a given amount of information, and / or the number of messages included in the messages received by processing circuit 115. In some embodiments, the pattern may indicate a first number of messages related to updates of a data set, and the pattern may indicate a second number of messages related to accesses of a data set.

[0062] In some embodiments, processing circuit 115 may receive messages continuously and / or semi-continuously. For example, processing circuit 115 may receive a first message, then a second message, and then a third message. In some embodiments, processing circuit 115 may receive a first message, and processing circuit 115 may then receive a second message after a given amount of time. In some embodiments, message tracker 135 reviews the message in response to receipt of the message. In some embodiments, message tracker 135 may review multiple messages. For example, message tracker 135 may review a first message and a second message.

[0063] In some embodiments, the data sets described herein may be located in one or more rows of memory and / or associated with one or more rows of memory. For example, the first segment of the first portion of the logical drive 140 and the first segment of the second portion of the logical drive 140 may both be associated with the first row of memory. As another example, a given segment of the first portion may be associated with the first row of memory, and a given segment of the second portion may be associated with the second row of memory. The presence of bad blocks in a given row of memory may cause each segment of the given row of memory to be transferred even if one or more portions of the segments in the given row do not contain bad blocks. For example, the first row of memory described above may have bad blocks, and therefore, even when the first portion has no bad blocks, a request (e.g., an I / O message) associated with the first segment of the first portion may be transferred. In this example, the processing of the message is negatively affected because it is more time-consuming to transfer the message relative to simply executing the message.

[0064] In some embodiments, processing circuit 115 may process one or more messages. For example, processing circuit 115 may receive a message related to a read request, and processing circuit 115 may perform one or more actions to process the message. Continuing with this example, the one or more actions may include processing circuit 115 identifying at least one of a given logical drive 140 and / or a given piece of information stored by a given logical drive 140. As another example, the one or more actions may include processing circuit 115 interfacing with logical drive 140 to retrieve a given piece of information (in response to the message related to the read request).

[0065] In some embodiments, message tracker 135 may detect a transfer of a given message. For example, message tracker 135 may detect an action performed by processing circuit 115 indicating a transfer of a message. In some embodiments, message tracker 135 may update table 130 to include an indication of the transfer. For example, message tracker 135 may update a given portion of table 130 to change a quantity (represented as a bit) from a first value to a second value. In some embodiments, message tracker 135 may detect that a transfer associated with controller 110 is related to a memory device including a bad block. For example, processing circuit 115 may perform a first set of actions in response to detecting the bad block, and message tracker 135 may identify that processing circuit 115 has performed the first set of actions.

[0066] In some embodiments, the message tracker 135 may monitor the workload of the controller 110 and / or the processing circuit 115. For example, the table 130 and / or the pattern may indicate and / or record at least one of the tasks, actions, operations, steps, and / or activities performed by the controller 110. In some embodiments, the message tracker 135 may monitor subsequent messages received by the controller 110 to detect differences between the messages. For example, the message tracker 135 may have updated the table 130 based on the first plurality of messages, and the message tracker 135 may review the second plurality of messages based on the table 130. Continuing with this example, the table 130 may provide and / or indicate the workload of the controller 110, and the message tracker 135 may utilize the workload to detect when the controller 110 experiences and / or receives messages at a rate that is different from the pattern indicated in the table 130. In other words, the table 130 may indicate that the controller 110 received a given amount of read requests in a given amount of time, and the message tracker 135 may utilize the table 130 to detect when the controller 110 receives read requests at a rate that is different from the table 130.

[0067] In some embodiments, the message tracker 135 may identify a memory device and / or component for transferring messages. For example, the message tracker 135 may determine that the controller 110 is receiving messages at a rate that is different from the mode, and the message tracker 135 may transfer a given number of messages to a second controller 110 to adjust and / or change the number of messages processed by the controller 110. In some embodiments, the message tracker 135 may determine that the controller 110 is receiving multiple messages related to a given logical drive 140, and the message tracker 135 may transfer a given number of messages related to the given logical drive 140.

[0068] In some embodiments, the message tracker 135 may update the table to reflect one or more transfers. For example, the message tracker 135 may update the table 130 to reflect the number of messages transferred from the controller 110. In some embodiments, the message tracker 135 may update the table 130 to include an indication of where the message is transferred (e.g., identifying a second controller 110, identifying a given logical drive 140, etc.). In some embodiments, the message tracker 135 may determine that the number of transfers exceeds a threshold. For example, the message tracker 135 may update the table 130 to indicate a given transfer, and the message tracker 135 may detect when a given transfer exceeds a threshold (e.g., the number of transfers). As another example, the table 130 may include an overflow and / or flag that is set and / or triggered in response to a portion of the table 130 exceeding the amount of information allocated for the portion (e.g., the portion includes 4 bits, and once all 4 bits are set to 1, the portion may no longer increment). Continuing with this example, the setting of the overflow may trigger the message tracker 135 to detect that the number of transfers exceeds the threshold.

[0069] In some embodiments, the message tracker 135 may perform one or more actions to resolve the one or more transfers. For example, the message tracker 135 may identify and / or detect one or more second controllers 110 to transfer messages to based on the workload of the one or more second controllers 110. As another example, the message tracker 135 may detect that the controller 110 is interacting with a given logical drive 140 at a different rate than the one or more second logical drives 140. Continuing with this example, the message tracker 135 may move the information stored in the given logical drive 140 to the one or more second logical drives 140.

[0070] Figure 2 A system 200 is depicted according to some embodiments. System 200 includes one or more arrays 203. Arrays 203 may refer to and / or include logical drivers 140. For example, a first array 203 may include a first logical driver 140, and a second array 203 may include a second logical driver 140. Arrays 203 include portions 205 and / or arms 205. Arms 205 may refer to and / or include portions of a memory device described herein. For example, a first arm 205 may include a first portion of a memory device. Arms 205 include one or more segments (in Figure 2 0, 1, 2, N-2, and N-1). For example, the first segment of the first arm 205 may refer to and / or include stripe 0. The corresponding stripe for the corresponding arm may be included in the corresponding row of the memory. For example, Figure 2 It is illustrated that for each corresponding arm 205 , stripe 0 is included in the first row 210 .

[0071] In some embodiments, one or more arrays may be associated with one or more applications. For example, the first array 203 may be associated with an email application, and the second array 203 may be associated with a document application. Continuing with this example, the first array 203 and the second array 203 may communicate and / or interface with the controller 110. As another example, the first array 203 may interface with the first controller 110, and the second array 203 may interface with the second controller 110.

[0072] In some embodiments, the message tracker 135 may associate, connect, and / or otherwise link messages to arrays. For example, the message tracker 135 may update a portion of the table 130 that is related to a given array 203. Continuing with this example, a first portion of the table 130 may be related to messages related to the first array 203 (received by the controller 110), and a second portion of the table 130 may be related to messages related to the second array 203. In some embodiments, the first array 203 and the second array 203 may include a given number of segments (e.g., stripes), and the message tracker 135 may determine that at least one of the first array 203 and / or the second array 203 is underutilized (e.g., has free segments) based on the given number of segments.

[0073] In some embodiments, the message tracker 135 may identify at least a portion of the memory device to be allocated for a given action based on the pattern. For example, the first array 203 may include 100 sectors, and the pattern may indicate that only 50 sectors of the first array 203 are to be utilized. Continuing with this example, the message tracker 135 may identify at least one sector of the first array 203 to allocate to the given action. In other words, assuming that the first array 203 includes free sectors, the message tracker 135 may allocate a given number of free sectors to the write request.

[0074] In some embodiments, message tracker 135 may monitor the pattern based on one or more subsequent requests. For example, processing circuit 115 may receive one or more messages after table 130 has been updated to identify the pattern. Continuing with this example, message tracker 135 may monitor the pattern based on characteristics of one or more messages. In some embodiments, message tracker 135 may monitor the pattern by reviewing, analyzing and / or inspecting one or more messages. As another example, message tracker 135 may create a second version of table 130, and may update the second version of table 130 based on one or more messages. In other words, message tracker 135 may establish a workload for controller 110 (based on table 130), and message tracker 135 may create subsequent versions of table 130 to compare with the workload.

[0075] In some embodiments, the message tracker 135 may detect a number of instances associated with one or more portions of the memory device. For example, the message tracker 135 may detect a number of write operations (performed by the controller 110) to a given array 203. Continuing with this example, the given array 203 may include segments and / or portions that have been allocated by the message tracker 135. In some embodiments, the message tracker 135 may identify a change to a pattern. For example, the workload may indicate that the controller 110 performs a given number of write operations to free segments of a given array 203, and the message tracker 135 may identify a change to a pattern based on the number of write operations detected to the free segments.

[0076] In some embodiments, message tracker 135 may deallocate at least one portion in response to identifying a change in mode. For example, message tracker 135 may have allocated one or more segments of a given array 203, and message tracker 135 may deallocate one or more segments of a given array 203 in response to identifying a change in mode. In some embodiments, processing circuitry 115 may use one or more segments of a given array 203 to process at least one message. For example, one or more segments of a given array 203 may have been previously unavailable (in response to message tracker 135 having allocated one or more segments). Continuing with this example, assuming that one or more segments have been deallocated, processing circuitry 115 may use one or more segments to process a message.

[0077] Figure 3 A block diagram of a system 300 is depicted in accordance with some embodiments. The system 300 may include and / or be implemented with the system 100. The system 300 includes a host 105, a controller 110, and a logical drive 140. Figure 3 Depicts an example of processing circuit 115 receiving one or more I / O messages (shown as I / O IN) and an example of processing circuit 115 providing one or more responses (shown as I / O OUT). In some embodiments, an I / O IN message may refer to various messages described herein. For example, a first I / O IN message may be a read request. In some embodiments, an I / O OUT message may refer to and / or include information related to one or more actions. For example, a first I / O OUT message may include a given piece of information in response to a first I / O IN message related to a read request.

[0078] like Figure 3, the message tracker 135 is shown as monitoring the processing circuit 115 by accessing, viewing and / or otherwise reviewing I / O metadata. In some embodiments, the I / O metadata may include information related to I / O IN messages and / or I / O OUT messages. In some embodiments, the message tracker 135 may utilize the I / O metadata to update the table 130. For example, the message tracker 135 may determine the number of read requests that have been processed by the controller 110 based on the I / O metadata. As another example, the message tracker 135 may determine the amount of a given message that has been processed by the controller 110 based on the I / O metadata. Continuing with this example, the message tracker 135 may increment and / or count multiple messages and their corresponding sizes to determine the amount of a given message.

[0079] Figure 4 Depicted is table 400 according to some embodiments. In some embodiments, table 400 may refer to and / or include table 130. In some embodiments, table 400 may be located and / or stored in memory 125. In some embodiments, message tracker 135 may update, adjust, modify, and / or otherwise change portions and / or aspects of table 400. For example, message tracker 135 may update a first portion of table 400.

[0080] Table 400 may include one or more parts, one or more rows and / or one or more sections. For example, table 400 may include a first part, and the first part may include a first row. Continuing with this example, the first part may be associated with a given message. In some embodiments, the given message may include an I / O message.

[0081] Table 400 includes portion 405 and / or EnableCollection 405, portion 410 and / or Overflow 410, portion 415 and / or NumLargeRead 415, portion 420 and / or NumMediumRead 420, portion 425 and / or NumSmallRead 425, portion 430 and / or NumLargeWrite 430, portion 435 and / or NumMediumWrite 435, portion 440 and / or NumSmallWrite 440, portion 445 and / or ReadDataSize 445, and portion 450 and / or WriteDataSize 450. The portions (e.g., portions 405-450) include a given width (shown as bits 455). Figure 4Examples of portions with corresponding descriptions are included. For example, portion 405 is shown with a description indicating that portion 405 (based on the value of bit 455) can enable and / or disable metadata collection. Continuing with this example, bit 455 for portion 405 can be changed and / or adjusted to enable and / or disable collection. In some embodiments, the bit for portion 405 can activate and / or deactivate message tracker 135.

[0082] Although Figure 4 Descriptions of portions of table 400 (e.g., portions 405 to 450) are included, but the descriptions provide non-limiting examples of what the various portions of table 400 may represent. Additionally, while the descriptions include given numerical values, the given numerical values ​​provide non-limiting examples of what the information volumes described herein may include. For example, portion 415 is shown as (based on Figure 4 ) corresponds to a number of read I / Os (e.g., read requests) related to information (e.g., a data set) that is greater than 512 kilobytes. Continuing with this example, portion 415 (e.g., bit 455 corresponding to portion 415) may be updated by message tracker 135 based on detection that processing circuit 115 receives a subsequent read request. In other words, when processing circuit 115 receives a read request related to information that is greater than 512K, message tracker 135 may update bit 455 corresponding to portion 415. For example, message tracker 135 may increment (e.g., adjust, change, modify, etc.) bit 455 from a first value (e.g., a first set of 0 or 1) to a second value (e.g., a second set of 0 or 1).

[0083] As a non-limiting example, portion 440 may be updated by message tracker 135 in response to message tracker 135 detecting that processing circuit 115 received one or more messages related to write I / O. In this non-limiting example, bits 455 corresponding to portion 440 may include 8 bits, and the 8 bits may have a given value (e.g., 0 or 1). Continuing with this non-limiting example, message tracker 135 may update the 8 bits to change the bits from the given value to a second given value. In this non-limiting example, the given value of the bits may be 00000010 (e.g., decimal 2 represented in binary), and the second given value of the bits may be 00000011 (e.g., decimal 3 represented in binary). Continuing with this non-limiting example, updating of a bit from a given value to a second given value may indicate that message tracker 135 detected that processing circuit 115 received a read request message, and message tracker 135 then updates the bit to indicate receipt of the read request message (e.g., message tracker 135 changes the bit to represent decimal 3).

[0084] As described herein, processing circuit 115 may receive one or more messages, and the messages may be related to one or more data sets. For example, a first message may refer to a first data set, and a second message may refer to a second data set. In some embodiments, a message received by processing circuit 115 may be associated with a given action. For example, a first message may be associated with a read request (e.g., a given action). In some embodiments, message tracker 135 may update a given portion of table 400 in response to processing circuit 115 receiving a message. In some embodiments, message tracker 135 may update one or more portions of table 400. For example, a first portion of table 400 may correspond to a read request (e.g., the number of read requests received by processing circuit 115), and a second portion of table 400 may correspond to a read request related to a given amount of information (e.g., the number of read requests related to a given amount of information). Continuing with this example, message tracker 135 may detect that processing circuit 115 receives a first message related to a read request corresponding to an amount of information having a given size. Additionally, message tracker 135 may update a first portion of table 400 (in response to detecting receipt of a read request), and message tracker 135 may update a second portion of table 400 (in response to a read request corresponding to the amount of information).

[0085] In some embodiments, message tracker 135 may determine, for a message received by processing circuit 115, a given action and / or characteristic associated with the message, and message tracker 135 may update a given portion of table 400 to reflect the receipt of the message. For example, processing circuit 115 may receive a read request (e.g., a first message) and a write request (e.g., a second message). Continuing with this example, message tracker 135 may update a first portion of table 400 to include an indication of receipt of the first message (e.g., the first portion corresponds to the read request), and message tracker 135 may update a second portion of table 400 to include an indication of receipt of the second message (e.g., the second portion corresponds to the write request).

[0086] In some embodiments, portions of table 400 may reflect one or more messages and / or message characteristics. For example, table 400 may include a first portion, a second portion, and a third portion. Continuing with this example, the first portion may correspond to read requests (e.g., the value of the bit associated with the first portion indicates the number of read requests received by processing circuit 115). Additionally, the second portion may correspond to write requests (e.g., the value of the bit associated with the second portion indicates the number of write requests). Furthermore, the third portion may correspond to a combination of read requests and write requests (e.g., the value of the bit associated with the third portion indicates the number of read requests and the number of write requests).

[0087] Figure 5Flowchart depicting a process 500 for handling workload according to some embodiments. In some embodiments, message tracker 135 may perform at least one step of process 500. In some embodiments, processing circuit 115 may perform at least one step of process 500. In some embodiments, processing circuit 115 may use processor 120 to perform at least one step of process 500. In some embodiments, handling workload may refer to and / or include message tracker 135 determining the workload of processing circuit 115. In some embodiments, handling workload may include message tracker 135 sensing the workload of processing circuit 115 (e.g., workload sensing). In some embodiments, message tracker 135 may handle the workload of processing circuit 115. For example, message tracker 135 may monitor interactions between host 105 and processing circuit 115. As another example, message tracker 135 may monitor the number of messages received by processing circuit 115.

[0088] In some embodiments, at step 505, a plurality of messages related to a plurality of data sets may be received. For example, processing circuitry 115 may receive a plurality of I / O messages from host 105. In some embodiments, processing circuitry 115 may receive the I / O messages consecutively (e.g., a first message followed by a second message). In some embodiments, processing circuitry 115 may receive the I / O messages at a given frequency (e.g., a second message is received after a given amount of time between receiving a first message). In some embodiments, the plurality of data sets may be stored by one or more memory devices. For example, the plurality of data sets may be stored by physical media of logical drive 140.

[0089] In some embodiments, message tracker 135 may detect a message received by processing circuit 115. For example, message tracker 135 may detect a message received by processing circuit 115 in step 505. In some embodiments, message tracker 135 may detect receipt of a message by interfacing with processing circuit 115. For example, message tracker 135 may interface with processing circuit 115 to extract and / or obtain the I / O metadata described herein. In some embodiments, the I / O metadata may indicate receipt of a message.

[0090] In some embodiments, at step 510, an amount of information corresponding to a plurality of data sets may be determined. For example, the message tracker 135 may determine an amount of information for a data set associated with the message received in step 505. Continuing with this example, the first message may be associated with a first data set, and the second message may be associated with a second data set. In some embodiments, the message tracker 135 may determine an amount of information based on the size of one or more data sets. For example, a first data set may include a first number of bits (e.g., a first amount of information), and a second data set may include a second number of bits (e.g., a second amount of information). The first number of bits and the second number of bits may be the same. For example, the first data set may include 1024 bits, and the second data set may also include 1024 bits. As another example, the first number of bits may include 2048 bits, and the second number of bits may include 512 bits.

[0091] In some embodiments, message tracker 135 may determine the amount of information based on the identifier and / or location of one or more data sets. For example, a first data set may include a first identifier, and message tracker 135 may determine the amount of information corresponding to the first data set based on the identifier of the first data set. As another example, the first data set may be located in first array 203, and the second data set may be located in second array 203. Continuing with this example, message tracker 135 may determine and / or detect that the data set located in first array 203 includes a first amount of information, and the data set located in second array 203 includes a second amount of information.

[0092] In some embodiments, at step 515, actions for the plurality of messages may be identified. For example, message tracker 135 may determine an action for the message received in step 505. In some embodiments, the action determined in step 515 may include various actions described herein. For example, the first message may be a read request, and processing circuit 115 may process the read request by performing one or more actions. Continuing with this example, message tracker 135 may identify that the first message is a read request in response to processing circuit 115 performing the one or more actions.

[0093] In some embodiments, the message tracker 135 may identify an action based on a characteristic of a message. For example, a first message may correspond to a write request, and the write request may include given information and / or a given identifier (e.g., a characteristic). Continuing with this example, the message tracker 135 may detect a characteristic of the first message based on the first message including the given information and / or the given identifier. In some embodiments, the message tracker 135 may identify an action for a message by determining that the given message includes a given arrangement (e.g., a configuration). For example, the first message may correspond to a write request, and the write request may include a packet having a first portion and a second portion (e.g., an arrangement). Continuing with this example, the message tracker 135 may identify that the first message corresponds to a write request in response to determining that the first message includes the first portion and the second portion.

[0094] In some embodiments, at step 520, the table may be updated to reflect the receipt of the message. For example, the message tracker 135 may update the table 400 to reflect the receipt of the message received in step 505. In some embodiments, the table 400 may include one or more portions related to one or more messages. For example, a first portion may correspond to a read request and a second portion may correspond to a write request. In some embodiments, the message tracker 135 may update the portion by adjusting, changing and / or modifying a bit associated with the portion. For example, the message tracker 135 may determine that the first message is related to a read request and that the first message corresponds to an amount of information less than 256K. Continuing with this example, the message tracker 135 may update the bit 455 corresponding to the portion 425. As another example, the message tracker 135 may update the bit 455 corresponding to the portion 450.

[0095] In some embodiments, message tracker 135 may update table 400 when a message is received (e.g., a first message is received and message tracker 135 then updates table 400). In some embodiments, message tracker 135 may review the I / O metadata at one or more given time intervals, and the I / O metadata may indicate the number of messages received and information about the messages for the respective time intervals.

[0096] In some embodiments, message tracker 135 may update table 400 by incrementing a bit. For example, message tracker 135 may update bit 455 corresponding to portion 415 by 1 (e.g., before detecting a read message, bit 455 includes bit 0000, and message tracker 135 may update bit 455 to 0001 to reflect receipt of the read message).

[0097] In some embodiments, a pattern associated with the plurality of messages may be determined at step 525. For example, message tracker 135 may determine a pattern associated with the messages received at step 505. In some embodiments, message tracker 135 may determine the pattern by reviewing, inspecting, and / or analyzing table 400. For example, message tracker 135 may analyze portion 415 of table 400 to determine a number of messages associated with read requests corresponding to a data set greater than 512K (e.g., an amount of information corresponding to the data set).

[0098] In some embodiments, the pattern may include at least one of the following: the number of messages related to the update of the data set, the number of messages related to the access of the data set, the number of messages corresponding to a given amount of information, and / or the number of messages included in the message. For example, the pattern may include the number of messages received by the processing circuit 115 in step 505. As another example, the pattern may indicate the number of read requests received by the processing circuit 115 in step 505.

[0099] Although some examples of describing the steps included in process 500 are related to messages received in step 505, one or more steps of process 500 may be repeated and / or performed more than once. For example, processing circuit 115 may continuously and / or semi-continuously receive messages, and message tracker 135 may monitor and / or detect various aspects of messages received by processing circuit. As another example, processing circuit may receive a first message, and message tracker 135 may then perform at least one of steps 510 to 525 with respect to the first message. Continuing with this example, message tracker 135 may determine that the first message is a write request, and message tracker 135 may then update a given portion of table 400 to reflect the receipt of the write. Additionally, message tracker 135 may repeat at least one of steps 510 to 525 in response to processing circuit 115 receiving one or more messages.

[0100] The hardware systems described herein can be implemented in many different ways and in many different combinations of hardware and software and circuit designs. For example, all or part of an implementation may be a circuit system including an instruction processor, such as a central processing unit (CPU), a microcontroller, or a microprocessor; an application specific integrated circuit (ASIC), a programmable logic device (PLO), or a field programmable gate array (FPGA); or a circuit system including discrete logic or other circuit components, including analog circuit components, digital circuit components, or both; or any combination thereof. As an example, the circuit system may include discrete interconnected hardware components, and / or may be combined on a single integrated circuit die, distributed between multiple integrated circuit dies, or implemented in a multi-chip module (MCM) of multiple integrated circuit dies in a common package. In some embodiments, the circuit system may be provided on one or more integrated circuit dies in an integrated circuit package. In some embodiments, the integrated circuit package may be a combination of two or more packages.

[0101] The circuit system may further include or access instructions (e.g., software or firmware) executed by the circuit system. The instructions may be stored in a tangible storage medium other than a transient signal, such as flash memory, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM); or on a magnetic or optical disk, such as a compact disk read-only memory (CDROM), hard disk drive (HDD) or other magnetic or optical disk; or in or on another machine-readable medium. A product, such as a computer program product, may include a storage medium and instructions stored in or on the medium, and the instructions, when executed by the circuit system in a device, may cause the device to implement any of the processes described above or illustrated in the accompanying drawings.

[0102] The embodiments may be distributed as a circuit system among multiple system components, such as among multiple processors and memories, optionally including multiple distributed processing systems. Parameters, databases, and other data structures may be stored and managed separately, may be merged into a single memory or database, may be logically and physically organized in many different ways, and may be implemented in many different ways, including data structures as, for example, linked lists, hash tables, arrays, records, objects, or implicit storage mechanisms. Programs may be parts of a single program (e.g., subroutines), separate programs, distributed across several memories and processors, or implemented in many different ways, such as in a library, such as a shared library (e.g., a dynamic link library (DLL)). For example, a DLL may store instructions that, when executed by the circuit system, perform any of the processing described above or illustrated in the accompanying drawings.

[0103] The term "coupled" and its variations include connecting two components directly or indirectly to each other. The term "electrically coupled" and its variations include connecting two components directly or indirectly to each other through a conductive material (e.g., a metal or copper trace). Such a connection may be static (e.g., permanent or fixed) or movable (e.g., removable or releasable). Such a connection may be achieved by coupling two components directly or to each other, coupling two components to each other using a separate intermediate component and any additional intermediate components that are coupled to each other, or coupling two components to each other using an intermediate component that is integrally formed as a single monomer with one of the two components. If "coupled" or its variations are modified by additional terms (e.g., directly coupled), the general definition of "coupled" provided above is modified by the ordinary language meaning of the additional terms (e.g., "directly coupled" means the connection of two components without any separate intermediate components), resulting in a narrower definition than the general definition of "coupled" provided above. Such coupling may be mechanical, electrical, or fluidic.

[0104] The foregoing summarizes the features of several embodiments so that those skilled in the art can better understand aspects of the present disclosure. Those skilled in the art will appreciate that they can easily use the present disclosure as a basis for designing or modifying other processes and structures to implement the same purposes and / or achieve the same advantages of the embodiments described herein. Those skilled in the art will also recognize that such equivalent constructions do not depart from the spirit and scope of the present disclosure, and that they can make various changes, substitutions, and modifications herein without departing from the spirit and scope of the present disclosure.

[0105] It should be noted that certain paragraphs of the present disclosure may refer to terms related to transmission spatial streams, sounding frames, responses, and subsets of devices, such as "first" and "second", for identifying or distinguishing one from another. These terms are not intended to relate entities (e.g., first device and second device) only in time or according to a sequence, although in some cases, these entities may contain such a relationship. These terms also do not limit the number of possible entities that can operate in a system or environment. It should be understood that the system described above may provide multiple of any one or each of those components, and these components may be provided on a standalone machine or on multiple machines in a distributed system in some embodiments. In addition, the systems and methods described above may be provided as one or more computer-readable programs or executable instructions embodied on or in one or more articles of manufacture (e.g., floppy disk, hard disk, CD-ROM, flash memory card, PROM, RAM, ROM, or tape). The program may be implemented in any programming language such as LISP, PERL, C, C++, C#, or in any byte code language such as JAVA. The software program or executable instructions may be stored as object code on or in one or more articles of manufacture.

[0106] Although the foregoing written description of the methods and systems enables those skilled in the art to make and use embodiments thereof, those skilled in the art will understand and appreciate the existence of variations, combinations, and equivalents of the specific embodiments, methods, and examples herein. Therefore, the methods and systems should not be limited to the embodiments, methods, and examples described above, but to all embodiments and methods within the scope and spirit of the present disclosure.

Claims

1. A system comprising: a plurality of memory devices storing a plurality of data sets, each memory device of the plurality of memory devices comprising a physical medium for storing the plurality of data sets; and A device, which communicates with the plurality of memory devices and a host, the device comprising: One or more circuits comprising a processor and a memory, and the one or more circuits are configured to: receiving, from the host, a plurality of messages relating to the plurality of data sets; In response to receiving the plurality of messages, determining, with the processor, an amount of information corresponding to each of the plurality of data sets; identifying, with the processor, an action for each of the plurality of messages based on characteristics of the plurality of messages, the action comprising at least one of an update to the plurality of data sets or an access to the plurality of data sets; updating, using the processor, a table located in the memory to reflect receipt of the plurality of messages based on the amount of information and the action; and In response to updating the table, determining, with the processor, a pattern associated with the plurality of messages, the pattern indicating at least one of: a number of messages related to updates of the plurality of data sets; a number of messages related to access of the plurality of data sets; the number of messages corresponding to a given amount of information; or The number of messages included in the plurality of messages. 2 . The system of claim 1 , wherein the pattern indicates a first number of messages related to updating of the plurality of data sets, and the pattern indicates a second number of messages related to accessing of the plurality of data sets.

3. The system of claim 2, wherein the one or more circuits are further configured to: receiving from the host a second plurality of messages related to the plurality of data sets; identifying, using the processor, an action for a corresponding message in the second plurality of messages based on characteristics of the second plurality of messages, detecting, using the processor, differences between the plurality of messages and the second plurality of messages based on the pattern; and In response to detecting the difference, identifying, with the processor, a second plurality of memory devices to transfer at least one message of the second plurality of messages.

4. The system of claim 2, wherein the one or more circuits are further configured to: in response to a shift of at least one message in a second plurality of messages, updating, with the processor, a second table located in the memory to reflect the shift; determining, using the processor, based on the second table, that a number of transfers exceeds a threshold; and In response to determining that the number of transitions exceeds the threshold, one or more actions are performed, with the processor, to resolve the number of transitions.

5. The system of claim 1 , wherein the one or more circuits are further configured to: identifying, with the processor, at least a portion of the plurality of memory devices to assign to a given one of the actions based on the pattern; in response to receiving a second plurality of messages, monitoring, using the processor, the pattern based on characteristics of the second plurality of messages; detecting, using the processor, a number of instances associated with utilization of the at least a portion of the plurality of memory devices; and Responsive to detecting the number of instances, identifying, with the processor, a change to the mode.

6. The system of claim 5, wherein the one or more circuits are further configured to: responsive to identifying the change in the mode, de-allocating, using the processor, the at least a portion of the plurality of memory devices; and At least one message of the second plurality of messages is processed using the processor using the at least a portion of the plurality of memory devices.

7. The system of claim 1, wherein: A first message of the plurality of messages is related to a first data set of the plurality of data sets having a first amount of information; The first message of the plurality of messages is associated with an update to the first data set; and The one or more circuits are configured to reflect receipt of the first message of the plurality of messages by: updating, using the processor, a first number of messages from a first value to a second value, the first number of messages being associated with an update of the plurality of data sets, and wherein the second value of the first number of messages indicates receipt of the first message; and A second number of messages is updated, using the processor, from a third value to a fourth value, the second number of messages corresponding to the first amount of information, and wherein the fourth value of the second number of messages indicates receipt of the first message.

8. The system of claim 1, wherein the one or more circuits are further configured to: performing, using the processor, one or more actions to process the plurality of messages; In response to performing the one or more actions, detecting, with the processor, at least one message of the plurality of messages associated with a memory device of the plurality of memory devices that includes a bad block; and In response to detecting the at least one message, a second table located in the memory corresponding to memory devices of the plurality of memory devices having bad blocks is updated, using the processor, from a first size to a second size to account for the memory devices including the bad blocks.

9. The system of claim 1 , wherein the table comprises a plurality of portions, and wherein the one or more circuits are configured to use the processor to update the table located in the memory based on the amount of information and the action to reflect receipt of the plurality of messages by: in response to detecting a first message in the plurality of messages indicating a first update to a first data set in the plurality of data sets, updating, with the processor, a first portion in the plurality of portions to include an indication of receipt of the first message; in response to detecting a second message in the plurality of messages indicating a first access to a second data set in the plurality of data sets, updating, with the processor, a second portion in the plurality of portions to include an indication of receipt of the second message; updating, using the processor, a third portion of the plurality of portions based on an amount of information associated with at least one of the first message or the second message to reflect an indication of at least one of the first message or the second message corresponding to the amount of information; and A fourth portion of the plurality of portions is updated, using the processor, to indicate an indication of the first message and an indication of the second message.

10. A device for communicating with a plurality of memory devices storing a plurality of data sets and a host, each memory device of the plurality of memory devices comprising a physical medium for storing the plurality of data sets, and comprising: One or more circuits comprising a processor and a memory, and the one or more circuits are configured to: receiving, from the host, a plurality of messages relating to the plurality of data sets; In response to receiving the plurality of messages, determining, with the processor, an amount of information corresponding to each of the plurality of data sets; identifying, with the processor, an action for each of the plurality of messages based on characteristics of the plurality of messages, the action comprising at least one of an update to the plurality of data sets or an access to the plurality of data sets; updating, using the processor, a table located in the memory to reflect receipt of the plurality of messages based on the amount of information and the action; and In response to updating the table, determining, with the processor, a pattern associated with the plurality of messages, the pattern indicating at least one of: a number of messages related to updates of the plurality of data sets; a number of messages related to access of the plurality of data sets; The number of messages corresponding to a given amount of information; or The number of messages included in the plurality of messages. 11 . The device of claim 10 , wherein the pattern indicates a first number of messages related to updating of the plurality of data sets, and the pattern indicates a second number of messages related to accessing of the plurality of data sets.

12. The device of claim 11, wherein the one or more circuits are further configured to: receiving from the host a second plurality of messages related to the plurality of data sets; identifying, using the processor, an action for a corresponding message in the second plurality of messages based on characteristics of the second plurality of messages, detecting, using the processor, differences between the plurality of messages and the second plurality of messages based on the pattern; and In response to detecting the difference, identifying, with the processor, a second plurality of memory devices to transfer at least one message of the second plurality of messages.

13. The device of claim 11, wherein the one or more circuits are further configured to: in response to a shift of at least one message in a second plurality of messages, updating, with the processor, a second table located in the memory to reflect the shift; determining, using the processor, based on the second table, that a number of transfers exceeds a threshold; and In response to determining that the number of transitions exceeds the threshold, one or more actions are performed, with the processor, to resolve the number of transitions.

14. The device of claim 10, wherein the one or more circuits are further configured to: identifying, with the processor, at least a portion of the plurality of memory devices to assign to a given one of the actions based on the pattern; in response to receiving a second plurality of messages, monitoring, using the processor, the pattern based on characteristics of the second plurality of messages; detecting, using the processor, a number of instances associated with utilization of the at least a portion of the plurality of memory devices; and Responsive to detecting the number of instances, identifying, with the processor, a change to the mode.

15. The device of claim 14, wherein the one or more circuits are further configured to: responsive to identifying the change in the mode, de-allocating, using the processor, the at least a portion of the plurality of memory devices; and At least one message of the second plurality of messages is processed using the processor using the at least a portion of the plurality of memory devices.

16. The apparatus of claim 10, wherein: A first message of the plurality of messages is related to a first data set of the plurality of data sets having a first amount of information; The first message of the plurality of messages is associated with an update to the first data set; and The one or more circuits are configured to reflect receipt of the first message of the plurality of messages by: updating, using the processor, a first number of messages from a first value to a second value, the first number of messages being associated with an update of the plurality of data sets, and wherein the second value of the first number of messages indicates receipt of the first message; and A second number of messages is updated, using the processor, from a third value to a fourth value, the second number of messages corresponding to the first amount of information, and wherein the fourth value of the second number of messages indicates receipt of the first message.

17. The device of claim 10, wherein the one or more circuits are further configured to: performing, using the processor, one or more actions to process the plurality of messages; In response to performing the one or more actions, detecting, with the processor, at least one message of the plurality of messages associated with a memory device of the plurality of memory devices that includes a bad block; and In response to detecting the at least one message, a second table located in the memory corresponding to memory devices of the plurality of memory devices having bad blocks is updated, using the processor, from a first size to a second size to account for the memory devices including the bad blocks.

18. A method comprising: receiving, by one or more circuits including a processor and a memory, from a host a plurality of messages relating to a plurality of data sets stored by a plurality of memory devices, each memory device of the plurality of memory devices including a physical medium for storing the plurality of data sets; determining, by the one or more circuits using the processor, an amount of information corresponding to each of the plurality of data sets in response to receiving the plurality of messages; identifying, by the one or more circuits using the processor, an action for each of the plurality of messages based on characteristics of the plurality of messages, the action comprising at least one of an update to the plurality of data sets or an access to the plurality of data sets; updating, by the one or more circuits using the processor, a table located in the memory based on the amount of information and the action to reflect receipt of the plurality of messages; and In response to updating the table, determining, by the one or more circuits using the processor, a pattern associated with the plurality of messages, the pattern indicating at least one of: a number of messages related to updates of the plurality of data sets; a number of messages related to access of the plurality of data sets; The number of messages corresponding to a given amount of information; or The number of messages included in the plurality of messages.

19. The method according to claim 18, further comprising: identifying, by the one or more circuits using the processor, at least a portion of the plurality of memory devices to assign to a given one of the actions based on the pattern; in response to receiving a second plurality of messages, monitoring, by the one or more circuits using the processor, the pattern based on characteristics of the second plurality of messages; detecting, by the one or more circuits using the processor, a number of instances associated with utilization of the at least a portion of the plurality of memory devices; and Responsive to detecting the number of instances, identifying, by the one or more circuits using the processor, a change to the mode.

20. The method of claim 19, further comprising: responsive to identifying the change in the mode, de-allocating, by the one or more circuits using the processor, the at least a portion of the plurality of memory devices; and At least one message of the second plurality of messages is processed, by the one or more circuits, using the processor using the at least a portion of the plurality of memory devices.

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