A charging circuit, chip, device and system with integrated overvoltage protection

Abstract

The present application discloses a charging circuit, chip, device, and system with integrated overvoltage protection. The charging circuit includes a power input terminal, a charging output terminal, a current control terminal, an overvoltage protection module, and a charging control module; the overvoltage protection module includes a switch control tube, a charge pump, and a voltage adjustment circuit; the charging control module includes a constant voltage control loop, a constant current control loop, a charging current setting circuit, and a charging control tube. The present application uses a voltage adjustment circuit and a charge pump to regulate the input voltage, so that when overvoltage charging occurs, there is no need to stop charging. The charging current is set by the charging current setting circuit to maintain the charging process while ensuring charging safety. This not only improves the efficiency and continuity of charging, but also enhances the stability, reliability, and safety of charging, extending the service life of the device. It can also adapt to charging adapters with different output voltages, providing users with more charging options.

Description

Technical Field

[0001] The present invention relates to the technical field of electronic product charging, and in particular to a charging circuit, chip, device and system with integrated overvoltage protection. Background Art

[0002] Linear charging chips play a vital role in modern electronic devices. However, existing linear charging chips have some significant shortcomings in overvoltage protection. Typically, when the charging input voltage exceeds a certain voltage threshold (such as 6.8V), existing linear charging chips will simply stop charging. While this simple and direct approach can prevent overvoltage damage to the charging chip and battery to a certain extent and protect both the charging chip and the battery, it also brings many problems.

[0003] First, directly stopping charging will cause the charging process to be interrupted, which will bring inconvenience to the user. Especially in some urgent cases where charging is needed, this interruption may affect the normal use of the device.

[0004] Secondly, for some charging adapters with a wide output voltage range, existing linear charging chips cannot fully utilize their voltage advantages, limiting the flexibility and adaptability of charging.

[0005] In addition, directly stopping charging will lead to reduced charging efficiency, prolonged charging time, and affect user experience.

[0006] Moreover, in some complex charging environments, such as when the power supply fluctuates greatly, the existing overvoltage protection mechanism may frequently trigger charging to stop, further exacerbating the instability of charging. Summary of the Invention

[0007] The present invention provides a charging circuit, chip, device and system with integrated overvoltage protection, which solves the problem that existing linear charging chips will directly stop charging when charging under overvoltage conditions, resulting in interruption of the charging process, reduced charging efficiency, prolonged charging time, affecting the user experience, and even causing the device to malfunction, aggravating charging instability, and limiting the continuity, flexibility and adaptability of charging.

[0008] In order to solve the above technical problems, the technical solution adopted by the present invention is to provide a charging circuit with integrated overvoltage protection, including a power input terminal, a charging output terminal, a current control terminal, an overvoltage protection module and a charging control module; wherein, the power input terminal is used to connect to a first DC power supply, the charging output terminal is used to be electrically connected to a battery, and the current control terminal is used to be electrically connected to a voltage drop resistor and then grounded; the overvoltage protection module includes a switch control tube, a charge pump and a voltage adjustment circuit; the charging control module includes a constant voltage control loop, a constant current control loop, a charging current setting circuit and a charging control tube; the drain of the switch control tube is electrically connected to the power input terminal, the gate of the switch control tube is electrically connected to the charge pump, and the source of the switch control tube is electrically connected to the source of the charging control tube; the voltage adjustment circuit is electrically connected to the power input terminal for adjusting the voltage of the charging control tube. The first voltage of the first DC power supply is adjusted to output a second voltage; the voltage adjustment circuit is also electrically connected to the charge pump, and the charge pump is used to convert the second voltage and output a third voltage; the gate of the charging control tube is electrically connected to the constant voltage control loop and the constant current control loop, respectively, and the drain of the charging control tube is electrically connected to the constant voltage control loop, the constant current control loop and the charging output end, respectively; the constant voltage control loop is used to access the reference voltage and maintain the constant charging voltage; the constant current control loop is also electrically connected to the current control end, and the electrical connection between the constant current control loop and the current control end is electrically connected to the charging current setting circuit, and the constant current control loop is used to maintain the constant charging current; the charging current setting circuit is also electrically connected to the power input end, and the charging current setting circuit is used to set the charging current.

[0009] In some embodiments, the voltage adjustment circuit includes a first operational amplifier, a first MOS transistor, a first voltage-dividing resistor, and a second voltage-dividing resistor; the source of the first MOS transistor is electrically connected to the power input terminal, the gate is electrically connected to the output terminal of the first operational amplifier, and the drain is electrically connected to the first end of the first voltage-dividing resistor; the electrical connection between the first MOS transistor and the first voltage-dividing resistor is electrically connected to the input terminal of the charge pump; the second end of the first voltage-dividing resistor is electrically connected to the first end of the second voltage-dividing resistor, and the second end of the second voltage-dividing resistor is grounded; the electrical connection between the first voltage-dividing resistor and the second voltage-dividing resistor is electrically connected to the non-inverting input terminal of the first operational amplifier, and the inverting input terminal of the first operational amplifier is connected to the reference voltage.

[0010] In some embodiments, the charge pump includes an oscillator, a first charging capacitor, a second charging capacitor, a third charging capacitor, a fourth charging capacitor, a first switch array, a second switch array, and a Zener diode; the input end of the oscillator is electrically connected to the output end of the voltage adjustment circuit, the electrical connection between the oscillator and the voltage adjustment circuit is electrically connected to the power supply end of the first switch array, the first output end of the oscillator is electrically connected to the first ends of the first and second charging capacitors, respectively, and the second output end of the oscillator is electrically connected to the first ends of the third and fourth charging capacitors, respectively; the second end of the first charging capacitor is electrically connected to the first charging end of the second switch array, the second end of the second charging capacitor is electrically connected to the first charging end of the first switch array, the second end of the third charging capacitor is electrically connected to the second charging end of the first switch array, and the second end of the fourth charging capacitor is electrically connected to the second charging end of the second switch array; the output end of the first switch array is electrically connected to the power supply end of the second switch array, the output end of the second switch array is electrically connected to the gate of the switch control transistor, and the electrical connection between the second switch array and the switch control transistor is electrically connected to the Zener diode and then grounded.

[0011] In some embodiments, the charging current setting circuit includes a voltage sampling circuit, an initial current setting circuit, a first shunt branch, a first comparison circuit, a second shunt branch and a second comparison circuit; the voltage sampling circuit is electrically connected to the power input end, the first shunt branch, the first comparison circuit, the second shunt branch and the second comparison circuit, respectively; the input end of the initial current setting circuit is connected to the reference voltage, the output end of the initial current setting circuit is electrically connected to the first shunt branch and the second shunt branch, respectively, and the electrical connection between the initial current setting circuit and the first shunt branch and the second shunt branch is electrically connected to the constant current control loop; the first shunt branch is also electrically connected to the first comparison circuit, and the second shunt branch is also electrically connected to the second comparison circuit; the first comparison circuit is also used to access a first reference voltage, and the second comparison circuit is also used to access a second reference voltage.

[0012] In some embodiments, the constant voltage control loop includes a second operational amplifier, a first diode, a third voltage-dividing resistor, and a fourth voltage-dividing resistor; the first end of the third voltage-dividing resistor is electrically connected to the drain of the charge control tube, and the second end of the third voltage-dividing resistor is electrically connected to the fourth voltage-dividing resistor and then grounded; the electrical connection between the third voltage-dividing resistor and the fourth voltage-dividing resistor is electrically connected to the inverting input of the second operational amplifier, the non-inverting input of the second operational amplifier is connected to the reference voltage, and the output of the second operational amplifier is electrically connected to the positive electrode of the first diode; the negative electrode of the first diode is electrically connected to the gate of the charge control tube.

[0013] In some embodiments, the constant current control loop includes a current sampling circuit, a third operational amplifier and a second diode; the input end of the current sampling circuit is electrically connected to the drain of the charge control tube, and the output end of the current sampling circuit is electrically connected to the inverting input end of the third operational amplifier; the non-inverting input end of the third operational amplifier is electrically connected to the current control end, the electrical connection between the third operational amplifier and the current control end is electrically connected to the charging current setting circuit, the output end of the third operational amplifier is electrically connected to the anode of the second diode; and the cathode of the second diode is electrically connected to the gate of the charge control tube.

[0014] In some embodiments, the charging control module further includes a substrate voltage selection circuit, which includes a first comparator, a second MOS transistor and a third MOS transistor; the inverting input terminal of the first comparator is electrically connected to the source of the charging control transistor, the non-inverting input terminal of the first comparator is electrically connected to the drain of the charging control transistor, the non-inverting output terminal of the first comparator is electrically connected to the gate of the second MOS transistor, and the inverting output terminal of the first comparator is electrically connected to the gate of the third MOS transistor; the electrical connection between the inverting input terminal of the first comparator and the charging control transistor is electrically connected to the source of the second MOS transistor, and the electrical connection between the non-inverting input terminal of the first comparator and the charging control transistor is electrically connected to the source of the third MOS transistor; the drain of the second MOS transistor and the drain of the third MOS transistor are respectively electrically connected to the substrate of the charging control transistor.

[0015] The present invention also provides a charging chip with integrated overvoltage protection, comprising the charging circuit described above; wherein the power input end is a power input pin, the charging output end is a charging output pin, and the current control end is a current control pin.

[0016] The present invention also provides an electronic device, comprising a battery and a charging chip as described above that is electrically connected to the battery, wherein the charging chip is used to charge the battery.

[0017] The present invention further provides a charging system with integrated overvoltage protection, comprising a charging adapter and the electronic device as described above electrically connected to the charging adapter.

[0018] The beneficial effects of the present invention are as follows: the present invention discloses a charging circuit, chip, device and system with integrated overvoltage protection, wherein the charging circuit includes a power input terminal, a charging output terminal, a current control terminal, an overvoltage protection module and a charging control module; wherein the power input terminal is used to connect to a first DC power supply, the charging output terminal is used to electrically connect to a battery, and the current control terminal is used to electrically connect to a voltage drop resistor and then be grounded; the overvoltage protection module includes a switch control tube, a charge pump and a voltage adjustment circuit; the charging control module includes a constant voltage control loop, a constant current control loop, a charging current setting circuit and a charging control tube. The present application realizes the regulation of the input voltage through the voltage adjustment circuit and the charge pump, so that when overvoltage charging occurs, there is no need to stop charging. The charging current is set by the charging current setting circuit to limit the size of the charging current, thereby maintaining the charging process under the premise of ensuring charging safety. The present application not only avoids unnecessary charging interruptions, improves the efficiency and continuity of charging, shortens the overall charging time, improves energy utilization efficiency, and provides users with a more convenient and efficient charging experience. At the same time, it also enhances the stability and reliability of the charging circuit in complex power supply environments, enhances charging safety, reduces the risk of damage to the charging circuit and battery, and extends the service life of the device. In addition, this application can also adapt to charging adapters with different output voltages, greatly expanding the range of applicable charging adapters, being compatible with more types of charging adapters, and providing users with more charging options. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 This is a principle block diagram of a charging circuit with integrated overvoltage protection according to the present invention;

[0020] Figure 2 is a schematic diagram of a voltage regulating circuit in a charging circuit with integrated overvoltage protection according to the present invention;

[0021] Figure 3 is a schematic diagram of a charge pump in a charging circuit with integrated overvoltage protection according to the present invention;

[0022] Figure 4 It is a schematic diagram of a charging current setting circuit in a charging circuit with integrated overvoltage protection according to the present invention;

[0023] Figure 5 It is a schematic diagram of a constant voltage control loop and a constant current control loop in a charging circuit with integrated overvoltage protection according to the present invention;

[0024] Figure 6 Schematic diagram of a current sampling circuit in a charging circuit with integrated overvoltage protection according to the present invention;

[0025] Figure 7 It is a schematic diagram of a substrate voltage selection circuit in a charging circuit with integrated overvoltage protection according to the present invention;

[0026] Figure 8 This is a schematic diagram of the change of charging current in a charging circuit with integrated overvoltage protection according to the present invention;

[0027] Figure 9 This is a principle block diagram of an electronic device of the present invention;

[0028] Figure 10 This is a principle block diagram of a charging system with integrated overvoltage protection according to the present invention. DETAILED DESCRIPTION

[0029] To facilitate understanding of the present invention, the present invention will be described in more detail below with reference to the accompanying drawings and specific embodiments. Preferred embodiments of the present invention are shown in the accompanying drawings. However, the present invention can be implemented in many different forms and is not limited to the embodiments described in this specification. Rather, these embodiments are provided to provide a more thorough and comprehensive understanding of the disclosure of the present invention.

[0030] It should be noted that, unless otherwise defined, all technical and scientific terms used in this specification have the same meanings as those commonly understood by those skilled in the art to which this invention pertains. The terms used in this specification are intended solely for the purpose of describing specific embodiments and are not intended to limit the invention. The term "and / or" as used in this specification includes any and all combinations of one or more of the associated listed items.

[0031] Unless otherwise defined, technical or scientific terms used in this disclosure should have the ordinary meanings understood by people with ordinary skills in the field to which this disclosure belongs. The words "first", "second" and similar terms used in this disclosure do not indicate any order, quantity or importance, but are simply used to distinguish different components. The words "include" or "comprising" and similar terms mean that the elements or objects preceding the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects.

[0032] like Figure 1 As shown, the charging circuit with integrated overvoltage protection of the present invention includes a power input terminal VIN, a charging output terminal BAT, a current control terminal ISET, an overvoltage protection module 1, and a charging control module 2. The power input terminal VIN is used to connect to a first DC power source, the charging output terminal BAT is used to electrically connect to a battery, and the current control terminal ISET is used to electrically connect to a voltage-dropping resistor R0 and then to ground.

[0033] The overvoltage protection module 1 includes a switch control tube Q1, a charge pump 11 and a voltage adjustment circuit 12. The charging control module 2 includes a constant voltage control loop 21, a constant current control loop 22, a charging current setting circuit 23 and a charging control tube Q0.

[0034] The drain of the switch control transistor Q1 is electrically connected to the power input terminal VIN, the gate of the switch control transistor Q1 is electrically connected to the charge pump 11, and the source of the switch control transistor Q1 is electrically connected to the source of the charge control transistor Q0. A voltage adjustment circuit 12 is electrically connected to the power input terminal VIN and is configured to adjust the first voltage of the first DC power supply to output a second voltage. The voltage adjustment circuit 12 is also electrically connected to the charge pump 11, which is configured to convert the second voltage to output a third voltage. The gate of the charge control transistor Q0 is electrically connected to a constant voltage control loop 21 and a constant current control loop 22, respectively. The drain of the charge control transistor Q0 is electrically connected to the constant voltage control loop 21, the constant current control loop 22, and the charging output terminal BAT, respectively. The constant voltage control loop 21 is configured to input a reference voltage and maintain a constant charging voltage. The constant current control loop 22 is also electrically connected to the current control terminal ISET. The electrical connection between the constant current control loop 22 and the current control terminal ISET is electrically connected to a charging current setting circuit 23. The constant current control loop 22 is configured to maintain a constant charging current. The charging current setting circuit 23 is also electrically connected to the power input terminal VIN. The charging current setting circuit 23 is used to set the charging current.

[0035] In this embodiment, the switch control transistor Q1 is an NMOS transistor, and the charge control transistor Q0 is a PMOS transistor. The reference voltage is generated by a reference voltage source.

[0036] The present application realizes the regulation of the input voltage (i.e., the first voltage) through the voltage adjustment circuit 12 and the charge pump 11, so that when overvoltage charging occurs, there is no need to stop charging. The charging current is set by the charging current setting circuit 23 to limit the size of the charging current, thereby maintaining the charging process under the premise of ensuring charging safety. The present application not only avoids unnecessary charging interruptions, improves the efficiency and continuity of charging, shortens the overall charging time, improves energy utilization efficiency, and provides users with a more convenient and efficient charging experience. At the same time, it also enhances the stability and reliability of the charging circuit in a complex power supply environment, enhances the safety of charging, reduces the risk of damage to the charging circuit and battery, and extends the service life of the device. In addition, the present application can also adapt to charging adapters with different output voltages, greatly expanding the range of applicable charging adapters, being compatible with more types of charging adapters, and providing users with more charging options.

[0037] Further, combined Figure 1 、 Figure 2 As shown, in this embodiment, the voltage adjustment circuit 12 includes a first operational amplifier 13, a first MOS transistor P0, a first voltage dividing resistor R1 and a second voltage dividing resistor R2.

[0038] Specifically, the source of the first MOS transistor P0 is electrically connected to the power input terminal VIN, the gate is electrically connected to the output terminal of the first operational amplifier 13, and the drain is electrically connected to the first end of the first voltage-dividing resistor R1. The electrical connection between the first MOS transistor P0 and the first voltage-dividing resistor R1 is electrically connected to the input terminal of the charge pump 11. The second end of the first voltage-dividing resistor R1 is electrically connected to the first end of the second voltage-dividing resistor R2, and the second end of the second voltage-dividing resistor R2 is grounded. The electrical connection between the first voltage-dividing resistor R1 and the second voltage-dividing resistor R2 is electrically connected to the non-inverting input terminal of the first operational amplifier 13, and the inverting input terminal of the first operational amplifier 13 is connected to the reference voltage V REF .

[0039] The voltage regulator circuit 12 is configured to regulate the first voltage of the first DC power supply and output the regulated second voltage VLV to the charge pump 11 for further processing. The second voltage VLV is a stable internal low power supply voltage. When the first voltage is normal or abnormally overvoltage occurs, the voltage regulator circuit 12 can stably output the second voltage VLV that meets the operating requirements of the internal circuitry.

[0040] For example, when the second voltage VLV required for the internal circuit operation is 4.5V, no matter whether the first voltage is a normal voltage (such as 5V) or an abnormal overvoltage (such as 10.8V), after adjustment by the voltage adjustment circuit 12, a second voltage of 4.5V can be stably output for use in subsequent circuits.

[0041] Further, combined Figure 1 、 Figure 3 As shown, in this embodiment, the charge pump 11 includes an oscillator 14, a first charging capacitor C1, a second charging capacitor C2, a third charging capacitor C3, a fourth charging capacitor C4, a first switch array 15, a second switch array 16 and a Zener diode ZD1.

[0042] In this embodiment, the input terminal of the oscillator 14 is electrically connected to the output terminal of the voltage adjustment circuit 12 (ie Figure 2The electrical connection between the first MOS transistor P0 and the first voltage divider resistor R1 is electrically connected to the power supply terminal of the first switch array 15. The electrical connection between the oscillator 14 and the voltage adjustment circuit 12 is electrically connected to the power supply terminal of the first switch array 15. The first output terminal of the oscillator 14 is electrically connected to the first ends of the first charging capacitor C1 and the second charging capacitor C2, respectively. The second output terminal of the oscillator 14 is electrically connected to the first ends of the third charging capacitor C3 and the fourth charging capacitor C4, respectively. The second end of the first charging capacitor C1 is electrically connected to the first charging terminal of the second switch array 16, the second end of the second charging capacitor C2 is electrically connected to the first charging terminal of the first switch array 15, the second end of the third charging capacitor C3 is electrically connected to the second charging terminal of the first switch array 15, and the second end of the fourth charging capacitor C4 is electrically connected to the second charging terminal of the second switch array 16. The output terminal of the first switch array 15 is electrically connected to the power supply terminal of the second switch array 16. The output terminal of the second switch array 16 is electrically connected to the gate of the switch control transistor Q1. The electrical connection between the second switch array 16 and the switch control transistor Q1 is electrically connected to the voltage regulator diode ZD1 and then to ground.

[0043] Specifically, the first switch array 15 includes four first switch transistors (N11, N12, P11, and P12), and the second switch array 16 includes four second switch transistors (N13, N14, P13, and P14). The power supply terminal of the first switch array 15 is the electrical connection between the source of the first switch transistor N11 and the source of the first switch transistor N12. The first charging terminal of the first switch array 15 is the electrical connection between the drain of the first switch transistor N11 and the drain of the first switch transistor P11. The second charging terminal of the first switch array 15 is the electrical connection between the drain of the first switch transistor N12 and the drain of the first switch transistor P12. The output terminal of the first switch array 15 is the electrical connection between the source of the first switch transistor P11 and the source of the first switch transistor P12. The power supply end of the second switch array 16 is the electrical connection between the source of the second switch transistor N13 and the source of the second switch transistor N14. The first charging end of the second switch array 16 is the electrical connection between the drain of the second switch transistor N13 and the drain of the second switch transistor P13. The second charging end of the second switch array 16 is the electrical connection between the drain of the second switch transistor N14 and the drain of the second switch transistor P14. The output end of the second switch array 16 is the electrical connection between the source of the second switch transistor P13 and the source of the second switch transistor P14.

[0044] When the first output terminal of the oscillator 14 outputs a high level (at this time, the second output terminal outputs a low level), the first charging capacitor C1 and the second charging capacitor C2 begin to supply power, and the third charging capacitor C3 and the fourth charging capacitor C4 enter a charging mode. When the first output terminal of the oscillator 14 outputs a low level (at this time, the second output terminal outputs a high level), the first charging capacitor C1 and the second charging capacitor C2 enter a charging mode, and the third charging capacitor C3 and the fourth charging capacitor C4 begin to supply power.

[0045] The charge pump 11 is configured to convert the second voltage VLV to output a third voltage VGate. The third voltage VGate is the boosted voltage achieved by the charge pump 11 based on the second voltage VLV. In this embodiment, the third voltage VGate is substantially slightly higher than 6V. As long as the charge pump 11 is operating, the third voltage VGate ensures that the switch control transistor Q1 is fully turned on. Even if the first voltage exceeds the overvoltage threshold, the third voltage VGate prevents breakdown or damage to the gate of the switch control transistor Q1. This allows for a stable output of the charging voltage VCHG, which is approximately VGate-VGS (i.e., the third voltage VGate minus the gate-source voltage of the switch control transistor Q1). If the first voltage is 20V, the voltage difference between 20V and VGate-VGS appears across the switch control transistor Q1. To prevent damage to the switch control transistor Q1, the charging current needs to be adjusted.

[0046] Further, combined Figure 1 、 Figure 4 As shown, in this embodiment, the charging current setting circuit 23 includes a voltage sampling circuit 24 , an initial current setting circuit 25 , a first shunt branch 26 , a first comparison circuit 27 , a second shunt branch 28 and a second comparison circuit 29 .

[0047] In this embodiment, the voltage sampling circuit 24 is electrically connected to the power input terminal VIN, the first shunt branch 26, the first comparison circuit 27, the second shunt branch 28 and the second comparison circuit 29. The input terminal of the initial current setting circuit 25 is connected to the reference voltage V REF The output end of the initial current setting circuit 25 is electrically connected to the first shunt branch 26 and the second shunt branch 28, respectively. The electrical connection between the initial current setting circuit 25, the first shunt branch 26, and the second shunt branch 28 is electrically connected to the constant current control loop 22. The first shunt branch 26 is also electrically connected to the first comparison circuit 27, and the second shunt branch 28 is also electrically connected to the second comparison circuit 29. The first comparison circuit 27 is also used to input the first reference voltage V1, and the second comparison circuit 29 is also used to input the second reference voltage V2.

[0048] Specifically, the voltage sampling circuit 24 includes a first sampling resistor R3 and a second sampling resistor R4. The first end of the first sampling resistor R3 is electrically connected to the power input terminal VIN, and the second end of the first sampling resistor R3 is electrically connected to the second sampling resistor R4 and then grounded. The electrical connection between the first sampling resistor R3 and the second sampling resistor R4 outputs a sampled voltage V F .

[0049] The initial current setting circuit 25 includes a fourth operational amplifier A1, a fifth NMOS transistor N5, a resistor R5, a first PMOS transistor P1 and a second PMOS transistor P2. The inverting input terminal of the fourth operational amplifier A1 is connected to the reference voltage V REF The non-inverting input of the fourth operational amplifier A1 is electrically connected to the source of the fifth NMOS transistor N5. The electrical connection between the non-inverting input of the fourth operational amplifier A1 and the fifth NMOS transistor N5 is electrically connected to a resistor R5 and then to ground. The output of the fourth operational amplifier A1 is electrically connected to the gate of the fifth NMOS transistor N5. The drain of the fifth NMOS transistor N5 is electrically connected to the drain of the first PMOS transistor P1. The gate of the first PMOS transistor P1 is electrically connected to the gate of the second PMOS transistor P2. The source of the first PMOS transistor P1 is electrically connected to the source of the second PMOS transistor P2. The drain of the second PMOS transistor P2 is electrically connected to the first shunt branch 26 and the second shunt branch 28, respectively.

[0050] Furthermore, the first shunt branch 26 includes a fifth operational amplifier A2, a sixth NMOS transistor N6, a resistor R6, a third PMOS transistor P3, a fourth PMOS transistor P4, a first NMOS transistor N1, and a second NMOS transistor N2. The first comparison circuit 27 includes a second comparator 31. The inverting input terminal of the fifth operational amplifier A2 is connected to the sampling voltage V F The non-inverting input terminal of the fifth operational amplifier A2 is electrically connected to the source of the sixth NMOS transistor N6. The electrical connection between the non-inverting input terminal of the fifth operational amplifier A2 and the sixth NMOS transistor N6 is electrically connected to resistor R6 and then to ground. The output terminal of the fifth operational amplifier A2 is electrically connected to the gate of the sixth NMOS transistor N6. The drain of the sixth NMOS transistor N6 is electrically connected to the drain of the third PMOS transistor P3. The gate of the third PMOS transistor P3 is electrically connected to the gate of the fourth PMOS transistor P4. The source of the third PMOS transistor P3 is electrically connected to the source of the fourth PMOS transistor P4. The drain of the fourth PMOS transistor P4 is electrically connected to the drain of the first NMOS transistor N1. The source of the first NMOS transistor N1 is grounded. The gate of the first NMOS transistor N1 is electrically connected to the gate of the second NMOS transistor N2. The source of the second NMOS transistor N2 is grounded. The drain of the second NMOS transistor N2 is electrically connected to the drain of the second PMOS transistor P2. The enable control terminal of the fifth operational amplifier A2 is electrically connected to the output terminal of the second comparator 31, and the non-inverting input terminal of the second comparator 31 is connected to the sampling voltage V F , the inverting input terminal of the second comparator 31 is connected to the first reference voltage V1.

[0051] Furthermore, the second shunt branch 28 includes a sixth operational amplifier A3, a seventh NMOS transistor N7, a resistor R7, a fifth PMOS transistor P5, a sixth PMOS transistor P6, a third NMOS transistor N3, and a fourth NMOS transistor N4. The second comparison circuit 29 includes a third comparator 32. The specific circuit connections of the second shunt branch 28 and the second comparison circuit 29 can be referenced to the specific circuit connections of the first shunt branch 26 and the first comparison circuit 27, and will not be repeated here.

[0052] Figure 8 This is a schematic diagram of the change of charging current, combined with Figure 8 As shown, the principle of the charging current setting circuit 23 is:

[0053] When the sampling voltage V F When the first reference voltage V1 is between the second reference voltage V2, the input first voltage is within a normal range and charging can be performed normally. The first shunt branch 26 and the second shunt branch 28 are not working, and the output initial current Iini is the charging current Iset.

[0054] When the sampling voltage V F When the sampling voltage V is less than the first reference voltage V1, the first comparison circuit 27 controls the first shunt branch 26 to start working. The first shunt branch 26 shunts the initial current Iini output by the initial current setting circuit 25 to generate a first current I1 and output a charging current Iset. F The first current I1 increases continuously, and accordingly, the charging current Iset decreases accordingly. Figure 8 Through the above process, it can be achieved that when the power supply capacity of the input first voltage is insufficient, the charging current Iset is ensured to increase with the sampling voltage V F The charging current Iset is automatically adjusted to reduce during the charging process, ensuring that the operation of other devices powered by the first voltage will not be greatly affected. F When the first current I1 is greater than the first reference voltage V1, the first current I1 will automatically disappear and will not affect the normal charging process.

[0055] When the sampling voltage V F When the sampling voltage V is greater than the second reference voltage V2, the second comparison circuit 29 controls the second shunt branch 28 to start working. The second shunt branch 28 shunts the initial current Iini output by the initial current setting circuit 25 to generate a second current I2 and output a charging current Iset. F As the second current I2 increases, the charging current Iset decreases accordingly. Figure 8Through the above process, when the input first voltage exceeds the preset value, the charging current Iset is automatically adjusted so that the charging current Iset is automatically reduced, thereby reducing internal power loss and ensuring safe charging.

[0056] Reference Figure 8 With the setting, we can ensure that the charging current Iset is automatically reduced within the full voltage range of the input first voltage to adapt to a safer charging process.

[0057] It should be noted that the magnitudes of the first reference voltage V1 and the second reference voltage V2 can be set as needed.

[0058] Further, combined Figure 1 、 Figure 5 As shown, in this embodiment, the constant voltage control loop 21 includes a second operational amplifier A4, a first diode D1, a third voltage dividing resistor R8 and a fourth voltage dividing resistor R9.

[0059] Specifically, the first end of the third voltage-dividing resistor R8 is electrically connected to the drain of the charging control tube Q0, and the second end of the third voltage-dividing resistor R8 is electrically connected to the fourth voltage-dividing resistor R9 and then grounded. The electrical connection between the third voltage-dividing resistor R8 and the fourth voltage-dividing resistor R9 is electrically connected to the inverting input terminal of the second operational amplifier A4, and the non-inverting input terminal of the second operational amplifier A4 is connected to the reference voltage V REF The output end of the second operational amplifier A4 is electrically connected to the anode of the first diode D1; the cathode of the first diode D1 is electrically connected to the gate of the charging control tube Q0.

[0060] Further, combined Figure 1 、 Figure 5 、 Figure 6 As shown, in this embodiment, the constant current control loop 22 includes a current sampling circuit 41, a third operational amplifier A5 and a second diode D2.

[0061] Specifically, the input end of the current sampling circuit 41 is electrically connected to the drain of the charging control tube Q0, and the output end of the current sampling circuit 41 is electrically connected to the inverting input end of the third operational amplifier A5; the non-inverting input end of the third operational amplifier A5 is electrically connected to the current control end ISET, and the electrical connection between the third operational amplifier A5 and the current control end ISET is electrically connected to the charging current setting circuit 23, and the output end of the third operational amplifier A5 is electrically connected to the anode of the second diode D2; the cathode of the second diode D2 is electrically connected to the gate of the charging control tube Q0.

[0062] Further, such as Figure 6 As shown, the current sampling circuit 41 includes a seventh operational amplifier A6, a seventh PMOS transistor P7, an eighth PMOS transistor P8 and a resistor R10.

[0063] Specifically, the non-inverting input terminal of the seventh operational amplifier A6 is electrically connected to the drain of the charge control tube Q0, the inverting input terminal of the seventh operational amplifier A6 is electrically connected to the drain of the seventh PMOS tube P7, the source of the seventh PMOS tube P7 is electrically connected to the source of the charge control tube Q0, and the gate of the seventh PMOS tube P7 is electrically connected to the gate of the charge control tube Q0. The electrical connection between the seventh operational amplifier A6 and the seventh PMOS tube P7 is electrically connected to the source of the eighth PMOS tube P8, the gate of the eighth PMOS tube P8 is electrically connected to the output terminal of the seventh operational amplifier A6, the drain of the eighth PMOS tube P8 is electrically connected to the resistor R10 and then to ground, and the electrical connection between the eighth PMOS tube P8 and the resistor R10 is electrically connected to Figure 5 The inverting input terminal of the third operational amplifier A5.

[0064] Further, combined Figure 1 、 Figure 7 As shown, in this embodiment, the charging control module 2 further includes a substrate voltage selection circuit, which includes a first comparator 33, a second MOS transistor P9 and a third MOS transistor P10.

[0065] The inverting input of the first comparator 33 is electrically connected to the source of the charge control transistor Q0, the non-inverting input of the first comparator 33 is electrically connected to the drain of the charge control transistor Q0, the non-inverting output of the first comparator 33 is electrically connected to the gate of the second MOS transistor P9, and the inverting output of the first comparator 33 is electrically connected to the gate of the third MOS transistor P10. The electrical connection between the inverting input of the first comparator 33 and the charge control transistor Q0 is electrically connected to the source of the second MOS transistor P9, and the electrical connection between the non-inverting input of the first comparator 33 and the charge control transistor Q0 is electrically connected to the source of the third MOS transistor P10. The drains of the second MOS transistor P9 and the drains of the third MOS transistor P10 are respectively electrically connected to the substrate of the charge control transistor Q0.

[0066] The substrate voltage selection circuit is used to select the substrate of the charging control tube Q0. When the source voltage of the charging control tube Q0 is higher than the drain voltage, the substrate of the charging control tube Q0 is connected to the source; when the source voltage of the charging control tube Q0 is lower than the drain voltage, the substrate of the charging control tube Q0 is connected to the drain.

[0067] Based on the same inventive concept, the present invention also provides a charging chip with integrated overvoltage protection, comprising the aforementioned charging circuit, wherein the power input terminal is a power input pin, the charging output terminal is a charging output pin, and the current control terminal is a current control pin.

[0068] In this application, other technical features of the above-mentioned charging chip are the same as the features disclosed in the above-mentioned charging circuit embodiment and will not be repeated here.

[0069] like Figure 9As shown, based on the same inventive concept, the present invention also provides an electronic device 8, including a battery 801, and a charging chip 802 as described above, which is electrically connected to the battery 801, and the charging chip 802 is used to charge the battery 801.

[0070] In this application, other technical features of the above-mentioned electronic device 8 are the same as the features disclosed in the above-mentioned charging circuit embodiment, and will not be repeated here.

[0071] like Figure 10 As shown, based on the same inventive concept, the present invention also provides a charging system with integrated overvoltage protection, including a charging adapter 9 and an electronic device 8 as described above that is electrically connected to the charging adapter 9.

[0072] In this application, other technical features of the above-mentioned charging system are the same as the features disclosed in the above-mentioned charging circuit embodiment and will not be repeated here.

[0073] In summary, this application has the following beneficial effects:

[0074] First, it greatly expands the applicable voltage range of the charging adapter 9. Previously, the charging chip 802 could only adapt to a specific voltage range, but now it is compatible with more types, especially charging adapters 9 with a standard output of 9V, providing users with more charging options.

[0075] Secondly, it significantly improves the continuity and stability of charging, avoids frequent interruptions to charging due to overvoltage, ensures a smooth charging process, and reduces interference with user use.

[0076] Third, it effectively improves charging efficiency. By avoiding unnecessary charging interruptions and optimizing current control, the overall charging time is shortened and energy utilization efficiency is improved.

[0077] Fourthly, the safety of charging is enhanced. In the event of overvoltage, the internal circuit voltage adjustment and current limitation reduce the risk of damage to the charging chip 802 and the battery 801, thereby extending the service life of the electronic device 8.

[0078] It can be seen that the present invention discloses a charging circuit, chip, device and system with integrated overvoltage protection, wherein the charging circuit includes a power input terminal, a charging output terminal, a current control terminal, an overvoltage protection module and a charging control module; wherein the power input terminal is used to access a first DC power supply, the charging output terminal is used to be electrically connected to a battery, and the current control terminal is used to be electrically connected to a voltage drop resistor and then grounded; the overvoltage protection module includes a switch control tube, a charge pump and a voltage adjustment circuit; the charging control module includes a constant voltage control loop, a constant current control loop, a charging current setting circuit and a charging control tube. The present application realizes the regulation of the input voltage through a voltage adjustment circuit and a charge pump, so that when overvoltage charging occurs, there is no need to stop charging. The charging current is set by the charging current setting circuit to limit the size of the charging current, thereby maintaining the charging process under the premise of ensuring charging safety. The present application not only avoids unnecessary charging interruptions, improves the efficiency and continuity of charging, shortens the overall charging time, improves energy utilization efficiency, and provides users with a more convenient and efficient charging experience. At the same time, it also enhances the stability and reliability of the charging circuit in complex power supply environments, enhances charging safety, reduces the risk of damage to the charging circuit and battery, and extends the service life of the device. In addition, this application can also adapt to charging adapters with different output voltages, greatly expanding the range of applicable charging adapters, being compatible with more types of charging adapters, and providing users with more charging options.

[0079] The above are merely embodiments of the present invention and are not intended to limit the patent scope of the present invention. Any equivalent structural transformations made using the contents of the present invention's description and drawings, or directly or indirectly applied to other related technical fields, are also included in the patent protection scope of the present invention.

Claims

1. A charging circuit with integrated overvoltage protection, characterized in that: It includes a power input terminal, a charging output terminal, a current control terminal, an overvoltage protection module, and a charging control module; wherein the power input terminal is used to connect to a first DC power supply, the charging output terminal is used to be electrically connected to a battery, and the current control terminal is used to be electrically connected to a voltage-dropping resistor and then grounded; The overvoltage protection module includes a switch control tube, a charge pump and a voltage adjustment circuit; the charging control module includes a constant voltage control loop, a constant current control loop, a charging current setting circuit and a charging control tube; The drain of the switch control tube is electrically connected to the power input terminal, the gate of the switch control tube is electrically connected to the charge pump, and the source of the switch control tube is electrically connected to the source of the charge control tube; the voltage adjustment circuit is electrically connected to the power input terminal, and is used to adjust the first voltage of the first DC power supply and output a second voltage; the voltage adjustment circuit is also electrically connected to the charge pump, and the charge pump is used to convert the second voltage and output a third voltage; The gate of the charging control tube is electrically connected to the constant voltage control loop and the constant current control loop, respectively, and the drain of the charging control tube is electrically connected to the constant voltage control loop, the constant current control loop and the charging output terminal, respectively; the constant voltage control loop is used to access the reference voltage and maintain the constant charging voltage; the constant current control loop is also electrically connected to the current control terminal, and the electrical connection between the constant current control loop and the current control terminal is electrically connected to the charging current setting circuit, and the constant current control loop is used to maintain the constant charging current; the charging current setting circuit is also electrically connected to the power input terminal, and the charging current setting circuit is used to set the charging current; The charging current setting circuit includes a voltage sampling circuit, an initial current setting circuit, a first shunt branch, a first comparison circuit, a second shunt branch and a second comparison circuit; The voltage sampling circuit is electrically connected to the power supply input end, the first shunt branch, the first comparison circuit, the second shunt branch and the second comparison circuit respectively; the input end of the initial current setting circuit is connected to the reference voltage, and the output end of the initial current setting circuit is electrically connected to the first shunt branch and the second shunt branch respectively, and the constant current control loop is also electrically connected at the electrical connection between the initial current setting circuit and the first shunt branch and the second shunt branch; the first shunt branch is also electrically connected to the first comparison circuit, and the second shunt branch is also electrically connected to the second comparison circuit; the first comparison circuit is also used to access a first reference voltage, and the second comparison circuit is also used to access a second reference voltage.

2. The charging circuit according to claim 1, wherein: The voltage adjustment circuit includes a first operational amplifier, a first MOS transistor, a first voltage dividing resistor and a second voltage dividing resistor; The source of the first MOS transistor is electrically connected to the power input terminal, the gate is electrically connected to the output terminal of the first operational amplifier, and the drain is electrically connected to the first end of the first voltage-dividing resistor. The electrical connection between the first MOS transistor and the first voltage-dividing resistor is electrically connected to the input terminal of the charge pump; the second end of the first voltage-dividing resistor is electrically connected to the first end of the second voltage-dividing resistor, and the second end of the second voltage-dividing resistor is grounded; the electrical connection between the first voltage-dividing resistor and the second voltage-dividing resistor is electrically connected to the non-inverting input terminal of the first operational amplifier, and the inverting input terminal of the first operational amplifier is connected to the reference voltage.

3. The charging circuit according to claim 1, wherein: The charge pump includes an oscillator, a first charging capacitor, a second charging capacitor, a third charging capacitor, a fourth charging capacitor, a first switch array, a second switch array and a voltage stabilizing diode; The input end of the oscillator is electrically connected to the output end of the voltage regulation circuit, the electrical connection between the oscillator and the voltage regulation circuit is electrically connected to the power supply end of the first switch array, the first output end of the oscillator is electrically connected to the first ends of the first charging capacitor and the second charging capacitor respectively, and the second output end of the oscillator is electrically connected to the first ends of the third charging capacitor and the fourth charging capacitor respectively; the second end of the first charging capacitor is electrically connected to the first charging end of the second switch array, the second end of the second charging capacitor is electrically connected to the first charging end of the first switch array, the second end of the third charging capacitor is electrically connected to the second charging end of the first switch array, and the second end of the fourth charging capacitor is electrically connected to the second charging end of the second switch array; the output end of the first switch array is electrically connected to the power supply end of the second switch array, the output end of the second switch array is electrically connected to the gate of the switch control tube, and the electrical connection between the second switch array and the switch control tube is electrically connected to the voltage regulator diode and then grounded.

4. The charging circuit according to claim 1, wherein: The constant voltage control loop includes a second operational amplifier, a first diode, a third voltage dividing resistor and a fourth voltage dividing resistor; The first end of the third voltage-dividing resistor is electrically connected to the drain of the charge control tube, and the second end of the third voltage-dividing resistor is electrically connected to the fourth voltage-dividing resistor and then grounded; the electrical connection between the third voltage-dividing resistor and the fourth voltage-dividing resistor is electrically connected to the inverting input terminal of the second operational amplifier, the non-inverting input terminal of the second operational amplifier is connected to the reference voltage, the output terminal of the second operational amplifier is electrically connected to the anode of the first diode; and the cathode of the first diode is electrically connected to the gate of the charge control tube.

5. The charging circuit according to claim 1, wherein: The constant current control loop includes a current sampling circuit, a third operational amplifier and a second diode; The input end of the current sampling circuit is electrically connected to the drain of the charge control tube, and the output end of the current sampling circuit is electrically connected to the inverting input end of the third operational amplifier; the non-inverting input end of the third operational amplifier is electrically connected to the current control end, the electrical connection between the third operational amplifier and the current control end is electrically connected to the charging current setting circuit, the output end of the third operational amplifier is electrically connected to the anode of the second diode; and the cathode of the second diode is electrically connected to the gate of the charge control tube.

6. The charging circuit according to claim 1, wherein: The charging control module further includes a substrate voltage selection circuit, which includes a first comparator, a second MOS transistor and a third MOS transistor; The inverting input terminal of the first comparator is electrically connected to the source of the charge control tube, the non-inverting input terminal of the first comparator is electrically connected to the drain of the charge control tube, the non-inverting output terminal of the first comparator is electrically connected to the gate of the second MOS tube, and the inverting output terminal of the first comparator is electrically connected to the gate of the third MOS tube; The electrical connection point between the inverting input terminal of the first comparator and the charging control tube is electrically connected to the source of the second MOS tube, and the electrical connection point between the non-inverting input terminal of the first comparator and the charging control tube is electrically connected to the source of the third MOS tube; the drain of the second MOS tube and the drain of the third MOS tube are respectively electrically connected to the substrate of the charging control tube.

7. A charging chip with integrated overvoltage protection, characterized in that: The charging circuit comprises the charging circuit according to any one of claims 1 to 6; wherein the power input terminal is a power input pin, the charging output terminal is a charging output pin, and the current control terminal is a current control pin.

8. An electronic device, characterized in that: The device comprises a battery and a charging chip as claimed in claim 7 electrically connected to the battery, wherein the charging chip is used to charge the battery.

9. A charging system with integrated overvoltage protection, characterized in that: The device comprises a charging adapter and the electronic device according to claim 8 electrically connected to the charging adapter.

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