Port bandwidth allocation method and related device

Abstract

The invention discloses a port bandwidth allocation method and a related device, the method is applied to an embedded central processing unit of a switch chip, and the method comprises the following steps: polling and scanning Mac statistical data stored in the switch chip to obtain port load data, the Mac statistical data comprises a forwarding port of a message forwarded to each Mac address by a switch in real time and the size of the message, and the port load data comprises the real-time rate of each port; obtaining a bandwidth allocation strategy of a data path based on the port load data; and adjusting the bandwidth of each data path based on the bandwidth allocation strategy of the data path. According to the method and the device, the traffic load condition of each port can be monitored in real time and the bandwidth allocation of the data path can be dynamically adjusted under the conditions of relatively low resource occupation and relatively high processing rate, so that the bandwidth utilization rate of each data path is maximized, and the real-time performance and the effect of bandwidth allocation are effectively improved.

Description

Technical Field

[0001] The present application belongs to the technical field of switches, and specifically relates to a method for allocating port bandwidth and a related device. Background Art

[0002] In modern high-speed network communications, as the demand for data transmission continues to grow, traditional bandwidth allocation methods are unable to cope with dynamic traffic changes under ultra-bandwidth conditions, resulting in the problem of unbalanced port bandwidth allocation, causing excessive packet loss on some ports, affecting normal business, while other ports are idle, thereby reducing the overall system's bandwidth utilization and data transmission efficiency.

[0003] In order to solve the problem of uneven bandwidth allocation under ultra-bandwidth conditions, the prior art adopts a method of monitoring data traffic with software, specifically, starting a thread through the CPU, monitoring the traffic data of each port in real time, calculating the corresponding bandwidth allocation information through software, and finally passing it to the switch chip for actual bandwidth allocation. In this allocation method, the CPU needs to regularly monitor the traffic of all ports, and record and calculate in real time, which occupies a large amount of computing resources, and the time interval for each thread to cyclically scan the port traffic is large, which easily leads to traffic data loss. In addition, since the monitoring and calculation are implemented by software, the processing speed is slow, and it is difficult to ensure the rapid processing and transmission of data. The traffic on the port is in Gpbs, and the monitoring frequency cannot match the actual high-speed network requirements. In particular, this method cannot monitor the actual port traffic in real time, because the actual traffic of the port changes in real time, requires a lot of calculations, and can only be calculated based on the pre-configured port rate, resulting in inaccurate monitoring data, affecting the effect of bandwidth allocation. Summary of the invention

[0004] The purpose of the present application is to provide a method and related device for allocating port bandwidth to solve the technical problems of high CPU resource usage, slow processing speed and inaccurate traffic monitoring in the prior art using software to monitor data traffic.

[0005] In order to achieve the above-mentioned object, the first aspect of the present application provides a method for allocating port bandwidth, which is applied to an embedded central processing unit of a switch chip, and the method comprises:

[0006] Polling and scanning the Mac statistical data stored in the switch chip to obtain port load data, wherein the Mac statistical data includes the forwarding port and message size of the message forwarded by the switch to each Mac address in real time, and the port load data includes the real-time rate of each port;

[0007] Based on the port load data, a bandwidth allocation strategy for the data path is obtained;

[0008] Based on the bandwidth allocation policy of the data path, the bandwidth of each data path is adjusted.

[0009] In one or more embodiments, the Mac statistical data includes multiple Mac statistical sub-tables, each of which is used to record the size of all or part of the messages forwarded in real time by the corresponding port, and each port corresponds to one or more Mac statistical sub-tables.

[0010] In one or more embodiments, the step of scanning the Mac statistical data stored in the switch chip to obtain the port load data includes:

[0011] Scan all Mac statistical sub-tables stored in the switch chip to obtain the byte statistics of the real-time forwarded messages recorded in each Mac statistical sub-table;

[0012] The byte statistical data of several Mac statistical sub-tables corresponding to the target port are added together to obtain the real-time rate of the target port.

[0013] In one or more implementations, the step of obtaining a bandwidth allocation strategy for a data path based on the port load data includes:

[0014] Based on the port load data, calculating the real-time load data volume of each data path;

[0015] Based on the real-time rate of each data path, bandwidth ratio data is obtained, wherein the bandwidth ratio data includes a ratio of real-time load data amounts of multiple data paths in the same data packet pipeline;

[0016] The bandwidth allocation strategy is obtained based on the bandwidth ratio data and the total bandwidth of the data packet pipeline.

[0017] In one or more embodiments, the step of calculating the real-time load data volume of each data path based on the port load data includes:

[0018] The real-time rates of the ports belonging to the target data path are added together to obtain the real-time load data volume of the target data path.

[0019] In one or more embodiments, the step of adjusting the bandwidth of each data path based on the bandwidth allocation strategy of the data path includes:

[0020] Based on the bandwidth allocation strategy, the bandwidth configuration table entry of each data packet pipeline stored in the switch chip is updated, and the bandwidth configuration table entry is used to describe the bandwidth of each data path in the corresponding data packet pipeline.

[0021] In order to achieve the above-mentioned object, the second aspect of the present application provides a device for allocating port bandwidth, which is applied to an embedded central processor of a switch chip, and the device includes:

[0022] A real-time monitoring module, used for polling and scanning Mac statistical data stored in the switch chip to obtain port load data, wherein the Mac statistical data includes the forwarding port and message size of the message forwarded by the switch to each Mac address in real time, and the port load data includes the real-time rate of each port;

[0023] A scheduling algorithm module, used to obtain a bandwidth allocation strategy for a data path based on the port load data;

[0024] The bandwidth control module is used to adjust the bandwidth of each data path based on the bandwidth allocation strategy of the data path.

[0025] In order to achieve the above-mentioned object, the third aspect of the present application provides a switch chip, including:

[0026] A storage module, used to store Mac statistical data, wherein the Mac statistical data includes a forwarding port and a message size of a message forwarded by the switch to each Mac address in real time;

[0027] The embedded central processing unit is used to poll and scan the Mac statistical data to obtain port load data, wherein the port load data includes the real-time rate of each port, obtain the bandwidth allocation strategy of the data path based on the port load data, and adjust the bandwidth of each data path based on the bandwidth allocation strategy of the data path.

[0028] In order to achieve the above-mentioned object, the fourth aspect of the present application provides an electronic device, including:

[0029] at least one processor; and

[0030] A memory storing instructions, wherein when the instructions are executed by the at least one processor, the at least one processor executes the method for allocating port bandwidth as described in any one of the above embodiments.

[0031] In order to achieve the above-mentioned purpose, the fifth aspect of the present application provides a machine-readable storage medium, which stores executable instructions, and when the instructions are executed, the machine executes the method for port bandwidth allocation as described in any of the above-mentioned embodiments.

[0032] Different from the prior art, the beneficial effects of this application are:

[0033] The present application can monitor the traffic load of each port in real time with lower resource occupancy and faster processing rate, and dynamically adjust the bandwidth allocation of the data path to ensure that the bandwidth utilization of each data path is maximized, effectively improving the real-time performance and effect of bandwidth allocation. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0035] Figure 1 It is a schematic diagram of an application scenario of a data transmission path of a switch chip;

[0036] Figure 2 It is a schematic diagram of another application scenario of the data transmission path of the switch chip;

[0037] Figure 3 It is a flow chart of an implementation method of a port bandwidth allocation method of the present application;

[0038] Figure 4 yes Figure 3 A schematic flow chart of an implementation method corresponding to S100;

[0039] Figure 5 yes Figure 3 A schematic flow chart of an implementation method corresponding to S200;

[0040] Figure 6 It is a structural schematic diagram of an implementation method of a device for allocating port bandwidth of the present application;

[0041] Figure 7 This is a schematic diagram of the structure of an implementation scheme of a switch chip of the present application;

[0042] Figure 8 It is a schematic structural diagram of an embodiment of an electronic device of the present application. DETAILED DESCRIPTION

[0043] In modern high-speed network communications, as the demand for data transmission continues to grow, traditional bandwidth allocation methods are unable to cope with dynamic traffic changes under ultra-bandwidth conditions, resulting in an imbalance in port bandwidth allocation. This imbalance can cause excessive packet loss on some ports, affecting normal business, while other ports are idle, thereby reducing the overall system bandwidth utilization and data transmission efficiency.

[0044] See also Figure 1 , Figure 1 Figure 1 is a schematic diagram of a switch chip's data transmission path and an application scenario. Figure 1 As shown in the figure, the switch chip includes two data paths Datapath0 and Datapath1, each of which includes 24 ports. The two data paths together form a data packet pipeline PiPline. If the rate of each port is set to 100Gbps, each data path can transmit 2.4Tbps of bandwidth traffic, and the total data packet pipeline can transmit 4.8Tbps of bandwidth traffic. When all 48 ports are fully loaded with 100Gbps traffic, the ports are in a full bandwidth state. Although the ports will not lose packets, they are limited by the clock frequency of the switch chip, the message length, the channel bandwidth, and the message header. The switch chip pp cannot fully process the 4.8Tbps traffic, and a large amount of packet loss will actually occur at the switch chip pp.

[0045] For example, when the switch chip clock frequency is 1.35 GHz, the bus bandwidth is 256 bytes, and the frame gap is 20 bytes, when sending a 256-byte message, the actual bandwidth that PiPline can handle is 3 Tbps. That is, under the above conditions, when the total port receives 3.6 Tbps of traffic, 0.6 Tbps of traffic will be discarded on the pp.

[0046] Right now Figure 2 The situation shown, Figure 2 This is a schematic diagram of another application scenario of the data transmission path of the switch chip, such as Figure 2 As shown, Datapath0 has 24 ports, each of which carries 100 Gbps of traffic, with a total traffic of 2.4 Tbps. Datapath1 has 12 ports, each of which carries 100 Gbps of traffic, with a total traffic of 1.2 Tbps. Since the default bandwidth configuration of the two channels is 1:1, the bandwidth processing capacity of the PiPline for the two Datapaths is 1.5 Tbps, resulting in a loss of 37 Gbps of traffic on each port of Datapath0, and no traffic loss on Datapath1. At this time, the services corresponding to the 24 ports of Datapath0 are seriously affected, with a packet loss rate of 37%.

[0047] The purpose of this application is to solve Figure 2 In the situation shown, if Figure 2 In the application scenario shown, when PiPline can be configured in real time to handle the bandwidth of two Datapaths in a ratio of 2:1, each port on Datapath 0 and Datapath 1 will only discard 16.6 Gbps of traffic, which will greatly reduce the impact on actual services, such as multimedia services such as video.

[0048] In order to solve the above problems, the present application provides a method for allocating port bandwidth in ultra-bandwidth mode. Compared with the traditional method of using CPU to monitor, record and calculate the port traffic in real time through software, this method significantly reduces the amount of calculation, can quickly allocate bandwidth based on real-time traffic data, and improve the real-time performance and effect of bandwidth allocation.

[0049] Specifically, see Figure 3 , Figure 3 It is a flowchart of an implementation method of the port bandwidth allocation method of the present application.

[0050] This method is applied to the ECPU built into the switch chip. Due to factors such as memory size, the ECPU cannot complete complex logic like the main CPU of the switch chip, but the interaction speed with the chip is faster than the main CPU. It plays a key role in port traffic statistics, real-time calculation and bandwidth allocation calculation, thereby improving the real-time performance and effect of bandwidth allocation.

[0051] Specifically, Figure 3 As shown, the method includes:

[0052] S100, polling and scanning the Mac statistical data stored in the switch chip to obtain the port load data.

[0053] The Mac statistics include the forwarding port and message size of the message forwarded by the switch to each Mac address in real time.

[0054] It can be understood that based on the Mac statistical data, the real-time forwarding insulation size of all forwarding ports can be obtained, thereby obtaining the real-time rate of each port, that is, the port load data.

[0055] When performing a polling operation, the waiting time between each scan can be adjusted based on actual needs.

[0056] In one embodiment, the Mac statistics may include multiple Mac statistics sub-tables, each Mac statistics sub-table is used to record the size of all or part of the messages forwarded in real time by the corresponding port, and each port corresponds to one or more Mac statistics sub-tables. Specifically, in an application scenario, the Mac statistics sub-table may be a McMACStatsRam table.

[0057] Understandably, due to the size of the Mac statistics table, each Mac statistics table can only record forwarding messages within a certain limit. Due to the different port rates, there may be 800G, 400G, 200G, 100G and other different rate ports, and one port may correspond to multiple Mac statistics tables. Therefore, by scanning all Mac statistics tables, the real-time rate of each port can be obtained.

[0058] For details, please refer to Figure 4 , Figure 4 yes Figure 3 A schematic diagram of a process flow of an implementation method corresponding to S100 in FIG. Figure 4 As shown, the method for obtaining port load data includes:

[0059] S101. Scan all Mac statistical sub-tables stored in the switch chip to obtain byte statistical data of real-time forwarded messages recorded in each Mac statistical sub-table.

[0060] S102, adding up the byte statistics of several Mac statistics sub-tables corresponding to the target port to obtain the real-time rate of the target port.

[0061] Based on the above steps, by counting the byte statistics of the Mac statistical table corresponding to each port, the real-time rate of the port can be obtained. Compared with the traditional method of using the main CPU to monitor, record and calculate the port traffic data in real time through software, it significantly reduces resource usage and improves processing speed.

[0062] S200: Obtain a bandwidth allocation strategy for a data path based on port load data.

[0063] After obtaining the real-time rate of each port, the bandwidth can be reallocated based on the real-time rate of the port, thereby reducing the packet loss rate.

[0064] Specifically, see Figure 5 , Figure 5 yes Figure 3 The flowchart of an implementation method corresponding to S200 in FIG. Figure 5 As shown, the method for obtaining the bandwidth allocation strategy includes:

[0065] S201. Calculate the real-time load data volume of each data path based on the port load data.

[0066] After obtaining the real-time rate of each port, the real-time rates of the ports belonging to the target data path are added together to obtain the real-time load data volume of the target data path.

[0067] S202: Obtain bandwidth ratio data based on the real-time rate of each data path.

[0068] After obtaining the real-time load data volume of each data path, the ratio of the real-time load data volume of each data path in the same data packet pipeline, ie, bandwidth ratio data, can be obtained.

[0069] S203: Obtain a bandwidth allocation strategy based on the bandwidth ratio data and the total bandwidth of the data packet pipeline.

[0070] Based on the bandwidth ratio data and the total bandwidth of the data packet pipeline, the bandwidth that should be allocated to each data path can be obtained. The specific allocation method is to allocate the total bandwidth of the data packet pipeline according to the bandwidth ratio data. For example, when the total bandwidth of PiPline is 3Tbps, and the ratio of the real-time load data volume of the two data paths Datapath0 and Datapath1 is 2:1, the bandwidth allocated to Datapath0 can be adjusted to 2Tbps, and the bandwidth allocated to Datapath1 can be adjusted to 1Tbps, thereby minimizing the packet loss rate of each port and avoiding the impact on the operation of the corresponding business of each port.

[0071] S300: Adjust the bandwidth of each data path based on the bandwidth allocation strategy of the data path.

[0072] After the bandwidth allocation strategy is obtained based on S200, it is necessary to execute the strategy in real time to adjust the bandwidth of each data path.

[0073] In order to improve the real-time performance of policy execution and improve the bandwidth allocation effect, in one implementation, the bandwidth allocation policy may be executed through bandwidth configuration items stored in the switch chip.

[0074] The bandwidth configuration table entry is used to describe the bandwidth allocation of each data path in each data packet pipeline. It is generally composed of 32 bits. The bandwidth of each data path can be adjusted according to the number of 0s and 1s, ensuring that the bandwidth allocation strategy of the port is effectively implemented and improving the bandwidth utilization and data transmission efficiency of the overall system. Specifically, in an application scenario, the bandwidth configuration table entry can be an IpeHdrAdjInputFifoPopSlotCfg table entry.

[0075] Based on the above steps, the traffic load of each port can be monitored in real time with lower resource usage and faster processing rate, and the bandwidth allocation of the data path can be dynamically adjusted to ensure that the bandwidth utilization of each data path is maximized, effectively improving the real-time performance and effect of bandwidth allocation.

[0076] This application also provides a device for allocating port bandwidth, see Figure 6 , Figure 6 It is a structural diagram of an implementation method of a device for allocating port bandwidth of the present application.

[0077] like Figure 6 As shown, the device is applied to an embedded central processing unit of a switch chip, and includes a real-time monitoring module 21 , a scheduling algorithm module 22 and a bandwidth control module 23 .

[0078] The real-time monitoring module 21 is used to poll and scan the Mac statistical data stored in the switch chip to obtain port load data. The Mac statistical data includes the forwarding port and message size of the message forwarded by the switch to each Mac address in real time. The port load data includes the real-time rate of each port.

[0079] The scheduling algorithm module 22 is used to obtain a bandwidth allocation strategy for the data path based on the port load data;

[0080] The bandwidth control module 23 is used to adjust the bandwidth of each data path based on the bandwidth allocation strategy of the data path.

[0081] As above Figures 1 to 5 , a method for allocating port bandwidth according to an embodiment of this specification is described. The details mentioned in the above description of the method embodiment are also applicable to the device for allocating port bandwidth according to the embodiment of this specification. The above device for allocating port bandwidth can be implemented by hardware, or by software, or by a combination of hardware and software.

[0082] This application also provides a switch chip, see Figure 7 , Figure 7 Schematic diagram of the structure of a switch chip of the present application. Figure 7 As shown, the switch chip includes a storage module 41 and an embedded central processing unit ECPU42, wherein the storage module 41 is used to store Mac statistical data. Specifically, the storage module 41 includes Mac0 RAM~Mac319 RAM, each RAM is used to store a Mac statistical sub-table, each Mac statistical sub-table is used to record the size of all or part of the real-time forwarded messages of a port, and each port corresponds to one or more Mac statistical sub-tables.

[0083] The embedded central processor 42 is used to poll and scan the Mac statistical data stored in the switch chip to obtain port load data, which includes the real-time rate of each port. Based on the port load data, the bandwidth allocation strategy of the data path is obtained, and based on the bandwidth allocation strategy of the data path, the bandwidth of each data path is adjusted.

[0084] This application also provides an electronic device, see Figure 8 , Figure 8 Schematic diagram of the structure of an electronic device of the present application. Figure 8As shown, the electronic device 30 may include at least one processor 31, a memory 32 (e.g., a non-volatile memory), a memory 33, and a communication interface 34, and the at least one processor 31, the memory 32, the memory 33, and the communication interface 34 are connected together via a bus 35. At least one processor 31 executes at least one computer-readable instruction stored or encoded in the memory 32.

[0085] It should be understood that the computer executable instructions stored in the memory 32, when executed, cause at least one processor 31 to perform the above combined operations in various embodiments of the present specification. Figure 1-Figure 5 Describes the various operations and functions.

[0086] In the embodiments of the present specification, the electronic device 30 may include, but is not limited to, personal computers, server computers, workstations, desktop computers, laptop computers, notebook computers, mobile electronic devices, smart phones, tablet computers, cellular phones, personal digital assistants (PDAs), handheld devices, messaging devices, wearable electronic devices, consumer electronic devices, and the like.

[0087] According to one embodiment, a program product such as a machine-readable medium is provided. The machine-readable medium may have instructions (i.e., the above-mentioned elements implemented in the form of software), which, when executed by a machine, causes the machine to perform the above-mentioned combination of various embodiments of this specification. Figure 1-Figure 5 Specifically, a system or device equipped with a readable storage medium may be provided, on which a software program code implementing the functions of any of the above-mentioned embodiments is stored, and a computer or processor of the system or device reads and executes the instructions stored in the readable storage medium.

[0088] In this case, the program code itself read from the machine-readable medium can realize the function of any one of the above embodiments, and thus the machine-readable code and the machine-readable storage medium storing the machine-readable code constitute part of this specification.

[0089] Examples of readable storage media include floppy disks, hard disks, magneto-optical disks, optical disks (such as CD-ROM, CD-R, CD-RW, DVD-ROM, DVD-RAM, DVD-RW, DVD-RW), magnetic tapes, non-volatile memory cards, and ROMs. Alternatively, the program code may be downloaded from a server computer or a cloud via a communication network.

[0090] Those skilled in the art should understand that the various embodiments disclosed above can be modified and altered in various ways without departing from the essence of the invention. Therefore, the protection scope of this specification should be defined by the appended claims.

[0091] It should be noted that not all steps and units in the above-mentioned processes and system structure diagrams are necessary, and some steps or units can be ignored according to actual needs. The execution order of each step is not fixed and can be determined as needed. The device structure described in the above-mentioned embodiments can be a physical structure or a logical structure, that is, some units may be implemented by the same physical client, or some units may be implemented by multiple physical clients, or some components in multiple independent devices may be implemented together.

[0092] In the above embodiments, the hardware unit or module can be realized by mechanical or electrical means. For example, a hardware unit, module or processor can include permanent dedicated circuit or logic (such as special processor, FPGA or ASIC) to complete the corresponding operation. The hardware unit or processor can also include programmable logic or circuit (such as general-purpose processor or other programmable processor), which can be temporarily set by software to complete the corresponding operation. Specific implementation (mechanical method or dedicated permanent circuit or temporary circuit) can be determined based on cost and time consideration.

[0093] The specific embodiments described above in conjunction with the accompanying drawings describe exemplary embodiments, but do not represent all embodiments that can be implemented or fall within the scope of protection of the claims. The term "exemplary" used throughout this specification means "used as an example, instance or illustration" and does not mean "preferred" or "having advantages" over other embodiments. For the purpose of providing an understanding of the described technology, the specific embodiments include specific details. However, these technologies can be implemented without these specific details. In some instances, in order to avoid making the concepts of the described embodiments difficult to understand, well-known structures and devices are shown in block diagram form.

[0094] The above description of the present disclosure is provided to enable any person of ordinary skill in the art to implement or use the present disclosure. Various modifications to the present disclosure will be apparent to those of ordinary skill in the art, and the general principles corresponding to the present disclosure may be applied to other variations without departing from the scope of protection of the present disclosure. Therefore, the present disclosure is not limited to the examples and designs described herein, but is consistent with the widest range of principles and novel features disclosed herein.

Claims

1. A method for allocating port bandwidth, characterized in that: An embedded central processing unit applied to a switch chip, the method comprising: Polling and scanning the Mac statistical data stored in the switch chip to obtain port load data, wherein the Mac statistical data includes the forwarding port and message size of the message forwarded by the switch to each Mac address in real time, and the port load data includes the real-time rate of each port; Based on the port load data, a bandwidth allocation strategy for the data path is obtained; Based on the bandwidth allocation policy of the data path, the bandwidth of each data path is adjusted.

2. The method according to claim 1, characterized in that The Mac statistical data includes a plurality of Mac statistical sub-tables, each of which is used to record the size of all or part of the messages forwarded in real time by the corresponding port, and each port corresponds to one or more Mac statistical sub-tables.

3. The method according to claim 2, characterized in that The step of scanning the Mac statistical data stored in the switch chip to obtain the port load data includes: Scan all Mac statistical sub-tables stored in the switch chip to obtain the byte statistics of the real-time forwarded messages recorded in each Mac statistical sub-table; The byte statistical data of several Mac statistical sub-tables corresponding to the target port are added together to obtain the real-time rate of the target port.

4. The method according to claim 1, characterized in that: The step of obtaining a bandwidth allocation strategy for a data path based on the port load data comprises: Based on the port load data, calculating the real-time load data volume of each data path; Based on the real-time rate of each data path, bandwidth ratio data is obtained, wherein the bandwidth ratio data includes a ratio of real-time load data amounts of multiple data paths in the same data packet pipeline; The bandwidth allocation strategy is obtained based on the bandwidth ratio data and the total bandwidth of the data packet pipeline.

5. The method according to claim 4, characterized in that The step of calculating the real-time load data volume of each data path based on the port load data comprises: The real-time rates of the ports belonging to the target data path are added together to obtain the real-time load data volume of the target data path.

6. The method according to claim 1, characterized in that The step of adjusting the bandwidth of each data path based on the bandwidth allocation strategy of the data path includes: Based on the bandwidth allocation strategy, the bandwidth configuration table entry of each data packet pipeline stored in the switch chip is updated, and the bandwidth configuration table entry is used to describe the bandwidth of each data path in the corresponding data packet pipeline.

7. A device for allocating port bandwidth, characterized in that: An embedded central processing unit applied to a switch chip, the device comprising: A real-time monitoring module, used for polling and scanning Mac statistical data stored in the switch chip to obtain port load data, wherein the Mac statistical data includes the forwarding port and message size of the message forwarded by the switch to each Mac address in real time, and the port load data includes the real-time rate of each port; A scheduling algorithm module, used to obtain a bandwidth allocation strategy for a data path based on the port load data; The bandwidth control module is used to adjust the bandwidth of each data path based on the bandwidth allocation strategy of the data path.

8. A switch chip, characterized in that: include: A storage module, used to store Mac statistical data, wherein the Mac statistical data includes a forwarding port and a message size of a message forwarded by the switch to each Mac address in real time; The embedded central processing unit is used to poll and scan the Mac statistical data to obtain port load data, wherein the port load data includes the real-time rate of each port, obtain the bandwidth allocation strategy of the data path based on the port load data, and adjust the bandwidth of each data path based on the bandwidth allocation strategy of the data path.

9. An electronic device, comprising: at least one processor; as well as A memory storing instructions, wherein when the instructions are executed by the at least one processor, the at least one processor executes the method for allocating port bandwidth according to any one of claims 1 to 7.

10. A machine-readable storage medium storing executable instructions, wherein when the instructions are executed, the machine executes the method for allocating port bandwidth according to any one of claims 1 to 7.

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