Memory access method and device and related equipment

Abstract

The embodiment of the invention provides a memory access method and device and related equipment, and the method comprises the steps: obtaining a target memory grain address which is a memory grain address of an access request currently executed in an access request queue, taking a storage unit pointed by the target memory grain address as a target storage unit, and taking a memory row pointed by the target memory grain address as a target memory row; judging whether other access requests pointing to the target storage unit exist in the access request queue or not; if not, determining the type of the access command based on access prediction information corresponding to the target memory line in an access prediction table; wherein when the access prediction information indicates that the page conflict is predicted, the determined access command is a first access command; the access prediction information corresponding to the memory line in the access prediction table is determined based on the access information of the memory line. According to the scheme, the access efficiency of the memory system is improved.

Description

Technical Field

[0001] The embodiments of the present invention relate to the field of integrated circuits, and in particular to a memory access method, device and related equipment. Background Art

[0002] The access efficiency of the memory system is a major factor affecting the computing performance of the computing system. When faced with large-capacity memory, the impact on the computing performance of the computing system is even greater. With the rapid development and widespread application of artificial intelligence and intelligent driving, large-capacity memories such as HBM (High Bandwidth Memory) and GDDR (Graphics Double Data Rate DRAM) are widely used in high-performance computing systems. Accordingly, how to improve the access efficiency of the memory system has become a research focus in this field. Summary of the invention

[0003] In view of this, an embodiment of the present invention provides a memory access method, apparatus and related devices to improve the access efficiency of a memory system.

[0004] To achieve the above objectives, the embodiments of the present invention provide the following technical solutions.

[0005] In a first aspect, an embodiment of the present invention provides a memory access method, comprising:

[0006] Obtain a target memory particle address, where the target memory particle address is a memory particle address of an access request currently being executed in an access request queue, wherein a storage unit pointed to by the target memory particle address is a target storage unit, and a memory row of the target storage unit pointed to by the target memory particle address is a target memory row;

[0007] Determining whether there are other access requests directed to the target storage unit in the access request queue;

[0008] If not, the type of access command is determined based on the access prediction information corresponding to the target memory row in the access prediction table; wherein, when the access prediction information indicates a prediction of a page conflict, the determined access command is a first access command, and the first access command is used to instruct the memory device to perform read and write operations on the memory, and automatically trigger a precharge operation on the memory row that performs the read and write operations; the access prediction information corresponding to the memory row in the access prediction table is determined based on the access information of the memory row, wherein the access information is used to indicate a page hit relationship or a page conflict relationship between an access request corresponding to the memory row and a next access request of the access request in an access request for the storage unit where the memory row is located.

[0009] Optionally, after obtaining the target memory granule address, the method further includes:

[0010] Acquire a historical access row address of the target storage unit, where the historical access row address is a row address of a memory row accessed by a previous access request corresponding to the target storage unit;

[0011] Based on the row address of the target memory row and the historical access row address, determining a page hit relationship or a page conflict relationship between a previous access request and a currently executed access request, wherein the page hit relationship or the page conflict relationship between the previous access request and the currently executed access request is based on the access information indication of the historical access row address;

[0012] Based on the access information of the historically accessed row address, the access prediction information corresponding to the historically accessed memory row in the access prediction table is updated.

[0013] Optionally, obtaining the historical access row address of the target storage unit is specifically: obtaining the historical access row address of the corresponding target storage unit from a historical access record table; wherein the historical access record table is used to record the row address of the memory row accessed by the previous access request of the corresponding storage unit.

[0014] Optionally, obtaining the historical access row address of the corresponding target storage unit from the historical access record table includes:

[0015] Determine whether the entry corresponding to the target storage unit in the historical access record table is valid;

[0016] If valid, obtain the historical access row address stored in the entry corresponding to the target storage unit.

[0017] Optionally, updating the access prediction information corresponding to the historical access memory row in the access prediction table includes:

[0018] Calculate an index value of the historically accessed memory row in an access prediction table based on a storage unit address of the target storage unit and a row address of the historically accessed memory row, wherein the index value has a preset number of bits, which is smaller than the number of bits used to indicate address information of the memory row in the memory particle address;

[0019] Determine the entry to be updated corresponding to the index value;

[0020] Based on the access information of the historical access row address, an update value of the access prediction information corresponding to the entry to be updated is calculated, and the update value is stored in the entry to be updated.

[0021] Optionally, the calculating, based on the access information of the historically accessed row address, an update value of the access prediction information corresponding to the entry to be updated includes:

[0022] When the access information indicates a page hit relationship, the access prediction information of the historically accessed memory row is subtracted by a first preset value; when the access information indicates a page conflict relationship, the access prediction information of the historically accessed memory row is increased by a second preset value.

[0023] Optionally, after updating the access prediction information corresponding to the historically accessed memory row in the access prediction table based on the access information of the historically accessed row address, the method further includes:

[0024] Update the row address of the target memory row into the entry of the historical access record table corresponding to the target storage unit.

[0025] Optionally, determining the type of the access command based on the access prediction information corresponding to the target memory row in the access prediction table includes:

[0026] Calculate an index value corresponding to the target memory row in an access prediction table based on a storage unit address of the target storage unit and a row address of the target memory row;

[0027] Based on the index value, determining access prediction information corresponding to the target memory row;

[0028] Based on the access prediction information, a corresponding access command is determined.

[0029] Optionally, determining a corresponding access command based on the access prediction information includes:

[0030] Determining whether the access prediction information is greater than or equal to a third preset value;

[0031] If so, the access prediction information indicates that the prediction is a page conflict, and the access command is determined to be the first access command; if not, the access prediction information indicates that the prediction is a page hit, and the access command is determined to be the second access command; the second access command is used to instruct the memory device to only perform read and write operations on the memory.

[0032] Optionally, in the access prediction table, the index value of each entry is a hash value of the storage unit address of the storage unit and the row address of the memory row.

[0033] Optionally, in the step of determining whether there are other access requests pointing to the target storage unit in the access request queue, if so, determine the type of access command based on the address of the memory particle to be processed; the address of the memory particle to be processed is the memory particle address of the next access request pointing to the target storage unit in the access request queue.

[0034] Optionally, determining the type of the access command based on the address of the memory particle to be processed includes:

[0035] Determine whether the row address in the memory particle address to be processed is consistent with the target row address;

[0036] If not, it is determined that the access command is a first access command; if so, it is determined that the access command is a second access command; the second access command is used to instruct the memory device to only perform read and write operations on the memory.

[0037] In a second aspect, an embodiment of the present invention provides a memory access device, comprising:

[0038] An information acquisition module is used to acquire a target memory particle address, wherein the target memory particle address is a memory particle address of an access request currently executed in an access request queue, wherein a storage unit pointed to by the target memory particle address is a target storage unit, and a memory row of the target storage unit pointed to by the target memory particle address is a target memory row;

[0039] An information determination module, used for determining whether there are other access requests directed to the target storage unit in the access request queue;

[0040] A command decision module is used to determine the type of access command based on the access prediction information corresponding to the target memory row in the access prediction table when there are no other access requests pointing to the target storage unit in the access request queue; wherein, when the access prediction information indicates a prediction of a page conflict, the determined access command is a first access command, and the first access command is used to instruct the memory device to perform a read and write operation on the memory, and automatically trigger a precharge operation on the memory row performing the read and write operation; the access prediction information corresponding to the memory row in the access prediction table is determined based on the access information of the memory row, wherein the access information is used to indicate, in the access request for the storage unit where the memory row is located, a page hit relationship or a page conflict relationship between the access request corresponding to the memory row and the next access request of the access request.

[0041] In a third aspect, an embodiment of the present invention further provides a memory controller, wherein the memory controller is configured with the memory access device described in the second aspect.

[0042] Optionally, the memory control is further configured with:

[0043] An address conversion module, used for parsing a memory granule address from a memory address in an access request based on a preset address mapping module;

[0044] A command scheduling module, used to convert memory access requests into access commands according to the access protocol and timing requirements of the memory device;

[0045] an automatic precharge decision module, used for configuring the memory access device;

[0046] The command sending module is used to send access commands to the memory device.

[0047] In a fourth aspect, an embodiment of the present invention further provides a computing device, wherein the computing device comprises the memory controller described in the third aspect.

[0048] In a fifth aspect, an embodiment of the present invention further provides a storage medium, wherein the storage medium stores one or more computer executable instructions, and wherein the one or more computer executable instructions, when executed, implement the memory access method as described in the first aspect.

[0049] In a sixth aspect, an embodiment of the present invention further provides a computer program, comprising one or more computer executable instructions, wherein the one or more computer executable instructions, when executed, implement the memory access method as described in the first aspect.

[0050] An embodiment of the present invention provides a memory access method, an apparatus and related equipment, the method comprising: obtaining a target memory particle address, the target memory particle address being the memory particle address of an access request currently being executed in an access request queue, wherein the storage unit pointed to by the target memory particle address is the target storage unit, and the memory row pointed to by the target memory particle address is the target memory row; judging whether there are other access requests pointing to the target storage unit in the access request queue; if not, determining the type of access command based on access prediction information corresponding to the target memory row in an access prediction table; wherein, when the access prediction information indicates a prediction of a page conflict, the determined access command is a first access command, the first access command being used to instruct a memory device to perform a read / write operation on the memory, and automatically triggering a precharge operation on the memory row performing the read / write operation; the access prediction information corresponding to the memory row in the access prediction table is determined based on the access information of the memory row, wherein the access information is used to indicate, in an access request for the storage unit where the memory row is located, a page hit relationship or a page conflict relationship between an access request corresponding to the memory row and a next access request of the access request.

[0051] It can be seen that an embodiment of the present invention provides an access prediction table that records access prediction information of corresponding memory rows. The access prediction table determines the access prediction information of the corresponding memory row based on the access information of the memory row, so that the access trend of the memory row can be predicted more accurately. Furthermore, when there are no other access requests pointing to the target storage unit pointed to by the target memory particle address in the access request queue, the type of access command is determined based on the access prediction information of the target row pointed to by the target memory particle address in the access prediction table, thereby sending appropriate access commands to the greatest extent and improving the access efficiency of the memory. BRIEF DESCRIPTION OF THE DRAWINGS

[0052] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying creative work.

[0053] Figure 1 A schematic diagram of an optional physical structure of a memory device.

[0054] Figure 2 The following is an example diagram of a memory access process.

[0055] Figure 3 A schematic diagram of an operation on memory particles.

[0056] Figure 4 An optional flow chart of a memory access method provided by an embodiment of the present invention.

[0057] Figure 5 A schematic diagram of an access prediction information update process provided by an embodiment of the present invention.

[0058] Figure 6 An optional flowchart of step S120 provided for an embodiment of the present invention.

[0059] Figure 7 An optional example diagram of step S120 provided for an embodiment of the present invention.

[0060] Figure 8 A schematic diagram of an optional hash conversion rule for address information provided in an embodiment of the present invention.

[0061] Fig. 9 An optional flowchart of step S123 provided for an embodiment of the present invention.

[0062] Fig.10 An optional flowchart of step S130 provided for an embodiment of the present invention.

[0063] Fig.11 An optional schematic diagram of an update process of an access prediction table provided by an embodiment of the present invention.

[0064] Fig.12 An optional structural diagram of a historical access record table provided in an embodiment of the present invention.

[0065] Fig.13 Another optional updating flow chart of the access prediction table provided by the embodiment of the present invention.

[0066] Fig.14Another updating flow chart of the access prediction table provided by the embodiment of the present invention.

[0067] Fig.15 An optional flow chart of information update provided by an embodiment of the present invention.

[0068] Fig.16 An optional block diagram of the memory access device provided in an embodiment of the present invention.

[0069] Fig.17 An optional structural diagram of a memory controller provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0070] Some embodiments of the present disclosure are described as processing flows. Although the various operation steps of the flow may be given sequential step numbers, the operation steps therein may be implemented in parallel, concurrently or simultaneously.

[0071] In the embodiments of the present disclosure, the terms "first", "second", etc. may be used to describe various features, but these features should not be limited by these terms. These terms are used only to distinguish one feature from another.

[0072] The term "and / or" may be used in the embodiments of the present disclosure, and "and / or" includes any and all combinations of one or more of the listed associated features. It should be understood that when describing the connection relationship or communication relationship between two components, unless it is clearly stated that the two components are directly connected or directly communicate with each other, the connection or communication between the two components can be understood as a direct connection or communication, or can also be understood as an indirect connection or communication through an intermediate component.

[0073] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0074] An alternative physical structure of a memory device can refer to Figure 1 As shown, Figure 1 This is a schematic diagram of an optional physical structure of a memory device. The memory may be composed of multiple storage units, and the storage unit is a storage array including multiple rows and columns of memory particles. Figure 1 Taking DRAM as an example, the storage unit may be a Bank. Figure 1Taking n banks as an example, namely bank0 to bank(n-1), the rows (also called memory rows) may be Row (labeled as Row0 to RowN in the figure), and the columns may be Column (labeled as Col0 to ColM in the figure). Figure 1 DQ is a data signal line, and CA is a command / address signal line. In some other examples, the storage cell can be further divided into a plurality of storage cell groups (bank groups, not shown in the figure), and a storage cell group includes a plurality of storage cells. In a further example, the plurality of storage cell groups can be further divided into a plurality of channels, and a channel can include a plurality of storage cell groups.

[0075] Among them, the memory particles corresponding to the storage array can be confirmed based on the indication of the memory particle address. In a specific example, the memory particle address can include a storage unit address segment (also called a storage unit address), a row address segment (also called a row address) and a column address segment (also called a column address), so that the specific memory particles in the memory can be determined based on the addressing of the memory particle address. Among them, the corresponding memory particle address can be parsed from the memory address in the access request. When divided into multiple storage unit groups, the first several bits of the storage unit address segment can be understood as a storage unit group address segment (also called a storage unit group address). Similarly, when multiple storage unit groups are also divided into multiple channels, the first several bits of the storage unit address segment can be sequentially understood as a channel address segment (also called a channel address) and a storage unit group address segment (also called a storage unit group address). In the example of the present invention, it is explained in a manner that does not distinguish between storage unit groups and / or channels, that is, in the memory particle address, except for the row address and the column address, the remaining address information is understood as a storage unit address.

[0076] In a specific example, refer to Figure 2As shown in the example diagram of the memory access process, after receiving an access request sent by an upstream device (the CPU (central processing unit), I / O (input / output) and other devices are used as examples in the figure), the memory controller can confirm the execution order of the access request based on the arbiter (also called arbiter) (see the transaction scheduling stage in the figure, also called transaction scheduling), and parse the memory particle address from the memory address in the access request based on a preset address mapping mode (see the address mapping stage in the figure, also called address translation). For example, the memory particle address corresponding to the DRAM memory may include a bank group address segment, a bank address segment, a row address segment, a column address segment, etc., and store the relevant address information in the access request queue. Afterwards, according to the access protocol and timing requirements of the memory device (such as a DRAM device), the memory access request is converted into an access command (see the command scheduling stage in the figure, also called command scheduling), and the command is sent to the memory device through the electrical signal interface (see the command sending stage in the figure, where the memory device in the figure is shown as a dual in-line DIMM DRAM memory as an example).

[0077] It is understandable that during memory access, reference Figure 3 1 is a schematic diagram of an operation on a memory cell. The access to a memory cell in a storage unit of a memory device (the memory cell N is shown as an example in the figure) usually involves activating a memory row (ie, ACTIVATE, Figure 3 ①), access the column in the memory row (read / write, Figure 3 ② in the sequence number), and, when the row is no longer needed to be accessed or other rows need to be accessed, the memory row is closed (the corresponding command is PRECHARGE, Figure 3 In the serial number ③). Among them, Figure 3 In the embodiment, corresponding signal control is performed based on the sense amplifier and the data pin.

[0078] In a specific implementation, the access command for the memory may include a second access command and a first access command. The second access command is used to instruct the memory device to only perform read and write operations on the memory; the first access command is a composite read and write command, which is used to instruct the memory device to perform read and write operations on the memory, and after performing the read and write operations on the memory, automatically trigger the precharge operation on the memory row that performs the read and write operations. In the memory controller, the precharge decision module is used to determine which access command to send based on the access information.

[0079] The inventor believes that, ideally, after the reading and writing of a memory row in a storage unit is completed, if the next access request to the storage unit does not need to access the memory row or needs to access other memory rows (i.e., page conflict), the current working memory row must be closed through a pre-charge operation ( Figure 2 Sequence number ③), at this time, it is appropriate to send the first access command CAS w / AP, which can automatically trigger the precharge operation for the current working row after the read and write operations are completed, and the memory controller no longer needs to send additional precharge commands.

[0080] Similarly, after the reading and writing of a memory row within a storage unit is completed, if the next access request to the storage unit still needs to continue to access the memory row (i.e., a page hit), the activation state of the memory row can be maintained so that the next access request directly performs the corresponding read and write operations on the memory row. At this time, it is appropriate to send a second access command to maintain the activation state of the memory row after the read and write operations are completed, so that when the next access is executed, there is no need to perform an activation operation and the read and write operations are directly performed.

[0081] It can be seen that sending an appropriate access command can improve the access efficiency of the memory. It is understandable that when there is a next access request for the storage unit in the access request queue, it can be determined whether the memory row targeted by the next access request for the storage unit is the same as the memory row accessed by the current access request. However, when there is no next access request for the storage unit in the access request queue, it is impossible to confirm whether the memory rows are the same. Obviously, the above solution cannot be implemented under the premise that it cannot be determined whether the next access request for the storage unit is targeted at the same memory row or a different memory row.

[0082] In view of this, an embodiment of the present invention provides a memory access method, an apparatus and related equipment, the method comprising: obtaining a target memory particle address, the target memory particle address being the memory particle address of an access request currently being executed in an access request queue, wherein the storage unit pointed to by the target memory particle address is the target storage unit, and the memory line of the target storage unit pointed to by the target memory particle address is the target memory row; judging whether there are other access requests pointing to the target storage unit in the access request queue; if not, determining the type of access command based on access prediction information corresponding to the target memory row in an access prediction table; wherein, when the access prediction information indicates a prediction of a page conflict, the determined access command is a first access command, the first access command being used to instruct a memory device to perform a read and write operation on the memory, and automatically triggering a precharge operation on the memory row performing the read and write operation; the access prediction information corresponding to the memory row in the access prediction table is determined based on the access information of the memory row, wherein the access information is used to indicate, in an access request for the storage unit where the memory row is located, a page hit relationship or a page conflict relationship between an access request corresponding to the memory row and a next access request of the access request.

[0083] It can be seen that an embodiment of the present invention provides an access prediction table that records access prediction information of corresponding memory rows. The access prediction table determines the access prediction information of the corresponding memory row based on the access information of the memory row, so that the access trend of the memory row can be predicted more accurately. Furthermore, when there are no other access requests pointing to the target storage unit pointed to by the target memory particle address in the access request queue, the type of access command is determined based on the access prediction information of the target row pointed to by the target memory particle address in the access prediction table, thereby sending appropriate access commands to the greatest extent and improving the access efficiency of the memory.

[0084] The following is a detailed description of the solution provided by the embodiment of the present invention. Figure 4 An optional flow chart of a memory access method is shown, the method comprising:

[0085] Step S100: obtaining the target memory cell address;

[0086] The target memory cell address is the memory cell address of the access request currently being executed in the access request queue. The type of the corresponding access command is determined by obtaining the target memory cell address.

[0087] It is understandable that after resolving the memory cell address in the access request, the memory cell address corresponding to the access request can be obtained. In a specific implementation, the access requests in the access request queue can all be access requests that have undergone address resolution, and accordingly, the corresponding memory cell addresses are all in an accessible state.

[0088] The memory particle address may include its corresponding storage unit address, row address and column address, so as to point to a specific storage unit, and the corresponding row and column to determine a specific memory particle (also referred to as a memory page). For ease of description, the embodiment of the present invention takes the storage unit pointed to by the target memory particle address as the target storage unit, and takes the memory row pointed to by the target memory particle address as the target memory row.

[0089] Step S110: determining whether there are other access requests directed to the target storage unit in the access request queue;

[0090] Accesses in the same storage unit may result in page conflicts or page hits. Therefore, it is determined whether there are other access requests pointing to the target storage unit in the access request queue to determine whether to make corresponding predictions based on the access prediction table. When there are no other access requests pointing to the target storage unit, a prediction is made based on the access prediction information in the access prediction table and the type of the corresponding access command is determined.

[0091] It can be understood that since all access requests in the access request queue have undergone address resolution, the corresponding memory particle addresses are in an accessible state, and thus comparison and judgment can be performed in sequence to determine whether there is an access request whose storage unit address points to the target storage unit.

[0092] In a specific example, the memory granule addresses corresponding to other access requests in the access request queue can be compared in sequence to determine whether the corresponding memory granule addresses point to the target storage unit. If so, it indicates that there are other access requests pointing to the target storage unit, and if not, it indicates that there are no other access requests pointing to the target storage unit.

[0093] In the access request queue, the direction toward the location of the currently executed access request is the front, and the direction away from the location of the currently executed access request is the back, and the access requests are executed in sequence from front to back; the sequential comparison in this step can be a comparison from front to back, or from back to front. In a preferred example, the sequential comparison can be a comparison from front to back, so that it can be determined whether there are other access requests pointing to the target storage unit, and the memory particle address of the next access request pointing to the target storage unit can be determined, providing information support for subsequent processes.

[0094] Specifically, it may be determined based on the storage unit address segment in the address information of the memory unit address whether the memory unit address points to the target storage unit, thereby determining whether there is an access request pointing to the target storage unit.

[0095] It should be noted that, in the judgment step, as long as there is another access request pointing to the target storage unit, the judgment result is yes, and accordingly, step S130 is executed. However, only when all access requests in the entire access request queue do not point to the target storage unit, the judgment result is no, and step S120 is executed.

[0096] Step S120: determining the type of the access command based on the access prediction information corresponding to the target memory row in the access prediction table;

[0097] The access prediction table is used to record the access prediction information corresponding to each memory row, wherein the access prediction information is determined based on the access information of the memory row, wherein the access information is used to indicate the page hit relationship or page conflict relationship between the access request corresponding to the memory row and the next access request of the access request in the access request for the storage unit where the memory row is located, so as to more accurately predict the access trend of the memory row. In a specific example, the access prediction table can be called a BPHT (bank page history table) table, for example.

[0098] It can be understood that the access process for a storage unit may include multiple access requests, wherein based on the memory rows accessed in the access requests and the access order of the access requests, it can be determined whether there is a page hit relationship or a page conflict relationship between the access requests. For example, for an access request for a memory row, the page hit relationship or the page conflict relationship between the next access request of the access request and the access request can be determined, thereby determining access information indicating the page hit relationship or the page conflict relationship.

[0099] The access prediction table may include multiple entries, and different entries correspond to different memory rows. Based on the large number of memory rows in the memory, the number of entries in the access prediction table does not need to be completely consistent with the total number of memory rows, but is gradually updated with the memory access process. When a memory row is accessed, the corresponding entry is configured.

[0100] Among them, different entries correspond to the storage of access prediction information of different memory rows. The access prediction information can be, for example, a specific numerical value corresponding to the access information of the memory row, and the numerical value can be calculated based on a counter, for example, in the historical access process, if the memory row corresponds to a page hit relationship (i.e., the page hit relationship between the next access request of the access request of the memory row and the access request), a preset operation can be performed, such as subtracting a preset value, and if the memory row corresponds to a page conflict relationship (i.e., the page conflict relationship between the next access request of the access request of the memory row and the access request), another preset operation can be performed, such as adding a preset value, so that the historical page hit or historical page conflict situation of the memory row can be reflected based on the size of the numerical value, so that based on the access prediction information, a more accurate prediction of the access trend of the memory row can be achieved.

[0101] In a specific example, the access prediction information can be updated in real time based on the access information of the memory line, for example, referring to Figure 5 A schematic diagram of an access prediction information update process is shown. When the access information corresponding to the memory row indicates a page hit relationship (marked as PH in the figure), the access prediction information of the memory row is subtracted by a first preset value, and the first preset value can be, for example, "1"; when the access information corresponding to the memory row indicates a page conflict relationship (marked as PC in the figure), the access prediction information of the memory row is increased by a second preset value, and the second preset value can be equal to the first preset value, for example, it can also be "1", or it can be different from the first preset value, for example, it can be "2". Those skilled in the art can determine based on specific scenarios.

[0102] Furthermore, when determining the type of the access command based on the access prediction information, a preset threshold may be configured for the access prediction information, and the access command type may be predicted based on the preset threshold. For example, a third preset value may be configured, and when the value is greater than or equal to the third preset value, the access command may be determined to be the first access command, otherwise, the access command may be determined to be the second access command.

[0103] Furthermore, the entry of the access prediction table is also configured with an index value, so that the access prediction information is retrieved based on the index value. The index value may be, for example, address information in the memory cell address used to indicate a memory row, and specifically, the address information in the memory cell address used to indicate a memory row may include a row address and a storage unit address.

[0104] In a further example, considering that the number of bits of address information used to indicate a memory row in a memory cell address is too large, if the corresponding address information is directly used as the index value of each entry in the access prediction table, too many physical resources will be occupied. Therefore, the embodiment of the present invention further configures the index value of each entry in the access prediction table to a value with a preset number of bits, which is smaller than the number of bits of address information used to indicate a memory row in the memory cell address, thereby reducing the occupation of hardware physical resources. In order to make the index value correspond to the corresponding address information, the index value can be a value calculated based on the corresponding address information.

[0105] In an alternative example, refer to Figure 6 An optional flow chart of step S120 is shown, and Figure 7 An optional example diagram of step S120 is shown, where step S120 may include:

[0106] Step S121: calculating an index value corresponding to the target memory row in an access prediction table based on the storage unit address of the target storage unit and the row address of the target memory row;

[0107] By calculating the corresponding index value, a specific entry can be retrieved based on the index value in the subsequent process.

[0108] In a specific example, the index value may be a hash value of a storage unit address of a storage unit and a row address of a memory row. For example, the corresponding address information may be hashed and discretized, thereby avoiding different address information from calculating the same index value while reducing the number of bits of the index value, thereby avoiding different addresses from addressing the same entry and reducing interference between data. Figure 7 , taking the bank address as M bits and the row address as N bits as an example, the address bits of M+N bits are converted into K-bit hash values ​​as index values ​​through hash operation (shown as hash in the figure) for retrieval. K The access prediction table for entries is searched.

[0109] For details, see Figure 8 A schematic diagram of an optional hash conversion rule for address information is provided, wherein the hash conversion rule is used for address information with a row address of 10 bits, i.e., row[0]-row[9], and a storage unit address of 5 bits, i.e., bank[0]-bank[4], with the purpose of converting the address information into a 5-bit hash value, i.e., HashAddr[0]-HashAddr[5].

[0110] Step S122: determining access prediction information corresponding to the target memory row based on the index value;

[0111] After the index value is determined, access prediction information corresponding to the target memory row may be searched based on the index value.

[0112] In a specific example, when the access prediction information is a specific value, the corresponding value in the corresponding entry can be read.

[0113] Step S123: Determine a corresponding access command based on the access prediction information.

[0114] It is understandable that the access prediction information can reflect the corresponding page hit or page conflict situation in the historical access process of the memory row. Therefore, based on the access prediction information, a more accurate prediction of the access trend of the memory row can be achieved.

[0115] In an example in which the access prediction information is updated based on the calculation of the first preset value and the second preset value, and the third preset value is used as the preset threshold, reference Fig. 9 An optional flow chart of step S123 is shown, and step S123 may include the following process:

[0116] Step S231: determining whether the access prediction information is greater than or equal to a third preset value;

[0117] A judgment is made based on the third preset value to determine the meaning of the access prediction information, thereby determining what type of access command to issue. In a specific example, the third preset value may be, for example, "2".

[0118] In a specific example, refer to Figure 5 When a 2-bit saturated counter is used to represent access prediction information, the historical access pattern of each memory row of the same storage unit can include four states:

[0119] 0: Strongly PH (strong page hit): indicates that the same storage unit is very likely to access the same memory row next time relative to the current access request;

[0120] 1: Weakly PH (weak page hit): indicates that the same storage unit has a certain possibility of accessing the same memory row next time relative to the current access request, but it is not as certain as a strong page hit;

[0121] 2: Weakly PC (weak page conflict): Indicates that the same storage unit has a certain possibility of accessing a different memory row next time relative to the current access request, but it is not as certain as a strong page conflict;

[0122] 3: Strongly PC (strong page conflict): Indicates that the same storage unit is very likely to access a different memory row next time relative to the current access request.

[0123] Therefore, when the access prediction information is greater than or equal to "2", it indicates that the next access may be a page conflict, so the first access command can be issued.

[0124] It should be noted that in Figure 5 When calculating the access prediction information based on the 2-bit counter, when the access prediction information is 0, when the PH scenario is encountered again, the corresponding operation should be reduced by 1, but based on the lowest value of the 2-bit counter is 0, even if the corresponding operation is executed, the corresponding prediction information is still 0; similarly, when the access prediction information is 3, when the PC scenario is encountered again, the corresponding operation should be increased by 1, but based on the highest value of the 2-bit counter is 3, even if the corresponding operation is executed, the corresponding prediction information is still 3.

[0125] In this step, if it is greater than or equal to the third preset value, the access prediction information indicates that it is predicted to be a page conflict, and step S232 is executed to determine that the access command is the first access command; if it is less than the third preset value, the access prediction information indicates that it is predicted to be a page hit, and step S233 is executed to determine that the access command is the second access command.

[0126] Step S232: Determine that the access command is the first access command;

[0127] It can be understood that the first access command is used to instruct the memory device to perform read and write operations on the memory, and automatically trigger a pre-charge operation on the memory row that performs the read and write operations, thereby avoiding page conflicts. When the memory behavior is found to be in an activated state, the process of sending a pre-charge command to the memory row separately is carried out, thereby improving the memory access efficiency.

[0128] Step S233: determining that the access command is a second access command;

[0129] It can be understood that the second access command is used to instruct the memory device to only perform read and write operations on the memory, thereby retaining the activation state of the memory row and avoiding the need to send an activation command to the memory row separately when the memory row is in an inactive state when a page hit occurs, thereby improving the memory access efficiency.

[0130] Continue to refer Figure 4 , executing step S130: determining the type of the access command based on the address of the memory particle to be processed;

[0131] The to-be-processed memory cell address is the memory cell address of the next access request in the access request queue pointing to the target storage unit;

[0132] It is understandable that when there are other access requests pointing to the target storage unit in the access request queue, the next access request pointing to the target storage unit can be determined. The next access request pointing to the target storage unit is, according to the execution order of the access request queue, the next access request pointing to the target storage unit relative to the currently executed access request. For ease of description, the embodiment of the present invention refers to the next access request pointing to the target storage unit in the access request queue as a pending access request, and the corresponding memory particle address is a pending memory particle address.

[0133] It is understandable that, based on the pending memory particle address, it can be determined whether a page conflict or a page hit will occur when the next access request (i.e., the pending access request) of the currently executed access request is executed. Specifically, when the row address of the pending memory particle address is consistent with the row address of the target memory particle address, the pending access request is a page hit, and when the row address of the pending memory particle address is inconsistent with the row address of the target memory particle address, the pending access request is a page conflict. Accordingly, the corresponding access command can be determined based on a page hit or a page conflict.

[0134] Specifically, refer to Fig.10 An optional flow chart of step S130 is shown, and step S130 may include the following process:

[0135] Step S131: determining whether the row address in the address of the memory particle to be processed is consistent with the target row address;

[0136] Based on the above description, the row address of the target memory particle address is taken as the target row address. Accordingly, it can be determined whether the row address in the memory particle address to be processed is consistent with the target row address to determine whether the subsequent access request to be processed faces a page conflict or a page hit, that is, whether there is a page hit relationship or a page conflict relationship between the access request to be processed and the currently executed access request.

[0137] If not, the pending access request corresponds to a page conflict, and step S132 is executed; if yes, the pending access request corresponds to a page hit, and step S133 is executed.

[0138] Step 132: Determine that the access command is a first access command;

[0139] It can be understood that the first access command is used to instruct the memory device to perform read and write operations on the memory, and automatically trigger a pre-charge operation on the memory row that performs the read and write operations, thereby avoiding page conflicts. When the memory behavior is found to be in an activated state, the process of sending a pre-charge command to the memory row separately is carried out, thereby improving the memory access efficiency.

[0140] Step S133: determining that the access command is a second access command;

[0141] It can be understood that the second access command is used to instruct the memory device to only perform read and write operations on the memory, thereby retaining the activation state of the memory row and avoiding the need to send an activation command to the memory row separately when the memory row is in an inactive state when a page hit occurs, thereby improving the memory access efficiency.

[0142] In an optional example, the access prediction table can be updated in real time based on the access process in the memory, thereby providing timely and accurate access prediction information. In this scenario, the currently executed access request will participate in the corresponding update process as the previous access request after executing the corresponding process. Fig.11 The optional schematic diagram of the update process of the access prediction table shown in the figure, the embodiment of the present invention also provides an update process of the access prediction table, specifically, the update process of the access prediction table can be executed after obtaining the target memory particle address, that is, after determining the memory particle address of the currently executed access request. Specifically, refer to Fig.11 , the update process of the access prediction table includes:

[0143] Step S200: Acquire a historical access row address of a target storage unit, where the historical access row address is a row address of a memory row accessed by a previous access request corresponding to the target storage unit;

[0144] It can be understood that by obtaining the historical access row address of the target storage unit, it is determined whether the memory row accessed by the previous access request to the target storage unit is the same memory row as the target memory row, thereby judging whether the currently executed access request is a page hit or a page conflict relative to the previous access request, and then making corresponding updates based on the result.

[0145] In a specific example, a historical access record table can be configured, and the historical access record table can be used to record the row address of the memory row accessed by the previous access request of the corresponding storage unit. Specifically, when the historical access record table is configured, step S200 can be: obtain the historical access row address of the corresponding target storage unit from the historical access record table. Among them, the historical access record table is also called a BPAT (bank page address table) table.

[0146] refer to Fig.12An optional structural diagram of a historical access record table is shown, in which multiple entries can be configured, and different entries correspond to different storage units. In particular, based on the small number of storage units in the memory, the number of entries in the historical access record table may be consistent with the total number of storage units, or may not be completely consistent; when the number of entries is consistent with the total number of storage units, corresponding entries can be configured for each storage unit, refer to Fig.12 That is, an optional structure corresponding to the case where the number of banks is 32; when the number of entries is not completely consistent with the total number of storage units, it can be gradually updated along with the memory access process, and when a storage unit is accessed, the corresponding entry is configured.

[0147] The historical access row address recorded in the historical access record table may be only the row address segment in the memory particle address (refer to Fig.12 The row address in the memory cell address may also be the address information for indicating the row address in the memory cell address (i.e., including other address segments with a range larger than the row address). Based on the historical access record table, each entry corresponds to a storage unit one by one, so that the storage unit corresponding to each entry is clear, so that in a preferred example, the historical access row address may be only the row address segment in the memory cell address.

[0148] Furthermore, the entries in the historical access record table are configured with corresponding index values, so that the historical access row addresses are retrieved based on the index values. The index value can be the address information indicating the storage unit in the memory cell address, or can be a value with a preset number of bits calculated based on the address information indicating the storage unit in the memory cell address.

[0149] In a preferred example, based on the fact that the number of bits of the address segment indicating the storage unit in the memory cell address is usually small, the index value may be the address information indicating the storage unit in the memory cell address. Fig.12 That is, the bank address is used as an index value for example.

[0150] In other examples, the historical access record table can also be implemented based on a register group, which can be called a target register group. In the target register group, each register corresponds to a storage unit one by one, and is used to store the corresponding historical access row address. When obtaining the corresponding historical access row address, the historical access row address can be obtained based on a preset corresponding relationship without setting the corresponding index value. Among them, the target register group used to implement the historical access record table can be a register group configured to a preset area, or a combination of each register configured in a corresponding storage unit.

[0151] In a further example, a valid flag corresponding to an entry may also be configured in the historical access record table, and the valid flag may be used to mark whether the corresponding entry is valid, which is shown in the historical access record table, that is, each entry is configured with a valid bit (refer to Fig.12 , where Vaild is valid and Invaild is invalid). Based on this, refer to Fig.13 Another optional update flow chart of the access prediction table is shown, step S200 may include:

[0152] Step S201: Determine whether the entry corresponding to the target storage unit in the historical access record table is valid;

[0153] It can be understood that by determining whether the corresponding entry is valid, it is determined whether the historical access row address in the corresponding entry is valid. If valid, step S202 is executed to obtain corresponding information, and step S204 is executed to update the entry; if invalid, step S203 is executed to feedback the result, and step S205 is executed to initialize the entry.

[0154] Specifically, the valid identifier "1" may be used to indicate that the entry is valid, and the valid identifier "0" may be used to indicate that the entry is invalid. Accordingly, in this step, when it is determined that the valid identifier of the entry corresponding to the target storage unit is "1", the entry corresponding to the target storage unit is considered to be valid, and when it is determined that the valid identifier of the entry corresponding to the target storage unit is "0", the entry corresponding to the target storage unit is considered to be invalid.

[0155] Step S202: Obtain the historical access row address stored in the entry corresponding to the target storage unit.

[0156] When the entry is confirmed to be valid, the historical access row address may be obtained for subsequent comparison.

[0157] Step S203: Obtain invalid information, where the invalid information is used to indicate that the corresponding entry is invalid.

[0158] It should be noted that when the corresponding entry is invalid, invalid information can be obtained, so that in subsequent steps, the corresponding processing flow can be executed based on the invalid information.

[0159] In a further example, the update of the historical access record table can also be performed, that is, the row address of the target memory row is updated to the entry of the corresponding target storage unit. When the corresponding entry is invalid, the update process of the historical access record table can be triggered, that is, the row address in the target memory particle address is stored in the target storage unit, and the valid flag of the entry is updated to be valid; and when the corresponding entry is valid, the historical access record table can be updated after the subsequent access prediction table update process is completed, that is, the row address in the target memory particle address is stored in the target storage unit.

[0160] Next, executing step S210: based on the row address of the target memory row and the historically accessed row address, determining access information of the historically accessed row address;

[0161] It can be understood that based on the row address of the target memory row and the historical access row address, it can be determined whether the previous access request corresponding to the historical access row address and the currently executed access request are in a page hit relationship or a page conflict relationship, and then the access information of the historical access row address can be determined.

[0162] Among them, when the row address of the target memory row is consistent with the historical access row address, the access information is used to indicate a page hit relationship; when the row address of the target memory row is inconsistent with the historical access row address, the access information is used to indicate a page conflict relationship.

[0163] By comparing the row address of the target memory row with the historical access row address, it is determined whether the target memory row corresponding to the currently executed access request is a page conflict or a page hit relative to the previous access request of the target storage unit. It can be understood that if the row address of the target memory row is consistent with the historical access row address, it corresponds to a page hit; if the row address of the target memory row is inconsistent with the historical access row address, it corresponds to a page conflict.

[0164] Step S220: Based on the access information of the historically accessed row address, update the access prediction information corresponding to the historically accessed memory row in the access prediction table.

[0165] It can be understood that the access information indicates a corresponding page hit relationship or page conflict relationship, so that the access prediction information can be updated based on the access information.

[0166] It should be noted that, from the perspective of prediction, whether the current access is a page hit or a page conflict is the result of historical access to the memory row. Therefore, what should be updated is the access prediction information corresponding to the historical access to the memory row in the access prediction table.

[0167] When accessing index values ​​in a prediction table based on calculation confirmation, refer to Fig.14 In another update flow chart of the access prediction table shown in FIG. 1 , step S220 may include:

[0168] Step S221: calculating the index value of the historically accessed memory row in the access prediction table based on the storage unit address of the target storage unit and the row address of the historically accessed memory row;

[0169] By calculating the corresponding index value, a specific entry can be retrieved based on the index value in the subsequent process.

[0170] In a specific example, the index value can be a hash value of the storage unit address of the storage unit and the row address of the memory row. For example, the corresponding address information can be hashed and discretized, thereby avoiding different address information from calculating the same index value while reducing the number of bits of the index value, thereby avoiding different addresses from addressing the same entry and reducing interference between data.

[0171] Specifically, the calculation may also refer to the description in step S121.

[0172] Step S222: Determine the entry to be updated corresponding to the index value;

[0173] Based on the index value, the entry to be updated corresponding to the index value can be retrieved and determined. It should be noted that when the entry to be updated does not exist in the access prediction table, an entry corresponding to the index value is created in the access prediction table as the entry to be updated.

[0174] It is understandable that, based on the uncertainty of memory access, the entries in the access prediction table can be updated accordingly based on the memory access process, that is, along the memory access process, when a memory row is accessed, the corresponding entry is configured.

[0175] Step S223: Based on the access information of the historical access row address, calculate the update value of the access prediction information corresponding to the entry to be updated, and store the update value in the entry to be updated.

[0176] It is understandable that different update values ​​of the access prediction information corresponding to the entry to be updated can be calculated based on different access information. In a specific example, the corresponding update can be performed based on a preset calculation rule.

[0177] In the aforementioned example of performing the corresponding update by calculating the first preset value and the second preset value, this step may calculate the update value of the access prediction information corresponding to the entry to be updated as follows: when the access information indicates a page hit relationship, the access prediction information of the historically accessed memory row is subtracted from the first preset value; when the access information indicates a page conflict relationship, the access prediction information of the historically accessed memory row is increased by the second preset value.

[0178] In a further example, when the entry to be updated is a newly created entry, the updating step may specifically include: configuring an initial value for the entry to be updated. In a specific example, the initial value may be "0".

[0179] In a further example, in the historical access record table, if the corresponding entry is invalid, this step can be skipped and the update process of the historical access record table is directly triggered.

[0180] In a further example, after executing step S220, referring to Fig.15 The optional flow chart of an information update shown in FIG. 1 can further update the historical access record table. For details, refer to Fig.15 , after executing step S220, further comprising:

[0181] Step S230: updating the row address of the target memory row to the entry corresponding to the target storage unit in the historical access record table;

[0182] It can be understood that after execution to the target memory row, corresponding to the access request to be executed, the row address of the memory row accessed by the corresponding previous access request becomes the target memory row, and therefore, the row address of the target memory row is updated to the entry of the corresponding target storage unit.

[0183] It should be noted that when the corresponding entry in the aforementioned historical access record table is invalid, the update process of the access prediction table will be skipped based on the invalid information, and step S230 will be directly triggered, that is, the update process of the historical access record table will be triggered, and the row address in the target memory particle address will be stored in the entry corresponding to the target storage unit.

[0184] It can be seen that an embodiment of the present invention provides an access prediction table that records access prediction information of corresponding memory rows. The access prediction table determines the access prediction information of the corresponding memory row based on the access information of the memory row, so that the access trend of the memory row can be predicted more accurately. Furthermore, when there are no other access requests pointing to the target storage unit pointed to by the target memory particle address in the access request queue, the type of access command is determined based on the access prediction information of the target row pointed to by the target memory particle address in the access prediction table, thereby sending appropriate access commands to the greatest extent and improving the access efficiency of the memory.

[0185] In a further example, an embodiment of the present invention further provides a memory access device, which can be understood as a software module configured to execute the memory access method described in the embodiment of the present invention, or can be understood as a hardware logic configured to execute the memory access method described in the embodiment of the present invention. The memory access device is configured in a memory controller to implement a corresponding memory access process. When the memory access device is configured in a memory controller, it can also be referred to as an automatic precharge decision module. In an optional example, refer to Fig.16 An optional block diagram of the memory access device is shown, and the memory access device may include:

[0186] The information acquisition module 300 is used to acquire a target memory particle address, where the target memory particle address is the memory particle address of the access request currently executed in the access request queue, wherein the storage unit pointed to by the target memory particle address is the target storage unit, and the memory row of the target storage unit pointed to by the target memory particle address is the target memory row;

[0187] An information determination module 310 is used to determine whether there are other access requests directed to the target storage unit in the access request queue;

[0188] A command decision module 320 is used to determine the type of access command based on the access prediction information corresponding to the target memory row in the access prediction table when there are no other access requests pointing to the target storage unit in the access request queue; wherein, when the access prediction information indicates a prediction of a page conflict, the determined access command is a first access command, and the first access command is used to instruct the memory device to perform a read and write operation on the memory, and automatically trigger a precharge operation on the memory row performing the read and write operation; the access prediction information corresponding to the memory row in the access prediction table is determined based on the access information of the memory row, wherein the access information is used to indicate a page hit relationship or a page conflict relationship between an access request corresponding to the memory row and a next access request of the access request in an access request for the storage unit where the memory row is located.

[0189] Optionally, the memory access device further includes:

[0190] An update module 330 is used to obtain a historical access row address of a target storage unit, wherein the historical access row address is a row address of a memory row accessed by a previous access request corresponding to the target storage unit; based on the row address of the target memory row and the historical access row address, access information of the historical access row address is determined, wherein when the row address of the target memory row is consistent with the historical access row address, the access information is used to indicate a page hit relationship, and when the row address of the target memory row is inconsistent with the historical access row address, the access information is used to indicate a page conflict relationship; based on the access information of the historical access row address, the access prediction information corresponding to the historical access memory row in the access prediction table is updated.

[0191] Optionally, the update module 330 is used to obtain the historical access row address of the target storage unit, specifically: obtaining the historical access row address of the corresponding target storage unit from the historical access record table; wherein the historical access record table is used to record the row address of the memory row accessed by the previous access request of the corresponding storage unit.

[0192] Optionally, the updating module 330 is used to obtain the historical access row address of the corresponding target storage unit from the historical access record table, including:

[0193] Determine whether the entry corresponding to the target storage unit in the historical access record table is valid;

[0194] If valid, obtain the historical access row address stored in the entry corresponding to the target storage unit.

[0195] Optionally, the updating module is used to update the access prediction information corresponding to the historical access memory row in the access prediction table, including:

[0196] Calculate an index value of the historically accessed memory row in an access prediction table based on a storage unit address of the target storage unit and a row address of the historically accessed memory row, wherein the index value has a preset number of bits, which is smaller than the number of bits used to indicate address information of the memory row in the memory particle address;

[0197] Determine the entry to be updated corresponding to the index value;

[0198] Based on the access information of the historical access row address, an update value of the access prediction information corresponding to the entry to be updated is calculated, and the update value is stored in the entry to be updated.

[0199] Optionally, the updating module 330 is configured to calculate an update value of the access prediction information corresponding to the entry to be updated based on the access information of the historical access row address, and store the update value in the entry to be updated, including:

[0200] When the access information indicates a page hit relationship, the access prediction information of the historically accessed memory row is subtracted by a first preset value; when the access information indicates a page conflict relationship, the access prediction information of the historically accessed memory row is increased by a second preset value.

[0201] Optionally, the update module 330 is used to update the access prediction information corresponding to the historical access memory row in the access prediction table based on the comparison result, and is also used to: update the row address of the target memory row to the entry corresponding to the target storage unit in the historical access record table.

[0202] Optionally, the command decision module 320 is used to determine the type of the access command based on the access prediction information corresponding to the target memory row in the access prediction table, including:

[0203] Calculate an index value corresponding to the target memory row in an access prediction table based on a storage unit address of the target storage unit and a row address of the target memory row;

[0204] Based on the index value, determining access prediction information corresponding to the target memory row;

[0205] Based on the access prediction information, a corresponding access command is determined.

[0206] Optionally, the command decision module 320 is used to determine a corresponding access command based on the access prediction information, including:

[0207] Determining whether the access prediction information is greater than or equal to a third preset value;

[0208] If so, the access prediction information indicates that the prediction is a page conflict, and the access command is determined to be the first access command; if not, the access prediction information indicates that the prediction is a page hit, and the access command is determined to be the second access command.

[0209] Optionally, in the access prediction table, the index value of each entry is a hash value of the storage unit address of the storage unit and the row address of the memory row.

[0210] Optionally, the command decision module 320 is also used to determine the type of access command based on the address of the memory particle to be processed when there are other access requests pointing to the target storage unit in the access request queue; the address of the memory particle to be processed is the memory particle address of the next access request pointing to the target storage unit in the access request queue.

[0211] Optionally, the command decision module 320 is used to determine the type of access command based on the address of the memory particle to be processed, including:

[0212] Determine whether the row address in the memory particle address to be processed is consistent with the target row address;

[0213] If not, the access command is determined to be the first access command; if so, the access command is determined to be the second access command.

[0214] In an embodiment of the present invention, a memory controller is further provided. The memory controller includes the memory access device provided in the above embodiment. Specifically, the memory access device serves as an automatic precharge decision module in the memory controller.

[0215] For further reference, Fig.17 An optional structural diagram of a memory controller is shown, and the memory controller may further include:

[0216] An address conversion module 400 is used to parse a memory granule address from a memory address in an access request based on a preset address mapping module;

[0217] A command scheduling module 410, for converting a memory access request into an access command according to an access protocol and timing requirements of a memory device;

[0218] An automatic precharge decision module 420, used to configure the memory access device to implement the memory access method provided by the aforementioned embodiment;

[0219] The command sending module 430 is used to send an access command to the memory device.

[0220] In an embodiment of the present invention, a computing device is further provided. The computing device can be understood as an optional product for implementing the memory access method described in the embodiment of the present invention. Specifically, the computing device includes the above-mentioned memory access apparatus.

[0221] An embodiment of the present invention further provides a storage medium, wherein the storage medium stores one or more computer executable instructions, and the one or more computer executable instructions implement the memory access method when executed.

[0222] An embodiment of the present invention further provides a computer program, comprising one or more computer executable instructions, wherein the one or more computer executable instructions implement the memory access method when executed.

[0223] The above describes multiple implementation schemes provided by the embodiments of the present invention. The various optional methods introduced in the implementation schemes can be combined and cross-referenced with each other without conflict, thereby extending a variety of possible implementation schemes, which can all be considered as implementation schemes disclosed and open in the embodiments of the present invention.

[0224] Although the embodiments of the present invention are disclosed above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.

Claims

1. A memory access method, characterized in that: include: Obtain a target memory particle address, where the target memory particle address is a memory particle address of an access request currently being executed in an access request queue, wherein a storage unit pointed to by the target memory particle address is a target storage unit, and a memory row of the target storage unit pointed to by the target memory particle address is a target memory row; Determining whether there are other access requests directed to the target storage unit in the access request queue; If not, the type of access command is determined based on the access prediction information corresponding to the target memory row in the access prediction table; wherein, when the access prediction information indicates a prediction of a page conflict, the determined access command is a first access command, and the first access command is used to instruct the memory device to perform read and write operations on the memory, and automatically trigger a precharge operation on the memory row that performs the read and write operations; the access prediction information corresponding to the memory row in the access prediction table is determined based on the access information of the memory row, wherein the access information is used to indicate a page hit relationship or a page conflict relationship between an access request corresponding to the memory row and a next access request of the access request in an access request for the storage unit where the memory row is located.

2. The memory access method according to claim 1, characterized in that: After obtaining the target memory granule address, the method further includes: Acquire a historical access row address of the target storage unit, where the historical access row address is a row address of a memory row accessed by a previous access request corresponding to the target storage unit; Based on the row address of the target memory row and the historical access row address, determining access information of the historical access row address, wherein when the row address of the target memory row is consistent with the historical access row address, the access information is used to indicate a page hit relationship, and when the row address of the target memory row is inconsistent with the historical access row address, the access information is used to indicate a page conflict relationship; Based on the access information of the historically accessed row address, the access prediction information corresponding to the historically accessed memory row in the access prediction table is updated.

3. The memory access method according to claim 2, characterized in that: The obtaining of the historical access row address of the target storage unit is specifically: obtaining the historical access row address of the corresponding target storage unit from a historical access record table; wherein the historical access record table is used to record the row address of the memory row accessed by the previous access request of the corresponding storage unit.

4. The memory access method according to claim 3, characterized in that: The step of obtaining the historical access row address of the corresponding target storage unit from the historical access record table includes: Determine whether the entry corresponding to the target storage unit in the historical access record table is valid; If valid, obtain the historical access row address stored in the entry corresponding to the target storage unit.

5. The memory access method according to claim 2, characterized in that: The updating of the access prediction information corresponding to the historical access memory row in the access prediction table includes: Calculate an index value of the historically accessed memory row in an access prediction table based on a storage unit address of the target storage unit and a row address of the historically accessed memory row, wherein the index value has a preset number of bits, which is smaller than the number of bits used to indicate address information of the memory row in the memory particle address; Determine the entry to be updated corresponding to the index value; Based on the access information of the historical access row address, an update value of the access prediction information corresponding to the entry to be updated is calculated, and the update value is stored in the entry to be updated.

6. The memory access method according to claim 5, characterized in that: The calculating, based on the access information of the historical access row address, an update value of the access prediction information corresponding to the entry to be updated includes: When the access information indicates a page hit relationship, the access prediction information of the historically accessed memory row is subtracted by a first preset value; when the access information indicates a page conflict relationship, the access prediction information of the historically accessed memory row is increased by a second preset value.

7. The memory access method according to claim 2, characterized in that: After the access prediction information corresponding to the historically accessed memory row in the access prediction table is updated based on the access information of the historically accessed row address, the method further includes: Update the row address of the target memory row into the entry of the historical access record table corresponding to the target storage unit.

8. The memory access method according to claim 1, characterized in that: The determining the type of the access command based on the access prediction information corresponding to the target memory row in the access prediction table includes: Calculate an index value corresponding to the target memory row in an access prediction table based on a storage unit address of the target storage unit and a row address of the target memory row; Based on the index value, determining access prediction information corresponding to the target memory row; Based on the access prediction information, a corresponding access command is determined.

9. The memory access method according to claim 8, characterized in that: The determining, based on the access prediction information, a corresponding access command includes: Determining whether the access prediction information is greater than or equal to a third preset value; If so, the access prediction information indicates that the prediction is a page conflict, and the access command is determined to be the first access command; if not, the access prediction information indicates that the prediction is a page hit, and the access command is determined to be the second access command; the second access command is used to instruct the memory device to only perform read and write operations on the memory.

10. The memory access method according to claim 1, characterized in that: In the access prediction table, the index value of each entry is a hash value of the storage unit address of the storage unit and the row address of the memory row.

11. The memory access method according to claim 1, characterized in that: In the step of determining whether there are other access requests pointing to the target storage unit in the access request queue, if so, determine the type of access command based on the address of the memory particle to be processed; the address of the memory particle to be processed is the memory particle address of the next access request pointing to the target storage unit in the access request queue.

12. The memory access method according to claim 11, characterized in that: The determining the type of the access command based on the address of the memory particle to be processed includes: Determine whether the row address in the memory particle address to be processed is consistent with the target row address; If not, it is determined that the access command is a first access command; if so, it is determined that the access command is a second access command; the second access command is used to instruct the memory device to only perform read and write operations on the memory.

13. A memory access device, characterized in that: include: An information acquisition module is used to acquire a target memory particle address, wherein the target memory particle address is a memory particle address of an access request currently executed in an access request queue, wherein a storage unit pointed to by the target memory particle address is a target storage unit, and a memory row of the target storage unit pointed to by the target memory particle address is a target memory row; An information determination module, used for determining whether there are other access requests directed to the target storage unit in the access request queue; A command decision module is used to determine the type of access command based on the access prediction information corresponding to the target memory row in the access prediction table when there are no other access requests pointing to the target storage unit in the access request queue; wherein, when the access prediction information indicates a prediction of a page conflict, the determined access command is a first access command, and the first access command is used to instruct the memory device to perform a read and write operation on the memory, and automatically trigger a precharge operation on the memory row performing the read and write operation; the access prediction information corresponding to the memory row in the access prediction table is determined based on the access information of the memory row, wherein the access information is used to indicate, in the access request for the storage unit where the memory row is located, a page hit relationship or a page conflict relationship between the access request corresponding to the memory row and the next access request of the access request.

14. A memory controller, characterized in that: The memory control configuration comprises the memory access device of claim 13.

15. The memory controller according to claim 14, characterized in that: The memory control is also configured with: An address conversion module, used for parsing a memory granule address from a memory address in an access request based on a preset address mapping module; A command scheduling module, used to convert memory access requests into access commands according to the access protocol and timing requirements of the memory device; an automatic precharge decision module, used for configuring the memory access device; The command sending module is used to send access commands to the memory device.

16. A computing device, characterized in that: A memory controller comprising any one of claims 14-15.

17. A storage medium, characterized in that: The storage medium stores one or more computer executable instructions, and when the one or more computer executable instructions are executed, the memory access method according to any one of claims 1 to 12 is implemented.

18. A computer program, characterized in that It comprises one or more computer executable instructions, and when the one or more computer executable instructions are executed, the memory access method as described in any one of claims 1-12 is implemented.

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