Resistive memory processing method, device, electronic device and storage medium

Abstract

The present application relates to a method, device, electronic device, and storage medium for processing a resistive random access memory (RRAM). The method includes: determining whether there is a need to process a RRAM; if there is a need to process a RRAM, performing a forward forming operation on the RRAM to be processed to obtain a RRAM after forward processing; if the conductance of the RRAM after forward processing is greater than or equal to a first preset conductance threshold, repeatedly applying a first RESET pulse to the RRAM after forward processing until the conductance of the RRAM after forward processing is less than the first preset conductance threshold, thereby obtaining a RRAM after reverse processing; and repeatedly applying a second RESET pulse to the RRAM after reverse processing until the conductance of the RRAM after reverse processing is greater than the second preset conductance threshold, thereby obtaining a target RRAM. This solves the problem of relaxation of the target memory after programming and enhances the stability of the conductance state of the RRAM after programming.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a processing method, device, electronic device, and storage medium for resistive random access memory. Background Art

[0002] With the rapid growth of AI hardware requirements, the end of Moore's Law, the limitations of the memory wall, and the von Neumann bottleneck, among other issues, have made the economical construction of AI hardware platforms increasingly challenging. The integrated computing and storage architecture offers a key solution to these problems, but it also places new demands on devices: the integration of computing and storage units.

[0003] Resistive Random Access Memory (RRAM) is one of the new devices that can meet this requirement. Numerous studies worldwide have demonstrated its feasibility and efficiency in AI applications, making it a very attractive prospect. Furthermore, due to its advantages such as non-volatility, low power consumption, high speed, good scalability, and multi-bit storage capacity, RRAM also has great potential for application in the memory field.

[0004] Programming methods can set the target conductance value of RRAM. However, due to the operating mechanism of RRAM, even after successfully writing the conductance value, the RRAM may experience highly random conductance drift (also known as relaxation) due to factors such as unstable conductive filaments within the device, spontaneous migration of oxygen vacancies, and charge capture and release by defects. This phenomenon causes the conductance values ​​of many devices in the RRAM array to rapidly deviate from the programmed conductance value within a short timescale (typically less than 1 second), significantly reducing the accuracy of calculation results or causing errors in stored information.

[0005] Related technologies enhance the stability of RRAM by changing the material composition or device structure. However, these technologies often encounter challenges such as complex mechanism analysis and multiple process controllability, and often involve compromises between multiple characteristics, resulting in low efficiency. In addition, there is a method that uses optimized device programming to control the morphology of conductive filaments. However, due to the low operating voltage, this method has little effect on the heating morphology of the filaments, and the degree of optimization for stability is also small. Moreover, it must be used every time programming is performed, which is not practical. Summary of the Invention

[0006] The present application provides a processing method, device, electronic device and storage medium for resistive random access memory to solve the problem that the target memory after programming is prone to relaxation, resulting in reduced accuracy of calculation results or errors in stored information. By using a strong voltage to improve the morphology of conductive filaments at one time, the stability of the conductive state of the resistive random access memory after programming is enhanced, thereby ensuring the accuracy of calculation results and the reliability of stored information.

[0007] A first embodiment of the present application provides a method for processing a resistive random access memory, comprising the following steps:

[0008] Determine whether there is a need for resistive memory processing;

[0009] If there is a requirement for processing the resistive random access memory, performing a forward forming operation on the resistive random access memory to be processed to obtain a resistive random access memory after forward processing; if the conductance of the resistive random access memory after forward processing is greater than or equal to a first preset conductance threshold, repeatedly applying a first RESET pulse to the resistive random access memory after forward processing until the conductance of the resistive random access memory after forward processing is less than the first preset conductance threshold, thereby obtaining a resistive random access memory after reverse processing; and

[0010] Repeatedly applying a second RESET pulse to the reverse-processed resistive memory until the conductance of the reverse-processed resistive memory is greater than a second preset conductance threshold, thereby obtaining a target resistive memory.

[0011] Optionally, in some embodiments, when repeatedly applying the first RESET pulse to the resistive random access memory after the forward processing, the voltage of the first RESET pulse currently applied to the resistive random access memory after the forward processing is greater than the voltage of the first RESET pulse last applied to the resistive random access memory after the forward processing.

[0012] Optionally, in some embodiments, a minimum voltage of the second RESET pulse applied to the resistive random access memory after the reverse process is greater than a maximum voltage of the first RESET pulse applied to the resistive random access memory after the forward process.

[0013] Optionally, in some embodiments, before applying a first RESET pulse to the resistive switching memory after the forward processing until the conductance of the resistive switching memory after the forward processing is less than the first preset conductance threshold, the method further includes:

[0014] Increasing the pulse voltage of the first RESET pulse, and reading the current conductance of the resistive random access memory after the forward processing, to determine whether the pulse voltage is less than a preset voltage threshold;

[0015] If the pulse voltage is less than the preset voltage threshold, determining whether the current conductance is less than a preset minimum conductance value;

[0016] If the current conductance is less than the preset minimum conductance value, the preset minimum conductance value is updated with the current conductance.

[0017] A second embodiment of the present application provides a processing device for a resistive random access memory, including:

[0018] A judgment module, used to judge whether there is a need for resistive random access memory processing;

[0019] a processing module configured to, when there is a need to process the resistive random access memory, perform a forward forming operation on the resistive random access memory to obtain a forward-processed resistive random access memory; and if the conductance of the forward-processed resistive random access memory is greater than or equal to a first preset conductance threshold, repeatedly apply a first RESET pulse to the forward-processed resistive random access memory until the conductance of the forward-processed resistive random access memory is less than the first preset conductance threshold, thereby obtaining a reverse-processed resistive random access memory; and

[0020] A generating module is used to repeatedly apply a second RESET pulse to the reverse-processed resistive memory until the conductance of the reverse-processed resistive memory is greater than a second preset conductance threshold, thereby obtaining a target resistive memory.

[0021] Optionally, in some embodiments, when repeatedly applying the first RESET pulse to the resistive random access memory after the forward processing, the voltage of the first RESET pulse currently applied to the resistive random access memory after the forward processing is greater than the voltage of the first RESET pulse last applied to the resistive random access memory after the forward processing.

[0022] Optionally, in some embodiments, a minimum voltage of the second RESET pulse applied to the resistive random access memory after the reverse process is greater than a maximum voltage of the first RESET pulse applied to the resistive random access memory after the forward process.

[0023] Optionally, in some embodiments, before applying a first RESET pulse to the resistive random access memory after the forward processing until the conductance of the resistive random access memory after the forward processing is less than the first preset conductance threshold, the processing module further includes:

[0024] a reading unit, configured to increase the pulse voltage of the first RESET pulse, and read the current conductance of the resistive random access memory after the forward processing, to determine whether the pulse voltage is less than a preset voltage threshold;

[0025] a judgment unit, configured to judge whether the current conductance is less than a preset minimum conductance value when the pulse voltage is less than the preset voltage threshold;

[0026] An updating unit is configured to update the preset minimum conductance value with the current conductance when the current conductance is less than the preset minimum conductance value.

[0027] The third aspect of the present application provides an electronic device, comprising: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the resistive random access memory processing method as described in the above embodiment.

[0028] A fourth aspect of the present application provides a computer-readable storage medium having a computer program stored thereon, which is executed by a processor to implement the resistive random access memory processing method as described in the above embodiment.

[0029] Thus, by determining whether there is a need for resistive random access memory processing, if there is a need for resistive random access memory processing, a forward forming operation is performed on the resistive random access memory to obtain a forward-processed resistive random access memory. If the conductance of the forward-processed resistive random access memory is greater than or equal to a first preset conductance threshold, a first RESET pulse is repeatedly applied to the forward-processed resistive random access memory until the conductance of the forward-processed resistive random access memory is less than the first preset conductance threshold, thereby obtaining a reverse-processed resistive random access memory. A second RESET pulse is repeatedly applied to the reverse-processed resistive random access memory until the conductance of the reverse-processed resistive random access memory is greater than the second preset conductance threshold, thereby obtaining a target resistive random access memory. Thus, the problem that the target memory after programming is prone to relaxation, resulting in a decrease in the accuracy of the calculation results or errors in the stored information, is solved. By using a stronger voltage to improve the morphology of the conductive filaments at one time, the stability of the conductive state of the programmed resistive random access memory is enhanced, thereby ensuring the accuracy of the calculation results and the reliability of the stored information.

[0030] Additional aspects and advantages of the present application will be given in part in the description below, and in part will become apparent from the description below, or will be learned through practice of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] The above and / or additional aspects and advantages of the present application will become apparent and easily understood from the following description of the embodiments in conjunction with the accompanying drawings, in which:

[0032] Figure 1 A schematic diagram of a programming principle of a resistive random access memory in the related art;

[0033] Figure 2 A flowchart of a method for processing a resistive random access memory according to an embodiment of the present application;

[0034] Figure 3 Schematic diagram of a resistive random access memory according to one embodiment of the present application. Figure 3 (a) is a schematic diagram of the structure of the resistive random access memory. Figure 3 (b) is a schematic diagram of the random drift phenomenon after the conductance value is successfully programmed;

[0035] Figure 4 FIG1 is a schematic diagram of a processing method for a resistive random access memory according to an embodiment of the present application. Figure 4 (a) is a schematic diagram of the sub-process. Figure 4 (b) is a flowchart of the first step of the reverse forming operation. Figure 4 (c) is a flow chart of the second step of the reverse forming operation;

[0036] Figure 5 1 is a schematic diagram comparing test results of a resistive memory processing method in a related art according to an embodiment of the present application and a resistive memory processing method according to an embodiment of the present application. Figure 5 (a) is the change of the average conductance of 16 conduction states over time, Figure 5 (b) is the RD value of 16 conduction states at 10^3s, Figure 5 (c) shows the change of the average RD of 16 conduction states over time;

[0037] Figure 6 Schematic diagram of a block diagram of a processing device for a resistive random access memory according to an embodiment of the present application;

[0038] Figure 7 A schematic diagram of the structure of an electronic device provided according to an embodiment of the present application. DETAILED DESCRIPTION

[0039] The following describes in detail embodiments of the present application, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to be used to explain the present application, and should not be construed as limiting the present application.

[0040] The following describes a method, device, electronic device, and storage medium for processing a resistive random access memory according to an embodiment of the present application with reference to the accompanying drawings. In view of the problem that the target memory after programming mentioned in the above background technology is prone to relaxation, resulting in a decrease in the accuracy of the calculation results or errors in the stored information, the present application provides a method for processing a resistive random access memory, in which, by determining whether there is a need for resistive random access memory processing, if there is a need for resistive random access memory processing, a forward forming operation is performed on the resistive random access memory to obtain a forward processed resistive random access memory, if the conductance of the forward processed resistive random access memory is greater than or equal to a first preset conductance threshold, a first RESET pulse is repeatedly applied to the forward processed resistive random access memory until the conductance of the forward processed resistive random access memory is less than the first preset conductance threshold, thereby obtaining a reverse processed resistive random access memory, and a second RESET pulse is repeatedly applied to the reverse processed resistive random access memory until the conductance of the reverse processed resistive random access memory is greater than the second preset conductance threshold, thereby obtaining a target resistive random access memory. In this way, the problem of relaxation phenomenon easily occurring in the target memory after programming, which leads to decreased accuracy of calculation results or errors in stored information, is solved. By using a stronger voltage to improve the morphology of the conductive filaments at one time, the stability of the conductivity state of the resistive memory after programming is enhanced, thereby ensuring the accuracy of the calculation results and the reliability of the stored information.

[0041] Before introducing the processing method of the resistive random access memory according to the embodiment of the present application, the characteristics of the resistive random access memory are first introduced.

[0042] In computing applications, applying an input voltage vector to a resistive random access memory array yields an output current vector, thereby enabling complex vector-matrix multiplication operations. In such applications, the RRAM acts as both a storage unit and a computing unit, with the RRAM's conductance serving as a multiplier in the multiplication operation. In memory applications, the different conductance states (i.e., resistance states, where resistance and conductance have an inverse relationship) of the RRAM can be used to store different data information. Whether achieving accurate computational results or stable and reliable information storage, the desired conductance (resistance) value must be accurately programmed (i.e., written) into the RRAM. This process often involves multiple write-verify cycles. "Writing" is achieved by applying a voltage pulse of a certain amplitude and pulse width (which varies depending on the device and the programmed conductance value) to each RRAM cell to adjust the conductance value to a target value. During this adjustment process, "verification" is used to determine whether the device has reached the target conductance value. "Verification" is essentially a read operation on the RRAM, comparing the readout conductance value with the target value. Different programming schemes are usually implemented by multiple write-verify cycles. In these cycles, the amplitude or pulse width of the write pulse and other parameters will change according to different schemes. Currently, more accurate programming technology schemes are commonly used, such as Figure 1 shown.

[0043] Figure 1 The horizontal axis represents time, and the vertical axis represents the pulse voltage amplitude applied to the device when programming the resistive memory cell. The smallest pulse voltage applied is the read voltage (verify voltage), which is used to read the RRAM's conductance. Other large-amplitude positive pulses represent set pulses, and negative voltage pulses represent reset pulses. A set operation increases conductance, while a reset operation decreases conductance. A set / reset operation constitutes a write operation.

[0044] After each write operation, a read pulse is applied to read the RRAM's conductance and compared to the target value. This process is called "verify." Because the voltage used for verification is low, it generally does not affect the device's conductance. If the conductance is lower than the target, a Set operation is performed. After the Set operation, another read-verify operation is performed. If it is still lower than the target, a Set pulse with the same pulse width but a larger amplitude is applied, performing an enhanced Set operation. If the read conductance is higher than the target, a Reset operation is performed. The Reset operation is similar to the Set operation, but with a negative voltage. Due to the step-by-step increase in pulse amplitude during the Set or Reset operation, this programming method is called the Incremental Step Program Pulse (ISPP) strategy. Each time the RRAM conductance is verified, a Set or Reset write operation is performed to correct the conductance, followed by another verification cycle. This write-verify cycle repeats until the target value (or target range) is reached. If the difference is within a certain error range, programming is considered successful. If the conductance value is lower than the target range, a Set operation is performed; otherwise, a Reset is performed.

[0045] This write-and-verify programming method effectively writes the target conductance value. However, due to the operating mechanism of RRAM, even successfully written RRAMs can experience highly random conductance drift (also known as relaxation) after the operation due to factors such as inherent conductive filament instability, spontaneous migration of oxygen vacancies, and charge capture and release by defects. This phenomenon causes the conductance values ​​of many devices in the RRAM array to rapidly deviate from the programmed conductance value within a short timescale (typically less than 1 second), significantly reducing the accuracy of calculations or causing errors in stored information. Research has shown that the data retention of RRAMs must meet the industry standard of 10 years at 85°C. Therefore, the degree of conductance drift over short timescales is the primary factor determining the difference between the stored value and the target written value. Experimental results demonstrate that relaxation is dependent on the morphology of the conductive filaments and the presence of free oxygen ions, providing a scientific basis for suppressing this phenomenon through electrical manipulation of the filament morphology.

[0046] In actual implementation, most resistive memory devices are not conductive after fabrication, nor do they have voltage-controlled resistive switching capabilities. Instead, they resemble an insulator, requiring a large Set voltage to be applied to achieve soft breakdown of the resistive layer before a conductive filament path can be formed. The operation of converting a resistive memory device from an insulating state to a conductive state by applying a large Set voltage is called a Forming operation. Since the Forming operation has a significant impact on the morphology of the conductive filaments, optimizing the Forming operation scheme to control the morphology of the conductive filaments and thereby suppress the relaxation effect has become a feasible operation.

[0047] Specifically, Figure 2 A flowchart of a method for processing a resistive random access memory provided in an embodiment of the present application is provided.

[0048] like Figure 2 As shown, the processing method of the resistive random access memory includes the following steps:

[0049] In step S101 , it is determined whether there is a requirement for resistive random access memory processing.

[0050] It should be noted that this application is carried out for resistive switching memory, wherein the typical device structure of resistive switching memory is as follows Figure 3As shown in (a), the processing method of the resistive random access memory of the embodiment of the present application is also applicable to a structure in which transistors, gate tubes, diodes, etc. are connected in series with the resistive random access memory as gate devices (i.e., 1-Transistor-1-RRAM, 1T1R, 1-Selector-1-RRAM, 1S1R, 1-Diode-1-RRAM, 1D1R, etc.).

[0051] The present invention is aimed at the random drift of conductance that occurs spontaneously after the conductance value is successfully programmed (programmed to the target value) without any operation, namely, the relaxation phenomenon. The typical case is as follows Figure 3 As shown in (b), it exhibits characteristics such as short time course, large drift, and strong randomness. The different curves in the figure represent the changes in the conductance values ​​of several randomly selected devices. The conductance value at time 0 is the successfully programmed value, and the drift change of the conductance value is then read out over a time scale of 1 second.

[0052] Because relaxation is so random, it's difficult to analyze the patterns in a single device. Therefore, the degree of relaxation is often measured by the dispersion (RD) of the conductivity distribution across multiple devices. A smaller RD indicates less dispersion and greater stability. The following formula is used to calculate the RD metric.

[0053]

[0054] Among them, t in the lower right corner of the indicator represents t seconds after programming, i represents the number of a device among multiple devices, Gmax and Gmin respectively refer to the maximum and minimum values ​​of the device's conductivity range, and N represents the total number of devices.

[0055] The embodiment of the present application can process the resistive random access memory after receiving the resistive random access memory processing requirement, obtain the processing result, and analyze the dispersion degree of the processing result to prove the practical effect of the resistive random access memory processing method of the embodiment of the present application.

[0056] In step S102, if there is a need to process the resistive random access memory, a forward forming operation is performed on the resistive random access memory to be processed to obtain a resistive random access memory after forward processing. If the conductance of the resistive random access memory after forward processing is greater than or equal to a first preset conductance threshold, a first RESET pulse is repeatedly applied to the resistive random access memory after forward processing until the conductance of the resistive random access memory after forward processing is less than the first preset conductance threshold, thereby obtaining a resistive random access memory after reverse processing.

[0057] The first preset conductance threshold may be pre-set by a user, obtained through a limited number of experiments, or obtained through a limited number of computer simulations, which is not specifically limited here.

[0058] In the case of a need to process a resistive memory, the embodiment of the present application can first perform a forward forming operation on the resistive memory to change the resistive memory from an insulating state to a conductive state, and then apply a series of resets to achieve reverse forming, such as Figure 4 As shown in (b), the reverse forming operation process is mainly divided into two steps. The first step is to reduce the conductivity of the device to below the first preset conductivity threshold (i.e., Gtarget1), and change the resistive memory from a low conductivity state (LCS) to an extremely low conductivity state (NCS).

[0059] Optionally, in some embodiments, when repeatedly applying the first RESET pulse to the resistive memory after forward processing, the voltage of the first RESET pulse currently applied to the resistive memory after forward processing is greater than the voltage of the first RESET pulse last applied to the resistive memory after forward processing.

[0060] Specifically, an embodiment of the present application applies a first RESET pulse to the resistive memory after forward processing, and determines whether the conductance of the resistive memory after forward processing is less than a first preset conductance threshold. If the conductance of the resistive memory is not less than the first preset conductance threshold, a new RESET pulse with the same pulse width and a larger amplitude than the previous one is applied, and the new RESET pulse is used as the first RESET pulse until the conductance of the resistive memory after forward processing is less than the first preset conductance threshold.

[0061] In step S103 , a second RESET pulse is repeatedly applied to the reverse-processed resistive memory until the conductance of the reverse-processed resistive memory is greater than a second preset conductance threshold, thereby obtaining a target resistive memory.

[0062] The second preset conductance threshold (Gtarget2) may be preset by a user, obtained through a limited number of experiments, or obtained through a limited number of computer simulations, and is not specifically limited herein. The minimum voltage of the second RESET pulse applied to the resistive random access memory after the reverse process is greater than the maximum voltage of the first RESET pulse applied to the resistive random access memory after the forward process.

[0063] Those skilled in the art will understand that after the resistive random access memory reaches an extremely low conductance state, a reset operation is performed, and the conductance value changes from decreasing to increasing.

[0064] Specifically, if Figure 4As shown in (c), after the resistive memory is changed from a low conductance state (LCS) to an extremely low conductance state (NCS), the second step of the reverse forming operation is performed, and the reset operation is continued, and a second RESET pulse is applied to the resistive memory after the reverse processing. It should be noted that the amplitude of the second RESET pulse will continue to increase on the basis of the amplitude of the first RESET pulse. At this time, the conductance value of the resistive memory will increase, and it is judged whether the conductance value of the resistive memory is greater than the second preset conductance threshold. If the conductance value of the resistive memory is not greater than the second preset conductance threshold, a new RESET pulse with the same pulse width and a larger amplitude than the previous one is applied, and the new RESET pulse is used as the second RESET pulse until the conductance value of the resistive memory is greater than the second preset conductance threshold. Once the conductance exceeds the second preset conductance threshold, the program will stop to prevent the device from breaking down, and then continue to operate the next device.

[0065] It should be noted that the embodiment of the present application adds a negative voltage forming operation method after the conventional forward voltage forming operation, so that the device conductivity first drops to a minimum value and then rises. Negative reset voltages applied in various forms, such as DC voltage, fixed voltage pulses, step-increased voltage pulses, step-increased pulse width pulses, or mixed solutions of the above, are also included in the scope of protection of the embodiment of the present application. In addition, the embodiment of the present application also includes array-level situations in which each device operates serially, operates in parallel, and operates in array blocks to share delay overhead.

[0066] Optionally, in some embodiments, before applying a first RESET pulse to the resistive random access memory after forward processing until the conductance of the resistive random access memory after forward processing is less than a first preset conductance threshold, it also includes: increasing the pulse voltage of the first RESET pulse, and reading the current conductance of the resistive random access memory after forward processing, and judging whether the pulse voltage is less than the preset voltage threshold; if the pulse voltage is less than the preset voltage threshold, judging whether the current conductance is less than the preset minimum conductance value; if the current conductance is less than the preset minimum conductance value, updating the preset minimum conductance value with the current conductance.

[0067] The preset voltage threshold and the preset minimum conductance value may be pre-set by a user, obtained through a limited number of experiments, or obtained through a limited number of computer simulations, and are not specifically limited here.

[0068] like Figure 4 As shown in (a), during the reverse forming operation, a sub-process is involved, the purpose of which is to perform a reset operation and detect the device conductivity. The reset applied in the sub-process can be a DC, step voltage, step pulse width or fixed pulse. Figure 4 The step voltage is shown in .

[0069] Specifically, the pulse voltage of the RESET pulse is increased, and the current conductance of the resistive random access memory is read to determine whether the pulse voltage is greater than the preset voltage threshold. If the pulse voltage is not greater than the preset voltage threshold, then determine whether the current conductance is less than the preset minimum conductance value. If the current conductance is less than the preset minimum conductance value, then update the preset minimum conductance value with the current conductance. If the pulse voltage is greater than the preset voltage threshold or the current conductance is greater than or equal to the preset minimum conductance value, then end the sub-process.

[0070] The embodiment of the present application adds a check stop scheme during the application of a negative voltage pulse to prevent the device from being broken down by the reverse voltage. It should be noted that other similar methods such as reducing the step voltage, reducing the step pulse width, etc. that require a check stop scheme are also included in the scope of protection of the embodiment of the present application.

[0071] Figure 5 A comparison chart shows the results of various array-level performance tests using a related art RRAM processing method and a RRAM processing method according to embodiments of the present invention, with and without reverse forming. Experiments have shown that using reverse forming significantly improves both average conductance and relative deviation (RD) performance, while also minimizing the relaxation effect.

[0072] Therefore, the negative voltage forming added after the forward voltage forming operation in the embodiment of the present application can strengthen the originally fragile bottom conductive filaments in the resistive layer at one time, reduce the excess free oxygen ions in the functional layer, and reduce the overall degree of subsequent drift of the resistive memory after the conductivity (or resistance) value programming is completed, thereby alleviating the random drift (relaxation phenomenon) of the resistive memory after the conductivity value is programmed, and improving the accuracy of the calculation results of the resistive memory in computing applications and the data storage reliability in multi-bit storage applications.

[0073] In summary, the embodiments of the present application optimize the morphology of the conductive filaments of the memristor and alleviate the random drift phenomenon after the conductivity value of the resistive memory is written by adding a negative voltage forming operation after the conventional forward voltage forming operation; and prevent the device from being broken down by the reverse voltage by adding a check stop method during the reverse voltage application process.

[0074] According to the processing method of the resistive random access memory proposed in the embodiment of the present application, by determining whether there is a need for resistive random access memory processing, if there is a need for resistive random access memory processing, a forward forming operation is performed on the resistive random access memory to obtain a forward-processed resistive random access memory. If the conductance of the forward-processed resistive random access memory is greater than or equal to a first preset conductance threshold, a first RESET pulse is repeatedly applied to the forward-processed resistive random access memory until the conductance of the forward-processed resistive random access memory is less than the first preset conductance threshold, thereby obtaining a reverse-processed resistive random access memory. A second RESET pulse is repeatedly applied to the reverse-processed resistive random access memory until the conductance of the reverse-processed resistive random access memory is greater than the second preset conductance threshold, thereby obtaining a target resistive random access memory. Thus, the problem that the target memory after programming is prone to relaxation, resulting in a decrease in the accuracy of the calculation results or errors in the stored information, is solved. By using a stronger voltage to improve the morphology of the conductive filaments at one time, the stability of the conductive state of the programmed resistive random access memory is enhanced, thereby ensuring the accuracy of the calculation results and the reliability of the stored information.

[0075] Next, a processing device for a resistive random access memory according to an embodiment of the present application will be described with reference to the accompanying drawings.

[0076] Figure 6 4 is a block diagram of a processing device for a resistive random access memory according to an embodiment of the present application.

[0077] like Figure 6 As shown, the processing device 10 of the resistive random access memory includes: a judgment module 100 , a processing module 200 and a generation module 300 .

[0078] The determination module 100 is used to determine whether there is a need for resistive random access memory processing.

[0079] The processing module 200 is used to perform a forward forming operation on the resistive random access memory to be processed to obtain a resistive random access memory after forward processing when there is a need to process the resistive random access memory. If the conductance of the resistive random access memory after forward processing is greater than or equal to a first preset conductance threshold, the first RESET pulse is repeatedly applied to the resistive random access memory after forward processing until the conductance of the resistive random access memory after forward processing is less than the first preset conductance threshold, thereby obtaining a resistive random access memory after reverse processing.

[0080] The generating module 300 is configured to repeatedly apply a second RESET pulse to the reverse-processed resistive memory until the conductance of the reverse-processed resistive memory is greater than a second preset conductance threshold, thereby obtaining a target resistive memory.

[0081] Optionally, in some embodiments, when repeatedly applying the first RESET pulse to the resistive memory after forward processing, the voltage of the first RESET pulse currently applied to the resistive memory after forward processing is greater than the voltage of the first RESET pulse last applied to the resistive memory after forward processing.

[0082] Optionally, in some embodiments, a minimum voltage of the second RESET pulse applied to the resistive memory after the reverse process is greater than a maximum voltage of the first RESET pulse applied to the resistive memory after the forward process.

[0083] Optionally, in some embodiments, before applying a first RESET pulse to the resistive random access memory after forward processing until the conductance of the resistive random access memory after forward processing is less than a first preset conductance threshold, the processing module 300 further includes: a reading unit, a judgment unit, and an update unit.

[0084] The reading unit is used to increase the pulse voltage of the first RESET pulse, and read the current conductance of the resistive random access memory after the forward processing, to determine whether the pulse voltage is less than a preset voltage threshold.

[0085] The judgment unit is used to judge whether the current conductance is less than a preset conductance minimum value when the pulse voltage is less than a preset voltage threshold.

[0086] The updating unit is configured to update the preset minimum conductance value with the current conductance when the current conductance is less than the preset minimum conductance value.

[0087] It should be noted that the above explanation of the embodiment of the processing method of the resistive random access memory is also applicable to the processing device of the resistive random access memory of this embodiment, and will not be repeated here.

[0088] According to the resistive random access memory processing device proposed in the embodiment of the present application, by determining whether there is a need to process the resistive random access memory, if there is a need to process the resistive random access memory, a forward forming operation is performed on the resistive random access memory to obtain a forward-processed resistive random access memory. If the conductance of the forward-processed resistive random access memory is greater than or equal to a first preset conductance threshold, a first RESET pulse is repeatedly applied to the forward-processed resistive random access memory until the conductance of the forward-processed resistive random access memory is less than the first preset conductance threshold, thereby obtaining a reverse-processed resistive random access memory. A second RESET pulse is repeatedly applied to the reverse-processed resistive random access memory until the conductance of the reverse-processed resistive random access memory is greater than the second preset conductance threshold, thereby obtaining a target resistive random access memory. Thus, the problem that the target memory after programming is prone to relaxation, resulting in a decrease in the accuracy of the calculation results or errors in the stored information, is solved. By using a stronger voltage to improve the morphology of the conductive filaments at one time, the stability of the conductive state of the programmed resistive random access memory is enhanced, thereby ensuring the accuracy of the calculation results and the reliability of the stored information.

[0089] Figure 7 This is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application. The electronic device may include:

[0090] A memory 701 , a processor 702 , and a computer program stored in the memory 701 and executable on the processor 702 .

[0091] When the processor 702 executes the program, the processing method of the resistive random access memory provided in the above embodiment is implemented.

[0092] Furthermore, the electronic device further includes:

[0093] The communication interface 703 is used for communication between the memory 701 and the processor 702 .

[0094] The memory 701 is used to store computer programs that can be run on the processor 702 .

[0095] Memory 701 may include high-speed

[0096] RAM (Random Access Memory) memory may also include non-volatile memory, such as at least one disk memory.

[0097] If the memory 701, processor 702, and communication interface 703 are implemented independently, the communication interface 703, memory 701, and processor 702 can be connected to each other via a bus and communicate with each other. The bus can be an ISA (Industry Standard Architecture) bus, a PCI (Peripheral Component Interconnect) bus, or an EISA (Extended Industry Standard Architecture) bus. The bus can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 7 Only one thick line is used in the diagram, but this does not mean that there is only one bus or one type of bus.

[0098] Optionally, in a specific implementation, if the memory 701, the processor 702 and the communication interface 703 are integrated on a chip, the memory 701, the processor 702 and the communication interface 703 can communicate with each other through an internal interface.

[0099] The processor 702 may be a CPU (Central Processing Unit), or an ASIC (Application Specific Integrated Circuit), or one or more integrated circuits configured to implement the embodiments of the present application.

[0100] An embodiment of the present application further provides a computer-readable storage medium having a computer program stored thereon, which implements the above-mentioned resistive random access memory processing method when executed by a processor.

[0101] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or N embodiments or examples in a suitable manner. In addition, those skilled in the art can combine and combine different embodiments or examples described in this specification and features of different embodiments or examples without contradiction.

[0102] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be understood to indicate or imply relative importance or implicitly specify the number of technical features indicated. Thus, a feature specified as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of this application, "N" means at least two, for example, two, three, etc., unless otherwise specifically defined.

[0103] Any process or method description in a flowchart or otherwise described herein may be understood to represent a module, fragment or portion of code comprising one or more executable instructions for implementing the steps of a custom logical function or process, and the scope of the preferred embodiments of the present application includes alternative implementations in which functions may be performed out of the order shown or discussed, including performing functions in a substantially simultaneous manner or in reverse order depending on the functions involved, which should be understood by those skilled in the art to which the embodiments of the present application belong.

[0104] It should be understood that various parts of the present application can be implemented using hardware, software, firmware, or a combination thereof. In the above embodiment, the N steps or methods can be implemented using software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented using hardware, as in another embodiment, any one of the following technologies known in the art or a combination thereof can be used: a discrete logic circuit having a logic gate circuit for implementing a logic function on a data signal, an application-specific integrated circuit having a suitable combination of logic gate circuits, a programmable gate array, a field programmable gate array, etc.

[0105] Those skilled in the art will understand that all or part of the steps in the method of the above embodiment can be completed by instructing related hardware through a program, and the program can be stored in a computer-readable storage medium. When the program is executed, it includes one or a combination of the steps of the method embodiment.

[0106] Although the embodiments of the present application have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limitations on the present application. Ordinary technicians in this field can change, modify, replace and modify the above embodiments within the scope of the present application.

Claims

1. A method for processing a resistive random access memory, characterized in that: The following steps are involved: Determine whether there is a need for resistive memory processing; If there is a requirement for processing the resistive switching memory, a forward forming operation is performed on the resistive switching memory to be processed to obtain a resistive switching memory after forward processing; if the conductance of the resistive switching memory after forward processing is greater than or equal to a first preset conductance threshold, a first RESET pulse is repeatedly applied to the resistive switching memory after forward processing until the conductance of the resistive switching memory after forward processing is less than the first preset conductance threshold, thereby obtaining a resistive switching memory after reverse processing; as well as Repeatedly applying a second RESET pulse to the reverse-processed resistive memory until the conductance of the reverse-processed resistive memory is greater than a second preset conductance threshold, thereby obtaining a target resistive memory, wherein: A minimum voltage of the second RESET pulse applied to the resistive switching memory after the reverse process is greater than a maximum voltage of the first RESET pulse applied to the resistive switching memory after the forward process.

2. The method according to claim 1, characterized in that When repeatedly applying the first RESET pulse to the forward-processed resistive memory, a voltage of the first RESET pulse currently applied to the forward-processed resistive memory is greater than a voltage of the first RESET pulse last applied to the forward-processed resistive memory.

3. The method according to claim 1, characterized in that Before applying a first RESET pulse to the resistive switching memory after the forward processing until the conductance of the resistive switching memory after the forward processing is less than the first preset conductance threshold, the method further includes: Increasing the pulse voltage of the first RESET pulse, and reading the current conductance of the resistive random access memory after the forward processing, to determine whether the pulse voltage is less than a preset voltage threshold; If the pulse voltage is less than the preset voltage threshold, determining whether the current conductance is less than a preset minimum conductance value; If the current conductance is less than the preset minimum conductance value, the preset minimum conductance value is updated with the current conductance.

4. A processing device for resistive random access memory, characterized in that: include: A judgment module, used to judge whether there is a need for resistive random access memory processing; a processing module configured to, when there is a need to process the resistive random access memory, perform a forward forming operation on the resistive random access memory to obtain a forward-processed resistive random access memory; and if the conductance of the forward-processed resistive random access memory is greater than or equal to a first preset conductance threshold, repeatedly apply a first RESET pulse to the forward-processed resistive random access memory until the conductance of the forward-processed resistive random access memory is less than the first preset conductance threshold, thereby obtaining a reverse-processed resistive random access memory; as well as A generating module is used to repeatedly apply a second RESET pulse to the reverse-processed resistive memory until the conductance of the reverse-processed resistive memory is greater than a second preset conductance threshold, thereby obtaining a target resistive memory, wherein: A minimum voltage of the second RESET pulse applied to the resistive switching memory after the reverse process is greater than a maximum voltage of the first RESET pulse applied to the resistive switching memory after the forward process.

5. The device according to claim 4, characterized in that When repeatedly applying the first RESET pulse to the forward-processed resistive memory, a voltage of the first RESET pulse currently applied to the forward-processed resistive memory is greater than a voltage of the first RESET pulse last applied to the forward-processed resistive memory.

6. The device according to claim 4, characterized in that Before applying a first RESET pulse to the resistive random access memory after the forward processing until the conductance of the resistive random access memory after the forward processing is less than the first preset conductance threshold, the processing module further includes: a reading unit, configured to increase the pulse voltage of the first RESET pulse, and read the current conductance of the resistive random access memory after the forward processing, to determine whether the pulse voltage is less than a preset voltage threshold; a judgment unit, configured to judge whether the current conductance is less than a preset minimum conductance value when the pulse voltage is less than the preset voltage threshold; An updating unit is configured to update the preset minimum conductance value with the current conductance when the current conductance is less than the preset minimum conductance value.

7. An electronic device, characterized in that: include: A memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the resistive random access memory processing method according to any one of claims 1 to 3.

8. A computer-readable storage medium having a computer program stored thereon, characterized in that: The program is executed by a processor to implement the resistive random access memory processing method according to any one of claims 1 to 3.

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