Digital signature

Abstract

A logic circuit package includes an interface for communicating with a controller and a logic circuit. The logic circuitry includes a memory arrangement storing indication data on which a manufacturing digital signature is calculated, a certificate for the controller to verify the manufacturing digital signature, and manufacturing attribute data. The manufacturing attribute data includes at least one indication representing indication data and a manufacturing digital signature. The logic circuitry is configured to send manufacturing attribute data to a controller in response to at least one first request from the controller. The logic circuitry is configured to send a certificate and indication data to the controller in response to at least one second request from the controller.

Description

Background Art

[0001] The subcomponents of the device can communicate with each other in a variety of ways. For example, a serial peripheral interface (SPI) protocol, Bluetooth low energy (BLE), near field communication (NFC), or other types of digital or analog communication can be used.

[0002] Some two-dimensional (2D) and three-dimensional (3D) printing systems include one or more replaceable printing device components, such as printing material containers (e.g., inkjet cartridges, toner cartridges, ink supplies, 3D printing agent supplies, build material supplies, etc.), inkjet print head assemblies, etc. In some examples, logic circuitry associated with the replaceable printing device components communicates with logic circuitry of the printing device in which the replaceable printing device components are installed, for example, communicating information such as its identity, capabilities, status, etc. Similarly, other communication systems also use logic circuitry to connect to host logic circuitry, general examples of which include network communication systems, life science applications, automotive industry, Internet of Things, etc.

[0003] Many instances of logic circuits contain digital signatures that include signed data. The data can be generated and signed at manufacturing time. The signature can be verified by a host or controller, so it can be assumed that the signed data represents trusted data originating from, for example, the original equipment manufacturer or other trusted / authorized party. BRIEF DESCRIPTION OF THE DRAWINGS

[0004] Figure 1 An example of a printing system is shown.

[0005] Figure 2 One example of replaceable printing device components is shown.

[0006] Figure 3 An example of a printing device is shown.

[0007] Figure 4 One example of a replaceable print cartridge is shown.

[0008] Figure 5A and 5B An example memory arrangement is shown.

[0009] Fig. 6A and 6B Example digital signature metadata is shown.

[0010] Figures 7A to 7D is a flow chart illustrating an example method that may be performed by logic circuitry.

[0011] Fig. 8A and 8B is a block diagram illustrating one example of a processing system for providing logic circuit packaging.

[0012] Fig. 9 is a block diagram illustrating one example of a signature hierarchy for a logic circuit package.

[0013] Fig.10 An example of a consumables cartridge is shown.

[0014] Fig.11A and Fig. 11B Other example memory arrangements are shown.

[0015] Fig. 12A and 12B Example attribute data for producing a digital signature is shown.

[0016] Fig.13 An example of indicative data for producing a digital signature is shown.

[0017] Fig.14 is a flow chart illustrating another example method that may be performed by logic circuitry.

[0018] Fig.15 is a flow chart illustrating another example method that may be performed by logic circuitry.

[0019] Fig.16 is a flow chart illustrating one example of a method for providing a logic circuit package including a memory arrangement.

[0020] Fig.17A and 17B Other example memory arrangements are shown.

[0021] Fig.18A and 18B Example part number signature metadata is shown.

[0022] Figures 19A to 19C is a flow chart illustrating other example methods that may be performed by logic circuits.

[0023] Fig. 20A and 20B is a block diagram illustrating another example of a processing system for providing logic circuit packaging.

[0024] Fig.21A and 21B Other example memory arrangements are shown.

[0025] Fig. 22 is a flow chart illustrating another example method that may be performed by logic circuitry. DETAILED DESCRIPTION

[0026] In the following detailed description, reference is made to the accompanying drawings which form a part of the detailed description, and in which specific examples in which the present disclosure may be practiced are shown by way of illustration. It should be understood that other examples may be used and structural or logical changes may be made without departing from the scope of the present disclosure. Therefore, the following detailed description should not be construed as limiting, and the scope of the present invention is defined by the appended claims. It should be understood that each individual feature or combination of features of the various examples described herein may be combined in part or in whole with each other individual feature or combination of features.

[0027] Some examples of applications described herein are in the context of printing devices. However, not all examples are limited to such applications, and at least some of the principles described herein can be used in other contexts, including but not limited to other communication systems, network communication systems, life science applications, automotive industry, Internet of Things, beverages, etc.

[0028] Some unauthorized third parties attempt to reverse engineer parts from original equipment manufacturers (OEMs) or other authorized parties to connect to devices of OEMs or other authorized parties. Authorized parties (also referred to as trusted parties) include parties in an authorized chain, which may include OEMs, suppliers, developers, etc., such as those authorized by intellectual property rights or otherwise associated with these parts and devices, while unauthorized third parties may be third parties who attempt to at least partially copy the original logic circuits of these authorized parties to connect to the host devices of these authorized parties without any pre-authorized relationship with the authorized parties.

[0029] In one practical example, the logic circuit may include a microcontroller attached to or configured to be attached to a printing consumables box, wherein the host printing device logic circuit may include a printer controller and / or a printer microcontroller. In the present disclosure, the host logic circuit may be any host-side microcontroller, controller, application-specific integrated circuit (ASIC) or similar device. The host logic circuit may sometimes be simply referred to as a "host", while the "logic circuit" itself should refer to the component-side logic circuit, not the host. In addition, the principles set forth in the present disclosure can be applied to any two relative communication devices without any hierarchical implications, for example, without the need for a host-to-component relationship. Therefore, throughout the present disclosure, "controller" can be substituted for "host". The controller may include a system component, a host, a supply device, a computer, a printer, etc. The host or controller may include a relative microcontroller and / or firmware that communicates with the logic circuit of the present disclosure. In the host printing device, the host printing device logic circuit may command the logic circuit of the replaceable printing supply component. In other examples, it is not excluded that the logic circuit of the present disclosure may command the relative controller or host. Therefore, the host may include any controller or other logic circuit.

[0030] The host or controller can be developed to only accept consumables (e.g., ink cartridges, containers, etc.) including keys, attributes, and data from a trusted party (e.g., OEM). To solve this problem, as described herein, digital signatures are provided on selected attributes and data. Digital signatures are generated using private keys and written to consumables. The firmware in the host can store (or can access) the corresponding public key to verify the digital signature. If the verification of the digital signature is successful, the keys, attributes, and data are genuine, and the host can accept and use the consumable. If the verification of the digital signature is unsuccessful, the keys, attributes, or data are not genuine, and the host can refuse to accept the consumable. As used herein, the term "signature" refers to "digital signature", and "signature" and "digital signature" can be used interchangeably. The digital signature disclosed herein can be directly signed on selected attributes and / or data, indirectly signed on selected attributes and / or data (such as signed on the hash of selected attributes and / or data), or a combination thereof.

[0031] In order to enable the host to verify the digital signature, the consumable can indicate which attributes and data are used to generate the digital signature. In one example, a flexible and extensible mode for specifying the data on which the digital signature is calculated is disclosed herein. The data may include certificates, such as a custom certificate format that does not include a proof method. The mode disclosed herein allows the selected keys, attributes and data on the consumable to be confirmed as real, or at least developed by a party that can access the private key associated with the digital signature and / or mode. The private key may include a trade secret or the like, and the party that can access the private key may be an authorized party. The digital signature may force unauthorized manufacturers to copy complete attributes and data sets from real consumables, rather than using non-real attributes, data or combinations. For example, a digital signature may make it easier to identify and / or remind customers of the existence of non-real consumables, for example, by a host or server or other means. This flexible and extensible method for specifying the attributes and data included in the digital signature can save memory in the consumable, and can make the process of signature verification simpler and more efficient. For example, a single digital signature may be used to prove multiple OEM proprietary certificates. The digital signature schemes and aspects involved in the present disclosure may be applied to different types of digital circuits, including any computing or processing device, for example, having some type of interconnection capability (directly physically and / or through any type of network).

[0032] As described, the logic circuit package can be associated with a printing device component such as an ink cartridge or container, and the host logic circuit can be associated with the host printing device to which these printing device components are to be connected. In other examples, the logic circuit does not need to be associated with the printing component or the host printing device, and the host can be replaced by any type of controller that is not necessarily in the relationship between the host and the component. The logic circuit and the controller can be used in conjunction with any micro-electromechanical system, a chip-on-a-chip lab, a mobile computing device, and / or a life science application. A wide range of applications require that the logic circuit package such as a microcontroller be physically and / or communicatively securely connected to the host. The logic circuit package can be connected to any type of host, such as any computing system, server, automotive system, home appliance, access control system, etc. Although many examples of the present disclosure relate to logic circuit packages and logic circuits for connecting printing device components to host printing device logic circuits, the functionality of the logic circuit package can be applied outside the printing field (by itself or in association with any component) to connect to any type of host logic circuit, without having to be associated with a printing device component or a printing device, respectively. Therefore, in the case where the present disclosure relates to a printing device and a printing device component (or ink cartridge or container), etc., the device can be any device and the component can be any component. Examples of the present disclosure allow a host logic circuit to securely identify and authenticate the logic circuit.

[0033] In some examples, an integrated circuit (I 2 The I2C (or I2C, as this symbol is used herein) protocol allows at least one "leader" (commonly referred to as a "master") integrated circuit (IC) to communicate with at least one "follower" (commonly referred to as a "slave") integrated circuit (IC), for example, via a bus. I2C and other communication protocols communicate data based on clock cycles. For example, a voltage signal can be generated, where the value of the voltage is associated with the data. For example, a voltage value above X volts can indicate a logical "1", while a voltage value below Y volts can indicate a logical "0", where X and Y are predetermined values ​​and Y is less than or equal to X. By generating appropriate voltages in each clock cycle in a series of clock cycles, data can be communicated via a bus or another communication link. Certain examples of the present disclosure involve follower or slave logic. In other examples, it is not necessary to be a master-slave or leader-follower or host-component relationship, so that two relatively communicating logic circuits (e.g., microcontrollers) can both receive commands and respond to commands.

[0034] At least in some examples, multiple logic circuit packages (each of which may be associated with a different replaceable printing device component or container) may be connected to an I2C bus. Some example printing material containers have follower logic that uses I2C communication, although other forms of digital or analog communication may also be used in other examples. In examples of I2C communication, a leader IC may generally be provided as part of a printing device (which may be referred to as a "host"), and the replaceable printing device component will include a "follower" IC, although this is not the case in all examples. There may be multiple follower ICs connected to an I2C communication link or bus (e.g., containers of printing agents of different colors). The address of the logic circuit package may be, for example, an I2C compatible address (hereinafter referred to as an I2C address) according to the I2C protocol to facilitate directing communication between the leader and the follower according to the I2C protocol. The follower IC may include a processor to perform data operations before responding to a request from the logic circuit system of the printing system. In some examples, the follower IC or logic circuit package of the present disclosure may be connected to or integrated into any printing device component that may be connected to or connected to or integrated into a printing device. For example, a logic circuit package or follower IC of the present disclosure may be connected to a non-replaceable printing device component.In other examples, other forms of digital and / or analog communication may be used in addition to I2C.

[0035] Communications between a printing device and replaceable printing device components (and / or their corresponding logic circuitry) installed in the device may facilitate various functions. The logic circuitry within the printing device may receive information from the logic circuitry associated with the replaceable printing device component via the communication interface and / or may send commands to the replaceable printing device component logic circuitry, which may include commands to write data to or read data from memory associated therewith.

[0036] A logic circuit package is described in at least some of the examples described below. The logic circuit package may be associated with a replaceable printing device component, such as internally or externally fixed thereto, such as at least partially within a housing, and is adapted to communicate data with a printing device controller via a bus provided as part of the printing device.

[0037] The term "logic circuit package" used in this article refers to a logic circuit, or refers to multiple logic circuits that can be interconnected or linked to each other in communication. When more than one logic circuit is provided, these logic circuits can be packaged as a single unit, or can be packaged separately, or not packaged, or some combination thereof. The package can be arranged on or set on a single substrate or multiple substrates. In some examples, the package can be directly fixed to the box wall. In some examples, the package can include an interface, such as a pad or a pin. The package interface can be used to connect to the communication interface of the printing device component, which is in turn connected to the printing device logic circuit, or the package interface can be directly connected to the printing device logic circuit. The example package can be configured to communicate via a serial bus interface. When more than one logic circuit is provided, these logic circuits can be connected to each other or connected to an interface to communicate through the same interface.

[0038] In some examples, each logic circuit package is equipped with at least one processor and memory. In one example, the logic circuit package can be a microcontroller or a secure microcontroller, or can be used as a microcontroller or a secure microcontroller. In use, the logic circuit package can be attached to or integrated with a replaceable printing device component, such as a replaceable printing consumable (e.g., ink, toner) cartridge. The logic circuit package may also be referred to as a logic circuit system component, or simply as a logic circuit system or a processing circuit system.

[0039] In certain examples of the present disclosure, packaging or encapsulation refers to the final assembly result of the logic circuit or integrated circuit assembly process, that is, basically the final form of the processing circuit system hardware itself. Relative to the host logic circuit in the field, the logic circuit package can be a final product for shipment and sale and use, or the logic circuit package can be an intermediate product that may require further customization-or personalization-or writing steps, further assembly, and / or further attachment or connection to another (e.g., printing) component or circuit. In a relatively simplified form, the package can be a substrate with a thin film layer without further protection. In other examples, the package may include at least one circuit that is at least partially protected by a packaging or molding material and / or supported by a board (e.g., PCB) and / or a flexible film and / or a molded plastic part (e.g., a printing cartridge). In some cases, the logic circuit is substantially surrounded by protective materials and / or insulating materials, except for electrodes that connect the logic circuit to the host and / or other logic circuits. All of these examples and other examples can refer to packaging. Although the package can include a logic circuit package, "package" is not to be confused with the industry term "package".

[0040] In some examples, the logic circuit package can respond to various types of requests (or commands) from the host (e.g., printing device) logic circuit. For example, these requests include a read request for reading data from a general memory; a query attribute request for reading attributes from an attribute storage memory, and / or a start session request for starting an authenticated communication session using a key stored in a key storage memory. A request is a type of command.

[0041] Figure 1 An example of a printing system 100 is shown. Printing system 100 includes a printing device 102 that communicates with logic circuitry associated with a replaceable printing device component 104 via a communication link 106. In some examples, communication link 106 may include an I2C bus or a compatible bus (hereinafter referred to as an I2C bus). Although replaceable printing device component 104 is shown as being external to printing device 102 for clarity, in some examples replaceable printing device component 104 may be temporarily installed or permanently housed within the printing device.

[0042] The replaceable printing device component 104 may include, for example, a printing material container or ink cartridge (which may be a building material container for 3D printing, a liquid or dry toner container for 2D printing, or an ink or liquid printing agent container for 2D or 3D printing), which in some examples may include a print head or other dispensing or transmission components. The printing material may be a consumable printing material to be consumed by dispensing or transmission. In the present disclosure, printing materials, printing consumables, or consumable printing materials may be the same thing, examples of which are identified between brackets above. For example, the replaceable printing device component 104 may include a consumable resource of the printing device 102 or a component whose life may be shorter (in some examples, significantly shorter) than the life of the printing device 102. In addition, although a single replaceable printing device component 104 is shown in this example, in other examples, there may be multiple replaceable printing device components, such as including printing agent containers of different colors, print heads (which may be integral with the container), etc. In other examples, the printing device component 104 may include a service component, such as a component to be replaced by a service person, examples of which may include a printhead, a toner cartridge, or a logic circuit package that itself attaches to a corresponding printing device component and communicates with compatible printing device logic circuitry. In other examples, the logic circuitry of the present disclosure may be communicatively connected to other devices other than a printing device.

[0043] Figure 2 An example of a replaceable printing device component 200 is shown, which may provide Figure 11. The replaceable printing device component 200 includes a data interface 202 and a logic circuit package 204. When the replaceable printing device component 200 is used, the logic circuit package 204 decodes data received via the data interface 202. The logic circuit system can perform other functions described below. The data interface 202 can include an I2C or other interface. In some examples, the data interface 202 can be part of the same package as the logic circuit package 204.

[0044] In some examples, logic circuit package 204 may be further configured to encode data sent via data interface 202. In some examples, more than one data interface 202 may be provided. In some examples, logic circuit package 204 may be configured to act as a "follower" in I2C communications.

[0045] Figure 3 An example of a printing device 300 is shown. The printing device 300 may provide Figure 1 1. Printing device 300 may be used as a host for replaceable components. Printing device 300 includes an interface 302 for communicating between replaceable printing device components and printing device logic 304 (such as a controller). In some examples, interface 302 is an I2C interface.

[0046] In some examples, the printing device logic circuit 304 can be configured to act as a host or leader in I2C communications. The printing device logic circuit 304 can generate and send commands to at least one replaceable printing device component 200, and can receive and decode responses from the at least one replaceable printing device component 200. In other examples, the printing device logic circuit 304 can communicate with the logic circuit package 204 using any form of digital or analog communication.

[0047] The printing device 102, 300 and the replaceable printing device component 104, 200 and / or its logic circuit system can be manufactured and / or sold separately. In an example, a user can obtain a printing device 102, 300 and keep the device 102, 300 for several years. Even when the same version of the device 102, 300 is no longer sold, the same device continues to be used for printing in homes and offices. In contrast, in subsequent years when the device 102, 300 cannot be purchased, the replaceable printing device component 104, 200 can still be purchased to print using the device 102, 300. The printing device component logic circuit is continuously upgraded over the years, for example, to be compatible with newer versions of the printing device. The same upgraded version of the printing device component logic circuit can remain backward compatible with older versions of the printing device to be compatible with a variety of printing devices including older and newer versions. It may be advantageous for an original equipment manufacturer (OEM) to produce printing device component logic that is compatible with a variety of printing devices 102, 300, for example, to avoid the need to support multiple hardware versions and to avoid a proliferation of stock keeping units (SKUs) of printing device component logic. Thus, there may be at least some degree of forward and / or backward compatibility between printing devices 102, 300 and replaceable printing device components 104, 200.

[0048] Figure 4 An example of a replaceable print cartridge 400, such as a print consumable cartridge, is shown. The print cartridge 400 may provide Figure 1 The replaceable printing device component 104 or Figure 2 4. The print cartridge 400 includes a logic circuit package 402, which includes a logic circuit 404 and an interface 408. In some examples, the interface 408 is an I2C interface. The logic circuit 404 includes a memory arrangement 406. In addition, the print cartridge 400 also includes a reservoir 410 for holding consumables and an output 412 for dispensing consumables. The consumables may include ink, dry toner, liquid toner, 3D printing agents (e.g., print enhancers, print inhibitors, build powders such as plastic powders or metal powders), or other suitable consumables outside the field of printing.

[0049] Logic circuit package 402 can be associated with replaceable print cartridge 400, or in some examples fixed to replaceable print cartridge 400 and / or at least partially incorporated into replaceable print cartridge 400. Logic circuit 404 is communicatively coupled to memory arrangement 406. Memory arrangement 406 can include a single or multiple memory devices, and can include any one or any combination of volatile memory (e.g., dynamic random access memory (DRAM), static random access memory (SRAM), registers, etc.) and non-volatile memory (e.g., read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory, erasable programmable read-only memory (EPROM), memristors, etc.). In some examples, as described below with reference to Figures 5A to 6B As described in more detail, the memory arrangement 406 stores the digital signature and digital signature metadata corresponding to the digital signature. As described in more detail below, the logic circuit 402 can be configured to verify the authenticity of selected data and / or attributes of the logic circuit in response to a request from the host printing device logic circuit. If the selected data and / or attributes of the logic circuit 402 are verified to be authentic, the host printing device can use the replaceable print cartridge 400.

[0050] The example logic circuit disclosed herein can provide a flexible digital signature mode, allowing a manufacturer or supplier to associate different quantities and types of selected data with the digital signature of the mode, relative to the same controller or host to verify the digital signature. Therefore, a single host controller can verify different digital signatures and different amounts and / or types of data associated with the digital signature. At the same time, it may be difficult for an unauthorized third party to tamper with the signed data. In other examples, the specified data and digital signature metadata (discussed below) may take up relatively little data space. In other examples, the specified data, digital signature metadata, and digital signature may be copied by an unauthorized third party, which can make the copied specified data, metadata, and digital signature have the appearance of authorized data. In a practical example, the logic circuit may include a microcontroller attached to or configured to be attached to a printing consumables box, wherein the printing device logic circuit may include a printer controller and / or a printer microcontroller.

[0051] Figure 5A An example of a memory arrangement 406a is shown. In some examples, the memory arrangement 406a may be Figure 4 Memory arrangement 406a stores digital signature metadata 500 (also referred to herein as personalized signature metadata) and a digital signature 502 (also referred to herein as personalized signature) corresponding to the digital signature metadata 500. Fig.10As described in more detail, digital signature metadata 500 and digital signature 502 may be stored in a common memory portion of a memory arrangement that is accessible by a controller (e.g., a controller of a host) for read and write operations. Digital signature metadata 500 is used to facilitate verification of digital signature 502 (e.g., associated signed data) by the host. Digital signature metadata 500 may vary and will be referred to below. Fig. 6A and 6B The digital signature metadata 500 specifies data used to calculate the digital signature 502. The digital signature 502 is calculated using the data corresponding to the digital signature metadata 500 and a private key corresponding to a public key stored by or accessible to the host. Fig. 8A and Figure 8B The calculation of digital signature 502 is described in more detail. To verify that the logic circuit is authentic, the host can read digital signature metadata 500 and digital signature 502. The host can then verify digital signature 502 using the data specified by digital signature metadata 500.

[0052] Figure 5B Another example of a memory arrangement 406b is shown. In some examples, the memory arrangement 406b may be Figure 4 Another example of a memory arrangement 406 in FIG. Figure 5A As described and shown, the memory arrangement 406b stores digital signature metadata 500 and a digital signature 502 corresponding to the digital signature metadata 500. In addition, the memory arrangement 406b also stores a partition map 504, a logic circuit identifier 506, a specified data 508 (also referred to herein as personalized signature specified data), and other data 510. As will be referenced below, Fig.10 As described in more detail, the partition map 504 and the logic circuit identifier 506 can be stored in an attribute memory portion of the memory arrangement, which can be configured to be accessed by the host for read operations, but not for write operations. Examples of such partition maps 504 are disclosed in U.S. Patent No. US8205976B1 or International Patent Application No. PCT / US2021 / 020262. In addition, the specified data 508 and other data 510 can be stored in a general memory portion of the memory arrangement, which can be accessed by the host for read and write operations.

[0053] The partition map 504 includes metadata defining partitions of the memory arrangement 406b, such as partitions of the general memory portion of the memory arrangement. Digital signature metadata 500, digital signature 502, specified data 508 and other data 510 are stored in the partitions of the memory arrangement 406b defined by the partition map 504. The partition map 504 may include multiple partition lengths, read / write configurations, and partition attribute identifiers, wherein each partition length, read / write configuration, and partition attribute identifier define each partition of the general memory portion of the memory arrangement. The read / write configuration may define how to access the corresponding partition, for example, for read-only (RO) operation, write-only (WO) operation, read and write (R / W) operation, or write once to read-only (W2RO) operation. Other access modes may also be defined by the partition read / write configuration, such as specifying whether verification is required for partition access. The partition attribute identifier may define the type of data stored in the partition. For example, one attribute identifier value may indicate a partition storing a personalized signature, and another attribute identifier value may indicate a partition storing personalized signature metadata. The host can query the partition map and determine where the personalized signature and personalized signature metadata are stored based on the length and attribute identifier information, and then construct an appropriate read command (which specifies the memory address and length). The partition map 504 can have a variable length and can define a single partition or multiple partitions. In some examples, the partition map 504 can have a length of four bytes times the number of partitions, with each partition length being two bytes, each read / write configuration being one byte, and each partition attribute identifier being one byte.

[0054] The logic circuit identifier 506 enables the host to identify the logic circuit package 402 ( Figure 4 ) from other logic circuit packages. In some examples, each logic circuit identifier 506 can be unique, i.e., different for different logic circuit packages. In the event that identifier 506 is copied by an unauthorized third party, logic circuit identifier 506 does not need to be universally unique, as there may be two or more instances of the same identifier 506. In some examples, logic circuit identifier 506 has a length of 32 bytes.

[0055] The specified data 508 includes data stored in a plurality of data blocks in a common memory portion of a memory arrangement specified by the digital signature metadata 500. The specified data 508 includes signed data. The digital signature 502 is based at least in part on the specified data 508. The digital signature 502 is not based on other data 510. In some examples, the specified data is static (e.g., read-only data) during the life of the logic circuit package and / or the component to which the logic circuit package is attached. The specified data 508 may include any suitable data, such as a certificate and / or data specific to the logic circuit package. The specified data 508 may have a variable length between different logic circuit memory arrangements. In some examples, the specified data 508 may include the digital signature metadata 500, that is, one of the data blocks that is part of the specified data 508 may include the digital signature metadata 500.

[0056] Other data 510 includes data not specified by digital signature metadata 500. Other data 510 may include unsigned data not associated with digital signature 502, including characteristics related to the print cartridge (e.g., color, fill level, etc.) and / or other suitable data. In some examples, other data 510 may include data that is intended to be updated / changed by the host during the life of the logic circuit package or a component to which the logic circuit package is attached (e.g., read / write data or write once to read only data), such as dynamic data that is updated during the life of the logic circuit, including data in a usage counter field or printing material level data.

[0057] In some examples, digital signature 502 is signed data that includes at least one of a device type identifier, a logic circuit identifier 506, a partition map 504, and specified data 508. The device type identifier not stored in memory arrangement 406b may correspond to logic circuit package 402 ( Figure 4 ) to identify that the logic circuit package is intended to be attached to or attached to a replaceable printing device component. In some examples, the value of the device type identifier is the same for all logic circuit packages that are intended to be attached to or attached to a replaceable printing device component. Other values ​​for the device type identifier may indicate that the logic circuit package is not intended to be attached to a replaceable printing device component.

[0058] As described in more detail below, to verify that the logic circuit is authentic, the host can read digital signature metadata 500, digital signature 502, partition map 504, and logic circuit identifier 506. The host can then use digital signature metadata 500 to read specified data 508. The host can then use partition map 504, logic circuit identifier 506, and specified data 508 to verify digital signature 502. In one example, for verification, only some portions of the partition map are verified, such as the lengths of partitions in the partition map and / or other features in the partition map.

[0059] Fig. 6A An example of digital signature metadata 600a is shown. In one example, digital signature metadata 600a provides Figure 5A The digital signature metadata 500 in 5B or 5B. The digital signature metadata 600a includes a mode identifier field 602, a key identifier field 604, a data block address field 606, and a data block length field 608. The mode identifier field 602 stores a mode version for the host to determine which mode to use. The mode identifier field 602 can have a length of one byte. The key identifier field 604 stores an identifier of a signing key for the host to verify using the correct key. The host can store (or have access to) multiple public keys for verifying various signatures. The key identifier field 604 has a length of two bytes. The original digital signature 502 ( Figure 5A and 5B ).

[0060] The data block address field 606 may include a single data block address field or multiple data block address fields. Each data block address field stores an address corresponding to the data block on which the digital signature was initially calculated. The data block address may be the starting address of the data block. Each data block address field may have a length of two bytes. The data block length field 608 may include a single data block length field or multiple data block length fields. Each data block length field corresponds to the data block addressed by the corresponding data block address field. Each data block length field stores data indicating the length of the corresponding data block. Each data block length field has a length of two bytes. Each data block address field and the corresponding data block length field may be concatenated within the digital signature metadata 600a, from the first data block address (address 1) and data block length (length 1) to the last data block address (address 2). N ) and the data block length (length N ), as follows: address1||length1||address2||length2||...||address N ||Length NIn one example, one of the designated data blocks may store digital signature metadata.

[0061] Figure 6B Another example of digital signature metadata 600b is shown. In one example, digital signature metadata 600b provides Figure 5A The digital signature metadata 600b includes a mode identifier field 602, a key identifier field 604, a data block address field 606, and a data block length field 608, as previously described with reference to FIG. Fig. 6A As described and shown. In addition, the digital signature metadata 600b also includes a length field 610 and a data block count field 612. The data block count field 612 stores data indicating the total number of data blocks addressed by the data block address field 606. The data block count field 612 has a length of one byte. The length field 610 stores data indicating the total cumulative length of the key identifier field 604, the data block count field 612, the data block address field 606, and the data block length field 608. The length field 610 has a length of two bytes. The host can use the data stored in the length field 610 to parse the digital signature metadata 600b. In some examples, the host can use the data stored in the data block count field 612 to parse the digital signature metadata 600b instead of using the data stored in the length field 610, or use the data stored in the data block count field 612 in addition to the data stored in the length field 610 to parse the digital signature metadata 600b.

[0062] The digital signature metadata 600b may be concatenated and written to the memory arrangement 406 as follows: Figure 4 ): mode identifier||length||key identifier||block count||address 1||length 1||address 2||length 2||...||address N ||Length NFor example, in hexadecimal, the given digital signature metadata 600b is equal to: 02 000B 8C00 02 0000 00F00100 0001, the mode identifier field 602 (i.e., 02) indicates that the mode version number is 2, the length field 610 (i.e., 000B) indicates that the total cumulative length is 11 bytes, the key identifier field 604 (i.e., 8C00) indicates that the signature key identifier is 8C00, the data block count field 612 (i.e., 02) indicates two data blocks, the first data block address field 606 (i.e., 0000) and the first data block length field 608 (i.e., 00F0) indicate a first data block from 0x0000 to 0x00EF having a length of 240 bytes, the second data block address field 606 (i.e., 0100) and the second data block length field 608 (i.e., 0001) indicate a second data block from 0x0100 to 0x0100 having a length of one byte.

[0063] Figures 7A to 7D is to show that a logic circuit (such as Figure 4 404) of the example methods 700, 710, 720 and 730. As previously described, the logic circuit may be a replaceable printing device component (e.g., Figure 4 400) of the logic circuit package (for example, Figure 4 402), the logic circuit package includes a portion for communicating with a printing device logic circuit (eg, Figure 3 304) communication interface (for example, Figure 4 In this example, the memory arrangement stores digital signature metadata (e.g., Fig. 6A 600a or Figure 6B 600b) to facilitate verification of the associated signed data. Fig. 7A As shown in method 700 in , at 702, the logic circuit is configured to receive a read request from a host. At 704, the logic circuit is configured to send digital signature metadata to the host in response to the read request.

[0064] In one example, the memory arrangement stores a key corresponding to a key identifier (e.g., Fig. 6A or Figure 6B 604) of the key signature corresponding to the digital signature metadata (for example, Figure 5A or Figure 5B 502 in ). In this example, if Figure 7BAs shown in method 710 in , at 712, the logic circuit is configured to receive a read request (or multiple read requests) from a host. At 714, the logic circuit is configured to send a digital signature and digital signature metadata (in any order) to the host in response to at least one read request.

[0065] In one example, the memory arrangement stores a logic circuit identifier (e.g., Figure 5B 506), partition map (e.g., Figure 5B 504 in), digital signature metadata (e.g., Figure 5B 500 in ), specify data (for example, Figure 5B 508 in ) and a digital signature (e.g., Figure 5B 502 in ). In this example, if Figure 7C As shown in method 720 in , at 722, the logic circuit is configured to receive a request (e.g., a general memory read request and / or an attribute memory read request) from a host. At 724, the logic circuit is configured to send a logic circuit identifier, a partition map, a digital signature, digital signature metadata, and / or other data, and specified data corresponding to the digital signature metadata to the host in response to at least one request.

[0066] In one example, as will be referred to below Fig.10 As described in more detail, the digital signature metadata and the digital signature are stored in a general memory portion of a memory arrangement configured for general read / write access. In addition, the memory arrangement also includes at least one different memory portion storing at least one encryption key and / or a plurality of attributes, which portion is not intended for general read / write access. In this case, Fig.7D As shown in method 730 in , at 732, the logic circuit may be configured to perform an encryption operation using the at least one encryption key. At 734, the logic circuit is configured to return an attribute from a plurality of attributes in response to an attribute request including an associated attribute tag, wherein the logic circuit is configured to associate the attribute with the attribute tag. The plurality of attributes may include, for example, a partition map, a logic circuit identifier, or a device address (e.g., for I2C communication). The logic circuit may be configured to implement one of blocks 732 and 734 or both of blocks 732 and 734.

[0067] Fig. 8A and 8B is shown for providing a logic circuit package (e.g., Figure 4402 in FIG. 404 . In one example, the processing system 800 may be part of a production line for logic circuit packaging. The processing system 800 includes a processor 802 and a machine-readable storage medium 806. The processor 802 is communicatively coupled to the machine-readable storage medium 806 via a communication path 804. Although the following description refers to a single processor and a single machine-readable storage medium, the description may also apply to systems with multiple processors and multiple machine-readable storage media. In such examples, instructions may be distributed (e.g., stored) on multiple machine-readable storage media, and instructions may be distributed on (e.g., executed by) multiple processors.

[0068] Processor 802 includes one (i.e., single) central processing unit (CPU) or microprocessor or more than one (i.e., multiple) CPUs or microprocessors, and / or other suitable hardware devices for retrieving and executing instructions stored in machine-readable storage medium 806. Processor 802 may fetch, decode, and execute instructions 808-814 to provide a logic circuit package.

[0069] Processor 802 may retrieve, decode, and execute instructions 808 for retrieving a signature key identifier and signature data. In one example, the signature data includes a device type identifier corresponding to the logic circuit package; a logic circuit identifier of the logic circuit package for a host to distinguish the logic circuit package from other logic circuit packages; a partition map for defining partitions of a common memory portion of a memory arrangement of the logic circuit package (e.g., including a partition length and a partition attribute identifier for each partition); and data to be stored in a plurality of data blocks in the common memory portion of the memory arrangement of the logic circuit package specified by the digital signature metadata. The signature key identifier and signature data may be stored in machine-readable storage medium 806 and / or in another machine-readable storage medium accessible by processing system 800.

[0070] Digital signature metadata is intended to facilitate verification of the associated signed data. Digital signature metadata may include a schema identifier field (e.g., Fig. 6A or 602 in 6B), which stores a mode version number used by the host to determine which mode to use; a key identifier field (e.g., Fig. 6A or 604 in 6B), which stores an identifier of a signature key for the host to verify using the correct key; a plurality of data block address fields (e.g., Fig. 6A or 606 in 6B), each of the plurality of data block address fields storing an address corresponding to one of the plurality of data blocks on which the digital signature was initially calculated; and a plurality of data block length fields corresponding to the plurality of data blocks (e.g., Fig. 6A or 608 in 6B), each of the multiple data block length fields stores data indicating the length of the corresponding data block.

[0071] Processor 802 may fetch, decode and execute instruction 810 for concatenating signature data. Signature data may be concatenated in the following manner: device type identifier||logic circuit identifier||partition map||data of data block 1||data of data block 2||...||data block N , where "N" is the number of data blocks. Processor 802 may retrieve, decode, and execute instruction 812 for computing a digital signature on the concatenated signature data using a signature private key corresponding to a signature key identifier. Processor 802 may retrieve, decode, and execute instruction 814 for computing the digital signature (e.g., Figure 5A or 502 in 5B) writes to the general memory portion of the memory arrangement of the logic circuit package.

[0072] like Figure 8B As shown in FIG. 8 , the processor 802 may fetch, decode, and execute further instructions 816 for converting digital signature metadata (e.g., Figure 5A 5B) is written to the general memory portion of the memory arrangement of the logic circuit package. The processor 802 can obtain, decode and execute further instructions 818, which are used to write the logic circuit identifier (e.g., Figure 5B 506) and partition maps (e.g., Figure 5B The processor 802 may fetch, decode, and execute further instructions 820 for writing data to be stored in a plurality of data blocks specified by the digital signature metadata (e.g., Figure 5B 508) is written into the general memory portion of the memory arrangement of the logic circuit package.

[0073] As an alternative or in addition to retrieving and executing instructions, the processor 802 may include one (i.e., a single) electronic circuit or more than one (i.e., a plurality) electronic circuits including several electronic components for performing the functions of one or more of the instructions in the machine-readable storage medium 806. With respect to the executable instructions described and shown herein as representations (e.g., blocks), it should be understood that a portion or all of the executable instructions and / or electronic circuits included in one block may be included in a different block shown in the figure or in a different block not shown in another example.

[0074] The machine-readable storage medium 806 is a non-transitory storage medium and can be any suitable electronic, magnetic, optical or other physical storage device that stores executable instructions. Thus, the machine-readable storage medium 806 can be, for example, a random access memory (RAM), an electrically erasable programmable read-only memory (EEPROM), a storage drive, an optical disk, etc. Fig. 8A and 8B As shown in , machine-readable storage medium 806 can be disposed within system 800. In this case, the executable instructions can be installed on system 800. Alternatively, machine-readable storage medium 806 can be a portable, external, or remote storage medium that allows system 800 to download instructions from a portable / external / remote storage medium. In this case, the executable instructions can be part of an installation package.

[0075] Fig. 9 4 is a diagram showing a logic circuit package (such as, for example, Figure 4 4. The block diagram of an example of a signature hierarchy 900 for a logic circuit package 402 in FIG. 4 is a block diagram of an example of a signature hierarchy 900 for a logic circuit package 402 in FIG. 4. The signature hierarchy 900 includes a manufacturing signature 902, which is calculated over a (e.g., part-specific, static) digital signature 910, a part number signature 920, and part-specific manufacturing data 930. The part-specific manufacturing data 930 may include a manufacturing date / time of the component to which the logic circuit 400 is attached, a production line identifier identifying the production line of the component to which the logic circuit 400 is attached, etc.

[0076] As mentioned above, for example, reference Figure 5A and Figure 5B , computing a digital signature 910 on signature data 912 (e.g., Figure 5A or Figure 5B 502 in the disclosure, referred to elsewhere in the disclosure as a personalized digital signature) to provide signed data. The first key identifier (e.g., Fig. 6A 6B) to calculate the digital signature 910. In some examples, the digital signature 910 is unique for each logic circuit package. Fig. 8A and 8B As described, the original digital signature 910 and the signature data 912 may be written to the memory arrangement of the logic circuit package during the provisioning of the logic circuit package. The signature data 912 includes a device type identifier (which in some examples is not stored in the memory arrangement of the logic circuit package), a logic circuit identifier (e.g., Figure 5B 506), partition map (e.g., Figure 5B 504) and specify data (for example, Figure 5B508 in ). The private key for digital signature 910 may reside in a hardware security module (HSM). The public key for digital signature 910 may reside in a host or be accessible by the host. The same private key / public key may be used for signature generation and / or verification of multiple logic circuits.

[0077] The part number signature 920 is calculated over the generic manufacturing data 922. The part number signature 920 may be calculated using a signature corresponding to a second key identifier (e.g., Fig.18A The part number signature 920 may be calculated using a second signing key (e.g., 1804 in 18B) that is different from the first signing key used to calculate the digital signature 910. In some examples, the part number signature 920 may be universal for multiple logic circuit packages that share the same part number (e.g., belonging to a combination of logic circuit packages, and / or a family such as a family of replaceable printing device components, the same color or combination of colors, a certain fill level or certain fill levels, etc.). The part number signature 920 may be the same for multiple logic circuit packages with different digital signatures and different logic circuit identifiers (in some cases, if the logic circuit identifier is different, the digital signature is also different). The part number signature 920 may be pre-calculated. The part number signature 920 and universal manufacturing data 922 may be written to the memory arrangement of the logic circuit package during final assembly of the replaceable printing device component. The universal manufacturing data 922 may include color, fill level, region, etc.

[0078] Manufacturing signature 902 may be generated during final assembly of replaceable printing device components by logic circuitry (e.g., Figure 4 The calculation may be performed using a key identifier corresponding to the third key identifier (eg, Fig. 12B 1206) of the third signing key (e.g., Fig. 11B1106 in ) to calculate the manufacturing signature 902, the third signature key is different from the first signature key used to calculate the digital signature 910, and is also different from the second signature key used to calculate the part number signature. The manufacturing signature 902 may include the date and / or time of manufacture, the production line ID, and more part-specific manufacturing data written during final assembly. As described in more detail below, the logic circuit may include a dedicated function for calculating the manufacturing signature, including an elliptic curve cryptography (ECC) key that can be used to generate a manufacturing signature; a dedicated configurable attribute that defines which ECC key should be used to sign and which data blocks should be signed; and a dedicated command for generating a signature, writing a dedicated attribute during the personalized customization period, and reading a dedicated attribute and a signature. The private key for the manufacturing signature 902 can be generated by the personalized customization system and written to the key storage memory of the logic circuit. The public key for the manufacturing signature 902 is included in a certificate generated by the personalized customization system and written to the universal memory of the logic circuit. For each logic circuit, a unique private key / public key can be used for signature generation and / or verification.

[0079] Third parties and / or unauthorized parties may be able to copy digital signatures and metadata, including Fig. 9 The signature and data in the , to have the effect of mimicking the original authorization data.

[0080] Fig.10 An example of a consumables box 1000 is shown. The consumables box 1000 may provide Figure 1 The replaceable printing device component 104, Figure 2 The replaceable printing device component 200, or Figure 4 The print cartridge 400 in FIG. The consumable cartridge 1000 includes a reservoir 1002 for accommodating consumables, a logic circuit interface 1004 for communicating with a host, and a logic circuit 1006. The consumables may include ink, dry toner, liquid toner, or 3D printing agent. The reservoir 1002 may be connected to an output (not shown) to dispense consumables from the reservoir 1002. The interface 1004 may be an I2C interface or other suitable interface for communicating with a host.

[0081] Logic circuit 1006 includes processor 1008, other authentication logic 1010, and memory arrangement 1012. Memory arrangement 1012 may include attribute storage memory 1014, key storage memory 1024, general purpose memory 1030, and instructions 1040 and 1042. In one example, memory arrangement 1012 may include a single or multiple memory devices, and may include any one or any combination of volatile memory (e.g., DRAM, SRAM, registers, etc.) and non-volatile memory (e.g., ROM, EEPROM, flash memory, EPROM, memristor, etc.).

[0082] The attribute storage memory 1014 may store the logic circuit identifier 506, the partition map 504, and the manufacturing signature attribute data 1200 (hereinafter referred to as Fig. 12A and 12B 1010). In some examples, the attribute storage memory 1014 is accessible for read and / or write by the processor 1008 and / or other verification logic 1010. The attribute storage memory 1014 is accessible for read-only access by the host by sending a request to the processor 1008, and the processor 1008 can perform the requested operation and return the requested data to the host. The key storage memory 1024 can store encryption keys 1026 (e.g., symmetric base keys and / or asymmetric private keys). In some examples, the key storage memory 1024 is accessible for read and write by the processor 1008 and / or other verification logic 1010, while the host cannot access it. The encryption key 1026 can be used to perform encryption operations, such as verification, signing, and / or other suitable operations. In some examples, the key storage memory 1024 stores multiple key identifiers and associated signing keys. Each signing key can be identified and selected based on its associated key identifier. In one example, multiple key identifiers and associated signing keys may be stored in a table, or a table-like form, or any other form that facilitates identification and retrieval of keys based on corresponding identifiers. In another example, a single signing key may be stored with or without an associated identifier.

[0083] The general memory 1030 may store the personalized (perso) signature metadata 500 (e.g., Figure 5A and 5B Digital signature metadata in 500, or Fig. 6A and 6B , digital signature metadata 600a or 600b in the document), personalized signature designation data 508 (e.g., Figure 5B The general memory 1030 may also store the certificate 1102 and the manufacturing signature specified data 1300 (also referred to herein as the indication data, which will be referred to below). Fig.11A and 11B In some examples, the certificate 1102 may be included in the personalized signature designation data 508. The certificate 1102 may be of the type described in International Patent Application No. PCT / US2021 / 054017, which is incorporated herein by reference. The manufacturing signature designation data 1300 may include the personalized signature 502 (e.g., Figure 5A and Figure 5B), a part number signature 1304, and part-specific manufacturing data 1306 (e.g., corresponding to Fig. 9 910, 920, and 930 in FIG. 10 ). In addition, the general memory 1030 may also store part number signature metadata 1700 and part number signature designation data 1702 corresponding to the part number signature 1304. In some examples, the general memory 1030 may be read and / or write accessible by the processor 1008, other verification logic 1010, and / or a host via the processor 1008. The host may access the general memory 1030 by sending a general read and / or write request to the logic circuit 1006 via the interface 1004. The general read and / or write request from the host to access the general memory 1030 may be different from the request from the host to access the attribute storage memory 1014.

[0084] Instruction 1040 is an instruction for conducting a secure communication session between logic circuit 1006 and the host based on encryption key 1026. Instruction 1042 is an instruction for performing signature calculation in response to a signature generation request from the host (e.g., Fig. 9 Instructions for manufacturing signature 902) in.

[0085] The processor 1008 executes instructions to control the operation of the logic circuit 1006, including instructions 1040 and 1042 and instructions for accessing the memory arrangement 1012 for read and / or write operations. The processor 1008 can return data (e.g., logic circuit identifier 506, partition map 504, personalized signature metadata 500, personalized signature 502, personalized signature specified data 508 and other data 510, etc.), update data and / or initiate functions (e.g., initiate a secure communication session, calculate a signature, etc.) in response to an external request or command from a host (e.g., through interface 1004). The processor 1008 can also generate and / or update data stored in the memory arrangement 1012 in response to an internal request or command within the logic circuit 1006. Other verification logic 1010 can include high-speed calculator logic for processing predetermined iterative calculations and / or other logic for processing verification algorithms. In some examples, other verification logic 1010 may execute instructions 1040 for a secure communication session, and / or instructions 1042 for signature calculation, or a portion of instructions 1040 for a secure communication session and / or instructions 1042 for signature calculation.

[0086] In order to avoid that the data stored on the compliant logic circuit is different from the original and / or authorized data, it is necessary to sign the critical data stored on the consumables related to identity or function. The signed data is static during the remaining life of the consumable device. Therefore, in many cases, signatures are not suitable for data whose value may change, such as printing consumable usage counters.

[0087] Generating a signature on part-specific data may be difficult in certain non-directly controlled environments. An example of a non-directly controlled environment may be a manufacturing site for a component (e.g., a replaceable printed component such as reference numerals 1000, 104, 200) to which a logic circuit package (e.g., 1006, 402, 204) is attached. These manufacturing sites may not be owned or directly operated by the party (e.g., OEM) that designed and generated the architecture and content of the original data.

[0088] The logic circuit on some parts (such as printing consumables) can perform the signing operation by itself by calculating the manufacturing digital signature. For example, the manufacture of a part (such as a photoconductor) with printing materials or imaging functions may occur after the personalization of the associated logic circuit. The logic circuit personalization and the part manufacturing may occur in different places and / or by different parties or suppliers. According to an example of the present disclosure, during the manufacture of the part and / or after the personalization of the logic circuit, the manufacturing digital signature is calculated by the logic circuit and stored in the memory arrangement of the logic circuit for later retrieval by an authorized host device (e.g., a printer) that wants to read and verify the signed data. Enabling the logic circuit to have a manufacturing signature function can help the production line to perform this signing operation without the need for special equipment. Since the logic circuit is pre-configured to calculate the manufacturing digital signature, the manufacturing digital signature and the data on which the digital signature is calculated can be considered to be credible, even if the manufacturing digital signature does not have to be signed in a directly controlled environment. These advantages may be of interest to OEMs.

[0089] It should be noted that third parties of non-compatible host device OEMs may still be able to copy the data and signatures disclosed herein. According to the examples disclosed herein, by storing equal or similar data and signatures, these third parties can be connected to host devices developed by other parties (e.g., the OEM described), whereby these host devices may treat the received data as original data. In this case, it should be noted that the manufacturing digital signature and other signatures disclosed herein (e.g., personalized signatures, part number signatures) may be unrelated to the steps or parties associated with the authorized manufacturing process or site. In addition, unauthorized third parties can copy these signatures and write them to the memory arrangement of the consumables in a certain step or operation. In addition or alternatively, a complete set of signatures (e.g., personalized signatures, part number signatures, and manufacturing digital signatures) can be outsourced to a single supplier / manufacturer, not necessarily an unauthorized third party, and the consumables can follow the same mode disclosed herein to be compatible with the installed host (e.g., printer). Components, modes, data, and signatures can be manufactured and / or written in a single location. In other words, the different signatures and data features of the present disclosure are not limited by the steps or sequence of the manufacturing process. In some cases, the various names used to describe each digital signature disclosed herein (e.g., personalized, manufactured, part number, etc.) are intended solely to distinguish these signatures from one another and do not imply that the signatures are to be written during any particular processing step. The principles described in this disclosure may be used for at least one of the following: (i) obtaining control of data of a large amount of logic circuitry passing through certain steps and / or locations of a manufacturing process, for example, because one or some of these steps and / or locations may be difficult to fully control; and / or, (ii) obtaining compatibility with pre-shipped / installed host controllers.

[0090] It should be noted that some examples of the present disclosure (such as Fig.10 ) describes an instance of logic circuitry that has computed a manufacturing digital signature, where an earlier instance of the logic circuitry (e.g., prior to component manufacture) may have also necessitated the computation of a manufacturing digital signature.

[0091] Fig.11A Another example of a memory arrangement 406c is shown. In some examples, the memory arrangement 406c may be Figure 4 Memory arrangement 406c stores indication data 1100, certificate 1102, and manufacturing attribute data 1104. As indicated by corresponding indications (e.g., 1202) in manufacturing attribute data 1104, such as Fig. 12A As shown in , the indication data 1100 may be data on which a digital signature is calculated. Fig.10 As shown in FIG. , the indication data 1100 (e.g., in Fig.10The manufacturing attribute data 1104 (e.g., in the example embodiment of the present invention) may be stored in a general memory portion 1030 of the memory arrangement that is accessible by a controller (e.g., a controller of a host) for read and write operations. The certificate 1102 may also be stored in the general memory portion of the memory arrangement. Fig.10 Also referred to as manufacturing signature attribute data 1200) can be stored in the attribute memory portion 1014 of the memory arrangement.

[0092] As will be described in more detail below, the indication data 1100 is data on which or to calculate a manufacturing digital signature. The certificate 1102 is used by a controller (e.g., a controller of a host) to verify the manufacturing digital signature. The certificate 1102 includes a public key corresponding to a private key used to calculate the manufacturing digital signature. The certificate 1102 is signed with a certificate authority private key to be verified by a controller (e.g., a host) with a certificate authority public key. As will be described in more detail below, the manufacturing attribute data 1104 includes at least one indication indicating (e.g., identifying) the indication data 1100 and the manufacturing digital signature.

[0093] Fig. 11B Another example of a memory arrangement 406d is shown. In some examples, the memory arrangement 406d may be Figure 4 Another example of a memory arrangement 406 in FIG. Fig.11A As described and shown, the memory arrangement 406d stores the indication data 1100, the certificate 1102, and the manufacturing attribute data 1104. In addition, the memory arrangement 406d also stores a signature key (e.g., a private key) 1106 used to calculate the manufacturing digital signature. In this example, the indication data 1100 includes data blocks 11100 to 11107. Although the indication data 1100 includes 8 data blocks 11100 to 11107 in this example, the indication data 1100 may include less than 8 data blocks in other examples, and more than 8 data blocks may also be used in other examples.

[0094] In some cases, at least one length and / or address of the indication data 1100 to be written during a subsequent manufacturing process step is known in advance. For example, the address and length of each data block 11100 to 11107 of the indication data may be predefined. However, it may not be possible to predict all actual indication data values ​​to be written. During provision or personalization of the logic circuit package before calculating the manufacturing digital signature, the certificate 1102, the manufacturing attribute data 1104 (except the manufacturing signature) and the signature key 1106 may be written to the memory arrangement 406d. The manufacturing attribute data 1104 may be as described below with reference to Fig. 12A and 12B Configure as described.

[0095] Fig. 12A An example of attribute data 1200a for making a digital signature is shown. In one example, the attribute data 1200a provides Fig.11A and 11B The attribute data 1200a includes an indication field 1202 that stores at least one indication of the data on which the manufacturing digital signature is calculated (e.g., an indication of the data including at least one data block 1110). Fig.11A 11B), and includes a manufacturing digital signature field 1204 that stores a manufacturing digital signature. In one example, the manufacturing digital signature field 1204 has a length of 64 bytes. The manufacturing digital signature field 1204 can remain empty until the manufacturing digital signature is calculated by the logic circuit 1006 and stored in the field 1204.

[0096] Fig. 12B A further example of attribute data 1200b for creating a digital signature is shown. In one example, the attribute data 1200b provides Fig.11A and 11B The manufacturing attribute data 1104. As previously mentioned, for example, Fig. 12A As described and illustrated, the attribute data 1200b includes an indication field 1202 that stores at least one indication of data on which the manufacturing digital signature is calculated, and a manufacturing digital signature field 1204 that stores the manufacturing digital signature. In addition, the attribute data 1200b also includes a signing key identifier field 1206 that stores a signing key identifier. The signing key identifier identifies (e.g., corresponds to) a signing key (e.g., a key identifier) ​​used to calculate the manufacturing digital signature. Fig. 11B 1106 in the example, such as a signature key stored in the key storage memory 1024. The signature key identifier also corresponds to a certificate (e.g., a host) used by a controller (e.g., a host) to verify the manufacturing digital signature. Fig. 11B In particular, the signature key identifier corresponds to the public key in the certificate. The certificate may also include the signature key identifier so that the controller can confirm that the controller is using the correct certificate to verify the manufacturing digital signature. In one example, the signature key identifier field 1206 has a length of 2 bytes.

[0097] The indication field 1202 storing at least one indication of the data on which the digital signature is calculated includes data block address fields 12120 to 12127 and corresponding data block length fields 12140 to 12147. Each data block address field 12120 to 12127 stores a corresponding data block 11100 to 11107 ( Fig. 11B) The starting address of each data block length field 12140 to 12147 stores the corresponding data block 11100 to 11107 ( Fig. 11B ). Therefore, the data block address fields 12120 to 12127 and the corresponding data block length fields 12140 to 12147 identify the corresponding data blocks 11100 to 11107. In one example, each data block address field 12120 to 12127 has a length of 2 bytes, and each data block length field 12140 to 12147 has a length of 2 bytes.

[0098] In one example, the manufacturing attribute data 1200b is configured by sending a put attribute manufacturing signature command to the logic circuit. The command can specify from 1 to 8 data blocks. If less than 8 data blocks are specified, the address and length values ​​of 0 are stored for the unspecified data blocks. The command can include the following command parameters: attr_tag||rkid||dblk0||...||dblk N-1 , where 1≤N≤8. attr_tag is a manufacturing signature attribute tag and may have a length of 1 byte. The manufacturing signature attribute tag indicates that the command is used to configure the manufacturing signature attribute data 1200b. rkid is a key identifier that identifies the signature key used to calculate the manufacturing signature and may have a length of 2 bytes. The key identifier is stored in the signature key identifier field 1206. dblk n Identifies data block n and may have a length of 4 bytes, including 2 bytes for the address of the data block and 2 bytes for the length of the data block. The address and length of each data block n are stored in the corresponding data block address fields 12120 to 12127 and data block length fields 12140 to 12147, respectively.

[0099] The writing of manufacturing data and the generation of manufacturing signatures may occur during a post-personalization manufacturing or configuration process that may occur in an environment that is not under the full control of the party that authorized the original data, such as a manufacturing site that is not operated by the OEM. During the manufacturing process, the manufacturing data may be included as part of the indication data 1100 (e.g., the data is written to Fig. 11B The manufacturing data blocks 11100 to 11107 in the manufacturing data block 11100 to 11107 are written into the general memory portion of the memory arrangement. After the manufacturing data is written into the memory arrangement, the manufacturing signature can be calculated and stored in the manufacturing digital signature field 1204. In one example, the manufacturing signature can be calculated in response to the logic circuit receiving a generate manufacturing signature command.

[0100] The Generate Manufacturing Signature command may be used to generate (e.g., calculate) a manufacturing signature on one or more data blocks of a memory arrangement. The signature key and the data block on which the manufacturing signature is calculated are specified in the manufacturing signature attribute data 1200b. Once generated, the manufacturing signature may be queried via the manufacturing signature attribute. In some examples, generating a manufacturing signature may cause a transition to an operational lifecycle state of the consumable (i.e., from a manufacturing state to a ready-for-use state for a host). In one example, the signature key may be used only once, so that once the manufacturing signature is calculated, the manufacturing signature may never be calculated again. In some examples, once the manufacturing signature has been calculated, the signature key may be deleted.

[0101] The manufacturing signature can be calculated as follows:

[0102] Signature = ED25519-Sign((signature key), const||SHA-512(mfg_data)), where:

[0103] The signing key corresponds to the key identifier specified in the manufacturing signature attribute data;

[0104] ●mfg_data=dblk0||data0||...||dblk N-1 ||datzt N-1 ;

[0105] dblk n is the data block n specified in the manufacturing signature attribute data; it is noted that unused data blocks (i.e., data blocks with a length of 0) are not included; and

[0106] data n is the general memory data corresponding to data block n.

[0107] Note that at least one indication (eg, dblk) of the indication data may be n ) and indicating data (e.g., data n The signature is computed on a hash (e.g., SHA-512) of

[0108] Fig.13An example of indicative data 1300 for manufacturing a digital signature is shown. In this example, the indicative data 1300 includes a (part-specific) digital signature 502 (also referred to as a personalized digital signature 502), a part number digital signature 1304, and part-specific manufacturing data 1306. As previously described, the digital signature 502 is signed (part-specific) on data including at least one of the following: a device type identifier corresponding to a logic circuit package, a logic circuit identifier for a host to distinguish the logic circuit package from other logic circuit packages (e.g., Figure 5B 506 in), a partition map (e.g., Figure 5B 504 in ), and specified data stored in a general memory portion of the memory arrangement (e.g., Figure 5B 508 in the ).

[0109] The part number digital signature 1304 is included in the generic manufacturing data (e.g., Fig. 9 The generic manufacturing data 1306 may be generic to multiple logic circuit packages, i.e., not part-specific. The part-specific manufacturing data 1306 may include a manufacturing date, manufacturing time, and a production line identifier (e.g., Fig. 9 At least one of the (part-specific) digital signature 502, the part number digital signature 1304, and the part-specific manufacturing data 1306 may be stored in Fig. 11B In the data blocks 11100 to 11107 indicating data 1100.

[0110] Fig.14 is to show that a logic circuit (such as, Figure 4 404 in the example method 1400. As previously described, the logic circuit may be a replaceable printing device component (e.g., Figure 4 400) of the logic circuit package (for example, Figure 4 402), the logic circuit package includes a portion for communicating with a printing device logic circuit (eg, Figure 3 304) communication interface (for example, Figure 4 In this example, the memory arrangement stores the indication data (e.g., Fig.11A 1100 in), certificates (e.g. Fig.11A 1102) and manufacturing attribute data (e.g., Fig.11A 1104 in ).

[0111] At 1402, logic circuitry is configured to send manufacturing attribute data to a controller in response to at least one first request from the controller. The manufacturing attribute data includes a key identifier (e.g., Fig. 12B 1206), at least one indication of the data on which the digital signature was calculated (e.g., Fig. 12B 1202), and creating a digital signature (e.g., Fig. 12B At 1204 in the example. At 1404, the logic circuit is configured to send the certificate and the indication data to the controller in response to at least one second request from the controller. In one example, the at least one first request and the at least one second request have differently encoded command type fields and / or include different opcodes to indicate different command types. For example, the at least one first request may be configured to query an attribute memory (e.g., Fig.10 1014 in ), and the at least one second request may be configured to read a general purpose memory (eg, Fig.10 1030 in ). For example, depending on certain technical limitations or other reasons, multiple transmissions may be required to send the requested data to the controller, so that multiple requests can also be sent from the controller to the logic circuit accordingly. The at least one first request may include multiple first requests, and / or the at least one second request may include multiple second requests. Accordingly, multiple responses (e.g., 32 bytes per response) may be sent to send a complete data set (e.g., 64 bytes).

[0112] Fig.15 is to show that a logic circuit (such as Figure 4 404 in the example method 1500. The logic circuit may be a flowchart for a replaceable printing device component (e.g., Figure 4 400) of the logic circuit package (for example, Figure 4 402), the logic circuit package includes a portion for communicating with a host (eg, Figure 3 An interface (e.g., Figure 4 408 in ), as described above. In this example, the memory arrangement stores the signing key (e.g., Fig. 11B 1106) and a key identifier (e.g., Fig. 12B 1206 in the above).

[0113] At 1502, logic circuitry is configured to calculate a manufacturing digital signature. Fig. 12B 1200b) to calculate the digital signature. Fig. 12B The signature key identifier 1206 identifies Fig. 11B The signing key 1106 is stored in Fig. 11B The manufacturing digital signature is calculated on the data in the data blocks 11100 to 11107. At 1504, the logic circuit is configured to store the manufacturing digital signature in the memory arrangement. The manufacturing digital signature is stored in Fig. 12A Attribute data 1200a or Fig. 12B In the manufacturing digital signature field 1204 of the attribute data 1200b, for example Fig.10 The attributes are stored in memory 1014.

[0114] Fig.16 is shown for providing a method including a memory arrangement (e.g., Figure 4 406) of the logic circuit package (for example, Figure 4 At 1602, the method 1600 includes receiving, by a logic circuit of a logic circuit package (e.g., 404), a command for generating a manufacturing digital signature. At 1604, the method 1600 includes reading, by the logic circuit in response to the command, a signature key identifier (e.g., Fig. 12B 1206) and indication data (e.g., Fig.11A or 1100 in 11B) at least one indication (e.g., Fig. 12B At 1606, method 1600 includes reading, by logic circuitry, a signing key corresponding to the signing key identifier (e.g., Fig. 11B 1106 in ).

[0115] At 1608, method 1600 includes reading, by logic circuitry, indication data based on the at least one indication. In one example, the indication data is stored in a general memory portion of a memory arrangement configured for general read / write access (e.g., Fig.10 The indication data may include a part-specific digital signature (e.g., Figure 5B 502 in the part-specific digital signature, the part-specific digital signature being signed on data including at least one of the following: a device type identifier corresponding to the logic circuit package, a logic circuit identifier for distinguishing the logic circuit package from other logic circuit packages (e.g., Figure 5B 506 in), a partition map (e.g., Figure 5B 504 in ), and specified data stored in a general memory portion of the memory arrangement (e.g., Figure 5B 508 in the ).

[0116] In some examples, the logic circuit package can be attached to a replaceable print cartridge (e.g., Figure 4In this example, the indication data may be included in the general manufacturing data (e.g., Fig. 9 922 in the part number digital signature (for example, Fig.13 In 1304 of FIG. 1 , the general manufacturing data includes at least one of color, fill level, and area. In this example, the indicative data may also include part-specific manufacturing data (e.g., Fig.13 1306 in the example, the part-specific manufacturing data includes at least one of a manufacturing date of the replaceable print cartridge, a manufacturing time of the replaceable print cartridge, and a production line identifier identifying a production line of the replaceable print cartridge (e.g., Fig. 9 930).

[0117] At 1610, method 1600 includes calculating, by logic circuitry, a manufacturing digital signature based on the indication data using a signature key. At 1612, method 1600 includes writing, by logic circuitry, the manufacturing digital signature to a memory arrangement (e.g., to a Fig. 12A In one example, writing the manufacturing digital signature may include writing the manufacturing digital signature to a property memory portion of the memory arrangement (e.g., Fig.10 1014 in FIG. 10). The logic circuitry may be configured to provide the host with read-only access to some attributes (eg, manufacturing signature attributes) stored in the attribute memory portion.

[0118] The above-described manufacturing digital signature architecture and its generation process can allow for verification of generic and / or part-specific manufacturing data written to consumables in a semi-trusted or at least non-fully controlled environment. The process and architecture can support the ability to generate digital signatures without having to build a complex infrastructure to create / support on-site or off-site signature services. The process allows for a flexible method for specifying data to be included in a manufacturing digital signature, and allows for the binding of manufacturing data with other data previously written to a memory arrangement (such as during provision or personalization of a logic circuit package prior to calculating the manufacturing digital signature). In addition, the process forces aftermarket consumables to use a copy of the complete data set from the genuine consumables, rather than using non-genuine data, making it easier to identify and alert customers to the presence of non-genuine consumables.

[0119] Fig.17A An example of a memory arrangement 406e is shown. In some examples, the memory arrangement 406e may be Figure 4 Memory arrangement 406e stores part number signature metadata 1700 and part number signature 1304 corresponding to the part number signature metadata 1700. Fig.10As described, part number signature metadata 1700 and part number signature 1304 may be stored in a common memory portion 1030 of a memory arrangement that may be accessed by a controller (e.g., a controller of a host) for read and write operations. Part number signature metadata 1700 is used to facilitate verification of part number signature 1304 (e.g., associated signed data) by the host. Part number signature metadata 1700 may vary and will be referenced below. Fig.18A and 18B The part number signature metadata 1700 specifies data used to calculate the part number signature 1304. The part number signature 1304 is calculated using the data corresponding to the part number signature metadata 1700 and a private key corresponding to a public key stored by or accessible to the host. Fig. 20A and 20B The calculation of part number signature 1304 is described in more detail. To verify that the logic circuit is authentic, the host can read part number signature metadata 1700 and part number signature 1304. The host can then verify part number signature 1304 using the data specified by part number signature metadata 1700.

[0120] Fig. 17B Another example of a memory arrangement 406f is shown. In some examples, the memory arrangement 406f may be Figure 4 Memory arrangement 406f stores part number signature metadata 1700 and part number signature 1304 corresponding to the part number signature metadata 1700, as previously described with reference to FIG. Fig.17A In addition, the memory arrangement 406f also stores part number signature designation data 1702. As described above with reference to Fig.10 As described, part number signature designation data 1702 may be stored in a general memory portion 1030 of a memory arrangement accessible by a host for read and write operations.

[0121] Part number signature specifying data 1702 includes data stored in a plurality of data blocks in a common memory portion of a memory arrangement specified by part number signature metadata 1700. Part number signature specifying data 1702 includes signed data. Part number signature 1304 is based at least in part on part number signature specifying data 1702. In some examples, part number signature specifying data may be static (e.g., read-only data) during the life of the logic circuit package and / or the component to which the logic circuit package is attached. Part number signature specifying data 1702 may include common manufacturing data (e.g., common to multiple replaceable print cartridges (e.g., print cartridges having the same SKU) as previously described. Fig. 9922 in). Part number signature specifying data 1702 may have a variable length between different logical memory arrangements. In some examples, part number signature specifying data 1702 may include part number signature metadata 1700, i.e., one of the data blocks that is part of part number signature specifying data 1702 may include part number signature metadata 1700.

[0122] In some examples, part number signature 1304 is signed on data including at least one of a device type identifier and part number signature specifying data 1702. The device type identifier not stored in memory arrangement 406f may correspond to logic circuit package 402 ( Figure 4 ) to identify that the logic circuit package is intended to be attached to a replaceable printing device component or is attached to a replaceable printing device component. In some examples, the value of the device type identifier is the same for all logic circuit packages that are intended to be attached to or are attached to a replaceable printing device component. The device type identifier signed when calculating the part number signature can be the same or different from the device type identifier signed when calculating the personalization signature.

[0123] As described in detail below, to verify that the logic circuit is authentic, the host can read part number signature metadata 1700 and part number signature 1304. The host can then use the part number signature metadata 1700 to read part number signature designation data 1702. The host can then use the part number signature designation data 1702 to verify part number signature 1304. In some examples, the host can use the part number signature metadata 1700 to read part number signature designation data 1702. Figures 5A to 5B and Figures 6A to 6B Part number signature 1304 and part number signature metadata 1700 are configured in a similar manner to the schema described and illustrated for digital signatures (eg, personalized signatures) and digital signature metadata (eg, personalized signature metadata).

[0124] Fig.18A An example of part number signature metadata 1800a is shown. In one example, part number signature metadata 1800a is Fig.17A1700a. The part number signature metadata 1800a includes a mode identifier field 1802, a key identifier field 1804, a data block address field 1806, and a data block length field 1808. The mode identifier field 1802 stores a mode version for the host to determine which mode to use. The mode identifier field 1802 has a length of one byte. The key identifier field 1804 stores an identifier of a signing key for the host to verify that the correct key is used. The key identifier field 1804 has a length of two bytes. The original part number signature 1304 ( Fig.17A and 17B ).

[0125] Data block address field 1806 may include a single data block address field or multiple data block address fields. Each data block address field stores a starting address corresponding to the data block on which the part number signature is initially calculated. Each data block address field has a length of two bytes. Data block length field 1808 may include a single data block length field or multiple data block length fields. Each data block length field corresponds to the data block addressed by the corresponding data block address field 1806. Each data block length field stores data indicating the length of the corresponding data block. Each data block length field has a length of two bytes. Each data block address field and the corresponding data block length field may be concatenated within part number signature metadata 1800a, from the first data block address (address 1) and data block length (length 1) to the last data block address (address N ) and the data block length (length N ), as follows: address1||length1|||address2||length2|...||address N ||Length N In one example, one of the designated data blocks may store part number signature metadata.

[0126] Fig.18B Another example of part number signature metadata 1800b is shown. In one example, part number signature metadata 1800b is Fig.17A Part number signature metadata 1800b includes a mode identifier field 1802, a key identifier field 1804, a data block address field 1806, and a data block length field 1808, as described above with reference to Fig.18AAs described and shown. In addition, the part number signature metadata 1800b also includes a length field 1810 and a data block count field 1812. The data block count field 1812 stores data indicating the total number of data blocks addressed by the data block address field 1806. The data block count field 1812 may have a length of one byte. The length field 1810 stores data indicating the total cumulative length of the key identifier field 1804, the data block count field 1812, the data block address field 1806, and the data block length field 1808. The length field 1810 may have a length of two bytes. The host may use the data stored in the length field 1810 to parse the part number signature metadata 1800b. In some examples, the host may use the data stored in the data block count field 1812 instead of the length field 1810, or use the data stored in the data block count field 1812 in addition to the data stored in the length field 1810 to parse the part number signature metadata 1800b. The part number signature metadata 1800b may be concatenated and written to the memory arrangement 406 as follows: Figure 4 ): mode identifier||length||key identifier||block count||address1||length1||address2||length2||...|address N ||Length N .

[0127] Figures 19A to 19C is to show that a logic circuit (for example, Figure 4 Flowcharts of example methods 1900, 1910, and 1920 performed by logic circuit 404 of the printer. As previously described, the logic circuit may be a replaceable printing device component (e.g., Figure 4 400) of the logic circuit package (for example, Figure 4 402), the logic circuit package includes a portion for communicating with a printing device logic circuit (eg, Figure 3 304) communication interface (for example, Figure 4 In this example, the memory arrangement stores part number signature metadata (e.g., Fig.18A 1800a or Fig.18B 1800b) to facilitate verification of the associated signed data. Fig.19A As shown in method 1900, at 1902, the logic circuit is configured to receive a read request from a host. At 1904, the logic circuit is configured to send part number signature metadata to the host in response to the read request.

[0128] In one example, the memory arrangement stores a key corresponding to a key identifier (e.g., Fig.18Aor 1804 in 18B) signed with a key corresponding to the part number signature metadata (e.g., Fig.17A or 1304 in 17B). In this example, Fig.19B As shown in method 1910, at 1912, the logic circuit is configured to receive a read request (or multiple read requests) from a host. At 1914, the logic circuit is configured to send a part number signature and part number signature metadata (in any order) to the host in response to at least one read request.

[0129] In one example, the memory arrangement stores part number signature metadata (e.g., Fig. 17B 1700 in), part number signature specifying data (e.g. Fig. 17B 1702), and the part number signature (e.g. Fig. 17B 1304), the part number signature is signed on data including a device type identifier corresponding to the logic circuit package and part number signature specifying data (e.g., Fig. 17B 1304). In this example, if Fig.19C As shown in method 1920 in FIG. 1 , at 1922, logic circuitry is configured to receive a request (e.g., a general memory read request) from a host. At 1924, logic circuitry is configured to send a part number signature, part number signature metadata, and / or other data to the host in response to at least one request, and part number signature-specified data corresponding to the part number signature metadata.

[0130] Fig. 20A and 20B is shown for providing a logic circuit package (e.g., Figure 4 402 in ). In some examples, processing system 2000 can be distributed across at least two sites. For example, at a first site, processing system 2000 can pre-compute a set of part number signatures for data corresponding to a plurality of predefined part numbers. These data sets (i.e., part number signature data and part number signatures) can then be sent to a second site (e.g., a manufacturing site) where the manufacturing data is written to a logic circuit package on a production line. When the production line is configured to run a certain part number, an appropriate data set can be selected by processing system 2000 and written to a memory arrangement of the logic circuit package, as described below. In one example, processing system 2000 can be different from the previously referenced Fig. 8A and Figure 8BThe processing system 800 described and shown. The processing system 2000 includes a processor 2002 and a machine-readable storage medium 2006. The processor 2002 is communicatively coupled to the machine-readable storage medium 2006 via a communication path 2004. Although the following description refers to a single processor and a single machine-readable storage medium, the description may also apply to systems having multiple processors and multiple machine-readable storage media. In such examples, instructions may be distributed (e.g., stored) on multiple machine-readable storage media, and instructions may be distributed on (e.g., executed by) multiple processors.

[0131] Processor 2002 includes one (i.e., single) central processing unit (CPU) or microprocessor or more than one (i.e., multiple) CPUs or microprocessors, and / or other suitable hardware devices for retrieving and executing instructions stored in machine-readable storage medium 2006. Processor 2002 may fetch, decode, and execute instructions 2008-2014 to provide a logic circuit package.

[0132] Processor 2002 may retrieve, decode, and execute instructions 2008 (e.g., at a first site) for retrieving a signing key identifier and signing data. In one example, the signing data includes a device type identifier corresponding to the logic circuit package and data to be stored in a plurality of data blocks of a general memory portion of a memory arrangement of the logic circuit package specified by the part number signing metadata. The signing key identifier and signing data may be stored in machine-readable storage medium 2006 and / or in another machine-readable storage medium accessible by processing system 2000.

[0133] The part number signature metadata is intended to facilitate verification of the associated signed data. The part number signature metadata may include a pattern identifier field (e.g., Fig.18A or 1802 in 18B), which stores a mode version number used by the host to determine which mode to use; a key identifier field (e.g., Fig.18A or 1804 in 18B), which stores an identifier of a signature key for the host to verify using the correct key; a plurality of data block address fields (e.g., Fig.18A or 1806 in 18B), each of the plurality of data block address fields storing an address corresponding to one of the plurality of data blocks on which the part number signature was initially calculated; and a plurality of data block length fields corresponding to the plurality of data blocks (e.g., Fig.18A Or 1808 in 18B), each data block length field in the multiple data block length fields stores data indicating the length of the corresponding data block.

[0134] Processor 2002 may fetch, decode, and execute instruction 2010 (e.g., at a first site) for concatenating signature data. The signature data may be concatenated as follows: device type identifier || data of data block 1 || data of data block 2 || ... || data block N , where "N" is the number of data blocks. Processor 2002 may retrieve, decode, and execute instruction 2012 (e.g., at a first site) for computing a part number signature on the concatenated signature data using a signature private key corresponding to a signature key identifier. In one example, computing the part number signature includes computing the part number signature on a hash of data to be stored in the plurality of data blocks. Processor 2002 may retrieve, decode, and execute instruction 2014 (e.g., at a second site) for concatenating the part number signature (e.g., Fig.17A or 1304 in 17B) writes to the general memory portion of the memory arrangement of the logic circuit package.

[0135] like Fig. 20B As shown, processor 2002 may fetch, decode, and execute further instructions 2016 (eg, at a second site) for signing part number metadata (eg, Fig.17A The processor 2002 may fetch, decode, and execute further instructions 2018 (e.g., at a second site) for writing data to be stored in a plurality of data blocks specified by the part number signature metadata (e.g., Fig. 17B 1702) writes to the general memory portion of the memory arrangement of the logic circuit package.

[0136] As an alternative or in addition to retrieving and executing instructions, the processor 2002 may include one (i.e., a single) electronic circuit or more than one (i.e., a plurality) electronic circuits including several electronic components for performing the functions of one or more of the instructions in the machine-readable storage medium 2006. With respect to the executable instructions represented (e.g., blocks) described and shown herein, it should be understood that part or all of the executable instructions and / or electronic circuits included in one block may be included in a different block shown in the figure or included in a different block not shown in another example.

[0137] The machine-readable storage medium 2006 is a non-temporary storage medium and may be any suitable electronic, magnetic, optical or other physical storage device that stores executable instructions. Thus, the machine-readable storage medium 2006 may be, for example, a RAM, an EEPROM, a storage drive, an optical disk, etc. Fig. 20A and 20BAs shown in , machine-readable storage medium 2006 may be disposed within system 2000. In this case, the executable instructions may be installed on system 2000. Alternatively, machine-readable storage medium 2006 may be a portable, external, or remote storage medium that allows system 2000 to download instructions from a portable / external / remote storage medium. In this case, the executable instructions may be part of an installation package.

[0138] Fig.21A Another example of a memory arrangement 406g is shown. In some examples, the memory arrangement 406g may be Figure 4 Memory arrangement 406g includes a first digital signature 2100, a second digital signature 2102, and a third digital signature 2104. In one example, the third digital signature 2104 signs the first digital signature 2100 and the second digital signature 2102. In one example, the first digital signature is a personalized signature (e.g., Figure 5A , 5B or 502 in 10), the second digital signature is a part number signature (e.g., Fig.10 , 17A or 1304 in 17B), the third digital signature is the manufacturing signature (e.g., Fig. 12A In one example, the first digital signature 2100 and the second digital signature 2102 are stored in a general memory portion of a memory arrangement configured for general read / write access (e.g., Fig.10 In 1030), the third digital signature 2104 is stored in a property memory portion of the memory arrangement that is not configured for general read / write access (e.g., Fig.10 1014).

[0139] The example memory arrangement 406g may provide a multiple digital signature architecture that may be suitable for improving data integrity in situations where multiple stages and / or multiple parties are involved in writing data to the memory arrangement. Fig.10 similar, Fig.21A and Fig. 21B The examples of may also simultaneously cover different embodiments of the digital signatures disclosed herein, such as a personalized digital signature, a manufacturing digital signature, and a part number digital signature, as well as corresponding metadata. However, other examples of the memory arrangement 406g may provide an architecture for multiple digital signatures that may be used for other undescribed technical functions other than the specific manufacturing-related stages between different suppliers described herein. The example of the memory arrangement 406g may be suitable for connecting to a host device that requires the presence of a digital signature to pass an integrity check of the same host device.

[0140] In some examples, the first digital signature is included in data (e.g., Fig. 9 912 in the example, the second digital signature is signed on: a device type identifier corresponding to the logic circuit package, a logic circuit identifier for a controller to distinguish the logic circuit package from other logic circuit packages, a partition map for defining partitions of a common memory portion of the memory arrangement, and first digital signature specifying data stored in the common memory portion of the memory arrangement. In some examples, the second digital signature is signed on the common manufacturing data (e.g., a color, a fill level, and a region) including at least one of: Fig. 9 In some examples, the third digital signature is signed on the first digital signature, the second digital signature, and part-specific manufacturing data (e.g., Fig. 9 At least one of the first, second and third digital signatures may be signed on a hash of at least a portion of the data identified above.

[0141] Fig. 21B Another example of a memory arrangement 406h is shown. In some examples, the memory arrangement 406h may be Figure 4 Memory arrangement 406h stores first digital signature 2100, second digital signature 2102, and third digital signature 2104, as previously described with reference to FIG. Fig.21A In addition, the memory arrangement 406h also stores first digital signature metadata 2106 and second digital signature metadata 2108. The first digital signature metadata 2106 facilitates verification of the first digital signature 2100, and the second digital signature metadata 2108 facilitates verification of the second digital signature 2102. In some examples, the first digital signature metadata 2106 is previously referenced. Fig. 6A and 6B The personalized signature metadata 600a or 600b described and shown, the second digital signature metadata 2108 is previously referenced Fig.18A and 18B Part number signature metadata 1800a or 1800b is described and illustrated. In some examples, first digital signature metadata 2106 and second digital signature metadata 2108 are configured based on the same schema.

[0142] Fig. 22 2200 is a flow chart illustrating another example method 2200 that may be performed by a logic circuit. As previously described, the logic circuit may be a replaceable printing device component (e.g., Figure 4 400) of the logic circuit package (for example, Figure 4402), the logic circuit package includes a portion for communicating with a printing device logic circuit (eg, Figure 3 304) communication interface (for example, Figure 4 In this example, the memory arrangement stores the first digital signature (eg, Fig.21A or 2100 in 21B), a second digital signature (e.g., Fig.21A or 2102 in 21B) and a third digital signature signed on the first digital signature and the second digital signature (e.g., Fig.21A or 2104 in 21B). Fig. 22 As shown in method 2200 in , at 2202, the logic circuit is configured to receive at least one request from a controller. At 2204, the logic circuit is configured to send a first digital signature, a second digital signature, and a third digital signature (in any order) to the controller in response to the at least one request.

[0143] Examples in the present disclosure may be provided as methods, systems, or machine-readable instructions, such as any combination of software, hardware, firmware, etc. Such machine-readable instructions may be included on a machine-readable storage medium (including but not limited to EEPROM, PROM, flash memory, optical disk storage, CD-ROM, optical storage, etc.) having a machine-readable program code therein or thereon.

[0144] The present invention is described with reference to the flow chart and block diagram of the method, device and system according to the example of the present invention. Although the above-mentioned flow chart shows a specific execution order, the order of execution may be different from the described execution order. The block described about a flow chart may be combined with the block of another flow chart. It should be understood that at least some of the blocks in the flow chart and the block diagram and combinations thereof may be implemented by machine-readable instructions.

[0145] For example, machine-readable instructions may be executed by a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to implement the functions described in the description and diagrams. In particular, a processor or a processing circuit system may execute machine-readable instructions. Therefore, the functional modules of the apparatus and device (e.g., a logic circuit system and / or a controller) may be implemented by a processor that executes machine-readable instructions stored in a memory or a processor that operates according to instructions embedded in the logic circuit system. The term "processor" should be broadly interpreted to include a central processing unit, a processing unit, an ASIC, a logic unit, or a programmable gate array, etc. The methods and functional modules may all be executed by a single processor or may be executed in multiple processors.

[0146] Such machine-readable instructions may also be stored in a machine-readable memory (eg, a tangible machine-readable medium), which may direct a computer or other programmable data processing device to operate in a particular mode.

[0147] Such machine-readable instructions may also be loaded onto a computer or other programmable data processing device to cause the computer or other programmable data processing device to perform a series of operations to produce a computer-implemented process, so that the instructions executed on the computer or other programmable device may implement the functions specified by the blocks in the flowchart and / or block diagram.

[0148] Furthermore, the teachings herein may be implemented in the form of a computer software product that is stored in a storage medium and includes a plurality of instructions for causing a computer device to implement the methods described in the examples of the present disclosure.

[0149] The word "comprising" does not exclude the presence of elements other than those listed in a claim, and "a" or "an" does not exclude a plurality.

[0150] Although specific examples have been shown and described herein, various alternative and / or equivalent implementations may replace the specific examples shown and described without departing from the scope of the present disclosure. This application is intended to cover any modifications or changes to the specific examples discussed herein. Therefore, the present disclosure is limited only by the claims and their equivalents.

[0151] The present disclosure relates to a logic circuit including an interface for communicating with a host logic circuit. The logic circuit may be part of a package. The logic circuit may be a dedicated circuit system such as a microcontroller, such as a security microcontroller. The logic circuit may be configured to communicate with a printing device controller. The logic circuit (ry package) may be attached to or embedded in or attachable to a replaceable print cartridge or component. The host logic circuit may include or be part of a printing device logic circuit such as a printer controller. The logic circuit and its functions may be used for other applications, such as security applications.

[0152] The logic circuit includes a memory arrangement, and the memory arrangement includes any of the following features, any combination of any feasible selections, or all of the features. The memory arrangement may store digital signature metadata to facilitate verification of associated signed data. The digital signature metadata may include a mode identifier field that stores a mode version number for the host to determine which mode to use. The digital signature metadata may include a key identifier field that stores an identifier of a signature key for the host to verify using the correct key. The digital signature metadata may include a plurality of data block address fields, each of which stores an address corresponding to one of a plurality of data blocks on which the digital signature was initially calculated. The digital signature metadata may include a plurality of data block length fields corresponding to the plurality of data blocks, each of which stores data indicating the length of the corresponding data block. The memory arrangement may store a logic circuit identifier for a controller to distinguish the logic circuit package from other logic circuit packages. The memory arrangement may store a partition map for defining partitions of a general memory portion of the memory arrangement. The memory arrangement may store digital signature metadata for facilitating verification of associated signed data and specified data corresponding to the digital signature metadata. The memory arrangement may store a digital signature signed on data including a device type identifier corresponding to a logic circuit package, a logic circuit identifier, a partition map, and specified data. The memory arrangement may store indication data on which a manufacturing digital signature is calculated. The memory arrangement may store a certificate for a controller to verify a manufacturing digital signature. The memory arrangement may store manufacturing attribute data. The manufacturing attribute data may include at least one indication indicating the indication data. The manufacturing attribute data may include a manufacturing digital signature. The memory arrangement may store a signing key for calculating a manufacturing digital signature. The memory arrangement may store a key identifier for identifying a signing key, which is used to calculate a manufacturing digital signature and for a host to use the correct key to verify the associated signed data. The logic circuit may be configured to send a key identifier to the host in response to a request from the host. The memory arrangement may store a first digital signature, a second digital signature, and a third digital signature signed on the first digital signature and the second digital signature. The memory arrangement may store part number signature metadata for facilitating verification of the associated signed data. The part number signature metadata may include a mode identifier field that stores a mode version number for the host to determine which mode to use. The part number signature metadata may include a key identifier field storing an identifier of a signing key for the host to verify using the correct key. The part number signature metadata may include a plurality of data block address fields, each of the plurality of data block address fields storing an address corresponding to one of the plurality of data blocks on which the part number signature was initially calculated.The part number signature metadata may include a plurality of data block length fields corresponding to the plurality of data blocks, each of the plurality of data block length fields storing data indicating the length of the corresponding data block. The memory arrangement may store a part number signature signed on data including a device type identifier corresponding to the logic circuit package and / or part number signature designation data. A logic circuit having a memory arrangement including any of the above features, any combination of any feasible selections, or all of the features may be configured according to any of the following features, any combination of any feasible selections, or all of the features. The logic circuit may be configured to send digital signature metadata to a host in response to a read request. The logic circuit may be configured to send a logic circuit identifier, a partition map, a digital signature, digital signature metadata, and / or other data, and designated data corresponding to the digital signature metadata to the controller in response to at least one request from the controller. The logic circuit may be configured to send manufacturing attribute data to the controller in response to at least one first request from the controller. The logic circuit may be configured to send a certificate and indication data to the controller in response to at least one second request from the controller. The logic circuit may be configured to send a first digital signature, a second digital signature, and a third digital signature to the controller in response to the at least one request. The logic circuit may be configured to send part number signature metadata to the host in response to a read request. The memory arrangement may store part number signature specified data corresponding to the part number signature metadata. The logic circuit may be configured to send part number signature, part number signature metadata, and / or other data, and / or part number signature specified data corresponding to the part number signature metadata to the controller. Any of the above-described derivable example logic circuits and / or example memory arrangements may be combined with any of the following example features, any feasible selection, or all of the features. The digital signature metadata may include a data block count field storing data indicating the total number of multiple data blocks. The digital signature metadata may include a length field for the host to parse the digital signature metadata, the length field storing data indicating the total cumulative length of a key identifier field, a data block count field, multiple data block address fields, and multiple data block length fields. The memory arrangement may store a digital signature corresponding to the digital signature metadata, which is signed with a key corresponding to the key identifier. The logic circuitry may be configured to send the digital signature and the digital signature metadata to the host in response to at least one read request. The digital signature metadata and the digital signature may be stored in a general purpose memory portion of a memory arrangement configured for general purpose read / write access. The memory arrangement may include at least one different memory portion storing at least one encryption key and / or a plurality of attributes, the memory portion not intended for general purpose read / write access. The logic circuitry may be configured to perform a cryptographic operation using the at least one encryption key.The logic circuit may be configured to: (i) return an attribute from a plurality of attributes in response to an attribute request including an associated attribute tag; and (ii) associate the attribute with the attribute tag. The memory arrangement may store digital signatures, digital signature metadata, specified data, and other data within a partition defined by a partition map. The memory arrangement may store other data unrelated to the digital signature, including characteristics related to the print cartridge. The manufacturing attribute data may include a key identifier corresponding to a certificate for a controller to verify the manufacturing digital signature. The at least one indication may include a plurality of data block addresses of the indication data stored in the memory arrangement, and / or a plurality of data block length fields indicating the length of each corresponding data block. The at least one first request and the at least one second request may have a differently encoded command type field and / or include different opcodes for indicating different command types. The at least one first request may be configured to query the attribute memory. The at least one second request may be configured to read the general memory. The indication data on which the manufacturing digital signature is calculated includes at least one other digital signature. The indication data may include manufacturing data specific to the part. The manufacturing attribute data may include a key identifier. The key identifier may identify a private key used to calculate the manufacturing digital signature. The certificate may include a public key corresponding to the private key. The certificate may be signed with a certificate authority private key for verification by the controller with a certificate authority public key. The memory arrangement may store a plurality of key identifiers and associated signing keys. The memory arrangement may store a private key for calculating a manufacturing digital signature. The memory arrangement may store a private key, the key identifier may correspond to a public key in a certificate, and the certificate may further include a key identifier for the controller to use the public key to confirm that the correct certificate is used to verify the manufacturing digital signature. The logic circuit may be configured to calculate the manufacturing digital signature. The logic circuit may be configured to calculate the manufacturing digital signature and store the manufacturing digital signature in the memory arrangement upon or after completion. The memory arrangement may store attribute data for calculating the manufacturing digital signature and facilitating verification of the associated signed data. The attribute data may include a key identifier. The attribute data may include at least one indication. The logic circuit may be configured to send the at least one indication to the host in response to a request from the host. The logic circuit may be configured to: calculate the manufacturing digital signature based on the attribute data; and store the manufacturing digital signature in the attribute data. The indicative data on which the manufacturing digital signature is calculated may include a part-specific digital signature signed on data including at least one of: a device type identifier corresponding to a logic circuit package; a logic circuit identifier for a host to distinguish the logic circuit package from other logic circuit packages; a partition map for defining partitions of a common memory portion of a memory arrangement; and / or specified data stored in a common memory portion of a memory arrangement.The indicative data on which the manufacturing digital signature is calculated may include: a part number digital signature signed on generic manufacturing data, the generic manufacturing data including at least one of the following: color; fill level; and / or area. The indicative data on which the manufacturing digital signature is calculated may include: part-specific manufacturing data, the part-specific manufacturing data including at least one of the following: manufacturing date; manufacturing time; and / or production line identifier. The first digital signature may be a personalized signature. The second digital signature may be a part number signature. The third digital signature may be a manufacturing signature. The first digital signature may be signed on data including at least one of the following: a device type identifier corresponding to a logic circuit package; a logic circuit identifier for a controller to distinguish the logic circuit package from other logic circuit packages; a partition map for defining partitions of a generic memory portion of a memory arrangement; and / or first digital signature designation data stored in a generic memory portion of a memory arrangement. The second digital signature may be signed on generic manufacturing data including at least one of the following: color; fill level; and / or area. The third digital signature may be signed on part-specific manufacturing data including at least one of the following: manufacturing date; manufacturing time; and / or production line identifier. The memory arrangement may store first digital signature metadata for facilitating verification of the first digital signature, and / or second digital signature metadata for facilitating verification of the second digital signature. The first digital signature metadata and the second digital signature metadata may be configured based on the same mode and / or mode version. The first digital signature and the second digital signature may be stored in a general memory portion of a memory configuration configured for general read / write access. The third digital signature may be stored in an attribute memory portion of the memory configuration. The attribute memory portion may not be configured for general read / write access. The part number signature metadata may include a data block count field that stores data indicating the total number of multiple data blocks. The part number signature metadata may include a length field for host parsing part number signature metadata that stores data indicating the total cumulative length of a key identifier field, a data block count field, multiple data block address fields, and / or multiple data block length fields. The memory arrangement may store a part number signature corresponding to the part number signature metadata signed with a key corresponding to the key identifier. The logic circuit may be configured to send the part number signature and / or part number signature metadata to the host in response to at least one read request. The part number signature metadata and / or the part number signature may be stored in a general purpose memory portion of a memory arrangement configured for general purpose read / write access. The memory arrangement may store other data unrelated to the part number signature, including print cartridge related data that may be updated during the life of the logic circuitry.

Claims

1. A logic circuit package, the logic circuit package comprising an interface and a logic circuit for communicating with a controller, the logic circuit comprising: A memory arrangement storing: Indicative data on which a digital signature is calculated; a certificate for the controller to verify the manufacturing digital signature; as well as Manufacturing attribute data, the manufacturing attribute data comprising: at least one indication indicating said indication data; and said manufacturing digital signature; Wherein, the logic circuit is configured as: sending the manufacturing attribute data to the controller in response to at least one first request from the controller; and In response to at least one second request from the controller, the credential and the indication data are sent to the controller.

2. The logic circuit package of claim 1, wherein the manufacturing attribute data includes a key identifier corresponding to the certificate for the controller to verify the manufacturing digital signature.

3. The logic circuit package of claim 1 or 2, wherein the at least one indication comprises: a plurality of data block addresses of said indicative data stored in said memory arrangement; as well as A plurality of data block length fields indicating the length of each corresponding data block.

4. The logic circuit package of any one of claims 1 to 3, wherein the at least one first request and the at least one second request have differently encoded command type fields and / or include different operation codes to indicate different command types.

5. The logic circuit package of any one of claims 1 to 4, wherein the at least one first request is configured to query an attribute memory and the at least one second request is configured to read a general purpose memory.

6. A logic circuit package as claimed in any one of claims 1 to 5, wherein the indicative data on which the manufacturing digital signature is calculated includes at least one other digital signature.

7. The logic circuit package of any one of claims 1 to 6, wherein the indicative data comprises part-specific manufacturing data.

8. The logic circuit package of any one of claims 1 to 7, wherein the manufacturing attribute data comprises a key identifier and the key identifier identifies a private key used to calculate the manufacturing digital signature, and in, The certificate includes a public key corresponding to the private key.

9. The logic circuit package of claim 8, wherein the certificate is signed with a certificate authority private key to be verified by the controller with a certificate authority public key.

10. The logic circuit package of claim 8, wherein the memory arrangement stores a plurality of key identifiers and associated signing keys.

11. The logic circuit package of any one of claims 1 to 10, wherein the memory arrangement further stores a private key used to calculate the manufacturing digital signature.

12. The logic circuit package of claim 8, wherein the memory arrangement further stores the private key, and The key identifier corresponds to a public key in the certificate, and the certificate further includes the key identifier for the controller to use the public key to confirm that the correct certificate is used to verify the manufacturing digital signature.

13. A logic circuit package, the logic circuit package comprising an interface for communicating with a host and a logic circuit, the logic circuit comprising: A memory arrangement storing: Signature keys used to calculate and create digital signatures; as well as a key identifier for identifying the signing key used to compute the manufacturing digital signature and for the host to verify that the associated signed data is using the correct key; and Wherein, the logic circuit is configured as: The key identifier is sent to the host in response to a request from the host.

14. The logic circuit package of claim 13, wherein the logic circuit is configured as: calculating the manufacturing digital signature; and The manufacturing digital signature is stored in the memory arrangement.

15. The logic circuit package of claim 14, wherein the memory arrangement stores attribute data used to calculate the manufacturing digital signature and facilitate verification of associated signed data, the attribute data including the key identifier.

16. The logic circuit package of claim 15, wherein the attribute data further comprises at least one indication indicating the indicative data on which the manufacturing digital signature was calculated; and in, The logic circuit is configured as: The at least one indication is sent to the host in response to a request from the host.

17. The logic circuit package of claim 15 or 16, wherein the logic circuit is configured as: Calculating the manufacturing digital signature based on the attribute data; and The manufacturing digital signature is stored in the attribute data.

18. The logic circuit package of claim 16 or 17, wherein the at least one indication comprises: a plurality of data block addresses corresponding to a plurality of data blocks of the memory arrangement storing the indication data; as well as A plurality of data block length fields, the plurality of data block length fields indicating a length of each corresponding data block in the plurality of data blocks.

19. The logic circuit package of any one of claims 1-13, 16 and 18, wherein the indicative data on which the manufacturing digital signature is calculated comprises: A part-specific digital signature signed on data including at least one of the following: a device type identifier corresponding to the logic circuit package; a logic circuit identifier, wherein the logic circuit identifier is used by the host to distinguish the logic circuit package from other logic circuit packages; a partition map for defining partitions of a common memory portion of the memory arrangement; as well as Specify data stored in the general purpose memory of the memory arrangement.

20. The logic circuit package of claim 16, wherein the indicative data on which the manufacturing digital signature is calculated comprises: A part number digital signature signed on generic manufacturing data including at least one of the following: color; Fill level; as well as area.

21. The logic circuit package of claim 16, wherein the indicative data on which the manufacturing digital signature is calculated comprises: Part-specific manufacturing data including at least one of the following: Date of manufacture; Manufacturing time; as well as Production line identifier.

22. A replaceable print cartridge comprising a logic circuit package as claimed in any preceding claim.

23. A method for providing a logic circuit package including a memory arrangement, the method comprising: The logic circuit packaged by the logic circuit receives a command for generating a manufacturing digital signature; reading, by the logic circuit in response to the command, a signing key identifier and at least one indication of indication data stored in a memory arrangement encapsulated by the logic circuit; reading, by the logic circuit, a signing key corresponding to the signing key identifier; reading, by the logic circuit, the indication data based on the at least one indication; The logic circuit uses the signature key to calculate and generate a digital signature based on the indication data; as well as The manufacturing digital signature is written by the logic circuit to the memory arrangement.

24. A method as claimed in claim 23, wherein the indication data is stored in a general purpose memory portion of the memory arrangement configured for general purpose read / write access, and in, Writing the manufacturing digital signature comprises writing the manufacturing digital signature to an attribute memory portion of the memory arrangement.

25. The method of claim 24, wherein the logic circuit is configured to provide a host with read-only access to the manufacturing digital signature.

26. The method of claim 23, wherein the indicative data comprises: A part-specific digital signature signed on data including at least one of the following: a device type identifier corresponding to the logic circuit package; a logic circuit identifier, wherein the logic circuit identifier is used to distinguish the logic circuit package from other logic circuit packages; a partition map for defining partitions of a common memory portion of the memory arrangement; as well as Specifying data stored in the general purpose memory portion of the memory arrangement.

27. The method of claim 23, wherein the logic circuit package is attached to a replaceable print cartridge, and The indication data includes: A part number digital signature signed on generic manufacturing data including at least one of the following: color; Fill level; as well as area.

28. The method of claim 23, wherein the logic circuit package is attached to a replaceable print cartridge, and The indication data includes: Part-specific manufacturing data including at least one of the following: the date of manufacture of the replaceable print cartridge; the time when the replaceable print cartridge was manufactured; and A production line identifier identifies a production line of the replaceable print cartridge.

29. The method according to any one of claims 23-28, wherein calculating the manufacturing digital signature comprises calculating the manufacturing digital signature over the at least one indication of indicative data and a hash of the indicative data.

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