Apparatus for controlling, protecting and monitoring state of health of power transistor

Abstract

The invention relates to a device (100) for controlling and protecting a power transistor (102), comprising:-a nominal switching circuit (103) of the transistor; -a short-circuit detection circuit (105) holding the transistor in an on state and detecting an increase or decrease in a voltage VGS of the transistor relative to a reference voltage representing a short circuit of the transistor; a protection circuit (107) discharging the gate of the transistor after the short circuit is detected; and-a circuit (106) for measuring and controlling the nominal switching circuit, the short circuit detection circuit and the protection circuit.

Description

Technical Field

[0001] The present invention relates to the field of power electronics, and in particular to the field of power electrification and electric hybridization in the aviation industry, where high performance, integrated, reliable and safe electronic power systems are sought. Background Art

[0002] The introduction of wide bandgap power semiconductor components, such as MOSFET transistors made of silicon carbide (SiC), within static power converters or modules allows reducing onboard mass and volume by 15% to 30% and increasing the electrical efficiency of these converters by 2 to 3 percentage points. However, this leads to the problem of protecting and monitoring the health of these components, which show the weaknesses and instabilities that MOSFET and IGBT transistors of silicon technology have.

[0003] The cause of a short circuit in a power transistor may be internal to the transistor (e.g. due to disturbances or damage to the circuit controlling the gate of one of the converter's transistors or due to a breakdown of one of the converter's transistors) or external to the transistor (e.g. when the converter is a voltage inverter on a motor, a short circuit in the motor winding or an insulation fault to the aircraft ground). The main types of short circuits in power transistors are:

[0004] a) The simultaneous control of two power transistors of a converter arm leads to an internal fault in that arm;

[0005] b) Internal failure caused by voltage breakdown of one of the power transistors in the converter arm;

[0006] c) external faults, such as those caused by the windings of the motor controlled by the converter, which create a conduction path between the two arms of the converter;

[0007] d) External faults caused by mass or ground loops.

[0008] Configuration a) is caused by an internal fault of the control and is often called a "hard switching fault" (HSF) or a type 1 fault. Configuration b) is also caused by an internal fault, but this time by a breakdown of a component due to an overvoltage or a sudden short circuit at the output of the arm. Configurations c) and d) belong to the same family as configuration b), but this time by an external fault within the load or by an insulation fault path. Although they have completely different fault time dynamics, cases b), c) and d) are often designated by the unique name "fault under load" (FUL) or a type 2 fault.

[0009] SiC technology is less stable and less durable with regard to unexpected electrical conditions such as short circuits. For such SiC-based components, the acceptable number of short-circuit cycles is often below 1,000, referring to IGBT silicon standards. In addition, the short-circuit holding time (i.e. the duration of exposure to a short circuit, beyond which the component will undergo an irreversible permanent failure that will propagate within the converter with high risk) is typically reduced by at least 50% compared to silicon technology (IGBTSi, MOSFET Si).

[0010] This reduced short-circuit holding time is due to the characteristics of SiC components (short channel, high cell density, high electric fields), which lead to a substantial increase in current density and thermal power density in this component type. The high thermal power density of a short-circuited SiC-based power transistor is accompanied by a rapid rise in its temperature to levels far higher than those known for silicon components. This leads to increased thermomechanical stresses in areas of the component (including source contact metal, protective oxide and gate) with a risk of gradual cracking with each cumulative cycle, followed by rupture of the protective oxide, and softening and then melting of the source contact metal layer and penetration into the ruptured protective oxide. This mechanism leads to the formation of a network of conductive metal filaments between the source contact metal and the gate of the transistor, which remains more or less stable over time, these filaments being responsible for a more or less stable gate leakage current.

[0011] In addition to the short-circuit problem, SiC-based power transistors also suffer from the weakness and "electrical" instability of their gates. The reasons for this are manifold: on the one hand, the thickness of the deposited gate oxide is at least three times thinner than in silicon technology, which generates at least three times higher electric fields; on the other hand, their threshold voltages drift considerably due to interface defects (structural defects and due to the migration of contaminants), interface states that are more or less likely to capture or re-emit carriers and evolve over time between the gate oxide and the SiC active area of ​​the component.

[0012] There are several methods for monitoring and detecting the presence of a short circuit on a power transistor: direct measurement of the drain current I DS of the power switch, voltage V DS Measurement of dynamic gate current, gate charge Q G Nevertheless, all of these methods have one or more of the following disadvantages: power capture of the power assembly, difficulties and excessive costs associated with the integration of components for monitoring and detecting high voltages in the control circuits of the power assembly, and long response times. Summary of the invention

[0013] The present invention aims to provide a solution for controlling, monitoring and protecting a power transistor with respect to a short circuit, which solution does not affect the nominal switching pattern of the power transistor and does not have the above-mentioned disadvantages of the prior art.

[0014] To this end, a device for controlling and protecting a power transistor is provided, comprising at least:

[0015] a nominal switching circuit of the power transistor, configured to control (by applying a nominal switching voltage on the gate of the power transistor) a nominal switching of the power transistor from a conducting state to a non-conducting state, to keep the power transistor in a non-conducting state, and a nominal switching of the power transistor from a non-conducting state to a conducting state;

[0016] - a short-circuit detection circuit configured to keep the power transistor in an on-state (by applying a voltage for maintaining an on-state to the gate of the power transistor) and to detect a voltage V of the power transistor GS (gate-source voltage) increases to a value above the high reference voltage, or voltage V GS The value of V drops below the value of the low reference voltage, which indicates a short circuit of the power transistor (FUL type). GS When the supply current output by the gate of the power transistor increases to a value higher than the high reference voltage, the HSF type GS consumption current entering through the gate of the power transistor when it increases above the high reference voltage);

[0017] a protection circuit configured to discharge the gate of the power transistor after detecting a short circuit of the power transistor;

[0018] - a measurement and control circuit configured to deliver control signals at the inputs of the nominal switching circuit, the short-circuit detection circuit and the protection circuit so that:

[0019] In the absence of a short circuit being detected, an input of a protection circuit coupled to a gate of the power transistor is set to a high impedance state;

[0020] In the event that a short circuit is detected, both the nominal switching circuit coupled to the gate of the power transistor and the output of the short circuit detection circuit are set to a high impedance state.

[0021] The present invention provides a novel electronic architecture for a transistor gate control or driver circuit (commonly referred to as a "gate driver") comprising a number of output channels, each of which can be operated in a modular and selective manner to perform a dedicated function. Each output branch of the device is dedicated to a single function that can be independently executed and optimized as needed without excluding other functions of the device.

[0022] In the control and protection device according to the invention, different circuits used for controlling and protecting the power transistor (i.e. used for performing switching of the power transistor, keeping it in a conducting or non-conducting state and monitoring the electrical behavior of the power transistor) are coupled in parallel with each other to the gate of the power transistor via different resistors, the values ​​of which are also different from each other to be adapted to the function performed by each circuit on the power transistor (slow switching, fast switching, voltage measurement, etc.).

[0023] The control and protection device is based on the architecture of an electronic circuit operating at low voltage, which can be integrated with very high density in an ASIC-type integrated circuit (“Application Specific Integrated Circuit”).

[0024] Furthermore, the device does not include elements coupled to the drain or source of the power transistor, or power capture elements of the power transistor. Therefore, the device does not modify the characteristics and response of the power transistor. This property also has the advantage of reducing the cost of the proposed solution, since it allows optimizing the wiring of the device and reducing the circuit area required to implant it, compared to prior art solutions.

[0025] In this device, short circuit detection is based on the voltage V GS Detection of an abnormal increase or decrease in the voltage, i.e. depolarization or ohmic overpolarization of the gate of the power transistor. The short-circuit detection performed by the control and protection device allows the detection of any short-circuit type.

[0026] Advantageously, the invention is suitable for controlling and protecting a power transistor forming part of a power module or converter for controlling an aircraft electric machine.

[0027] The provided control and protection devices make power electronic devices, which typically use power components or modules based on power transistors, more reliable, safer and available in the long term.

[0028] Advantageously, the control and protection device is used to protect a power transistor based on a wide bandgap semiconductor (i.e. comprising an energy gap or bandgap height greater than that of silicon, for example separating the last occupied state of the valence band from the first free state of the conduction band), such as SiC or GaN. Advantageously, the controlled and protected power transistor corresponds to a silicon carbide MOSFET or a p-GaN HEMT, for which a HSF or FUL type short circuit can be detected, but may correspond to another type of transistor, such as a JFET or an IGBT, for which a FUL type short circuit can be detected.

[0029] The short circuit detection circuit is coupled to the power transistor via a resistor different from the resistor that the nominal switching circuit couples to the power transistor.

[0030] The nominal switching circuit may include at least:

[0031] a first push-pull circuit comprising a first output configured to be coupled to a gate of a power transistor via a first resistor and a second output configured to be coupled to a gate of the power transistor via at least one second resistor;

[0032] - a first voltage level conversion circuit comprising at least one first control input and a second control input, a nominal switching control signal being intended to be applied from a measurement and control circuit to the at least one first control input, a signal for setting the first output and the second output of the first push-pull circuit to a high impedance state being intended to be applied from the measurement and control circuit to the second control input, and the first voltage level conversion circuit being configured to deliver a signal for controlling the first push-pull circuit on an output coupled to the control input of the first push-pull circuit.

[0033] The first push-pull circuit may include at least one n-MOSFET transistor and one p-MOSFET transistor such that:

[0034] - the gates of the n-MOSFET and p-MOSFET transistors form the control inputs of the first push-pull circuit;

[0035] - a source electrode of the n-MOSFET transistor is configured to receive a first reference potential;

[0036] - a drain electrode of the n-MOSFET transistor forms a first output of the first push-pull circuit;

[0037] - a source electrode of the p-MOSFET transistor is configured to receive a first supply potential;

[0038] The drain electrode of the -p-MOSFET transistor forms the second output of the first push-pull circuit.

[0039] The short circuit detection circuit of the power transistor may include at least:

[0040] - a first switch comprising an output configured to be coupled to a gate of the power transistor via a third resistor;

[0041] a second voltage level conversion circuit comprising at least one control input to which the short circuit detection control signal is intended to be applied from the measurement and control circuit and configured to deliver a signal for controlling the first switch on an output coupled to the control input of the first switch;

[0042] - a first comparator circuit configured to deliver, at the input of the measurement and control circuit, a voltage V representative of the power transistor GS a signal of the difference between the value of and the value of a high reference voltage;

[0043] - a second comparator circuit configured to deliver, at the input of the measurement and control circuit, a voltage V representative of the power transistor GS A signal that is the difference between the value of and the value of a low reference voltage.

[0044] The first switch may correspond to a p-MOSFET transistor whose gate forms the control input of the first switch, whose source electrode is configured to receive the second supply potential, whose drain electrode forms the output of the first switch.

[0045] The value of the third resistor may be higher than the values ​​of the first resistor and the second resistor by a multiplication factor greater than or equal to 100.

[0046] The protection circuit may include a second switch including an input configured to be coupled to the gate of the power transistor through a fourth resistor and an output configured to be coupled to a reference potential.

[0047] The second switch may correspond to an n-MOSFET transistor, a source electrode of which forms an output of the second switch, a drain electrode of which forms an input of the second switch, and a gate of which is coupled to a control element configured to receive a control signal from the measurement and control circuit and to set the n-MOSFET transistor to a conducting state after detecting a short circuit of the power transistor.

[0048] The control and protection device may further include a circuit for monitoring the health of a gate oxide of the power transistor, the circuit being configured to:

[0049] - controlling slow switching of power transistors, where the switching duration is longer than the nominal switching duration, and

[0050] -Measure the voltage V of the power transistor during its slow switching GS evolution, and

[0051] - Calculate the measured voltage V GS The duration of the so-called Miller plateau during the evolution of

[0052] And the measurement and control circuitry may be configured to deliver control signals such that:

[0053] - when the power transistor is controlled by the nominal switching circuit or the short circuit detection circuit, the outputs of the monitoring circuit configured to be coupled to the gate of the power transistor are both set to a high impedance state;

[0054] - During the slow switching of the power transistors, the outputs of the nominal switching circuit and the short-circuit detection circuit as well as the input of the protection circuit are set to a high impedance state.

[0055] In this case, the control and protection device proposes to extend the initial “gate driver” functionality in order to add to it new functions related to monitoring the “health state” of the power transistor, in particular by detecting abnormally high drifts of its threshold voltage.

[0056] The monitoring circuit may include at least:

[0057] a second push-pull circuit comprising a first output configured to be coupled to the gate of the power transistor via a fifth resistor and a second output configured to be coupled to the gate of the power transistor via at least one sixth resistor;

[0058] a third voltage level conversion circuit comprising at least a first control input and a second control input, the monitoring control signal being intended to be applied to the first control input from the measurement and control circuit, the signal for setting the first output and the second output of the second push-pull circuit to a high impedance state being intended to be applied to the second control input from the measurement and control circuit, and the third voltage level conversion circuit being configured to deliver the signal for controlling the second push-pull circuit on an output coupled to the control input of the second push-pull circuit;

[0059] - A voltage measurement circuit comprising at least one sample-and-hold circuit, the input of which is configured to be coupled to the gate of the power transistor.

[0060] The device may also include a first current stop diode, which is coupled in series with a second resistor between the second output of the first push-pull circuit and the gate of the power transistor, and a second current stop diode, which is coupled in series with a sixth resistor between the second output of the second push-pull circuit and the gate of the power transistor.

[0061] The second push-pull circuit may include at least one n-MOSFET transistor and one p-MOSFET transistor such that:

[0062] - the gates of the n-MOSFET and p-MOSFET transistors form the control inputs of the second push-pull circuit;

[0063] - a source electrode of the n-MOSFET transistor is configured to receive a third reference potential;

[0064] - a drain electrode of the n-MOSFET transistor forms a first output of the second push-pull circuit;

[0065] - a source electrode of the p-MOSFET transistor is configured to receive a third supply potential;

[0066] The drain electrode of the -p-MOSFET transistor forms the second output of the second push-pull circuit.

[0067] The values ​​of the fifth resistor and the sixth resistor may be higher than the values ​​of the first resistor and the second resistor by a multiplication factor greater than or equal to ten.

[0068] The control and protection device may further comprise a circuit for detecting a permanent leakage current through the gate of the power transistor, the circuit being configured to:

[0069] - setting the power transistor to a conducting or non-conducting state, and

[0070] - measure the evolution of the current on the gate of a power transistor,

[0071] and wherein the measurement and control circuit is configured to deliver a control signal such that:

[0072] - when the power transistor is controlled by the nominal switching circuit or the short-circuit detection circuit, or by the monitoring circuit when the control and protection device includes the monitoring circuit, the output of the permanent leakage current detection circuit is set to a high impedance state;

[0073] - After the permanent leakage current has been detected, the nominal switching circuit, the short-circuit detection circuit and, when the control and protection device comprises a monitoring circuit, the output of the monitoring circuit and the input of the protection circuit are set to a high impedance state.

[0074] In this context, control and protection devices propose to extend the initial gate control circuit functionality to add to it new functions related to monitoring the “health status” of the power transistors, in particular by detecting “early” signs or precursor signs of gate oxide aging (abnormally high permanent leakage residual currents).

[0075] The permanent leakage current detection circuit may include at least:

[0076] a third push-pull circuit comprising a first output configured to be coupled to the gate of the power transistor via a seventh resistor and a second output configured to be coupled to the gate of the power transistor via an eighth resistor;

[0077] a fourth voltage level conversion circuit comprising at least a first control input and a second control input, the permanent leakage current detection control signal being intended to be applied from the measurement and control circuit to the first control input, the signal for setting the first output and the second output of the third push-pull circuit to a high impedance state being intended to be applied from the measurement and control circuit to the second control input, and the fourth voltage level conversion circuit being configured to deliver the signal for controlling the third push-pull circuit on an output coupled to the control input of the third push-pull circuit;

[0078] - a circuit for measuring the gate current of the power transistor, the input of which is coupled to the terminals of the seventh resistor and to the terminals of the eighth resistor.

[0079] The third push-pull circuit may include at least one n-MOSFET transistor and one p-MOSFET transistor such that:

[0080] - the gates of the n-MOSFET and p-MOSFET transistors form the control inputs of the third push-pull circuit;

[0081] - a source electrode of the n-MOSFET transistor is configured to receive a fourth reference potential;

[0082] - a drain electrode of the n-MOSFET transistor forms a first output of the third push-pull circuit;

[0083] - a source electrode of the p-MOSFET transistor is configured to receive a fourth supply potential;

[0084] The drain electrode of the -p-MOSFET transistor forms the second output of the third push-pull circuit.

[0085] The values ​​of the seventh resistor and the eighth resistor may be higher than the values ​​of the first resistor and the second resistor by greater than or equal to 10. 5 The multiplication factor of .

[0086] The invention also relates to a power converter or module comprising several power transistors and at least one control and protection device as described above and coupled to one of the power transistors.

[0087] The invention also relates to an aircraft comprising at least one power converter or module as described above.

[0088] Throughout the document, the terms "first", "second", "third", etc. are used to list and distinguish different elements but are not used to designate the importance or priority of these elements within the device. BRIEF DESCRIPTION OF THE DRAWINGS

[0089] The invention will be better understood after reading the description of embodiments given for illustrative and non-limiting purposes only and with reference to the accompanying drawings, in which:

[0090] - Figure 1A and Figure 1B An embodiment of a device for controlling and protecting a power transistor, object of the invention according to a particular embodiment, is shown;

[0091] - Figure 2 A variant of a short-circuit detection circuit forming part of the device for controlling and protecting a power transistor, object of the present invention, is shown;

[0092] - Figure 3 An example of a control signal of a power transistor applied during switching and maintaining the power transistor in the on-state by the device for controlling and protecting the power transistor, which is the object of the present invention;

[0093] - Figure 4 shows the gate voltage of the power transistor obtained when switched by the nominal switching circuit and the gate oxide state monitoring circuit of the control and protection device object of the present invention;

[0094] - Figure 5 shows a converter object of the invention according to a particular embodiment, comprising a plurality of power transistors and at least one control and protection device also object of the invention;

[0095] - Figure 6 An example of an aircraft, object of the invention, is shown, comprising at least one power converter or module, also object of the invention;

[0096] - Figure 7 Schematically illustrates the occurrence of a FUL-type short circuit on a converter arm, wherein the gate of one of the power transistors is coupled to a control and protection device object of the present invention;

[0097] - Figure 8 Schematically illustrates the occurrence of an HSF type short circuit on a converter arm, wherein the gate of one of the power transistors is coupled to a control and protection device object of the present invention;

[0098] - Fig. 9 Schematically shown is the evolution of the gate voltage of a power transistor during the occurrence of a short circuit of FUL or HSF type.

[0099] Identical, similar or equivalent parts in the different figures described below have the same reference numerals to facilitate transition from one figure to another.

[0100] In order to make the drawings clearer, the different parts shown in the drawings are not necessarily drawn to the same scale.

[0101] The different possibilities (variants and embodiments) are to be understood as not being mutually exclusive and can be combined together. DETAILED DESCRIPTION

[0102] Reference below Figure 1A and Figure 1B An embodiment of an apparatus 100 for controlling and protecting a power transistor 102 according to a specific embodiment is described. The power transistor 102 corresponds to one of the power transistors of the power converter 200, such as Figure 5 As shown in , the converter corresponds to an inverter, for example. Figure 5 As shown in , the gate of power transistor 102 is coupled to device 100. Figure 5 In the example of FIG. 1 , a single device 100 is shown, which is coupled to the gate of one of the power transistors of the converter 200. In practice, each power transistor of the converter 200 advantageously comprises its gate coupled to a control and protection device similar to the control and protection device 100 described herein.

[0103] The architecture of the device 100 includes several circuits designed to control and protect the power transistor 102, which operate in parallel in a modular and selective manner relative to each other so that each circuit performs a dedicated function. Each output of these circuits is dedicated to a single function that can be independently executed and optimized as needed without excluding other functionality performed by other circuits of the device 100.

[0104] exist Figure 1A and Figure 1B In the figure, electrical connections that pass through different circuits and are represented by dotted lines are not electrically connected to these circuits.

[0105] The device 100 comprises a programmable power supply 104, which is intended to supply different supply potentials and different reference potentials to different circuits of the device 100. The programmable power supply 104 receives a supply potential V DD and reference potential V SS As input, as well as control signals, the Figure 1B The programmable power supply 104 includes a number of outputs on which the programmable power supply 104 generates and delivers a number of pairs of power and reference potentials V DD1 、V SS1 ,…,V DDn 、V SSn (ie n pairs of supply and reference potentials in the examples described herein, where n is an integer greater than or equal to 2.) In particular, the values ​​of these potentials may be parameterized by a control signal "Com_PS" received by the programmable power supply.

[0106] The device 100 also comprises a measurement and control circuit 106 which delivers, for example, a control signal "Com_PS" in the form of a digital signal, as well as other control signals intended to drive a circuit of the device 100 intended to control and protect the power transistor 102 (these other control signals will be described in detail later). Figure 1B In the example shown, these control signals are delivered by a digital control unit 108 forming part of the circuit 106 .

[0107] exist Figure 1B In the example of FIG. 1 , the circuit 106 further comprises a measurement processing unit 110 which receives at input different measurement signals intended to be emitted by the circuit intended to control and protect the power transistor 102. These measurement signals will be described in detail later.

[0108] One of the circuits intended to control and protect the power transistor 102 corresponds to a nominal switching circuit 103 of the power transistor 102, which is configured to control the nominal switching of the power transistor 102 from the conducting state to the non-conducting state, to keep the power transistor 102 in the non-conducting state, and to control the nominal switching of the power transistor 102 from the non-conducting state to the conducting state. As described later, keeping the power transistor 102 in the conducting state will be ensured by another circuit of the device 100.

[0109] exist Figure 1B In the embodiment shown in , the nominal switching circuit 103 comprises a first push-pull circuit formed by two switches, which here correspond to the n-MOSFET 112 and the p-MOSFET 114 .

[0110] The first reference potential V delivered by the programmable power supply 104 SS1 is applied to the source of the n-MOSFET 112, and the drain of the n-MOSFET 112 is coupled to the gate of the power transistor 102 through the first resistor 116. The first power supply potential V delivered by the programmable power supply 104 DD1 is applied to the source of the p-MOSFET 114, and the drain of the p-MOSFET 114 is coupled to the gate of the power transistor 102 via a gate current check diode 117 and a second resistor 118 coupled in series with the diode 117. The diode 117 allows to avoid reverse conduction of the p-MOSFET 114 in the event of a FUL-type short circuit, i.e., to avoid re-injection of the parasitic gate current of the substrate diode of the p-MOSFET 114 when a FUL-type fault occurs and the potential on the gate of the power transistor 102 increases.

[0111] Since the first push-pull circuit is intended to control the switching phase of the power transistor 102 while ensuring a short switching time and minimizing switching losses, the values ​​of the first resistor 116 and the second resistor 118 are selected so as to minimize switching losses or meet, for example, a loss-EMC performance trade-off. For example, the values ​​of the first resistor 116 and the second resistor 118 may be equal to 2Ω and 10Ω, respectively.

[0112] exist Figure 1B In the embodiment shown in FIG. 1 , the nominal switching circuit 103 further includes a first voltage level conversion circuit 120, which includes a first control input, a nominal switching control signal of the power transistor 102 (in Figure 1B The circuit 120 further comprises an output, which is coupled to the gates of the MOSFETs 112 and 114 and to which the control signal of the first push-pull circuit is intended to be delivered, depending on the value of the control signal “Ctrl H / L Fast”. The circuit 120 further comprises a second control input, which is intended to receive a signal from the circuit 106 for setting the first and second outputs of the first push-pull circuit to a high impedance state (in Figure 1B 114). This high impedance state of the first push-pull circuit corresponds to setting the gate voltage of MOSFETs 112, 114 to a floating state. It should be noted that this floating state does not prevent the possibility of reverse conduction of p-MOSFET 114, and diode 117 is coupled to the drain of p-MOSFET 114 to avoid such reverse conduction.

[0113] The circuit 106 controls the nominal switching circuit 103 so that when the power transistor 102 is intended to operate in the nominal switching mode, the nominal switching circuit 103 applies a potential on the gate of the power transistor 102 through the second resistor 118, thereby controlling the switching of the power transistor 102 (from the conducting state to the non-conducting state, or from the non-conducting state to the conducting state) by setting the p-MOSFET transistor 114 in the conducting state and the n-MOSFET transistor 112 in the non-conducting state. The value of the potential applied to the gate of the power transistor 102 during the switching operation is, for example, equal to 20 V. When the power transistor 102 should be kept in the non-conducting state, the nominal switching circuit 103 applies another potential on the gate of the power transistor 102 through the first resistor 116, so that the power transistor 102 is kept in the non-conducting state, in which case the p-MOSFET transistor 114 is set to the non-conducting state and the n-MOSFET transistor 112 is set to the conducting state. The value of the potential applied to the gate of the power transistor 102 during the switching operation is, for example, between -2 V and -5 V.

[0114] Another circuit of the device 100 is configured to keep the power transistor 102 in the on state and detect the voltage V GS If the value increases above the value indicated by V REF_H The high reference voltage value, or voltage V GS If the value drops below the value marked as V REF_L These represent a short circuit of the power transistor 102. Therefore, the further circuit with the reference number 105 forms a circuit for detecting a short circuit of the power transistor 102.

[0115] exist Figure 1B In the embodiment of the short circuit detection circuit 105, the short circuit detection circuit 105 includes a switch 122 (corresponding to Figure 1B ), a so-called first switch, which comprises an output (corresponding to the drain of the p-MOSFET transistor) coupled to the gate of the power transistor 102 via a third resistor 124, which in the embodiment described herein has a value equal to 2 kΩ. The second supply potential V delivered by the programmable power supply 104 DD2 is applied to the source of the p-MOSFET forming the first switch 122 .

[0116] For example, the value of the third resistor 124 may be between 1 kΩ and 5 kΩ. In general, the ratio of the value of the third resistor 124 to the value of the first resistor 116 and the ratio of the value of the third resistor 124 to the value of the second resistor 118 are greater than or equal to 100, thereby facilitating depolarization of the gate voltage in the event of an HSF type short circuit, or overpolarization through an ohmic effect with appropriate detection sensitivity in the event of a FUL type short circuit.

[0117] exist Figure 1B In the embodiment of the present invention, the short circuit detection circuit 105 further includes a second voltage level conversion circuit 126, which includes a control input, which is labeled as "Ctrl Vgs Depolar. / Surpolar. SCdetec." and the input short circuit detection control signal delivered at the output of the circuit 106 is intended to be applied to the control input and is configured to be connected to the control input ( Figure 1BAt least one control signal of the first switch 122 is delivered to an output coupled to the first resistor 124 (in the example of the gate of the MOSFET). With the signal "Ctrl Vgs Depolar. / Surpolar. SCdetec.", the circuit 106 controls the short-circuit detection circuit 105 so that when the power transistor 102 operates in the nominal switching mode, the short-circuit detection circuit 105 applies a potential to the gate of the power transistor 102 through the third resistor 124, thereby controlling the power transistor 102 to remain in the on state by setting the first switch 122 to the on state. During the period when the power transistor 102 remains in the on state, the potential value applied to the gate of the power transistor 102 is, for example, between 15 V and 20 V.

[0118] Figure 3 An example of control signals applied by the nominal switching circuit 103 and the short-circuit detection circuit 105 to the gate of the power transistor 102 is shown. Reference numeral 10 designates a control signal applied by the nominal switching circuit 103 during a switching phase in which the power transistor 102 switches from a non-conducting state to a conducting state between time points t1 and t2 and during a switching phase in which the power transistor 102 switches from a conducting state to a non-conducting state between time points t3 and t4. Reference numeral 20 designates a control signal applied by the short-circuit detection circuit 105, which control signal has a positive value when the power transistor 102 remains in a conducting state.

[0119] In fact, short circuit detection is only effective between time t2 and t3. In fact, between t1 and t2 and between t3 and t4, the nominal switching circuit 103 is activated in parallel with the voltage conversion circuit 126 of the short circuit detection circuit 105. In view of the lower values ​​of the resistors 116, 118, the short circuit detection circuit 105 does not use all of its detection sensitivity. In other words, the time intervals t2-t1 and t4-t3 act as shielding intervals in terms of the detection of any short circuit fault.

[0120] The short circuit detection circuit 105 further includes a first comparator circuit 128. Figure 1B In the example of FIG. 1 , the first comparator circuit 128 includes a gate coupled to the power transistor 102 and thus receiving a gate potential G (or a voltage V GS ) non-inverting input. The first comparator circuit 128 also includes an inverting input, a high reference voltage V REF_H is applied to the inverting input. The first comparator 128 delivers at its output a signal labeled "Vgs Surpolar. / SC detec.", the value of which is between the voltage V GS The value exceeds the high reference voltage V REF_H is positive when the value of is , and it is sent at the input of the measurement processing unit 110 of the circuit 106 .

[0121] When the voltage V GS exceeds the high reference voltage V REF_H , this means that a FUL type short circuit is detected at the level of the power transistor 102. In fact, in the case of such a FUL type short circuit, the transistor experiences a variation dv / dt between its drain and source electrodes causing the potential of its drain to rise relative to its source and, via drain-gate capacitance coupling internal to any power transistor, causing a capacitive current of several hundred mA to flow from the gate of the power transistor 102 to the third resistor 124, which abnormally raises the gate voltage (ohmic overpolarization phenomenon) by one or more volts above the nominal control voltage. Figure 7 The occurrence of such a FUL type short circuit is schematically illustrated in FIG, wherein the arm of the converter 200 to which the transistor 102 belongs is shown and which is subjected to a load fault represented by the resistor 202. Figure 7 In the example shown, the power transistor 102 is in a conducting state with a control voltage Vcde of 18 V applied to its gate, while another power transistor of the arm of the converter 200 (indicated by reference numeral 204) is in a non-conducting state with a control voltage equal to -3 V applied to its gate.

[0122] When the value of the third resistor 124 is much higher than the value of the second resistor 118 (which is the case in the example of values ​​described previously), the short circuit detection circuit 105 may remain active (transistor 122 remains in the on state) during the switching phase triggered by the nominal switching circuit 103 .

[0123] The short circuit detection circuit 105 further includes a second comparator circuit 130. Figure 1B In the example of FIG. 1 , the second comparator circuit 130 includes a low reference voltage V applied thereto. REF_L The non-inverting input of the power transistor 102 is coupled to the gate of the power transistor 102 and thus receives the gate potential V G (or voltage V GS ) is an inverting input of the second comparator 130. The second comparator 130 outputs a signal labeled “VgsDepolar. / SC detec.” When the voltage V GS becomes lower than the low reference voltage V REF_L , the signal value is positive and is sent at the input of the measurement processing unit 110 of the circuit 106 (at Figure 1BIn FIG. 1 , the signals “Vgs Surpolar. / SC detec.” and “Vgs Depolar. / SC detec.” applied at the input of the unit 110 are represented as being applied to the same input of the unit 110 and are indicated by the expression “Vgs Depolarisation − Surpolar. / SC detec.”

[0124] When the voltage V GS becomes lower than the low reference voltage V REF_L This means that an HSF type short circuit is detected at the power transistor 102, because in the case of such an HSF short circuit, the occurrence of a gate leakage current of a heat source of several mA flowing from the third resistor 124 to the gate of the power transistor 102 causes the gate voltage V GS Abnormal drop to several hundred mV below the nominal control voltage (ohmic depolarization phenomenon). Figure 8 The occurrence of such an HSF-type short circuit is schematically illustrated, which shows the arm of the converter 200 to which the transistor 102 belongs, which arm is in this case subject to a control fault (setting the two illustrated power transistors to the conducting state).

[0125] Fig. 9 schematically shows the FUL type (in this case, reference numeral 50 designates V GS evolution) or HSF type (in this case, reference numeral 60 designates V GS The gate voltage V of the power transistor 102 when short-circuited GS evolution.

[0126] The device 100 further comprises a protection circuit 107 which is configured to slowly discharge the gate of the power transistor 102 after detecting a short circuit of the power transistor 102. The protection circuit 107 is of the SSD or “soft shutdown” type. Figure 1B In the embodiment shown in FIG. 1 , the protection circuit 107 includes a MOSFET transistor 132 (in Figure 1B102 is n-type in the embodiment of the present invention), whose gate is coupled to the control element 134 and whose drain is coupled to the gate of the power transistor 102 through a fourth resistor 136. The control element 134 receives at its input a control signal denoted “Cde SSD” sent by the circuit 106. When the short-circuit detection circuit 105 detects a short circuit of the power transistor 102, this control signal “Cde SSD” triggers setting the transistor 132 to a conducting state in order to ensure a safe blocking of the power transistor 102, the gate of the power transistor 102 being slowly discharged to avoid any dangerous overvoltage on its terminals. During this gate discharge, the other channels coupled to the gate of the power transistor 102 are deactivated (the gate driver circuit is set to a high impedance state by control of the signal “Hi-Z Fast” and the switch 122 is set to a non-conducting state).

[0127] exist Figure 1A and Figure 1B In the embodiment shown in , the apparatus 100 further comprises a circuit 109 for monitoring the health of the gate oxide of the power transistor 102. The circuit 109 is configured to:

[0128] - controlling slow switching of the power transistor 102, wherein the switching duration is much longer than the switching duration of the nominal switching pattern, and

[0129] - Measure the voltage V of power transistor 102 during this slow switching GS evolution, and

[0130] - Calculate the measured voltage V GS The evolution of the so-called Miller platform lasts for a period of time.

[0131] To achieve these functions, the circuit 109 for monitoring the health of the gate oxide of the power transistor 102 includes a second push-pull circuit, which is formed, for example, like the first push-pull circuit described above, i.e., formed by an n-MOSFET 138 and a p-MOSFET 140. The third reference potential V delivered by the programmable power supply 104 SS3The third power supply potential VDD3 delivered by the programmable power supply 104 is applied to the source of the p-MOSFET 140, and the drain of the p-MOSFET 140 is coupled to the gate of the power transistor 102 through the current stop diode 143 and the sixth resistor 144, wherein the value of the sixth resistor 144 is equal to 150 Ω in the embodiment described herein. The diode 143 allows to avoid the parasitic gate current re-injection of the substrate diode of the p-MOSFET 140 when a FUL type fault occurs and the potential on the gate of the power transistor 102 increases.

[0132] For example, the values ​​of the fifth resistor 142 and the sixth resistor 144 may be between 100 Ω and 500 Ω. In general, the ratio of the value of the fifth resistor 142 (or the sixth resistor 144) to the value of the first resistor 116 and the ratio of the value of the fifth resistor 142 (or the sixth resistor 144) to the value of the second resistor 118 are greater than or equal to 10.

[0133] exist Figure 1B In the embodiment shown in , the circuit 109 for monitoring the health state of the gate oxide of the power transistor 102 also includes a third voltage level conversion circuit 146, which includes a first control input, to which the slow switching control signal of the power transistor 102 (labeled as "Ctrl H / L Ultra-Slow") is intended to be applied from the circuit 106. The circuit 146 includes an output, which is coupled to the gates of the MOSFETs 138, 140, and to which the control voltage of the second push-pull circuit is intended to be delivered depending on the value of the control signal "Ctrl H / L Ultra-Slow". The circuit 146 also includes a second control input, which is intended to receive a signal from the circuit 106 for setting the output of the second push-pull circuit to a high impedance state, which is labeled as "Hi-Z Monit". This high impedance state of the first push-pull circuit corresponds to setting the gate voltage of the MOSFETs 138, 140 to a floating state. This high impedance state is applied when the power transistor 102 is operating in a nominal switching mode, or after the short circuit detection circuit 105 detects a short circuit in the power transistor and during the gate discharge by the SSD protection circuit 107 after this detection.

[0134] The circuit 109 for monitoring the health of the gate oxide of the power transistor 102 also includes a circuit for measuring the voltage V GS The circuit 148 includes at least one sample-and-hold circuit (in Figure 1B , the circuit 148 is shown in the form of a sample-and-hold circuit) and includes applying a voltage V thereon GS The circuit 148 is an input of and an output delivering the measurement done in the form of a digital signal (so-called "Vgsthmonitor") which is sent at the input of the circuit 106. The circuit 148 may perform other functions such as filtering functions, analog-to-digital conversion functions, and the like.

[0135] This circuit 109 for monitoring the health of the gate oxide of the power transistor 102 is occasionally activated outside of the nominal switching cycle of the power transistor 102. During the activation of this monitoring circuit, other circuits of the device 100 are no longer active (setting the nominal switching circuit to a high impedance state and setting the first switch 122 and the second switch 132 to a non-conducting state).

[0136] Due to the high values ​​of the fifth resistor 142 and the sixth resistor 144, when the monitoring circuit is used, this results in a very low gate current on the power transistor 102, resulting in a very long voltage Vds switching time. This long time is determined by the voltage V GS The so-called plateau voltage (or Miller plateau) on the cell 110 is reflected by the plateau voltage having a stable and low noise shape and a value close to the threshold voltage Vgth of the power transistor 102. This configuration is very suitable for detecting and measuring the magnitude of this threshold in order to estimate the drift state and health state of the gate oxide. For example, the detection of the onset of the plateau voltage can be performed by an analog differentiator circuit integrated into the cell 110.

[0137] Figure 4 The curve 30 shown in FIG. 1 represents the voltage V of the power transistor 102 when the power transistor 102 is slowly switched from the non-conducting state to the conducting state. GS , which is controlled by a circuit 109 for monitoring the health of the gate oxide, thereby allowing its effective threshold voltage Vgth to be determined. The curve shows that during such slow switching between the points in time t5 and t6 at a voltage V GS The so-called plateau voltage appears on the gate of the power transistor 102, and its value is close to the threshold voltage Vgth of the power transistor 102. For comparison, the curve 40 represents the voltage V of the power transistor 102 when the power transistor 102 is switched from the non-conducting state to the conducting state by the nominal switching circuit 103 applying the control voltage Vcde to the gate of the power transistor 102. GS .

[0138] By periodically using the circuit 109 for monitoring the health of the gate oxide of the power transistor 102, it is possible to compare the measurements of the platform voltage obtained and thus track the evolution of the drift of the threshold voltage over a long period of time, i.e. track the aging of the gate oxide of the power transistor 102, thereby allowing a decision to continue or stop using the transistor before it degrades excessively.

[0139] This slow switching performed by the circuit 109 for monitoring the gate oxide health of the power transistor 102 cannot be used at high chopping frequencies because too many losses would be generated. Therefore, the monitoring circuit 109 occasionally performs this slow switching, preferably at low charging current levels, so that the measured Miller plateau voltage is consistent with the threshold voltage Vgsth of the power transistor 102.

[0140] According to a variant of the device 100, the push-pull circuit formed by the switches 138, 140 can be replaced by a single switch, for example a p-MOSFET coupled to a diode 143 and a resistor 144. In this case, the circuit 148 performs the voltage V only by switching the power transistor 102 from a non-conducting state to a conducting state. GS measurement.

[0141] In the particular embodiment described herein, the device 100 also includes another channel formed by a circuit 111 for detecting a permanent leakage current through the gate of the power transistor 102. This detection is relevant to preventing the gate oxide of the power transistor 102 from aging prematurely.

[0142] The circuit 111 for detecting the permanent leakage current through the gate of the power transistor 102 is configured as follows:

[0143] - setting the power transistor 102 to a conducting or non-conducting state, and

[0144] -Measure the evolution of the current on the gate of a power transistor.

[0145] To perform this detection, the circuit 111 for detecting the permanent leakage current through the gate of the power transistor 102 comprises a third push-pull circuit, which is formed, for example, by an n-MOSFET 150 and a p-MOSFET 152, like the first and second push-pull circuits described above. A fourth reference potential Vss4 delivered by the programmable power supply 104 is applied to the source of the n-MOSFET 150, and the drain of the n-MOSFET 150 is coupled to the gate of the power transistor 102 via a seventh resistor 152, the value of which is equal to 1.2 MΩ in the embodiment described herein. The fourth supply potential Vss4 delivered by the programmable power supply 104 is applied to the source of the n-MOSFET 150, and the drain of the n-MOSFET 150 is coupled to the gate of the power transistor 102 via a seventh resistor 152, the value of which is equal to 1.2 MΩ in the embodiment described herein. SS4The current stop diode is applied to the source of the p-MOSFET 152, and the drain of the p-MOSFET 152 is coupled to the gate of the power transistor 102 through the eighth resistor 156, and the value of the eighth resistor 156 is equal to 1 MΩ in the embodiment described herein. Since the value of the eighth resistor 156 is very high relative to the values ​​of other resistors coupled to the gate of the power transistor 102, it is not necessary to couple a current stop diode in series with the eighth resistor 156.

[0146] For example, the values ​​of the seventh resistor 154 and the eighth resistor 156 may be between 10 kΩ and 1 MΩ. In general, the ratio of the value of the seventh resistor 154 (or the eighth resistor 156) to the value of the first resistor 116 and the ratio of the value of the seventh resistor 154 (or the eighth resistor 156) to the value of the second resistor 118 are greater than or equal to 10. 4 .

[0147] exist Figure 1B In the embodiment shown in , the circuit 111 for detecting a permanent leakage current through the gate of the power transistor 102 further comprises a fourth voltage level conversion circuit 158, which comprises a first control input to which a permanent leakage current detection control signal (so-called “Off-Line Ctrl Igss leakage monitor”) is intended to be applied from the circuit 106. The circuit 158 ​​comprises an output, which is coupled to the gates of the MOSFETs 150, 152 and to which the control voltage of the third push-pull circuit is intended to be delivered depending on the value of the control signal “Off-Line Ctrl Igss leakage monitor”. The circuit 158 ​​further comprises a second control input, which is intended to receive a signal from the circuit 106 for setting the output of the third push-pull circuit to a high impedance state (so-called “Hi-Z leak”). This high impedance state of the third push-pull circuit corresponds to setting the gate voltages of the MOSFETs 150 and 152 to a floating state. This high impedance state is applied when the power transistor 102 is operating in a nominal or slow switching mode, or after the short circuit detection circuit 105 detects a short circuit in the power transistor and during gate discharge after this detection.

[0148] The circuit 111 for detecting permanent leakage current through the gate of the power transistor 102 also includes a circuit 160 for high-accuracy measurement of the gate current of the power transistor 102, which includes an input coupled to the terminals of the seventh resistor 154 and the eighth resistor 156. Figure 1BIn FIG. 1 , this circuit 160 is represented by a differential amplifier, the input of which is coupled to the terminals of the eighth resistor 156. The measurement signal delivered at the output of the circuit 160 is applied at the input of the unit 110 and Figure 1B It is labeled as “Igss leakage monitor. / detec.”

[0149] When the power transistor 102 is in a conducting or non-conducting state (preferably in a non-conducting state for a few minutes or hours), a circuit 111 for detecting a permanent leakage current through the gate of the power transistor 102 is used and a measurement is performed at the terminals of the eighth resistor 156 or the seventh resistor 154, respectively. When this detection is performed with the power transistor 102 in a non-conducting state, the detection is non-intrusive, but the gate voltage applied thereto is greatly reduced compared to the conducting state. In all cases of use, a very high resistor (the seventh or eighth resistor) is inserted between the output channel and the gate of the transistor 102 so as to be able to detect a very low permanent leakage current (in the range of about one hundred nA) through the gate of the power transistor 102. During this detection, all other channels of the device 100 are decoupled from the power transistor 102, i.e. the circuits 120 and 146 are set to a high impedance state and the switches 122 and 132 are in a non-conducting state.

[0150] According to a variant of the device 100, the push-pull circuit formed by the switches 150, 152 may be replaced by one single switch, for example a p-MOSFET coupled to the resistor 156 or an n-MOSFET coupled to the resistor 154. In this case, the permanent leakage current detection is performed only when the power transistor 102 is in the conducting state (in the case of the p-MOSFET coupled to the resistor 156) or in the non-conducting state (in the case of the n-MOSFET coupled to the resistor 154).

[0151] The different elements of the device 100 described previously form channels configured to operate in parallel, which switch resistors having different values ​​so as to selectively act to produce a desired effect, including controlling the power transistor 102, monitoring the health of the power transistor 102, or protecting the power transistor 102. All of these resistors are coupled to the gate of the power transistor 102.

[0152] In the above-described embodiment, the switches and push-pull circuits are made using MOSFET transistors, which has the advantage of achieving good integration (in terms of size) of the device 100 while limiting losses. However, other technologies may also be used to make these switches and / or push-pull circuits, for example using bipolar transistors.

[0153] For example, the device 100 can be manufactured in the form of a monolithic fully integrated circuit (such as an ASIC), or in the form of a set of discrete components on a printed circuit board, or in a hybrid form mixing the previous embodiments (monolithic integrated circuit and discrete components) in a proportion defined by the specific situation.

[0154] In the previously described embodiment, the switch 122 of the short circuit detection circuit 105 is coupled to the gate of the power transistor 102 through a single third resistor 124, which is used to detect both HSF type and FUL type short circuits. Alternatively, two different resistors coupled in parallel can be used instead of the single third resistor 124 to distinguish the detection of these two short circuit types. Figure 2 A short circuit detection circuit 105 according to this variant is shown. In this variant, the circuit 105 comprises a resistor 124.1 coupled in series with a first diode 160, enabling a current to flow from the switch 122 to the gate of the power transistor 102, thereby enabling detection of an HSF type short circuit. In parallel with the resistor 124.1 and the first diode 160, the short circuit detection circuit 105 further comprises a further resistor 124.2 coupled in series with a second diode 162, enabling a current to flow from the gate of the power transistor 102 to the switch 122, thereby enabling detection of an FUL type short circuit. Advantageously, the configuration is used to select different resistance values ​​124.1, 124.2, thereby enabling a differentiated selection of the detection of two types of short circuits.

[0155] In the previously described embodiment, the device 100 comprises one single nominal switching circuit 103. In a variant, the device 100 may comprise several nominal switching circuits 103 coupled in parallel to the gate of the power transistor 102. For example, each of these nominal switching circuits 103 comprises a push-pull circuit in which the gate of a MOSFET (e.g. similar to MOSFETs 112, 114) is coupled to a voltage level conversion circuit (e.g. similar to circuit 120), and in which the outputs are each coupled to the gate of the power transistor 102 via a resistor, the value of the resistor being typically below 100 Ω. These resistors are different for each nominal switching circuit 103, i.e. each nominal switching circuit 103 is associated with a pair of resistors specific to it. Such a configuration of the device 100 comprising several nominal switching circuits 103 allows to optimally adapt the switching loss / EMC trade-off according to the variability of the operating point of the charging current, operating voltage and temperature of the power transistor 102.

[0156] In this variant, the power supply and reference potential applied to each nominal switching circuit 103 can be different, which allows adjusting the threshold voltage Vgsth of the power transistor 102 in the conducting or non-conducting state. In fact, a power supply potential with a high value will tend to compensate for negative drifts of the threshold voltage Vgsth, while a power supply potential with a lower value will tend to compensate for positive drifts of this threshold voltage Vgsth. Therefore, alternating or modulating the use of these different power supplies and reference potentials can stabilize the measured threshold voltage Vgsth so that it remains within the desired value range.

[0157] In the previously described embodiment, the diodes 117 and 143 used to avoid reinjection of parasitic gate currents advantageously correspond to Zener diodes or transient diodes, which allow protecting the gate of the power transistor 102 from overvoltages that may occur during a FUL type short circuit with a delay in blocking the power transistor 102. Alternatively, other types of elements may be used to protect the gate of the transistor 102, in which case the diodes 117 and 143 may comprise standard power diodes.

[0158] As a variation of the previously described embodiment, it is possible that the device 100 does not comprise all previously described circuits. Thus, it is possible that the device 100 does not comprise the circuit 109 for monitoring the gate oxide health state and / or the permanent leakage current detection circuit 111.

[0159] Advantageously, the device 100 is used to control and protect power transistors of a power converter 200 used in an aircraft 300, for example Figure 6 as shown in .

Claims

1. A device (100) for controlling and protecting a power transistor (102), comprising at least: - a nominal switching circuit (103) of the power transistor (102), the nominal switching circuit (103) being configured to control nominal switching of the power transistor (102) from a conducting state to a non-conducting state, to maintain the power transistor (102) in a non-conducting state, and nominal switching of the power transistor (102) from a non-conducting state to a conducting state; - a short circuit detection circuit (105), the short circuit detection circuit (105) being configured to keep the power transistor (102) in an on state and to detect a voltage V of the power transistor (102) GS increases above the high reference voltage, or the voltage V GS The value of drops below the value of the low reference voltage, which indicates a short circuit of the power transistor (102); - a protection circuit (107) configured to discharge the gate of the power transistor (102) after detecting a short circuit of the power transistor (102); - a measurement and control circuit (106) configured to deliver control signals at the inputs of the nominal switching circuit (103), the short circuit detection circuit (105) and the protection circuit (107) so that: In the absence of a short circuit being detected, an input of a protection circuit (132, 134) coupled to the gate of the power transistor (102) is set to a high impedance state; In the event that a short circuit is detected, the output of the nominal switching circuit (103) coupled to the gate of the power transistor (102) and the short circuit detection circuit (105) are both set to a high impedance state.

2. The control and protection device (100) according to claim 1, wherein the nominal switching circuit (103) comprises at least: a first push-pull circuit (112, 114), the first push-pull circuit (112, 114) comprising a first output configured to be coupled to the gate of the power transistor (102) via a first resistor (116) and a second output configured to be coupled to the gate of the power transistor (102) via at least one second resistor (118); - a first voltage level conversion circuit (120), the first voltage level conversion circuit (120) comprising at least one first control input and a second control input, the nominal switching control signal being intended to be applied from the measurement and control circuit (106) to the at least one first control input, the signal for setting the first output and the second output of the first push-pull circuit (112, 114) to a high impedance state being intended to be applied from the measurement and control circuit (106), and the first voltage level conversion circuit (120) being configured to deliver the signal for controlling the first push-pull circuit (112, 114) on an output coupled to the control input of the first push-pull circuit (112, 114).

3. The control and protection device (100) according to one of the preceding claims, wherein the short-circuit detection circuit (105) comprises at least: - a first switch (122) comprising an output configured to be coupled to the gate of the power transistor (102) via a third resistor (124); a second voltage level conversion circuit (126) comprising at least one control input to which the short circuit detection control signal is intended to be applied from the measurement and control circuit (106), and the second voltage level conversion circuit (126) being configured to deliver a signal for controlling the first switch (122) at an output coupled to the control input of the first switch (122); a first comparator circuit (128) configured to deliver, at an input of the measurement and control circuit (106), a voltage V representative of the power transistor (102) GS a signal of the difference between the value of and the value of a high reference voltage; - a second comparator circuit (130) configured to deliver, at the input of the measurement and control circuit (106), a voltage V representative of the power transistor (102) GS A signal that is the difference between the value of and the value of a low reference voltage.

4. The control and protection device (100) according to one of the preceding claims, wherein the protection circuit (107) comprises a second switch (132), the second switch (132) comprising an input and an output, the input being configured to be coupled to the gate of the transistor power (102) via a fourth resistor (136) and the output being configured to be coupled to a reference potential.

5. The control and protection device (100) according to one of the preceding claims, further comprising a circuit (109) for monitoring the health state of a gate oxide of the power transistor (102), the circuit (109) being configured to: - controlling slow switching of the power transistor (102), wherein the switching duration is longer than the nominal switching duration, and - measuring the voltage V of the power transistor (102) during the slow switching of the power transistor (102) GS evolution, and - Calculate the measured voltage V GS The duration of the so-called Miller plateau during the evolution of and wherein the measurement and control circuit (106) is configured to deliver a control signal such that: - when the power transistor (102) is controlled by the nominal switching circuit (103) or the short circuit detection circuit (105), the outputs of the monitoring circuit (109) configured to be coupled to the gate of the power transistor (102) are all set to a high impedance state; - During the slow switching of the power transistor (102), the outputs of the nominal switching circuit (103) and the short circuit detection circuit (105) and the input of the protection circuit (107) are set to a high impedance state.

6. The control and protection device (100) according to claim 5, wherein the monitoring circuit (109) comprises at least: - a second push-pull circuit (138, 140), the second push-pull circuit (138, 140) comprising a first output configured to be coupled to the gate of the power transistor (102) via a fifth resistor (142) and a second output configured to be coupled to the gate of the power transistor (102) via at least one sixth resistor (144); a third voltage level conversion circuit (146), the third voltage level conversion circuit (146) comprising at least a first control input and a second control input, the monitoring control signal being intended to be applied from the measurement and control circuit (106) to the first control input, the signal for setting the first output and the second output of the second push-pull circuit (138, 140) to a high impedance state being intended to be applied from the measurement and control circuit (106), and the third voltage level conversion circuit (146) being configured to deliver a signal for controlling the second push-pull circuit (138, 140) at an output coupled to the control input of the second push-pull circuit (138, 140); A voltage measurement circuit (148) comprising at least one sample-and-hold circuit, an input of the at least one sample-and-hold circuit being configured to be coupled to a gate of the power transistor (102).

7. The control and protection device (100) according to claims 2 and 6, further comprising: A first current check diode (117), the first current check diode (117) and a second resistor (118) are coupled in series between the second output of the first push-pull circuit (112, 114) and the gate of the power transistor (102); and a second current check diode (143), the second current check diode (143) and a sixth resistor (144) are coupled in series between the second output of the second push-pull circuit (138, 140) and the gate of the power transistor (102).

8. The control and protection device (100) according to one of the preceding claims, further comprising a circuit (111) for detecting a permanent leakage current through the gate of the power transistor (102), the circuit (111) being configured to: - setting the power transistor (102) to a conducting or non-conducting state, and - measuring the evolution of the current on the gate of the power transistor (102), and wherein the measurement and control circuit (106) is configured to deliver a control signal such that: - when the power transistor (102) is controlled by the nominal switching circuit (103) or the short-circuit detection circuit (105), or when the control and protection device (100) comprises a monitoring circuit (109), the output of the permanent leakage current detection circuit (111) is set to a high impedance state; - When a permanent leakage current is detected, the nominal switching circuit (103), the short circuit detection circuit (105) and, when the control and protection device (100) comprises a monitoring circuit (109), the output of the monitoring circuit (109) and the input of the protection circuit (107) are all set to a high impedance state.

9. The control and protection device (100) according to claim 8, wherein the permanent leakage current detection circuit (111) comprises at least: - a third push-pull circuit (150, 152), the third push-pull circuit (150, 152) comprising a first output configured to be coupled to the gate of the power transistor (102) through a seventh resistor (154) and a second output configured to be coupled to the gate of the power transistor (102) through an eighth resistor (156); a fourth voltage level conversion circuit (158), the fourth voltage level conversion circuit (158) comprising at least one first control input and a second control input, the permanent leakage current detection control signal being intended to be applied from the measurement and control circuit (106) to the at least one first control input, the signal for setting the first output and the second output of the third push-pull circuit (150, 152) to a high impedance state being intended to be applied from the measurement and control circuit (106), and the fourth voltage level conversion circuit (158) being configured to deliver a signal for controlling the third push-pull circuit (150, 152) at an output coupled to the control input of the third push-pull circuit (150, 152); A circuit (160) for measuring the gate current of the power transistor (102), the input of the circuit (160) being coupled to a terminal of the seventh resistor (154) and a terminal of the eighth resistor (156).

10. A power converter or module (200) comprising a plurality of power transistors and at least one control and protection device (100) according to one of the preceding claims, the control and protection device (100) being coupled to one of the power transistors (102).

11. An aircraft (300) comprising at least one power converter or module (200) according to claim 10.

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