Current precision processing circuit, current precision processing system, power reading circuit and power reading system

Abstract

The invention relates to the technical field of server power consumption, and discloses a current precision processing circuit and system and a power reading circuit and system.The current precision processing circuit comprises a signal processing module, a voltage error calculation module and an error compensation module, the voltage error calculation module calculates the ground wire voltage of an ADC collection module and the ground wire voltage of Efuse, and the error compensation module compensates the ground wire voltage of the ADC collection module and the ground wire voltage of Efuse; the method comprises the following steps of: obtaining a voltage error compensation value by an error compensation module, and compensating an analog current value output by Efuse by using the voltage error compensation value by the error compensation module, so that the Gnd level of the Efuse and the Gnd level of the ADC acquisition module are consistent as far as possible, and the problem that the BMC power consumption is inaccurate to read due to loss of Imon current acquired by the ADC acquisition module caused by GND voltage difference brought by PCB impedance is solved. Efuse is required to be placed close to an ADC (Analog to Digital Converter) acquisition module, otherwise, the power consumption monitoring precision cannot be ensured.

Description

Technical Field

[0001] The present invention relates to the technical field of server power consumption, and in particular to a current accuracy processing circuit and system, and a power reading circuit and system. Background Art

[0002] With the development of artificial intelligence and big data technology, the power consumption of servers is increasing. Monitoring server power consumption is essential for modern data centers and cloud computing environments. Monitoring server power consumption not only helps reduce costs and improve environmental sustainability, but also optimizes performance, prevents failures, meets compliance requirements, and promotes technological innovation. It is an indispensable part of modern data centers and cloud computing environments. High-precision power consumption monitoring can more accurately calculate and predict energy consumption, thereby helping data center managers to more effectively control operating costs. Summary of the invention

[0003] In view of this, the present invention provides a current accuracy processing circuit and system, and a power reading circuit and system to solve the problem of how to provide power consumption reading accuracy.

[0004] In a first aspect, the present invention provides a current accuracy processing circuit, which is applied to a power reading circuit of an Efuse. The power reading circuit includes an ADC acquisition module, and the current accuracy processing circuit includes: a signal processing module, a voltage error calculation module, and an error compensation module, wherein a first end of the signal processing module is connected to a ground line of the ADC acquisition module of the Efuse, a second end of the signal processing module is connected to a first end of the voltage error calculation module, the signal processing module is used to collect the ground line voltage of the ADC acquisition module and process it; a second end of the voltage error calculation module is connected to the ground line of the Efuse, and the voltage error compensation module is used to obtain a voltage error compensation value based on the ground line voltage of the ADC acquisition module and the ground line voltage of the Efuse; a first end of the error compensation module is connected to an analog current output end of the Efuse, a second end of the error compensation module is connected to a third end of the voltage error calculation module, a third end of the error compensation module is connected to a current acquisition input end of the ADC acquisition module, and the error compensation module is used to compensate the analog current value output by the Efuse using the voltage error compensation value.

[0005] The voltage error calculation module of the present invention calculates the ground voltage of the ADC acquisition module and the ground voltage of the Efuse to obtain a voltage error compensation value. The error compensation module uses the voltage error compensation value to compensate for the analog current value output by the Efuse, so that the Gnd levels of the Efuse and the ADC acquisition module are as consistent as possible, compensating for the GND voltage difference caused by the PCB impedance, which causes the Imon current collected by the ADC acquisition module to be inaccurate, thereby causing the BMC power consumption to be read inaccurately, requiring the Efuse to be placed close to the ADC acquisition module, otherwise the power consumption monitoring accuracy cannot be guaranteed. Through the present invention, it is not necessary to place the Efuse and the ADC acquisition module close to each other, and the power consumption monitoring accuracy can also be guaranteed.

[0006] The present invention compensates the analog current before the analog current enters the ADC acquisition module, thereby solving the problem of only one Efuse protection for power consumption monitoring, the need to debug the calibration coefficient through back-board testing, and the need for BMC correction, resulting in low efficiency.

[0007] In an optional embodiment, the signal processing module includes: a single-ended to differential circuit and a differential to single-ended circuit, wherein the first end of the single-ended to differential circuit is connected to the ground wire of the ADC acquisition module, and the second and third ends of the single-ended to differential circuit are correspondingly connected to the first and second ends of the differential to single-ended circuit; the third end of the differential to single-ended circuit is connected to the first end of the voltage error calculation module.

[0008] In an optional implementation, the voltage error calculation module includes: a first resistor, a second resistor, a third resistor, a fourth resistor, and a subtractor, wherein the negative input terminal of the subtractor is connected to the first end of the first resistor and the first end of the second resistor, and the positive input terminal of the subtractor is connected to the first end of the third resistor and the first end of the fourth resistor; the second end of the first resistor is connected to the ground wire of Efuse; the second end of the second resistor is connected to the output end of the subtractor and the second end of the error compensation module; the second end of the third resistor is connected to the second end of the signal processing module; and the second end of the fourth resistor is grounded.

[0009] In an optional implementation, the subtractor is a comparator, the inverting input terminal of the comparator is the negative input terminal of the subtractor, the non-inverting input terminal of the comparator is the positive input terminal of the subtractor, and the output terminal of the comparator is the output terminal of the subtractor.

[0010] In an optional embodiment, the error compensation module includes: a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor and an operational amplifier, wherein the non-inverting input terminal of the operational amplifier is connected to the first end of the fifth resistor and the first end of the sixth resistor, and the non-inverting input terminal of the operational amplifier is connected to the first end of the seventh resistor and the first end of the eighth resistor; the second end of the fifth resistor is connected to the analog current output terminal of Efuse; the second end of the sixth resistor is connected to the third end of the voltage error calculation module; the second end of the seventh resistor is grounded; and the second end of the eighth resistor is connected to the output terminal of the operational amplifier and the current acquisition input terminal of the ADC acquisition module.

[0011] In an optional implementation, the ground wire of the Efuse is connected to the second end of the voltage error calculation module by routing through layers, and the ground wire of the Efuse needs to avoid other ground wires and ground planes.

[0012] In order to ensure the accuracy of the current, the present invention avoids voltage types with the same properties when drilling through the layer, thereby further ensuring the accuracy of the current and voltage collected by the ADC acquisition module.

[0013] In a second aspect, the present invention provides a current accuracy processing system, comprising: a plurality of current accuracy processing circuits of the first aspect and any optional implementation manner thereof, wherein the third end of each error compensation module is connected to a current acquisition input end of an ADC acquisition module; and each current accuracy processing circuit is used to compensate for an analog output current of an Efuse.

[0014] In a third aspect, the present invention provides a power reading circuit, comprising: the current accuracy processing circuit of the first aspect and any optional implementation manner thereof, an ADC acquisition module, and a BMC reading calibration module, wherein the ADC acquisition module is a single-channel module, wherein the input end of the ADC acquisition module also inputs the power supply end voltage of the Efuse, and the ADC acquisition module is used to obtain the power supply voltage of the Efuse and the compensated analog output current of the Efuse; the input end of the BMC reading calibration module is connected to the output end of the ADC acquisition module, and the BMC reading calibration module is used to read multiple groups of power supply voltages of Efuse and the compensated analog output current of Efuse, and establish a filtering mechanism to screen multiple groups of power supply voltages of Efuse and the compensated analog output current of Efuse, and use the remaining multiple groups of power supply voltages of Efuse and the compensated analog output current of Efuse to obtain the average power supply voltage and the average analog output current of Efuse, and then calculate the power of Efuse.

[0015] In a fourth aspect, the present invention provides a power reading system, comprising: the current accuracy processing system of the second aspect, an ADC acquisition module, and a BMC reading calibration module, wherein the ADC acquisition module is a multi-channel module, wherein a voltage acquisition input terminal of the ADC acquisition module is also connected to the power supply terminal voltage of an Efuse, and the ADC acquisition module is used to obtain the power supply voltage of each Efuse and the analog output current of each compensated Efuse; the input terminal of the BMC reading calibration module is connected to each output terminal of the ADC acquisition module, and for each Efuse, the BMC reading calibration module is used to read the power supply voltage of multiple groups of Efuse and the analog output current of the compensated Efuse, and establish a filtering mechanism to screen the power supply voltage of multiple groups of Efuse and the analog output current of the compensated Efuse, and use the power supply voltage of the remaining multiple groups of Efuse and the analog output current of the compensated Efuse to obtain the average power supply voltage and the average analog output current of the Efuse, and then calculate the power of the Efuse.

[0016] In an optional implementation, a voltage acquisition input terminal of the ADC acquisition module is connected to a power supply terminal of an Efuse by using a same-attribute perforation avoidance method, and the connection line between the two needs to avoid the same voltage type connection line. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0018] Figure 1 This is a related technical solution 1 according to an embodiment of the present invention;

[0019] Figure 2 This is a related technical solution 2 according to an embodiment of the present invention;

[0020] Figure 3 is a composition diagram of a current accuracy processing circuit according to an embodiment of the present invention;

[0021] Figure 4 is a composition diagram of another current accuracy processing circuit according to an embodiment of the present invention;

[0022] Figure 5 is a composition diagram of another current accuracy processing circuit according to an embodiment of the present invention;

[0023] Figure 6 is a composition diagram of another current accuracy processing circuit according to an embodiment of the present invention;

[0024] Figure 7 is a composition diagram of a current precision processing system according to an embodiment of the present invention;

[0025] Figure 8 is a composition diagram of a power reading circuit according to an embodiment of the present invention;

[0026] Fig. 9 is a diagram showing the composition of a power reading system according to an embodiment of the present invention. DETAILED DESCRIPTION

[0027] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.

[0028] In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first", "second", and "third" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance.

[0029] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, it can also be the internal connection of two components, it can be a wireless connection, or it can be a wired connection. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0030] In addition, the technical features involved in the different embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0031] With the development of artificial intelligence and big data technology, the power consumption of servers is increasing. Monitoring server power consumption is essential for modern data centers and cloud computing environments. Monitoring server power consumption not only helps reduce costs and improve environmental sustainability, but also optimizes performance, prevents failures, meets compliance requirements, and promotes technological innovation. It is an indispensable part of modern data centers and cloud computing environments. High-precision power consumption monitoring can more accurately calculate and predict energy consumption, thereby helping data center managers to more effectively control operating costs.

[0032] With accurate data, more sophisticated energy management strategies can be implemented; the power consumption of the server has a direct impact on its operating temperature and stability. By accurately monitoring power consumption, excessive power consumption can be discovered and adjusted in a timely manner to avoid performance degradation or failure caused by overheating of the equipment, thereby extending the service life of the equipment and ensuring stable operation of the system.

[0033] In cloud computing and large-scale data centers, accurate power consumption data is crucial for dynamic resource scheduling. It can help data centers flexibly adjust the operating status of servers (such as CPU frequency, memory usage, etc.) according to current load and energy consumption, achieve efficient resource utilization, and maintain the best balance between cost and performance.

[0034] In short, the accuracy of server power consumption is of great significance for improving data center operational efficiency, reducing costs, enhancing environmental sustainability, ensuring equipment stability and security, promoting technological innovation, and meeting compliance requirements.

[0035] There are two main solutions for reading power consumption in related technologies, as follows:

[0036] like Figure 1 As shown, Figure 1 This is the first related technical solution. The current and voltage of this P12V are obtained by using a power consumption display chip with a precision resistor. The power register inside the display chip can calculate the power consumption, and the BMC accesses the power register of the display chip through I2C to obtain the power consumption of this power supply. The power consumption monitoring of other multiple power supplies on the server motherboard can be achieved by using multiple display chips with precision resistors.

[0037] However, the disadvantage of the first technical solution is that the power consumption of current servers is getting higher and higher. Multiple precision resistors are placed on the server board. The current flowing through the precision resistors will cause a large loss. This loss always exists and cannot be avoided. At the same time, the precision resistor package size is large, the board area is large, and the wiring layout space requirements are very high. Boards with small space cannot use this solution for power consumption monitoring.

[0038] like Figure 2 As shown, Figure 2This is the second related technical solution. By connecting the input of Efuse and Imon (current detection pin) to a separate ADC chip pin (or directly to the ADC pin inside the BMC), the BMC accesses the ADC chip through I2C to obtain the voltage and current of this power supply, and converts the voltage and current to obtain the power consumption of this power supply. The power consumption monitoring of other multiple power supplies on the server motherboard can be achieved by connecting the Imon and P12V of multiple Efuse chips to the relevant pins of the ADC chip.

[0039] However, the disadvantage of the second related technical solution is that the current Imon signal of the Efuse is transmitted as a single-ended voltage signal on the transmission path, and at the same time, most domestic ADC chips only support single-ended signals to be transmitted to the ADC chip. In order to ensure the accuracy of power consumption reading, the application scenarios of the power consumption monitoring of the second related technical solution are limited. The specific restricted scenarios are: (1) The placement of the Efuse and the ADC chip should be as close as possible. (2) The ADC chip cannot be placed on the high-current power supply path of the Efuse, especially on the high-current return path of another Efuse.

[0040] The reasons for the restricted scenarios are as follows:

[0041] 1. Considering that PCB has impedance, if Efuse and ADC chip are placed far away, the power goes from the power supply end to the load end, and GND returns from the load end to the power supply end. The voltage plane of GND is different at the load end and the power supply end. The Imon signal is a voltage-type signal transmission, and the GND of Imon at Efuse will be lower than the GND level at the ADC chip. Therefore, the Imon voltage obtained by subtracting the GND at the ADC from the Imon signal at the ADC chip is smaller than the Imon voltage at Efuse. Therefore, the current monitored at the ADC is smaller than the current actually sensed by the E-fuse. The power consumption is converted by the current, which is reflected in the power consumption and causes a large accuracy deviation. Therefore, the Efuse and ADC chip should be placed as close as possible.

[0042] 2. If the whole board has only one Efuse protection for power consumption monitoring, in this case, the ADC chip or BMC ADC is placed far away from the Efuse, but also on the return path of the power supply, considering that the PCB impedance is constant. In this scenario, the current conversion coefficient of Imon can be measured by loading the GND deviation of the Efuse chip and the ADC chip. For example, 3-phase Efuses are connected in parallel, and the Imon signal is a conversion coefficient of 150mV / V. Considering the GND deviation, the current at the ADC chip will be smaller, and the calibration coefficient may be 155mV / V. This value is corrected by the actual load test to correct the calibration coefficient, and then corrected by BMC.

[0043] For server motherboards, it is rare to use only one E-fuse for protection on the entire board. In addition, the calibration coefficient needs to be debugged after actual testing and corrected through the BMC, which makes power consumption monitoring development inefficient.

[0044] 3. If the whole board has multiple Efuse protections for power consumption monitoring, the ADC chip or BMC is placed far away from the Efuse chip, and the ADC chip is on the return path of other Efuse power supplies, in this scenario, the GND voltage difference caused by the PCB impedance is caused by other loads, and the BMC cannot be corrected by adjusting the calibration coefficient of the load and the GND voltage difference. Similarly, the whole board has multiple Efuse protections for power consumption monitoring, but the multiple Efuses are not placed together. In this scenario, a single ADC chip cannot be placed close to multiple Efuse chips, and the ADC chip will be affected by the return of other E-fuse power supplies and cannot be corrected by the BMC. The accuracy of power consumption monitoring is very poor and cannot be guaranteed.

[0045] Based on this, a current accuracy processing circuit is provided in this embodiment. The current accuracy processing circuit is applied to the power reading circuit of Efuse. The power reading circuit includes an ADC acquisition module, such as Figure 3 As shown, the current accuracy processing circuit includes: a signal processing module, a voltage error calculation module, and an error compensation module.

[0046] like Figure 3 As shown, the first end of the signal processing module is connected to the ground line of the ADC acquisition module of Efuse, and the second end of the signal processing module is connected to the first end of the voltage error calculation module. The signal processing module is used to collect the ground line voltage of the ADC acquisition module and process it.

[0047] Specifically, in the transmission line, the signal processing module mainly converts the single-ended input signal into a differential signal, and converts the differential signal into a single-ended signal before outputting it to the voltage error calculation module, thereby more effectively preventing the GND signal of the ADC acquisition module from being interfered with by other signals.

[0048] like Figure 3 As shown, the second end of the voltage error calculation module is connected to the ground line of Efuse, and the voltage error compensation module is used to obtain a voltage error compensation value based on the ground line voltage of the ADC acquisition module and the ground line voltage of Efuse.

[0049] Specifically, since the ADC acquisition module is placed on the return path, the Efuse and ADC acquisition module Gnd levels are inconsistent. Therefore, a voltage error calculation module is set to calculate the voltage difference between the two Gnd terminals, and compensate the analog output current of Efuse according to the voltage difference before entering the ADC acquisition module, thereby eliminating the need for calibration through the BMC after testing.

[0050] like Figure 3 As shown, the first end of the error compensation module is connected to the analog current output end of Efuse, the second end of the error compensation module is connected to the third end of the voltage error calculation module, the third end of the error compensation module is connected to the current acquisition input end of the ADC acquisition module, and the error compensation module is used to compensate the analog current value output by Efuse using the voltage error compensation value.

[0051] Specifically, in the error compensation module, the Efuse and ADC acquisition module Gnd levels will cause current deviation. The error compensation module uses the voltage error to compensate for the analog current of Efuse, that is, the Imon voltage of Efuse plus the GND deviation caused by PCB impedance to ensure that the current received at the ADC acquisition module is equal to the analog output current at Efuse, that is, to ensure that the Imon level of Efuse is consistent with the Imon level transmitted to the ADC, and to ensure the accuracy of the analog current received by the ADC acquisition module.

[0052] In some optional embodiments, such as Figure 4 As shown, the signal processing module includes: a single-ended to differential circuit and a differential to single-ended circuit.

[0053] like Figure 4 As shown, the first end of the single-ended to differential circuit is connected to the ground line of the ADC acquisition module, the second end and the third end of the single-ended to differential circuit are correspondingly connected to the first end and the second end of the differential to single-ended circuit; the third end of the differential to single-ended circuit is connected to the first end of the voltage error calculation module.

[0054] Specifically, the single-ended to differential circuit is used to convert the ground voltage of the single-ended ADC acquisition module into the ground voltage of the differential ADC acquisition module, and the differential to single-ended circuit is used to convert the ground voltage of the differential ADC acquisition module into the ground voltage of the single-ended ADC acquisition module.

[0055] Optionally, the single-ended to differential circuit and the differential to single-ended circuit can be implemented using an operational amplifier, which will not be described in detail here.

[0056] Optionally, a filtering link may be added to the signal processing module, wherein the filtering link may be differential mode suppression, common mode suppression, etc., to further resist interference.

[0057] In some optional embodiments, such as Figure 5 As shown, the voltage error calculation module includes: a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, and a subtractor U1, wherein the negative input end of the subtractor U1 is connected to the first end of the first resistor R1 and the first end of the second resistor R2, and the positive input end of the subtractor U1 is connected to the first end of the third resistor R3 and the first end of the fourth resistor R4; the second end of the first resistor R1 is connected to the ground wire of Efuse; the second end of the second resistor R2 is connected to the output end of the subtractor U1 and the second end of the error compensation module; the second end of the third resistor R3 is connected to the second end of the signal processing module; and the second end of the fourth resistor R4 is grounded.

[0058] Specifically, the voltage error calculation module connects the ground voltage of Efuse to the negative input terminal of the subtractor U1 with a single-ended trace, and connects the ground voltage of the ADC acquisition module to the positive input terminal of the subtractor U1 with a single-ended trace, and obtains the instantaneous GND deviation at the beginning of Efuse and the ADC acquisition module through the output of the differential subtractor U1.

[0059] For example, Figure 5 As shown, the subtractor U1 is a comparator, the inverting input terminal of the comparator is the negative input terminal of the subtractor U1, the non-inverting input terminal of the comparator is the positive input terminal of the subtractor U1, and the output terminal of the comparator is the output terminal of the subtractor U1. However, this is only an example and is not intended to be limiting.

[0060] In some optional embodiments, such as Figure 6 As shown, the error compensation module includes: a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8 and an operational amplifier U2, wherein the same-direction input terminal of the operational amplifier U2 is connected to the first end of the fifth resistor R5 and the first end of the sixth resistor R6, and the reverse input terminal of the operational amplifier U2 is connected to the first end of the seventh resistor R7 and the first end of the eighth resistor R8; the second end of the fifth resistor R5 is connected to the analog current output terminal of Efuse; the second end of the sixth resistor R6 is connected to the third end of the voltage error calculation module; the second end of the seventh resistor R7 is grounded; and the second end of the eighth resistor R8 is connected to the output end of the operational amplifier U2 and the current acquisition input end of the ADC acquisition module.

[0061] Specifically, the operational amplifier U2 here is actually a common-phase summing adder, which adds the voltage error to the analog current actually output by Efuse to obtain the IN1 voltage, that is, after compensating the voltage corresponding to the analog current with the error voltage, it is transmitted to the IN1 pin of the ADC acquisition module. At this time, the IN1 voltage is the actual analog current of Efuse.

[0062] Specifically, the voltage error calculation module connects the GND signal to the comparator, which is actually the operational amplifier U2, and connects the Imon signal of Efuse and the error voltage to the input pin of the operational amplifier U2. Due to the input high-frequency characteristics of the operational amplifier U2, it ensures that there is no interference between the GND signal, the Imon signal of Efuse and the error voltage signal, and it will not affect the Imon accuracy and startup current sharing characteristics of the previous Efuse.

[0063] Specifically, Figure 6 The circuit structure shown is only for example, but not for limitation.

[0064] In some optional implementations, the ground wire of the Efuse is connected to the second end of the voltage error calculation module by routing through layers, and the ground wire of the Efuse needs to avoid other ground wires and ground planes.

[0065] Specifically, the GND single-ended routing for the GND voltage at the E-fuse and ADC must inevitably pass through layers on the PCB. Here, vias must be avoided when passing through the GND layer, and the large ground plane must not be connected to it. The GND signal must be routed through layers, etc. The purpose is to ensure that the GND signal is not interfered with by other signals, and the GND signal received by the voltage error calculation module is already a clean and undisturbed GND signal.

[0066] Optionally, signal transmission on the path, such as Imon signal and GND signal, can be surrounded by a circle of GND to isolate the transmission signal, thereby preventing interference from other signals.

[0067] In this embodiment, a current accuracy processing system is provided, comprising: a current accuracy processing circuit of multiple of the above embodiments and any optional implementation manner thereof, wherein the third end of each error compensation module is connected to a current acquisition input end of an ADC acquisition module; and each current accuracy processing circuit is used to compensate for an analog output current of an Efuse.

[0068] For example, Figure 7 As shown, Figure 7 Taking two current accuracy processing circuits as an example, the Imon signals of multiple groups of Efuse are connected to the same ADC acquisition module to monitor the power consumption of multiple loads. Each Efuse adopts an error compensation module to ensure that the Imon signals of multiple Efuse transmissions obtained at the ADC acquisition module are compensated for the GND deviation. This solves the problem that the ADC acquisition module cannot be placed close to a certain Efuse and is placed on another return path, and the power consumption accuracy cannot be calibrated through the BMC code.

[0069] Specifically, each Efuse adopts the above current accuracy processing circuit, and the ADC acquisition module collects the voltage and current of each Efuse, thereby solving the problem that multiple Efuses provide protection and power consumption monitoring and are connected to the same multi-channel ADC acquisition module. Because multiple Efuses are placed far away, a single multi-channel ADC acquisition module cannot be placed close to all Efuses, and the ADC acquisition module is placed on the return path. Due to the PCB impedance, the Imon voltage-type signal is transmitted to the ADC acquisition module position, and the voltage is inconsistent with the Imon of the Efuse. The voltage inconsistency problem caused by this GND level difference cannot be calibrated and optimized through the BMC, and the power consumption accuracy is very poor.

[0070] Specifically, when multiple Efuse power consumption monitoring is connected to the same ADC acquisition module, multiple voltage error calculation modules and error compensation modules are used to achieve current accuracy processing. It should be noted that when the GND sensing line is punched through the layer, it must be avoided from connecting to any GND on the path. When encountering the GND plane, the GND line through the layer should be hollowed out to avoid it. This is also a crucial step for this solution to maintain the GND compensation accuracy.

[0071] In this embodiment, a power reading circuit is provided. Figure 8 As shown, it includes: the current accuracy processing circuit of the above embodiment and any optional implementation manner thereof, the ADC acquisition module, and the BMC reading calibration module, and the ADC acquisition module is a single-channel module.

[0072] like Figure 8 As shown, the input end of the ADC acquisition module also inputs the power supply end voltage of the Efuse, and the ADC acquisition module is used to obtain the power supply voltage of the Efuse and the compensated analog output current of the Efuse.

[0073] like Figure 8 As shown, the input end of the BMC read calibration module is connected to the output end of the ADC acquisition module. The BMC read calibration module is used to read the power supply voltage of multiple groups of Efuse and the analog output current of the compensated Efuse, and establish a filtering mechanism to filter the power supply voltage of multiple groups of Efuse and the analog output current of the compensated Efuse. The power supply voltage of the remaining multiple groups of Efuse and the analog output current of the compensated Efuse are used to obtain the average power supply voltage and the average analog output current of the Efuse, and then the power of the Efuse is calculated.

[0074] Specifically, the BMC reads the current and voltage signals collected by the calibration module through I2C. The BMC reads the calibration module and polls and reads multiple sets of values ​​of the voltage and current registers of the ADC acquisition module. By establishing a filtering mechanism, 10 data are taken, the maximum and minimum values ​​are excluded, and the remaining data is averaged to represent the voltage and current information at this time, and the power consumption information is calculated based on this. Ensuring the reading accuracy of the BMC read calibration module is also an important part of improving accuracy.

[0075] In this embodiment, a power reading system is provided. Fig. 9 As shown, it includes: the current accuracy processing system of the above embodiment, an ADC acquisition module, and a BMC reading calibration module. The ADC acquisition module is a multi-channel module, wherein: Fig. 9 Take two Efuses as an example.

[0076] like Fig. 9 As shown, a voltage acquisition input terminal of the ADC acquisition module is also connected to a power supply terminal voltage of an Efuse, and the ADC acquisition module is used to obtain the power supply voltage of each Efuse and the analog output current of each compensated Efuse.

[0077] like Fig. 9 As shown, the input end of the BMC read calibration module is connected to each output end of the ADC acquisition module. For each Efuse, the BMC read calibration module is used to read the power supply voltage of multiple groups of Efuse and the analog output current of the compensated Efuse, and establish a filtering mechanism to filter the power supply voltage of multiple groups of Efuse and the analog output current of the compensated Efuse. The power supply voltage of the remaining multiple groups of Efuse and the analog output current of the compensated Efuse are used to obtain the average power supply voltage and the average analog output current of the Efuse, and then the power of the Efuse is calculated.

[0078] Specifically, the BMC reads the current and voltage signals collected by the calibration module through I2C. The BMC reads the calibration module and polls and reads multiple sets of values ​​of the voltage and current registers of the ADC acquisition module. By establishing a filtering mechanism, 10 data are taken, the maximum and minimum values ​​are excluded, and the remaining data is averaged to represent the voltage and current information at this time, and the power consumption information is calculated based on this. Ensuring the reading accuracy of the BMC read calibration module is also an important part of improving accuracy.

[0079] In some optional implementations, a voltage acquisition input terminal of the ADC acquisition module is connected to a power supply terminal of an Efuse by using a same-attribute perforation avoidance method, and the connection line between the two needs to avoid the same voltage type connection line.

[0080] Specifically, when the P12V voltage is pulled from the load end to the ADC acquisition module pin, when passing through the same type of voltage, the same property perforation avoidance is also required to prevent the voltage sensed at the ADC acquisition module from being the P12V voltage of the Efuse in the process instead of the voltage at the load end.

[0081] The current precision processing circuit designed in this embodiment can adaptively adjust the difference between the imon signal and the GND signal. In different loading scenarios and the relative positions of the ADC acquisition module and the Efuse, there are the following three scenarios for the GND level at the ADC acquisition module and the GND level at different Efuse: 1). The voltage at the ADC acquisition module is higher than the GND level at the Efuse. The current precision processing circuit can be used to ensure that the Imon signal of Efuse is transmitted to the ADC acquisition module pin plus the GND level difference between the ADC acquisition module and the Efuse chip; 2). The voltage at the ADC acquisition module is lower than the GND level at the Efuse. The current precision processing circuit can be used to ensure that the Imon signal of Efuse is transmitted to the ADC acquisition module pin minus the GND level difference between the ADC acquisition module and the Efuse chip; 3). The voltage at the ADC acquisition module is equal to the GND level at the Efuse. The GND compensation unit can be used to ensure that the Imon signal of Efuse is transmitted to the ADC acquisition module pin as an accurate induced voltage.

[0082] Although the embodiments of the present invention have been described in conjunction with the accompanying drawings, those skilled in the art may make various modifications and variations without departing from the spirit and scope of the present invention, and such modifications and variations are all within the scope defined by the appended claims.

Claims

1. A current precision processing circuit, characterized in that: The current precision processing circuit is applied to the power reading circuit of Efuse, the power reading circuit includes an ADC acquisition module, and the current precision processing circuit includes: a signal processing module, a voltage error calculation module, and an error compensation module, wherein: The first end of the signal processing module is connected to the ground line of the ADC acquisition module of Efuse, and the second end of the signal processing module is connected to the first end of the voltage error calculation module. The signal processing module is used to collect the ground line voltage of the ADC acquisition module and process it; The second end of the voltage error calculation module is connected to the ground line of the Efuse, and the voltage error compensation module is used to obtain a voltage error compensation value based on the ground line voltage of the ADC acquisition module and the ground line voltage of the Efuse; The first end of the error compensation module is connected to the analog current output end of the Efuse, the second end of the error compensation module is connected to the third end of the voltage error calculation module, the third end of the error compensation module is connected to the current acquisition input end of the ADC acquisition module, and the error compensation module is used to compensate the analog current value output by the Efuse using the voltage error compensation value.

2. The current accuracy processing circuit according to claim 1, characterized in that: The signal processing module includes: a single-ended to differential circuit and a differential to single-ended circuit, wherein: The first end of the single-ended to differential circuit is connected to the ground line of the ADC acquisition module, and the second end and the third end of the single-ended to differential circuit are connected to the first end and the second end of the differential to single-ended circuit respectively; The third terminal of the differential-to-single-ended circuit is connected to the first terminal of the voltage error calculation module.

3. The current accuracy processing circuit according to claim 1, characterized in that: The voltage error calculation module includes: a first resistor, a second resistor, a third resistor, a fourth resistor, and a subtractor, wherein: The negative input terminal of the subtractor is connected to the first end of the first resistor and the first end of the second resistor, and the positive input terminal of the subtractor is connected to the first end of the third resistor and the first end of the fourth resistor; The second end of the first resistor is connected to the ground line of the Efuse; The second end of the second resistor is connected to the output end of the subtractor and the second end of the error compensation module; The second end of the third resistor is connected to the second end of the signal processing module; A second end of the fourth resistor is grounded.

4. The current accuracy processing circuit according to claim 3, characterized in that: The subtractor is a comparator, the inverting input terminal of the comparator is the negative input terminal of the subtractor, the non-inverting input terminal of the comparator is the positive input terminal of the subtractor, and the output terminal of the comparator is the output terminal of the subtractor.

5. The current accuracy processing circuit according to claim 1, characterized in that: The error compensation module includes: a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor and an operational amplifier, wherein: The non-inverting input terminal of the operational amplifier is connected to the first end of the fifth resistor and the first end of the sixth resistor, and the non-inverting input terminal of the operational amplifier is connected to the first end of the seventh resistor and the first end of the eighth resistor; The second end of the fifth resistor is connected to the analog current output end of the Efuse; The second end of the sixth resistor is connected to the third end of the voltage error calculation module; The second end of the seventh resistor is grounded; The second end of the eighth resistor is connected to the output end of the operational amplifier and the current collection input end of the ADC collection module.

6. The current accuracy processing circuit according to claim 1, characterized in that: The ground wire of the Efuse is connected to the second end of the voltage error calculation module by routing through layers, and the ground wire of the Efuse needs to avoid other ground wires and ground planes.

7. A current precision processing system, characterized in that: include: The current accuracy processing circuit according to any one of claims 1 to 6, wherein: The third terminal of each error compensation module is connected to a current acquisition input terminal of the ADC acquisition module; Each current accuracy processing circuit is used to compensate the analog output current of an Efuse.

8. A power reading circuit, characterized in that: include: The current accuracy processing circuit, ADC acquisition module, and BMC reading calibration module according to any one of claims 1 to 6, wherein the ADC acquisition module is a single-channel module, The input end of the ADC acquisition module also inputs the power supply end voltage of the Efuse, and the ADC acquisition module is used to obtain the power supply voltage of the Efuse and the compensated analog output current of the Efuse; The input end of the BMC reading calibration module is connected to the output end of the ADC acquisition module. The BMC reading calibration module is used to read the power supply voltage of multiple groups of Efuse and the analog output current of the compensated Efuse, and establish a filtering mechanism to screen the power supply voltage of multiple groups of Efuse and the analog output current of the compensated Efuse, and use the power supply voltage of the remaining multiple groups of Efuse and the analog output current of the compensated Efuse to obtain the average power supply voltage and average analog output current of the Efuse, and then calculate the power of the Efuse.

9. A power reading system, characterized in that: include: The current accuracy processing system, ADC acquisition module, and BMC reading calibration module described in claim 7, wherein the ADC acquisition module is a multi-channel module, A voltage acquisition input terminal of the ADC acquisition module is also connected to a power supply terminal voltage of the Efuse, and the ADC acquisition module is used to obtain the power supply voltage of each Efuse and the analog output current of each compensated Efuse; The input end of the BMC reading calibration module is connected to each output end of the ADC acquisition module. For each Efuse, the BMC reading calibration module is used to read the power supply voltage of multiple groups of Efuse and the analog output current of the compensated Efuse, and establish a filtering mechanism to screen the power supply voltage of multiple groups of Efuse and the analog output current of the compensated Efuse, and use the power supply voltage of the remaining multiple groups of Efuse and the analog output current of the compensated Efuse to obtain the average power supply voltage and average analog output current of the Efuse, and then calculate the power of the Efuse.

10. The power reading system according to claim 9, characterized in that: By using the same-attribute perforation avoidance method, a voltage acquisition input terminal of the ADC acquisition module is connected to a power supply terminal of the Efuse, and the connection line between the two needs to avoid the same voltage type connection line.

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