Integrated Circuit Junction Temperature and Thermal Resistance Evaluation System and Method Based on Digital Twin Technology
Through the integrated circuit junction temperature and thermal resistance evaluation system based on digital twin technology, the problems of traditional methods of reducing accuracy and poor adaptability in integrated circuit thermal analysis are solved, and higher monitoring accuracy and better adaptability to heat dissipation requirements are achieved.
Patent Information
- Application Number
- CN202510131330.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-06
- Publication Date
- 2025-06-03
- Estimated Expiration
- 2045-02-06
AI Technical Summary
Traditional methods are difficult to capture the impact of complex multi-layer stacking structures on the heat transfer path in integrated circuit thermal analysis, resulting in a decrease in prediction accuracy and difficult to adapt to complex heat dissipation needs and spatial and temporal heat flow problems.
The integrated circuit junction temperature and thermal resistance evaluation system based on digital twin technology is adopted to extract the temperature cloud map from the simulation calculation results, extract the thermal flow line map based on the heat dissipation path, and use deep learning data analysis and coding technology for discrete sampling and embedding encoding to automatically identify the rectangular box position data in the hot spot area.
This method can better capture the impact of fine structures on the heat transfer path, adapt to complex heat dissipation needs, improve the accuracy and speed of junction temperature monitoring of integrated circuits, and enhance the ability to evaluate the thermal resistance of integrated circuits.
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Figure CN119578340B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of intelligent evaluation, and more specifically, to an integrated circuit junction temperature and thermal resistance evaluation system and method based on digital twin technology. Background Art
[0002] In the field of integrated circuits (ICs), especially for complex three-dimensional integrated circuits (3D-ICs), accurate evaluation of junction temperature and thermal resistance is crucial for circuit performance and reliability. With the progress of semiconductor technology, modern ICs not only achieve extremely high integration on a two-dimensional plane but also form a three-dimensional structure by stacking multiple chips. Therefore, effective thermal management is essential to ensure the reliability, stability, and lifespan of integrated circuits.
[0003] Traditional methods in integrated circuit thermal analysis rely on simplified geometric models and empirical formulas, which are inadequate when faced with complex multi-layer stacked structures. The simplified models cannot capture the influence of microstructures on the heat transfer path, resulting in a decline in prediction accuracy. Especially in the trend of high-density integration and heterogeneous integration, traditional methods are difficult to adapt to the increasingly complex heat dissipation requirements. In addition, traditional methods can often only handle static or simple time-series data, and it is difficult for them to capture all potential patterns and trends for heat flow problems involving a large amount of spatio-temporal correlation, such as the dynamic heat distribution in a data center.
[0004] Therefore, an optimized integrated circuit junction temperature and thermal resistance evaluation scheme is desired. Summary of the Invention
[0005] To solve the above technical problems, this application is proposed. Embodiments of this application provide an integrated circuit junction temperature and thermal resistance evaluation system and method based on digital twin technology. It extracts a temperature cloud map from the simulation calculation results, and based on the heat dissipation path, extracts a heat flow streamline map from the temperature cloud map, and uses deep learning data analysis and coding techniques to discretely sample the heat flow streamline map. Then, it embeds and encodes the data of each sampled heat flow point (flow point position and heat flow point temperature), and thereby automatically identifies the rectangular frame position data of the hot spot area according to the significant aggregation representation of graph walks between the embedded coding features of each heat flow point data. In this way, it can capture the influence of microstructures (such as connection lines, solder joints, etc.) on the heat transfer path, better adapt to complex heat dissipation requirements, and ensure the effective satisfaction of heat dissipation needs. Moreover, it can comprehensively capture the change patterns and trends of heat distribution and respond to transient changes in real time to discover potential overheating points or anomalies, effectively improving the accuracy and speed of integrated circuit junction temperature monitoring and enhancing the evaluation ability of the thermal resistance of integrated circuits.
[0006] According to one aspect of the present application, there is provided a method for evaluating the junction temperature and thermal resistance of an integrated circuit based on digital twin technology, which includes: Step 1: Establish a digital twin model of the integrated circuit; Step 2: Construct a single heat dissipation path in the digital twin model of the integrated circuit; Step 3: Monitor the temperature data collected by the temperature sensor in the integrated circuit and transmit the temperature data collected by the temperature sensor to the digital twin model of the integrated circuit; Step 4: Load the input power to the digital twin model based on different test conditions, and determine the boundary conditions and grid parameters for simulation calculation to obtain the simulation calculation result; Step 5: Determine the hot spot area based on the simulation calculation result; Step 6: Improve the digital twin model of the integrated circuit based on the hot spot area to obtain an improved digital twin model of the integrated circuit; Step 7: Real-time monitor the temperature data of the actual integrated circuit and feedback the temperature data to the improved digital twin model of the integrated circuit in real time.
[0007] According to another aspect of the present application, there is provided a system for evaluating the junction temperature and thermal resistance of an integrated circuit based on digital twin technology, which includes:
[0008] A digital twin model establishment module for establishing a digital twin model of the integrated circuit;
[0009] A heat dissipation path construction module for constructing a single heat dissipation path in the digital twin model of the integrated circuit;
[0010] A data transmission module for installing a temperature sensor in the actual integrated circuit and transmitting the temperature data collected by the temperature sensor to the digital twin model of the integrated circuit;
[0011] A simulation calculation module for loading the input power to the digital twin model based on different test conditions, and determining the boundary conditions and grid parameters for simulation calculation to obtain the simulation calculation result;
[0012] A hot spot area determination module for determining the hot spot area based on the simulation calculation result;
[0013] A digital twin model improvement module for improving the digital twin model of the integrated circuit based on the hot spot area to obtain an improved digital twin model of the integrated circuit;
[0014] A data feedback module for real-time monitoring the temperature data of the actual integrated circuit and feedbacking the temperature data to the improved digital twin model of the integrated circuit in real time.
[0015] Compared with the prior art, an integrated circuit junction temperature and thermal resistance evaluation system and method based on digital twin technology provided by the present application extract a temperature cloud map from the simulation calculation results, and based on the heat dissipation path, extract a heat streamline map from the temperature cloud map, and use deep learning data analysis and coding techniques to discretely sample the heat streamline map, and then perform embedding coding on each sampled heat flow point data (flow point position and heat flow point temperature), so as to automatically identify the rectangular frame position data of the hot spot area according to the significant aggregation representation of the graph walk between the embedding coding features of each heat flow point data. In this way, the influence of microstructures (such as connecting lines, solder joints, etc.) on the heat transfer path can be captured, better adapting to complex heat dissipation requirements and ensuring the effective satisfaction of heat dissipation needs. Moreover, the changing patterns and trends of the heat distribution can be comprehensively captured and respond to transient changes in real time, so as to discover potential overheating points or abnormal conditions, effectively improving the accuracy and speed of integrated circuit junction temperature monitoring and enhancing the evaluation ability of the thermal resistance of integrated circuits. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] By describing the embodiments of the present application in more detail in conjunction with the accompanying drawings, the above and other objects, features, and advantages of the present application will become more obvious. The accompanying drawings are used to provide a further understanding of the embodiments of the present application, and constitute a part of the specification, and are used to explain the present application together with the embodiments of the present application, and do not constitute a limitation to the present application. In the accompanying drawings, the same reference numerals generally represent the same components or steps.
[0017] Figure 1 It is a flowchart of an integrated circuit junction temperature and thermal resistance evaluation method based on digital twin technology according to an embodiment of the present application;
[0018] Figure 2 It is a schematic diagram of data flow of an integrated circuit junction temperature and thermal resistance evaluation method based on digital twin technology according to an embodiment of the present application;
[0019] Figure 3 It is a flowchart of sub-step S5 of an integrated circuit junction temperature and thermal resistance evaluation method based on digital twin technology according to an embodiment of the present application;
[0020] Figure 4 It is a block diagram of an integrated circuit junction temperature and thermal resistance evaluation system based on digital twin technology according to an embodiment of the present application. DETAILED DESCRIPTION OF THE EMBODIMENTS
[0021] Next, exemplary embodiments according to the present application will be described in detail with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments of the present application. It should be understood that the present application is not limited by the exemplary embodiments described herein.
[0022] As shown in this application and the claims, unless the context clearly indicates otherwise, words such as "a", "an", "one", and / or "the" are not specifically singular and may also include the plural. Generally speaking, the terms "comprising" and "including" only indicate the inclusion of the steps and elements that have been clearly identified, and these steps and elements do not constitute an exclusive list. The method or device may also include other steps or elements.
[0023] Although this application makes various references to certain modules in the system according to the embodiments of this application, however, any number of different modules can be used and run on the user terminal and / or the server. The modules are only illustrative, and different aspects of the system and method can use different modules.
[0024] Flowcharts are used in this application to illustrate the operations performed by the system according to the embodiments of this application. It should be understood that the operations before or below do not necessarily need to be executed precisely in sequence. On the contrary, according to the need, various steps can be processed in reverse order or simultaneously. At the same time, other operations can also be added to these processes, or one or several steps can be removed from these processes.
[0025] Next, exemplary embodiments according to this application will be described in detail with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, rather than all the embodiments of this application. It should be understood that this application is not limited by the exemplary embodiments described herein.
[0026] In the technical solution of this application, a method for evaluating the junction temperature and thermal resistance of an integrated circuit based on digital twin technology is proposed. Figure 1 FIG. is a flowchart of a method for evaluating the junction temperature and thermal resistance of an integrated circuit based on digital twin technology according to an embodiment of this application. Figure 2 FIG. is a schematic diagram of data flow of a method for evaluating the junction temperature and thermal resistance of an integrated circuit based on digital twin technology according to an embodiment of this application. As Figure 1 and Figure 2As shown, the method for evaluating the junction temperature and thermal resistance of an integrated circuit based on digital twin technology according to an embodiment of the present application includes the steps of: S1, establishing a digital twin model of the integrated circuit; S2, constructing a single heat dissipation path in the digital twin model of the integrated circuit; S3, monitoring the temperature data collected by temperature sensors in the integrated circuit and transmitting the temperature data collected by the temperature sensors to the digital twin model of the integrated circuit; S4, loading input power to the digital twin model based on different test conditions, and determining boundary conditions and mesh parameters for simulation calculation to obtain simulation calculation results; S5, determining the hot spot area based on the simulation calculation results; S6, improving the digital twin model of the integrated circuit based on the hot spot area to obtain an improved digital twin model of the integrated circuit; S7, monitoring the temperature data of the actual integrated circuit in real time and feeding back the temperature data to the improved digital twin model of the integrated circuit in real time.
[0027] Specifically, in step S1, a digital twin model of the integrated circuit is established. In a specific example, during the process of establishing the digital twin model of the integrated circuit, it is necessary to comprehensively collect and integrate information from design documents, packaging documents, and test conditions. These information constitute the basic parameter system of the model, which covers material properties (such as material density ρ, elastic modulus E, Poisson's ratio ν, thermal conductivity λ) and geometric information (such as the geometric structure, size, and mating relationship of each part of the structure). For parameters not provided in the original materials, other measurement methods need to be used to supplement them, such as using X-rays to measure geometric information or using specific experimental devices to measure thermal conductivity. Next, create a digital representation that can cover all the above key parameters and be used for subsequent simulation calculations. The model should be as faithful as possible to the physical entity, including its internal structure, material distribution, and external environmental conditions.
[0028] Specifically, in step S2, a single heat dissipation path is constructed in the integrated circuit digital twin model. It should be understood that constructing a single heat dissipation path is to ensure that heat can be transferred from the inside of the integrated circuit to the external environment according to the designer's intention, rather than dissipating randomly or concentrating in undesirable areas. Specifically, a controlled heat conduction path is implemented in the digital model to ensure the effective discharge of heat and prevent the decrease in heat dissipation efficiency or the formation of hot spots due to other unexpected paths. To achieve this, in the initial integrated circuit digital model, adiabatic parameters are set for the parts of the non-target heat dissipation paths, that is, those areas that should not be used as the main heat dissipation channels. This means that these parts will be regarded as having no heat conduction ability during the simulation calculation, thus preventing the possibility of heat loss through them. This approach effectively guides heat to be transferred only through the predetermined main heat dissipation path. For the terminal part selected as the main heat dissipation path, surface constant heat transfer parameters are set. This usually refers to the interface between the heat sink or the housing and the surrounding air, which is set to have a fixed heat transfer coefficient (also known as the convective heat transfer coefficient). This is done to simulate the heat dissipation conditions in actual applications, such as natural convection, forced air cooling, or other forms of cooling mechanisms. In this way, it can be ensured that during the simulation calculation, heat can be dissipated from the specified position at a stable rate, similar to the real-world situation. Specifically, real-time data transmission and feedback correction can be achieved by using Internet of Things technology. This means that temperature sensors and other necessary monitoring devices are installed in the actual integrated circuit, and the data collected by these devices will be transmitted to the digital twin model in real time. If the monitoring data shows an abnormal temperature increase in some places, then the heat management strategy can be optimized by adjusting the heat dissipation path settings in the model, such as changing the material properties or geometric structure on the heat dissipation path, or even re-evaluating the design of the entire heat dissipation solution.
[0029] In particular, in step S3, the temperature data collected by the temperature sensor in the integrated circuit is monitored, and the temperature data collected by the temperature sensor is transmitted to the digital twin model of the integrated circuit. It should be understood that in order to obtain the most accurate data, it is necessary to monitor the sensors in those key areas that are sensitive to temperature changes or prone to forming hot spots. This may include the chip surface, the area inside the package close to the heat source, and any other parts that may affect the overall performance. In addition, according to specific application requirements, other types of external auxiliary monitoring devices, such as stress sensors or humidity sensors, can also be installed to provide more comprehensive working condition information. The selection and arrangement of all these sensors must be considered so as not to interfere with the normal operation of the circuit, and at the same time, it should be convenient for subsequent maintenance and replacement. Then, it is physically connected to the circuit board. Usually, the temperature sensor is directly integrated at a designated position inside the chip or connected to it through a specially designed interface. For some advanced applications, miniaturized wireless sensor nodes may be used, which can be embedded in very small spaces without affecting the circuit layout. Such sensors can not only measure temperature but also send data through a wireless communication protocol, reducing the wiring complexity. After installation, the sensors start collecting temperature information from various key points of the integrated circuit. In order to enable these data to be processed in a timely manner in the digital twin model, the document points out that the Internet of Things (IoT) technology should be used to establish a stable data transmission channel. This means that each sensor needs to be equipped with an appropriate communication module, such as Wi-Fi, Bluetooth, Zigbee, or other low-power wide area network (LPWAN) technologies, to facilitate communication with the external network. When the sensor detects a temperature change, it immediately converts the data into a digital signal and sends it out through the selected communication protocol. The receiving end is a platform integrated with data processing capabilities, which can be a local server or a cloud service. A software system developed specifically for the digital twin model runs on this platform, responsible for receiving data streams from different sensors, parsing, storing, and preliminarily analyzing them. Since the number of sensors may be large, this platform also needs to have efficient data management and synchronization functions to ensure that all received data can be correctly integrated into the digital twin model. In particular, if it is found that the data of a certain sensor is abnormal, such as being inconsistent with the readings of other adjacent sensors or exceeding the preset safety range, then the system will trigger an alarm and may automatically take measures to correct the problem. For example, increasing the speed of the radiator fan, changing the coolant flow rate, or even re-evaluating the design of the heat dissipation path, etc. This dynamic response mechanism helps to maintain the stable operation of the system and prevent overall failures caused by local overheating.
[0030] Specifically, in step S4, the digital twin model is loaded with input power based on different test conditions, and boundary conditions and mesh parameters are determined for simulation calculations to obtain simulation results. In a specific example, first, to simulate various situations in the actual operating environment, a series of test conditions are defined according to the specific usage scenarios. These conditions may include different levels of load conditions, such as light load, rated load, and heavy load, etc.; they may also cover temperature changes, voltage fluctuations, and other factors that may affect the thermal behavior of the circuit. Each condition corresponds to a specific set of input power values, which will be applied to the digital twin model to reproduce the actual operating situation. Next, the corresponding boundary conditions are set for the digital twin model. Boundary conditions refer to the way the model interacts with the external environment, and they have a crucial impact on the accuracy of the simulation. As mentioned in the document, according to the actual working conditions of the integrated circuit, fixed constraints are set for structures without relative displacement such as bonding and molding, that is, the relative movement between these parts is restricted. For those places where relative movement is possible, friction constraints are adopted, allowing a certain degree of sliding or rolling contact. In addition, adiabatic conditions are set for parts of non-target heat dissipation paths to prevent heat from escaping through these areas, and surface constant heat transfer parameters are set at the terminals of the main heat dissipation paths to simulate the real heat dissipation effect. Such setting of boundary conditions can effectively simulate the heat transfer process in the actual environment and improve the authenticity of the simulation. While determining the boundary conditions, it is also necessary to consider how to divide the mesh. The choice of mesh parameters directly affects the calculation efficiency and accuracy of the simulation. The document points out that a coarsened mesh is used for the structure of non-key analysis parts, which can reduce the calculation amount without affecting the overall result; while a finer mesh is used for hot spots or other important areas to capture local detail changes. After the initial mesh division, multiple iterations of optimization are carried out until the error of the calculation result is controlled within 5%, and finally the most suitable mesh parameter configuration is determined. This differential mesh strategy not only improves the simulation speed but also ensures the accuracy of data in key areas. After setting the boundary conditions and mesh parameters, the calculation can be submitted to start the simulation process. At this stage, the digital twin model will simulate the working state of the integrated circuit based on the previously loaded input power and the set boundary conditions, and calculate the data of junction temperature and thermal resistance. These data reflect the temperature distribution of each position inside the integrated circuit under the given conditions, and the ease of heat conduction from the heat source to the radiator. By comparing the simulation results under different test conditions, engineers can obtain important information about the thermal management efficiency, such as which areas are prone to forming hot spots and whether there are design defects. Finally, to verify the effectiveness of the improvement measures, the document emphasizes that the improved design will be simulated and calculated again. This step ensures that any design change can bring the expected performance improvement without introducing new problems.If the new design solution indeed achieves optimal thermal management efficiency, it can be applied to actual products. Otherwise, it is necessary to continue adjusting and optimizing until satisfactory results are achieved.
[0031] Specifically, in S5, based on the simulation calculation results, a hot spot area is determined. Specifically, in a specific example of the present application, as Figure 3 shown, S5 includes: S51, extracting a temperature contour map from the simulation calculation results; S52, based on the heat dissipation path, extracting a heat flow streamline map from the temperature contour map; S53, discretely sampling the heat flow streamline map to obtain a sequence of heat flow point data, where the heat flow point data includes heat flow point positions and heat flow point temperatures; S54, performing embedding encoding on each heat flow point data in the sequence of heat flow point data to obtain a sequence of heat flow point data embedding encoding features; S55, performing graph walk self-correlation gated significant aggregation on the sequence of heat flow point data embedding encoding features to obtain a heat flow point set significant aggregation feature; S56, based on the heat flow point set significant aggregation feature, obtaining an identification result, where the identification result is the rectangular frame position data of the hot spot area.
[0032] Specifically, in S51, a temperature contour map is extracted from the simulation calculation results. It should be understood that the temperatures in different regions inside the integrated circuit have different manifestations. Considering that the temperature contour map is a visualization tool used in thermal analysis, which represents the temperature distribution at different positions on the surface or inside an object through color gradients. Based on this, in the technical solution of this application, a temperature contour map is extracted from the simulation calculation results. That is, the temperature contour map can help quickly locate the high-temperature regions in the integrated circuit (IC), which may be caused by excessive heat accumulation and pose a threat to the long-term reliability of the IC. Identifying these hotspots is crucial for taking appropriate heat dissipation measures. In a specific example, after loading the input power, determining the boundary conditions and mesh parameters for the digital twin model and performing simulation calculations, a series of data on junction temperature and thermal resistance will be obtained. These data contain the temperature information of each node or unit inside the integrated circuit. To better understand and analyze these data, especially to identify potential hotspots or other problem areas, it is necessary to convert these numerical values into a graphical representation - the temperature contour map. Before generating the temperature contour map, it is usually necessary to perform some necessary preprocessing on the original simulation calculation results to ensure that the final generated image can accurately reflect the actual situation and is easy for observers to understand. First, remove outliers or invalid data points to ensure data quality, which is part of data cleaning. Then, ensure that the data format is suitable for generating the temperature contour map. For example, convert the data to a representation in a specific coordinate system to facilitate correspondence with positions in physical space. This is the process of data format conversion. In addition, if the data density in certain regions is insufficient, interpolation algorithms can be used to increase the data points to make the temperature distribution smoother and more continuous, avoiding misleading visual effects caused by sparse data. This is the work of data interpolation. After completing the data preprocessing, the next step is to use professional software or custom scripts to map the processed temperature data into a two-dimensional or three-dimensional space to form a temperature contour map. The key to this step lies in selecting an appropriate color scheme, correctly performing spatial mapping, and applying effective rendering techniques. Selecting an appropriate color gradient according to the temperature range (such as cold colors representing low-temperature regions and warm colors representing high-temperature regions) can enhance the visualization effect. Reasonable color selection can help users quickly identify the trends and degrees of temperature changes. At the same time, accurately map each temperature data point to the corresponding spatial position. For complex three-dimensional structures, the relative position relationship between layers also needs to be considered to ensure that the temperature contour map truly reproduces the actual temperature distribution inside the IC. To better display the temperature change trend, various rendering techniques such as isotherms, transparency adjustment, and surface shading can be used. For example, using isotherms can clearly show the regions with the same temperature; adjusting the transparency allows users to more intuitively see the temperature differences between different layers; surface shading expresses the change in temperature by changing the color shade.
[0033] Specifically, in S52, based on the heat dissipation path, a heat streamline map is extracted from the temperature cloud map. Here, in order to provide a more detailed perspective for observing and understanding the heat transfer process within the IC, and thus for optimizing the design of the model, in the technical solution of this application, based on the heat dissipation path, a heat streamline map is extracted from the temperature cloud map. It should be understood that a heat streamline map is a visualization tool that depicts the flow path of heat within or on the surface of an object. Heat streamlines are similar to electric field lines in electrostatics or streamlines in fluid mechanics, which represent the direction and relative intensity of heat transfer. In an integrated circuit (IC), a heat streamline map can show which paths are the main conduction channels for heat and how heat propagates from high-temperature regions (such as transistor junctions) to low-temperature regions (such as heat sinks or ambient air). That is to say, through the heat streamline map, it is possible to more intuitively understand how heat is transmitted within the IC, including whether heat is concentrated in certain areas or whether there are undesirable heat conduction paths, which helps to deeply analyze the effectiveness of the thermal management design of the IC. And identifying the main heat flow paths is very important for optimizing the heat dissipation design of the IC and its package. For example, if it is found that most of the heat is conducted through a specific path, then heat dissipation measures can be enhanced on this path, such as adding thermally conductive materials or improving the design of the heat sink. In a specific example, the thermal gradient field throughout the IC is calculated. The thermal gradient reflects the rate of change of temperature with respect to spatial position, that is, the speed at which the temperature rises or falls at each point. In an ideal situation, heat flow always occurs along the direction of the negative thermal gradient, that is, from high-temperature regions to low-temperature regions. Therefore, by calculating the temperature difference between each grid cell and applying an appropriate mathematical formula (such as the finite difference method), a vector field describing the heat flow situation throughout the IC can be obtained. Each vector in this vector field points in the direction of the steepest temperature drop at that point, representing the heat flow direction at that location. The calculation of the thermal gradient field is the basis for extracting heat streamlines, which provides the necessary information support for subsequent steps. After obtaining the thermal gradient field, heat streamlines are extracted. Heat streamlines are curves that start from a certain starting point and gradually advance in the direction indicated by the thermal gradient field. To ensure the authenticity and reliability of the results, multiple representative positions are usually selected as starting points, and a certain step size control is maintained during the tracing process. In addition, some rules can be introduced to handle special situations, such as detouring when encountering obstacles or terminating the current line and starting a new heat streamline. The finally formed heat streamline map will clearly show the flow trajectory of heat throughout the IC, which can help identify the main heat conduction paths and possible bottleneck or hot spot regions.
[0034] Specifically, in step S53, discrete sampling is performed on the heat flow streamline diagram to obtain a sequence of heat flow point data, where the heat flow point data includes the heat flow point position and the heat flow point temperature. Considering that the heat flow streamline diagram is a continuous graphical representation containing a large amount of information, directly processing the continuous heat flow streamline diagram may be extremely computationally resource-intensive. Therefore, in order to convert the continuous heat flow information into a set of discrete data points for subsequent analysis, processing, and application, in the technical solution of this application, discrete sampling is performed on the heat flow streamline diagram to simplify this complex information into a finite number of heat flow point data, obtaining a sequence of heat flow point data. In this way, the temperature information at each position can be analyzed more meticulously and quantitatively, while significantly reducing the amount of data that needs to be processed to better characterize the temperature characteristics of different regions.
[0035] Specifically, in step S54, embedding encoding is performed on each heat flow point data in the sequence of heat flow point data to obtain a sequence of heat flow point data embedding encoding features. Considering that there are mutual relationships and complex connections among the heat flow point data, such as adjacent heat flow points should also be close in the embedding space, which helps to retain the continuity and directionality of the heat flow path. Therefore, in order to convert the original heat flow point data into a more advanced and expressive form to capture and explore the complex relationships among the heat flow point data, such as spatial position, temperature gradient, etc., in the technical solution of this application, embedding encoding is performed on each heat flow point data in the sequence of heat flow point data to obtain a sequence of heat flow point data embedding encoding vectors. In this way, the characteristics of each heat flow point and its role in the overall heat flow path can be described more accurately. In particular, in a specific embodiment of this application, a heat flow point data embedding matrix can be used to perform embedding encoding on each heat flow point data in the sequence of heat flow point data to effectively extract the implicit relationships between the heat flow points, obtaining a sequence of heat flow point data embedding encoding vectors as the sequence of heat flow point data embedding encoding features. In particular, the heat flow point data embedding matrix is constructed based on a large amount of historical data.
[0036] Specifically, in S55, graph walk autocorrelation gated significant aggregation is performed on the sequence of the heat flux point data embedded with coding features to obtain the heat flux point set significant aggregation feature. Considering that heat flux point data usually has strong temporal and spatial dependencies, the temperature changes between adjacent heat flux points often affect each other, forming complex spatio-temporal patterns. Traditional feature extraction methods are difficult to fully capture these dynamic associations. Based on this, in the technical solution of this application, a graph walk autocorrelation gated significant aggregation mechanism is introduced to consider the characteristics of each heat flux point data embedded with coding features and its interaction with surrounding nodes, thereby generating a heat flux point set significant aggregation feature that comprehensively reflects the common behavior patterns of all heat flux points. In particular, the graph walk mechanism allows the model to gradually explore the relationships between nodes along the heat flux path, while the autocorrelation gating helps the model identify and emphasize those features with significant autocorrelation, that is, the features that show consistency as the time or spatial position changes, thereby enhancing the understanding of the thermal behavior of integrated circuits.
[0037] Specifically, the specific process of performing graph walk autocorrelation gated significant aggregation on the sequence of the heat flux point data embedded with coding features includes: First, each heat flux point data embedded coding vector in the sequence of the heat flux point data embedded coding vectors is input into the hyperbolic space mapper to obtain the sequence of the heat flux point data embedded coding vectors after hyperbolic space mapping. In particular, the hyperbolic space mapper uses hyperbolic geometric properties to preserve the hierarchical structure and long-tail distribution in the heat flux point data, thereby enhancing the relative distance representation ability between the heat flux point data embedded coding vectors, making similar heat flux point data embedded coding vectors gather more closely together, while different heat flux point data embedded coding vectors are effectively separated. In a specific example, each heat flux point data embedded coding vector in the sequence of the heat flux point data embedded coding vectors is input into the hyperbolic space mapper according to the following formula to obtain the sequence of the heat flux point data embedded coding vectors after hyperbolic space mapping; where the formula is:
[0038]
[0039]
[0040] Where, is the sequence of the heat flux point data embedded coding vectors, , , , and are respectively the 1st, 2nd, th, th, and th heat flux point data embedded coding vectors in the sequence of the heat flux point data embedded coding vectors, and They are the first weight matrix in hyperbolic space and the second weight matrix in hyperbolic space, respectively, is the embedded coding vector of the heat flow point data after hyperbolic space mapping after hyperbolic space mapping.
[0041] Next, based on the sequence of the embedded coding vectors of the heat flow point data after hyperbolic space mapping, graph walk topological features are extracted to obtain the heat flow point data graph walk topological feature matrix. Specifically, first calculate the Poincaré distance between any two embedded coding vectors of the heat flow point data after hyperbolic space mapping in the sequence of the embedded coding vectors of the heat flow point data after hyperbolic space mapping to obtain the heat flow point data graph walk topological matrix. The Poincaré distance measures the actual distance between two points in hyperbolic space. This operation helps to identify the topological relationship between the embedded coding vectors of the heat flow point data after hyperbolic space mapping, and based on this, a graph structure is constructed. This graph structure reflects the inherent connectivity of the sequence of the embedded coding vectors of the heat flow point data after hyperbolic space mapping. The heat flow point data graph walk topological feature matrix records the relative proximity between all the embedded coding vectors of the heat flow point data after hyperbolic space mapping in the sequence of the embedded coding vectors of the heat flow point data after hyperbolic space mapping, which not only reflects the direct connection between the heat flow point data nodes after hyperbolic space mapping, but also implies higher-order structural information. Subsequently, dilated convolution coding is performed on the heat flow point data graph walk topological matrix to capture topological features at different scales to obtain the heat flow point data graph walk topological feature matrix. In a specific example, based on the sequence of the embedded coding vectors of the heat flow point data after hyperbolic space mapping, the following graph walk topological feature extraction formula is used to extract graph walk topological features to obtain the heat flow point data graph walk topological feature matrix; where, the is:
[0042]
[0043]
[0044] Where, is the embedded coding vector of the heat flow point data after hyperbolic space mapping after hyperbolic space mapping, is the square of the modulus length of the vector, is the inverse hyperbolic cosine function, is for calculating and the Poincaré distance between them, is the eigenvalue at the th position in the heat flow point data graph walk topological matrix, is the heat flow point data graph walk topological matrix, is the dilated convolution coding, is the heat flow point data graph walk topological feature matrix.
[0045] Subsequently, based on the heat flow point data graph walk topological feature matrix, the sequence of hyperbolic space mapped heat flow point data embedded encoding vectors is context-semantically enhanced to obtain a sequence of heat flow point data context-semantically enhanced feature vectors. Specifically, the heat flow point data graph walk topological feature matrix and the sequence of hyperbolic space mapped heat flow point data embedded encoding vectors are input into a global context walk encoder based on a graph convolutional neural network model to obtain the sequence of heat flow point data context-semantically enhanced feature vectors. The global context walk encoder integrates the information of the local neighborhood of the heat flow point data graph through graph convolutional operations and performs walks over the entire heat flow point data graph to extract a sequence of heat flow point data context-semantically enhanced feature vectors with rich context information. That is, a graph convolutional neural network (GCN) is used to integrate the information from the entire heat flow point data graph. In a specific example, based on the heat flow point data graph walk topological feature matrix, the following context-semantic enhancement formula is used to context-semantically enhance the sequence of hyperbolic space mapped heat flow point data embedded encoding vectors to obtain a sequence of heat flow point data context-semantically enhanced feature vectors; where the context-semantic enhancement formula is:
[0046]
[0047] where is graph convolutional encoding, is the -th heat flow point data context-semantically enhanced feature vector in the sequence of heat flow point data context-semantically enhanced feature vectors.
[0048] Further, based on the sequence of the context semantic enhanced feature vectors of the heat flow point data, a significant gated weighted aggregation is performed on the sequence of the embedded encoding vectors of the heat flow point data to obtain a heat flow point set significant aggregation feature vector as the heat flow point set significant aggregation feature. Specifically, in the example of the present application, first, each corresponding pair of the context semantic enhanced feature vector of the heat flow point data and the embedded encoding vector of the heat flow point data in the sequence of the context semantic enhanced feature vectors of the heat flow point data and the sequence of the embedded encoding vectors of the heat flow point data is input into the self-correlation gated unit to obtain a sequence of self-correlation gated significant confidence factors of the heat flow point data; the self-correlation gated unit is used to measure the consistency and correlation between the context semantic enhanced feature vector of the heat flow point data and the embedded encoding vector of the heat flow point data, so as to generate the sequence of self-correlation gated significant confidence factors of the heat flow point data. Then, the sequence of self-correlation gated significant confidence factors of the heat flow point data is input into a normalization unit based on the Softmax function to obtain a sequence of self-correlation gated significant confidence weight factors of the heat flow point data. Finally, based on the sequence of self-correlation gated significant confidence weight factors of the heat flow point data, a position-wise weighted sum of the sequence of the embedded encoding vectors of the heat flow point data is calculated to obtain the heat flow point set significant aggregation feature vector. The heat flow point set significant aggregation feature vector synthesizes the information of all the embedded encoding vectors of the heat flow point data and emphasizes the parts that best represent the significant characteristics of the input set. In a specific example, based on the sequence of the context semantic enhanced feature vectors of the heat flow point data, the following significant gated weighted aggregation formula is used to perform a significant gated weighted aggregation on the sequence of the embedded encoding vectors of the heat flow point data to obtain the heat flow point set significant aggregation feature vector; wherein, the significant gated weighted aggregation formula is:
[0049]
[0050]
[0051]
[0052] wherein, is a normalization function, is point-wise subtraction by position, is to calculate and the self-correlation gated significant confidence factor between them, is and the self-correlation gated significant confidence factor of the heat flow point data between them, represents the value of the exponential function with the natural constant e as the base, is the number of self-correlation gated significant confidence factors in the sequence of self-correlation gated significant confidence factors of the heat flow point data, is The self - correlation gating significant confidence weight factor of the corresponding heat - flow point data is the number of vectors in the sequence of the heat - flow point data embedded coding vectors is dot - product by position is the significant aggregation feature vector of the heat - flow point set
[0053] Specifically, in S56, based on the significant aggregation feature of the heat - flow point set, an identification result is obtained, and the identification result is the position data of the rectangular frame of the hot - spot area. In the technical solution of the present application, the significant aggregation feature vector of the heat - flow point set is input into a hot - spot area recognizer based on a decoder to obtain the identification result. That is, the significant aggregation feature of the heat - flow point set obtained by performing graph - walk significant aggregation on the sequence of the heat - flow point data embedded coding features is decoded to automatically identify the position data of the rectangular frame of the hot - spot area
[0054] In a preferred example, considering that each heat - flow point data embedded coding vector in the sequence of the heat - flow point data embedded coding vectors respectively represents the low - dimensional embedded coding feature of the heat - flow point data, when performing the aggregation analysis of the feature sequence based on graph - walk self - correlation gating, the node - feature heterogeneity and association sparsity of each heat - flow point will cause the lack of instance decision - making of the aggregation feature of the significant aggregation feature vector of the heat - flow point set, thereby affecting the accuracy of the identification result obtained by inputting it into the hot - spot area recognizer based on a decoder
[0055] Based on this, before inputting the significant aggregation feature vector of the heat - flow point set into the hot - spot area recognizer based on a decoder, the significant aggregation feature vector of the heat - flow point set is first optimized, including the steps of
[0056] Determine the number of zero eigenvalues in the significant aggregation feature vector of the heat - flow point set and the zero eigen - value factor , and multiply and divide the zero eigen - value factor and the number of zero eigenvalues respectively to obtain the first significant aggregation field weight value of the heat - flow point set and the second significant aggregation field weight value of the heat - flow point set ;
[0057] Calculate the square root of the sum of the squares of all eigenvalues of the significant aggregation feature vector of the heat - flow point set to obtain the significant aggregation full - mode weight value of the heat - flow point set , represents each eigenvalue of the significant aggregation feature vector of the heat - flow point set
[0058] Using the zero eigen - value factor Calculate each eigenvalue of the eigenvector of the significant aggregation of the heat flow point set as an exponent to the power function , and multiply by the weight value of the significant aggregation field of the first heat flow point set to obtain the intermediate value of the significant aggregation of the first heat flow point set ;
[0059] Calculate each eigenvalue of the eigenvector of the significant aggregation of the heat flow point set and the weight value of the significant aggregation field of the second heat flow point set and the weight value of the full pattern of the significant aggregation of the heat flow point set to obtain the intermediate value of the significant aggregation of the second heat flow point set ;
[0060] Take the weighted difference between the intermediate value of the significant aggregation of the first heat flow point set and the intermediate value of the significant aggregation of the second heat flow point set to form an optimized eigenvector of the significant aggregation of the heat flow point set, where and represent different weight parameters. Finally, input the optimized eigenvector of the significant aggregation of the heat flow point set into the hotspot region recognizer based on the decoder to obtain the recognition result .
[0061] Accordingly, based on the vector field fitting rule of the high-dimensional manifold, take the isolated zeros and their differentiable factors in the eigenvector of the significant aggregation of the heat flow point set as the differentiable dimensions of the high-dimensional manifold, and fix the normal direction pointing to the center of the feature distribution near the local coordinates represented by the eigenvalues of the eigenvector of the significant aggregation of the heat flow point set, so as to avoid the ineffective repetition in the probability mapping process caused by the unstructured characteristics of the distribution with rich interaction response of the eigenvector of the significant aggregation of the heat flow point set by realizing the effective alignment of the feature distribution pattern of the eigenvector of the significant aggregation of the heat flow point set to the probability density differentiable field, thereby improving the degree of eigenvalue instance judgment of the eigenvector of the significant aggregation of the heat flow point set under similarity constraints, that is, the significance degree of the eigenvalue as an instance for the decoding regression judgment, and improving the accuracy of the recognition result obtained by inputting the eigenvector of the significant aggregation of the heat flow point set into the hotspot region recognizer based on the decoder
[0062] Specifically, in step S6, based on the hot spot area, the integrated circuit digital twin model is improved to obtain an improved integrated circuit digital twin model. Here, by improving the integrated circuit digital twin model, the overall thermal management efficiency can be enhanced. In a specific example, if high temperature often occurs at a certain specific location, it may be because the material used there has poor thermal conductivity; in this case, a material with a higher thermal conductivity can be selected to accelerate the heat transfer rate. For problems in terms of geometric structure, such as insufficient contact area between the chip and the radiator, the heat conduction efficiency can be improved by adding additional heat conducting fins or changing the package form. In addition, the design of the heat dissipation path can also be re-evaluated to ensure that heat can be transferred from the heat source to the external environment as expected, rather than being concentrated in some places that are not easy to dissipate heat. In addition to directly making physical improvements to the hot spot area, corresponding adjustments also need to be made to the digital twin model itself. This means updating the parameter settings in the model to make it closer to the new design scheme. For example, when introducing new materials, their physical properties (such as density, elastic modulus, Poisson's ratio, thermal conductivity, etc.) must be accurately input to ensure the accuracy of the simulation. At the same time, any change in geometric dimensions also needs to be reflected in the model to ensure that the simulation results can truly reproduce the actual situation after improvement. For the setting of boundary conditions, it also needs to be adjusted according to the latest design requirements. For example, if the shape or installation method of the radiator is changed, the corresponding surface heat transfer coefficient also needs to be modified accordingly to maintain the consistency of the simulation conditions.
[0063] Specifically, in step S7, the temperature data of the actual integrated circuit is monitored in real time, and the temperature data is fed back to the improved integrated circuit digital twin model in real time. That is, as new data continuously flows in, the digital twin model will dynamically update its internal state to reflect the latest temperature distribution. This makes the simulation results always close to the actual situation, enhancing the prediction ability and decision-making support role of the model.
[0064] In summary, the integrated circuit junction temperature and thermal resistance evaluation method based on digital twin technology according to the embodiments of the present application is elucidated. It extracts the temperature contour map from the simulation calculation results, and based on the heat dissipation path, extracts the heat flow streamline map from the temperature contour map, and uses the data analysis and coding technology of deep learning to discretely sample the heat flow streamline map. Then, the embedded coding is performed on each heat flow point data (flow point position and heat flow point temperature) after sampling. In this way, the rectangular frame position data of the hot spot area is automatically identified according to the significant aggregation representation of the graph walk between the embedded coding features of each heat flow point data. Through this method, the influence of microstructures (such as connecting lines, solder joints, etc.) on the heat transfer path can be captured, better adapting to complex heat dissipation requirements and ensuring the effective satisfaction of heat dissipation needs. Moreover, the change patterns and trends of the heat distribution can be comprehensively captured and respond to transient changes in real time to discover potential overheating points or abnormal conditions.
[0065] Furthermore, an integrated circuit junction temperature and thermal resistance evaluation system based on digital twin technology is also provided.
[0066] Figure 4 FIG. is a block diagram of an integrated circuit junction temperature and thermal resistance evaluation system based on digital twin technology according to the embodiments of the present application. As Figure 4 shown, the integrated circuit junction temperature and thermal resistance evaluation system 300 based on digital twin technology according to the embodiments of the present application includes: a digital twin model establishment module 310 for establishing an integrated circuit digital twin model; a heat dissipation path construction module 320 for constructing a single heat dissipation path in the integrated circuit digital twin model; a data transmission module 330 for monitoring the temperature data collected by temperature sensors in the integrated circuit and transmitting the temperature data collected by the temperature sensors to the integrated circuit digital twin model; a simulation calculation module 340 for loading input power to the digital twin model based on different test conditions, and determining boundary conditions and grid parameters to perform simulation calculations to obtain simulation calculation results; a hot spot area determination module 350 for determining a hot spot area based on the simulation calculation results; a digital twin model improvement module 360 for improving the integrated circuit digital twin model based on the hot spot area to obtain an improved integrated circuit digital twin model; and a data feedback module 370 for real-time monitoring of the temperature data of the actual integrated circuit and real-time feedback of the temperature data to the improved integrated circuit digital twin model.
[0067] As described above, the integrated circuit junction temperature and thermal resistance evaluation system 300 based on digital twin technology according to the embodiments of the present application can be implemented in various wireless terminals, such as a server having an integrated circuit junction temperature and thermal resistance evaluation algorithm based on digital twin technology. In a possible implementation manner, the integrated circuit junction temperature and thermal resistance evaluation system 300 based on digital twin technology according to the embodiments of the present application can be integrated into the wireless terminal as a software module and / or a hardware module. For example, the integrated circuit junction temperature and thermal resistance evaluation system 300 based on digital twin technology can be a software module in the operating system of the wireless terminal, or can be an application program developed for the wireless terminal; of course, the integrated circuit junction temperature and thermal resistance evaluation system 300 based on digital twin technology can also be one of the many hardware modules of the wireless terminal.
[0068] Alternatively, in another example, the integrated circuit junction temperature and thermal resistance evaluation system 300 based on digital twin technology and the wireless terminal can also be separate devices, and the integrated circuit junction temperature and thermal resistance evaluation system 300 based on digital twin technology can be connected to the wireless terminal through a wired and / or wireless network and transmit interaction information in accordance with a predefined data format.
[0069] The embodiments of the present disclosure have been described above. The above description is exemplary and not exhaustive, and is not limited to the disclosed embodiments. Many modifications and variations are obvious to those of ordinary skill in the art in the technical field without departing from the scope and spirit of the described embodiments. The selection of the terms used herein is intended to best explain the principles of the embodiments, the practical application, or the improvement of the technology in the market, or to enable other ordinary skill in the art in the technical field to understand the disclosed embodiments.
Claims
1. A method for evaluating junction temperature and thermal resistance of integrated circuits based on digital twin technology, characterized in that: The method comprises: step 1: establishing an integrated circuit digital twin model; step 2: constructing a single heat dissipation path in the integrated circuit digital twin model; Step 3: monitor the temperature data collected by the temperature sensor in the integrated circuit, and transmit the temperature data collected by the temperature sensor to the digital twin model of the integrated circuit; Step 4: load the input power to the digital twin model based on different test conditions, and determine the boundary conditions and grid parameters to perform simulation calculations to obtain simulation calculation results; Step 5: determine the hot spot area based on the simulation calculation results; Step 6: based on the hot spot area, improve the digital twin model of the integrated circuit to obtain an improved digital twin model of the integrated circuit; Step 7: monitor the temperature data of the actual integrated circuit in real time, and feed the temperature data back to the improved digital twin model of the integrated circuit in real time; Among them, the step 5 includes: extracting a temperature cloud map from the simulation calculation results; extracting a heat flow line diagram from the temperature cloud map based on the heat dissipation path; discretely sampling the heat flow line diagram to obtain a sequence of heat flow point data, the heat flow point data including the heat flow point position and the heat flow point temperature; embedding and encoding each heat flow point data in the sequence of heat flow point data to obtain a sequence of heat flow point data embedded coding features; performing graph walk autocorrelation gated significant aggregation on the sequence of heat flow point data embedded coding features to obtain a heat flow point set significant aggregation feature; based on the heat flow point set significant aggregation feature, obtaining a recognition result, the recognition result is the rectangular frame position data of the hot spot area, and the simulation calculation result is the junction temperature and thermal resistance data.
2. The integrated circuit junction temperature and thermal resistance evaluation method based on digital twin technology according to claim 1 is characterized in that: Each hot flow point data in the sequence of hot flow point data is embedded and encoded to obtain a sequence of hot flow point data embedded coding features, including: each hot flow point data in the sequence of hot flow point data is embedded and encoded through a hot flow point data embedding matrix to obtain a sequence of hot flow point data embedded coding vectors as the sequence of hot flow point data embedded coding features.
3. The integrated circuit junction temperature and thermal resistance evaluation method based on digital twin technology according to claim 2 is characterized in that: The sequence of the heat flow point data embedded coding features is subjected to graph walk autocorrelation gating significant aggregation to obtain the heat flow point set significant aggregation features, including: Inputting each heat flow point data embedding coding vector in the sequence of heat flow point data embedding coding vectors into a hyperbolic space mapper to obtain a sequence of heat flow point data embedding coding vectors after hyperbolic space mapping; Based on the sequence of heat flow point data embedded in the coding vector after the hyperbolic space mapping, the graph walk topology feature is extracted to obtain the heat flow point data graph walk topology feature matrix; Based on the walk topology feature matrix of the heat flow point data graph, contextual semantic enhancement is performed on the sequence of heat flow point data embedded coding vectors after the hyperbolic space mapping to obtain a sequence of heat flow point data contextual semantic enhancement feature vectors; Based on the sequence of the hot flow point data context semantics enhanced feature vectors, the sequence of the hot flow point data embedded coding vectors is significantly gated and weighted aggregated to obtain a hot flow point set significant aggregation feature vector as the hot flow point set significant aggregation feature.
4. The integrated circuit junction temperature and thermal resistance evaluation method based on digital twin technology according to claim 3 is characterized in that: Based on the sequence of heat flow point data embedded in the coding vector after the hyperbolic space mapping, the graph walk topology feature is extracted to obtain the heat flow point data graph walk topology feature matrix, including: Calculating the Poincare distance between any two embedding coding vectors of the heat flow point data after hyperbolic space mapping in the sequence of embedding coding vectors of the heat flow point data after hyperbolic space mapping to obtain the walk topology matrix of the heat flow point data graph; The heat flow point data graph walk topology matrix is subjected to dilated convolution encoding to obtain a heat flow point data graph walk topology feature matrix.
5. The integrated circuit junction temperature and thermal resistance evaluation method based on digital twin technology according to claim 4 is characterized in that: Based on the wandering topological feature matrix of the heat flow point data graph, the sequence of heat flow point data embedded coding vectors after the hyperbolic space mapping is subjected to contextual semantic enhancement processing to obtain a sequence of heat flow point data contextual semantic enhancement feature vectors, including: inputting the wandering topological feature matrix of the heat flow point data graph and the sequence of heat flow point data embedded coding vectors after the hyperbolic space mapping into a global context wandering encoder based on a graph convolutional neural network model to obtain a sequence of heat flow point data contextual semantic enhancement feature vectors.
6. The integrated circuit junction temperature and thermal resistance evaluation method based on digital twin technology according to claim 5 is characterized in that: Based on the sequence of the hot flow point data context semantics enhanced feature vectors, performing significant gated weighted aggregation on the sequence of the hot flow point data embedded coding vectors to obtain a hot flow point set significant aggregation feature vector as the hot flow point set significant aggregation feature, including: Inputting each group of corresponding hot flow point data context semantics enhancement feature vectors and hot flow point data embedding coding vectors in the sequence of hot flow point data context semantics enhancement feature vectors and the sequence of hot flow point data embedding coding vectors into an autocorrelation gating unit to obtain a sequence of hot flow point data autocorrelation gating significant confidence factors; Inputting the sequence of the hot flow point data autocorrelation gated significant confidence factors into a normalization unit based on a Softmax function to obtain a sequence of the hot flow point data autocorrelation gated significant confidence weight factors; Based on the sequence of the autocorrelation gated significant confidence weight factors of the hot flow point data, the position-weighted sum of the sequence of the hot flow point data embedding encoding vectors is calculated to obtain the significant aggregation feature vector of the hot flow point set.
7. The integrated circuit junction temperature and thermal resistance evaluation method based on digital twin technology according to claim 6 is characterized in that: Based on the significant aggregation features of the heat flow point set, a recognition result is obtained, including: inputting the significant aggregation feature vector of the heat flow point set into a hot spot area identifier based on a decoder to obtain the recognition result.
8. An integrated circuit junction temperature and thermal resistance evaluation system based on digital twin technology, characterized in that: include: Digital twin model building module, used to build integrated circuit digital twin models; a heat dissipation path construction module, used to construct a single heat dissipation path in the integrated circuit digital twin model; A data transmission module, used to monitor the temperature data collected by the temperature sensor in the integrated circuit, and transmit the temperature data collected by the temperature sensor to the digital twin model of the integrated circuit; A simulation calculation module, used to load input power to the digital twin model based on different test conditions, and determine boundary conditions and grid parameters to perform simulation calculations to obtain simulation calculation results; A hot spot area determination module, used to determine the hot spot area based on the simulation calculation results; A digital twin model improvement module, used for improving the integrated circuit digital twin model based on the hot spot area to obtain an improved integrated circuit digital twin model; A data feedback module, used for real-time monitoring of temperature data of the actual integrated circuit, and feeding back the temperature data to the improved integrated circuit digital twin model in real time; A hot spot area determination module, used for extracting a temperature cloud map from the simulation calculation results; Based on the heat dissipation path, a heat flow line diagram is extracted from the temperature cloud map; discrete sampling is performed on the heat flow line diagram to obtain a sequence of heat flow point data, wherein the heat flow point data includes a heat flow point position and a heat flow point temperature; each heat flow point data in the sequence of heat flow point data is embedded and encoded to obtain a sequence of heat flow point data embedded coding features; graph walk autocorrelation gated significant aggregation is performed on the sequence of heat flow point data embedded coding features to obtain a heat flow point set significant aggregation feature; Based on the significant aggregation characteristics of the heat flow point set, an identification result is obtained, the identification result is the rectangular frame position data of the hot spot area, and the simulation calculation result is the junction temperature and thermal resistance data.
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