A launch control system suitable for phased array power weighting

Abstract

The present invention relates to the field of semiconductor devices and radio wave ranging, and is specifically a transmission control system suitable for phased array power weighting, including an amplitude phase control unit, a driving amplifier unit, a power amplifier unit, a power coupling unit, a power detection unit, a low-pass filter unit, an analog-to-digital conversion unit, a power supply control unit, and an isolator unit; the power supply control unit generates a control word control according to the feedback signal and the input control word initial value by introducing the output signal of the power amplifier unit as a feedback signal, and adjusts the power supply voltage provided by the power supply voltage stabilization unit to generate a dynamically variable VDD as a drain power supply voltage, thereby achieving the generation of multiple different power outputs under the condition of using only one power amplifier, and each power output is generated when the power amplifier is in a saturated state. The present invention can make the power amplifier work in a saturated state, improve the transmission efficiency, and is not easily affected by temperature fluctuations.

Description

Technical Field

[0001] The present invention relates to the fields of semiconductor devices and radio wave ranging, and in particular to a transmission control system suitable for phased array power weighting. Background Art

[0002] In current phased array radar systems, the antenna array is composed of several transceiver components, which account for over 60% of the radar system's hardware cost. To increase the radar's range, the combined transmit power often needs to reach kilowatts or even megawatts. With the increasing maturity of GaN power amplifier technology, and due to its advantages such as high breakdown voltage, high transmit power, and higher junction temperature, the final amplifier stage in the current phased array radar transmit channel typically uses GaN semiconductor processes to achieve power amplification. It is worth noting that the power amplifier is the most expensive component in the transmit channel, often accounting for more than half of the cost of the chips used in the radar's transceiver system.

[0003] As one of the key applications of phased array radar systems, weather radar carries multiple security missions. It can detect various weather conditions, including wind, rain, and lightning, and provide relevant data in real time. It is widely used in crowded places like airports and train stations, for large-scale conferences such as international conferences, and in remote mountainous areas and breeding bases. It can also provide necessary weather interference data for some aircraft. To further reduce the sidelobe level of the radar system and improve its anti-interference capability, in addition to using digitally controlled attenuators to control channel gain in multiple receive channels to achieve power weighting, the transmit channel also uses a combination of different output powers from multiple channels to achieve this goal.

[0004] This article describes a power weighting scheme for a traditional transmit system, using a digital array weather radar as a background requirement. This radar utilizes a unit-level digital phased array architecture. To achieve power weighting for the radar array's transmit channels, the output powers of the various transmit subarrays are calculated to be 42dBm, 44dBm, 46dBm, 48dBm, and 50dBm, corresponding to 16W, 25W, 40W, 63W, and 100W, respectively. Taking into account insertion losses from the power coupling unit, isolator unit, and output RF connector, and assuming a total insertion loss of approximately 1dB, the five subarrays require five different GaN power amplifiers (each containing several identical transmit channels). Their saturated output powers are 43dBm, 45dBm, 47dBm, 49dBm, and 51dBm, corresponding to 20W, 30W, 50W, 80W, and 120W, respectively.

[0005] To achieve these five different power outputs from the five sub-arrays, there are three main traditional approaches: First, each channel in the five sub-arrays uses a power amplifier with an output power of 51dBm. High-power attenuators of 8dB, 6dB, 4dB, 2dB, and 0dB are then cascaded behind each power amplifier, achieving saturated output powers of 43dBm, 45dBm, 47dBm, 49dBm, and 51dBm, respectively. However, this approach has significant drawbacks. The addition of these high-power attenuators significantly degrades the system's transmission efficiency, leading to a significant increase in energy consumption. Furthermore, the high-power attenuators are large in size and require external heat sinks, hindering system integration. Secondly, each of the five sub-arrays uses five different GaN power amplifiers with different output powers, achieving single-channel saturated output powers of 43dBm, 45dBm, 47dBm, 49dBm, and 51dBm, respectively. While this solution ensures transmission efficiency for each sub-array, the use of multiple power amplifiers with different output powers increases R&D and procurement costs. Furthermore, it is difficult to find a single manufacturer with a standard power amplifier with a 2dB step size for the same frequency band. Besides the development cycle and cost disadvantages, the use of different power amplifiers makes it difficult to maintain a 2dB power step accuracy. Furthermore, this solution hinders the cost-effective implementation of phased array radars and high-precision output power control, and reduces the flexibility of sub-array output power. For example, if the power difference between sub-arrays needs to be adjusted from a 2dB power step to a 1dB or 3dB step, multiple power amplifiers must be newly developed. Third, each channel in each of the five subarrays uses a single power amplifier with a 51dBm output power. Using power backoff, the saturated output powers are 43dBm, 45dBm, 47dBm, 49dBm, and 51dBm, respectively. The required power backoff amounts are 8dB, 6dB, 4dB, 2dB, and 0dB, respectively. While this solution reduces the number of power amplifiers and costs, power backoff reduces the power amplifier's transmission efficiency. Furthermore, power backoff requires precise control of input power, making it difficult to ensure accurate backoff accuracy and stable power output. Furthermore, the backoff power is more susceptible to environmental factors such as temperature. Summary of the Invention

[0006] The present invention aims to address the performance issues associated with power weighting in the aforementioned transmit channels, such as loss of transmit efficiency, poor transmit output accuracy, high cost, long cycle times, and difficulty controlling transmit output accuracy. By proposing a power-weighted transmit control system suitable for phased arrays, this system utilizes only one power amplifier and achieves varying transmit output powers by varying the power amplifier's drain supply voltage. In this process, the power amplifier can achieve high-efficiency output even when operating in a saturated transmit state, thereby achieving power weighting of the transmit system and reducing sidelobes in the radar system. Furthermore, this power amplifier can be designed solely based on the maximum power value of 51 dBm required for the power weighting of different subarrays.

[0007] To achieve the above object, the present invention adopts the following technical solutions:

[0008] A transmission control system suitable for power weighting of a phased array, comprising: an amplitude and phase control unit, a drive amplification unit, a power amplification unit, a power coupling unit, a power detection unit, a low-pass filter unit, an analog-to-digital conversion unit, a power supply control unit, and an isolator unit;

[0009] The input end of the amplitude and phase control unit is the inflow end of the radio frequency input signal RFin, and the output port is connected to the input end of the driving amplifier unit;

[0010] The output end of the driving amplifying unit is connected to the first input end of the power amplifying unit;

[0011] The second input terminal of the power amplifying unit is connected to the output terminal of the power supply control unit, and the output terminal is connected to the input terminal of the power coupling unit;

[0012] The first output end of the power coupling unit is connected to the input end of the isolator unit, and the second input end is connected to the power supply control unit after passing through the power detection unit, the low-pass filter unit, and the analog-to-digital conversion unit in sequence;

[0013] The output end of the isolator unit is the final signal output end of the entire transmission control system, and the output signal is RFout;

[0014] The power supply control unit includes a power supply stabilization unit, a data identification control unit and a switch resistor array unit; the input end of the power supply stabilization unit is a high-voltage power supply input end, and the output end is connected to the first input end of the switch resistor array unit; the first input end of the data identification control unit is connected to the analog-to-digital conversion unit, the second input end is the control word initial value input end, and the output end is connected to the second input end of the switch resistor array unit; the output end of the switch resistor array unit is the output end of the power supply control unit.

[0015] Furthermore, the amplitude and phase control unit includes a digitally controlled attenuator and a digitally controlled phase shifter, the input end of the digitally controlled attenuator is the input end of the amplitude and phase control unit, and the output end of the digitally controlled phase shifter is connected to the input end of the driving amplifier unit.

[0016] Furthermore, in order to compensate for the insertion loss caused by passive circuits such as the digitally controlled attenuator and the digitally controlled phase shifter, a gain compensation amplifier is also provided in the amplitude and phase control unit. The input end of the gain compensation amplifier is connected to the output end of the digitally controlled attenuator, and the output end of the gain compensation amplifier is connected to the input end of the digitally controlled phase shifter.

[0017] Furthermore, the driving amplification unit includes an adjustable attenuator and a driving amplifier; the input end of the adjustable attenuator is connected to the output end of the amplitude and phase control unit, and the output end is connected to the input end of the driving amplifier, which is used to adjust the input power of the driving amplifier to change the output power of the driving amplification unit to adapt to the power required by the power amplification unit; the output end of the driving amplifier is connected to the power amplification unit, which is used to amplify the signal output by the amplitude and phase control unit to obtain the target amplified signal.

[0018] Furthermore, the adjustable attenuator is implemented by gold wire jumpers without the need for additional control circuits, and can also be implemented by a digitally controlled attenuator with a control port. The attenuation range is 0-7dB, and the attenuation step is 1dB.

[0019] Furthermore, the power amplification unit includes a pulse modulation PMOS circuit and a power amplification circuit;

[0020] The pulse modulation PMOS circuit includes a PMOS transistor, whose gate is connected to the pulse control signal provided by the external radar system, the source is connected to the variable VDD provided by the power supply control unit, and the drain is connected to the power amplifier. The high and low level states of the pulse signal are used to control the conduction and shutdown of the PMOS transistor to achieve on-off modulation of the power supply of the power amplifier drain, thereby achieving a radar transmission-like pulse operation mode;

[0021] The power amplifier circuit includes an input-stage network matching unit, a power transistor, and an output-stage network matching unit; the input end of the input-stage network matching unit is connected to the output end of the driver amplifier, and the output end is connected to the power transistor, receiving the target amplified signal output by the driver amplifier, and being used to achieve impedance matching of the signal at the input end of the power transistor; the power amplifier is used to power amplify the target amplified signal; the output-stage network matching unit is connected to the input end of the coupler, and is used to achieve impedance matching between the output end of the power amplifier and the input end of the coupler.

[0022] Furthermore, the coupler is a high-power passive coupler with a coupling degree of 40 dB. When the input power is 43-51 dBm, the output power is approximately 3-11 dBm.

[0023] Furthermore, the power supply voltage stabilization unit includes a DC-DC converter and an LDO voltage regulator, the input end of the DC-DC converter is connected to the high-voltage power supply input end, the output end is connected to the input end of the LDO voltage regulator, and the output end of the LDO voltage regulator is connected to the switch resistor array unit as the output end of the power supply voltage stabilization unit.

[0024] The transmission control system of the present invention adopts a closed-loop feedback transmission control system. By introducing the output signal of the power amplifier unit as feedback information in the power supply control unit, a control word control is generated according to the feedback signal and the input control word initial value, and the power supply voltage provided by the power stabilizing unit is controlled to generate a dynamically variable VDD as the drain supply voltage, thereby achieving the generation of multiple different power outputs under the condition of using only one power amplifier, and each power output is generated when the power amplifier is in a saturated state. Compared with the power fallback operation in the linear state, the advantage of the power amplifier operating in the saturated state is that it achieves higher transmission efficiency and is less affected by temperature fluctuations. The present invention solves the comprehensive performance problems such as the loss of transmission efficiency caused by the need for multiple power amplifiers to achieve power weighting in the transmission channel, poor transmission output accuracy, high cost, long cycle, and difficulty in controlling transmission output accuracy. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 A block diagram comparing the existing weighted implementation scheme and the solution of the present invention;

[0026] Figure 2 This is a principle block diagram of a transmission control system suitable for phased array power weighting according to the present invention;

[0027] Figure 3 This is a principle block diagram of the driving amplification unit of the present invention;

[0028] Figure 4 This is a principle block diagram of the power amplification unit of the present invention;

[0029] Figure 5 This is a schematic diagram of a power amplifier circuit of the present invention;

[0030] Figure 6 is a return loss curve of the input port of the power amplifier circuit of the embodiment;

[0031] Figure 7 is a characteristic curve showing how the saturated output power of the power amplifier circuit of the embodiment changes with the drain voltage VDD;

[0032] Figure 8 is a characteristic curve showing the change of drain efficiency of the power amplifier circuit according to the embodiment as the drain voltage VDD changes;

[0033] Figure 9 1 is a characteristic curve showing how the output power and drain efficiency of the power amplifier circuit of the embodiment vary with input power. DETAILED DESCRIPTION

[0034] The technical solution of the present invention is described in detail below with reference to the embodiments and drawings. Figure 2 This embodiment provides a power-weighted transmission control system for a phased array, including an amplitude and phase control unit, a drive amplifier unit, a power amplifier unit, a power coupling unit, a power detection unit, a low-pass filter unit, an analog-to-digital conversion unit, a power supply control unit, and an isolator unit. The units are described in detail below:

[0035] The amplitude and phase control unit includes a digitally controlled attenuator and a digitally controlled phase shifter. After the digitally controlled attenuator and the digitally controlled phase shifter are cascaded, the input end of the data attenuator is the inflow end of the radio frequency input signal RFin, and the output end of the digitally controlled phase shifter is connected to the input end of the driving amplifier unit. The amplitude and phase control unit is used to adjust the amplitude and phase of the radio frequency input signal RFin according to requirements. In order to compensate for the insertion loss caused by passive circuits such as digitally controlled attenuators and digitally controlled phase shifters, this embodiment also integrates a gain compensation amplifier in the amplitude and phase control unit to compensate for the gain requirements of the radio frequency transmission channel in the phased array system; after the gain compensation amplifier is integrated, the input end of the amplifier is connected to the output end of the digitally controlled attenuator, and the output end is connected to the input end of the digitally controlled phase shifter.

[0036] Figure 3 The principle block diagram of the drive amplifier unit is given. Figure 3 In the figure, Vi is the input terminal of the driving amplifier unit, Vo is the output terminal of the driving amplifier unit, and GND is the ground terminal of the driving amplifier chip. The driving amplifier unit includes an adjustable attenuator, a driving amplifier, and a power modulation chip. The input terminal of the adjustable attenuator is connected to the digitally controlled phase shifter of the amplitude and phase control unit as the input terminal of the driving amplifier unit, and the output terminal is connected to the input terminal of the driving amplifier; it is used to adjust the power of the input signal after amplitude and phase adjustment to change the output power of the driving amplifier to adapt it to the power required by the power amplifier unit. The output terminal of the driving amplifier is connected to the power amplifier unit as the output terminal of the driving amplifier unit; it is used to power amplify the input signal adapted by the adjustable attenuator to obtain the target amplified signal. The power modulation chip is used to provide a pulse-modulated power supply voltage for the driving amplifier. In this embodiment, the adjustable attenuator is implemented using a gold wire jumper method that does not require an additional control single channel. It can also be implemented using a digitally controlled attenuator with a control port. Its attenuation range is 0~7dB, and the attenuation step is 1dB.

[0037] Figure 4 The principle block diagram of the power amplifier unit is given. Figure 4In the figure, PA represents the power amplifier circuit, Vi is the input terminal of the power amplifier circuit, Vo is the output terminal of the power amplifier circuit, Vd is the drain bias voltage of the power amplifier circuit, Vg is the gate bias voltage of the power amplifier circuit, and GND is the ground terminal of the power amplifier circuit; the variable VDD generated by the switch resistor array unit provides the drain supply voltage for the power amplifier circuit through the pulse PMOS circuit, and the opening and closing of the PMOS circuit are controlled by the potential Vp. Figure 4 The power amplifier unit includes a pulse modulation PMOS circuit and a power amplifier circuit. The pulse modulation PMOS circuit is composed of a PMOS transistor, whose gate is connected to the control pulse signal provided by the external radar system, the source is connected to the variable VDD provided by the power supply control unit, and the drain is connected to the drain bias voltage of the power amplifier circuit. The high and low levels of the pulse signal control the conduction and shutdown of the PMOS transistor, thereby controlling the on-off modulation of the power amplifier drain, so that the power amplifier circuit has a radar transmission-like pulse operation mode.

[0038] Figure 5 The power amplifier circuit schematic diagram inside the power amplifier unit is given. The power amplifier circuit operates in the L band and is designed using microwave distributed circuit parameters. Figure 5 The power amplifier circuit includes an input-stage network matching unit, a high-power transistor, and an output-stage network matching unit. Both the input-stage network matching unit and the output-stage network matching unit are implemented using ceramic matching circuits. The high-power transistor is manufactured using an existing GaN semiconductor process. The power amplifier circuit has an input port signal of vin, an output port signal of vout, gate voltage bias ports of VGa and VGb, and drain voltage bias ports of VDa and VDb.

[0039] The input stage matching unit includes capacitor C1, capacitor C2a, capacitor C2b, transmission lines TL1, TL2, TL3, TL4, TL5, TL6, TL7, TL8a, TL8b, resistors R1a, R1b, and R2. One end of capacitor C1 is connected to the input port signal vin, and the other end is connected to a port of transmission line TL1. The other end of transmission line TL1 is connected to one end of transmission line TL2 and one end of transmission line TL4, respectively. The other end of transmission line TL2 is connected to the first port of transmission line TL3. The other end of transmission line TL3 is open. The other end of transmission line TL4 is connected to one end of transmission line TL5 and one end of transmission line TL7. The other end of transmission line TL5 is connected to one end of transmission line TL6. The other end of transmission line TL6 is open. The other end of transmission line TL7 is connected to one end of transmission line TL8a, one end of transmission line TL8b, and one end of resistor R2. The other end of transmission line TL8a is connected to one end of resistor R1a, and the other end of transmission line TL8b is connected to one end of resistor R1b. The other end of resistor R1a is connected to one end of capacitor C2a and gate bias terminal VGa. The other end of resistor R1b is connected to one end of capacitor C2b and gate bias terminal VGb. The other end of capacitor C2a is grounded. The other end of capacitor C2b is also grounded. The other end of resistor R2 serves as the output terminal of the input stage network matching unit.

[0040] The gate of the high-power transistor HT1 is connected to the other end of the resistor R2, and its input signal comes from the output signal of the input-stage network matching unit. The source of the high-power transistor HT1 is grounded, and the drain outputs the amplified signal to the output-stage network matching unit.

[0041] The output-stage network matching unit includes transmission lines TL9, TL10a, TL10b, TL11, TL12a, TL12b, TL13a, TL13b, TL14, capacitors C3a, C3b, and C4. One end of transmission line TL9 serves as the input of the output matching network, connected to the drain of high-power transistor HT1 and receiving the amplified signal from high-power transistor HT1. The other end of transmission line TL9 is connected to one end of transmission line TL10a, one port of transmission line TL10b, and one end of transmission line TL11. The other end of transmission line TL10a is connected to one end of capacitor C3a and drain bias port VDa. The other end of transmission line TL10b is connected to one end of capacitor C3b and drain bias port VDb. The other end of transmission line TL11 is connected to one end of transmission line TL12a, one end of transmission line TL12b, and one port of transmission line TL14. The other end of transmission line TL12a is connected to one end of transmission line TL13a. The other end of transmission line TL13a is open. The other end of transmission line TL12b is connected to one end of transmission line TL13b. The other end of transmission line TL13b is open. One end of transmission line TL14 is connected to one end of capacitor C4. The other end of capacitor C4 is the output end of the output stage network matching unit, which outputs signal vout.

[0042] In this embodiment, capacitor C1 within the power amplifier circuit serves as an input port DC blocking capacitor, capacitor C4 serves as an output port DC blocking capacitor, capacitors C2a and C2b serve as gate bias port filter capacitors with the same capacitance, and capacitors C3a and C3b serve as drain bias port filter capacitors with the same capacitance. Resistors R1a, R1b, and R2 are implemented using TaN thin-film resistors compatible with alumina ceramic thin-film circuit processes to enhance the stability of the power amplifier. Resistors R1a and R1b have the same resistance value. Transmission lines TL1, TL2, TL3, TL4, TL5, TL6, TL7, TL8a, and TL8b are appropriately configured to achieve input matching for the power amplifier circuit, resulting in good input port return loss. Transmission lines TL8a and TL8b have the same length and width, ensuring strict symmetry at the gate bias ports. Transmission lines TL9, TL10a, TL10b, TL11, TL12a, TL12b, TL13a, TL13b, and TL14 achieve optimal fundamental and harmonic impedance matching for the power amplifier circuit through appropriate values, resulting in high drain-level output efficiency. Transmission lines TL10a and TL10b have identical lengths and widths, ensuring strict symmetry at the drain bias port. Transmission lines TL12a and TL12b have identical lengths and widths, and transmission lines TL13a and TL13b have identical lengths and widths. High-power transistor HT1 internally incorporates a multi-cell HEMT transistor, achieving high power output capability through multi-cell synthesis. Electrical interconnection between the output-stage network matching units is achieved through gold wire bonding, resulting in a simple and highly consistent assembly process.

[0043] The high-power transistor HT1 uses a GaN power transistor, which is manufactured using an industrial-grade GaN semiconductor process and has excellent high efficiency characteristics at +48V and +28V drain voltages. Alumina ceramic is used as the impedance matching circuit network. When powered by a +48V drain power supply, the saturated output power is 51dBm at a gate voltage bias of -3V. When the drain voltage +48V drops, the output power drops accordingly. During implementation, the input-stage network matching unit is integrated on a ceramic thin film circuit, and the output-stage network matching unit is integrated on a ceramic thin film circuit. There is a separate heat dissipation carrier under the GaN high-power transistor between the input-stage network matching unit and the output-stage network matching unit. The input signal port vin, the output port signal vout, the gate voltage bias ports VGa, VGb, and the drain voltage bias ports VDa, VDb are as follows. Figure 5Correspondingly, the microwave signal port, gate voltage bias port, drain voltage bias port, input-stage network matching unit, high-power transistor, and output-stage network matching unit are electrically interconnected through gold wire bonding, which has the advantages of simple assembly process and high consistency.

[0044] The input end of the power coupling unit is connected to the output end of the power amplifier output stage network matching unit. The first output end of the power coupling unit is connected to the input port of the isolator unit, and the target amplified signals of different output powers are used as the final output signal. After isolation processing, they are output as the final signal RFout of the transmission control system. The second output port of the power coupling unit is connected to the input port of the power detection unit, and the target amplified signals of different output powers are used as feedback information after detection, low-pass filtering, and analog-to-digital conversion, and then transmitted to the power supply control unit. In this embodiment, the power coupling unit integrates a high-power passive coupler with a coupling degree of 40dB. When the input power is 43-51dBm, the output power is approximately 3-11dBm, which is suitable for the power input range of the detector within the power detection unit. It should be noted that the coupling degree of the coupler can also be designed to other values ​​(for example, 35dB, 45dB, etc.). The key is to ensure that the coupled output power can adapt to the detection power input range of the detector.

[0045] See Figure 6 , is the input return loss characteristic curve of the power amplifier circuit. Through the matching design of the input stage network matching unit and the high-power transistor, the input return loss is less than -12dB within the 1.2~1.4 GHz frequency range specified by the L-band radar.

[0046] See Figure 7 , which is the characteristic curve of the saturated output power of the power amplifier circuit as the drain voltage VDD changes. The saturated output power can be changed by changing the value of the drain voltage VDD. When the VDD voltage changes between 18 and 48V, the saturated output power of the power amplifier circuit can change within the range of 43dBm to 51dBm. It can be seen that the method of controlling the switch resistor array unit to achieve VDD change through the data recognition control unit can achieve the output power change of the power amplifier and meet the weighted power requirements of the sub-array.

[0047] The power amplifier is the core component. Figure 8 By optimizing the fundamental and harmonic impedance matching between the output-stage network matching unit and the high-power transistors, and varying the drain voltage VDD to adjust the saturated output power, a high-efficiency output exceeding 82% is achieved. This feature accommodates the varying output power requirements of each subarray, enabling highly efficient transmit power weighting of phased array systems. Figure 9For the characteristic curve of the output power and drain efficiency of the power amplifier circuit as a function of input power, refer to Figure 9 It can be seen that when the power back-off solution in the existing solution three is used to achieve the output power required by the sub-array, the drain-level efficiency will be significantly reduced. For example, when the input power is 28 dBm, the output power is 47 dBm. At this time, the drain-level efficiency is less than 50%, resulting in the transmission efficiency of the sub-array being significantly lower than the transmission efficiency of this embodiment.

[0048] The power detection unit is connected to the input end of the power supply control unit via a low-pass filter unit and an analog-to-digital conversion unit. The power detection unit is used to detect the input signal of the coupler to obtain a detection signal output. The low-pass filter unit is used to filter out the high-frequency signal in the detection signal and retain only the low-frequency signal. The low-frequency signal can determine the size of the coupled output power and its corresponding relationship, so as to evaluate the output power of the power amplifier. The analog-to-digital conversion unit is used to sample the low-frequency signal output by the low-pass filter unit and convert the sampled signal into a digital signal. In this embodiment, the analog-to-digital converter inside the analog-to-digital conversion unit can be implemented using a low-speed, high-precision sampling circuit of more than 12 bits, and the output port of the analog-to-digital conversion unit is connected to the power supply control power supply.

[0049] The power supply control unit includes a power supply voltage stabilization unit, a data identification control unit and a switch resistor array unit; wherein:

[0050] The power supply voltage regulator unit is used to provide power supply voltage. The input port of the power supply voltage regulator unit is a high-voltage power supply input. The unit includes a DC-DC converter, an LDO voltage regulator, etc., and its function is to convert the high-voltage power supply into a low-voltage power supply while achieving a high power conversion efficiency. It should be noted that the power supply voltage regulator unit not only generates the power supply VDD required by the power amplifier, but also generates the power required by the driver amplifier, control circuit, etc., such as +5V, +3.3V, etc. The output port of the power supply voltage regulator unit is connected to the second input port of the switch resistor array unit. The power supply voltage regulator unit includes a DC-DC converter and an LDO voltage regulator. The input end of the DC-DC converter is connected to the high-voltage power supply input end, and the output end is connected to the input end of the LDO voltage regulator. The output end of the LDO voltage regulator is connected to the switch resistor array unit as the output end of the power supply voltage regulator unit.

[0051] The data identification control unit receives the initial control word input value and feedback information from the analog-to-digital converter. Based on the initial control word input value and feedback information, it generates different control words and transmits them to the switch resistor array unit. The data identification control unit inputs the initial control word value and can assign the initial control word to the switch resistor array unit. It also reads back the VDD data based on the digital signal provided by the analog-to-digital converter and dynamically adjusts the multi-bit control word assigned to the switch resistor array unit based on the detection information, thereby regulating the power supply voltage VDD and ultimately adjusting the output power of the power amplifier unit. The output port of the data identification control unit is connected to the first input port of the switch resistor array unit. The switch resistor array unit acts as a load regulating resistor for the power supply voltage regulator unit, adjusting the power supply voltage based on the received control word to generate a variable VDD. The variable VDD has a voltage value ranging from 15 to 50V. The switch resistor array unit serves as the variable resistor load end of the power supply voltage stabilization unit. The output port can generate a variable VDD voltage value for powering the power amplifier unit. The resistance value of the variable resistor load end is directly controlled by the digital signal output by the analog-to-digital conversion unit. A certain digital control word corresponds to a certain resistance value, and one control word corresponds to one VDD voltage output.

[0052] This embodiment provides a comparison of the effects of three typical existing solutions for implementing power weighting for different sub-arrays in a transmission system and the aforementioned transmission control system applicable to phased array power weighting. To simplify the analysis, the circuits behind the power amplifier that cause insertion loss are not discussed here.

[0053] See Figure 1 , Figure 1Here, PA1, PA2, PA3, PA4, and PA5 represent five power amplifiers with different saturated output powers, and the saturated output powers are PO1=43dBm, PO2=45dBm, PO3=47dBm, PO4=49dBm, and PO5=51dBm. In the existing solution one, a power amplifier PA1 is used. PA1 works in a saturated output state and the drain voltage is +48V. By cascading 8dB, 6dB, 4dB, 2dB, and 0dB high-power attenuators fixed to PA1, five different power outputs PO1, PO2, PO3, PO4, and PO5 of the five sub-arrays are realized, thereby realizing power weighted processing of the sub-arrays. This solution has the disadvantages of low transmission efficiency, high energy consumption, and large size of high-power attenuators requiring additional heat dissipation measures. In the existing solution two, five different power amplifiers are used in the five sub-arrays. PA1, PA2, PA3, PA4, and PA5 all work in a saturated output state and have a drain voltage of +48V, achieving five output powers PO1, PO2, PO3, PO4, and PO5, thereby realizing power weighted processing of the sub-array. This solution can achieve high transmission efficiency for each sub-array, but the five power amplifiers will lead to increased costs, difficulty in controlling step accuracy, and poor flexibility in power variation. In the existing solution three, a power amplifier PA1 with a drain voltage of +48V is used, of which only one power amplifier PA1 with a sub-array output power of PO5 works in a saturated state. Output state, the remaining output powers PO1, PO2, PO3, PO4 of the sub-array PA1 are all working in the power back-off state, and the five output powers PO1, PO2, PO3, PO4, and PO5 are achieved by controlling the input power to adjust the output power, thereby realizing power weighted processing of the sub-array. This solution has the problems of low transmission efficiency, difficult to control the power back-off accuracy, and sensitivity to temperature fluctuation factors. In this embodiment, only one GaN power amplifier PA1 is used, and the five output powers PO1, PO2, PO3, PO4, and PO5 can also be achieved by changing the drain supply voltage. O4 and PO5, thereby realizing power weighting of the transmitting system. The power amplifier PA1 with different power supply voltages can achieve high-efficiency output when working in a saturated transmitting state. When the typical value is +48V drain power supply, the output power of the transmitting channel is 51dBm. When the drain power supply continues to decrease, the saturated output power decreases accordingly. Only one power amplifier is used to achieve high-efficiency output of different sub-arrays. Compared with the three existing solutions, although they can ultimately achieve the purpose of power weighting of different sub-arrays in the phased array transmitting system, the embodiment solution takes into account the advantages of low cost, high efficiency, and high-precision output power control.

[0054] In addition to the above implementations, the transmission control system applicable to phased array power weighting of this embodiment may also adopt conventional microwave modules, three-dimensional stacked circuits and other technical means.

[0055] The description of the above specific implementation manner should be clear to those skilled in the art. The above specific implementation manner is merely a specific example of implementation and is not restrictive. The present invention is not limited to a specific transmit frequency band, a specific number of subarrays, a specific power range, or a specific implementation process. It is also not limited to the transmit control system itself. It can also be integrated with a receive system to implement power weighting of a phased array transceiver system. Any method of implementing phased array transmit power weighting using the same method is within the scope of protection of the present invention.

Claims

1. A transmission control system suitable for phased array power weighting, comprising: An amplitude and phase control unit, a drive amplifier unit, a power amplifier unit, a power coupling unit, a power detection unit, a low-pass filter unit, an analog-to-digital conversion unit, a power supply control unit and an isolator unit, characterized in that: The input end of the amplitude and phase control unit is the inflow end of the radio frequency input signal RFin, and the output port is connected to the input end of the driving amplifier unit; The output end of the driving amplifier unit is connected to the first input end of the power amplifier unit; The second input end of the power amplification unit is connected to the output end of the power supply control unit, and the output end is connected to the input end of the power coupling unit; The first output end of the power coupling unit is connected to the input port of the isolator unit, and the second output port is connected to the power supply control unit after passing through the power detection unit, the low-pass filter unit, and the analog-to-digital conversion unit in sequence; The output end of the isolator unit is the final signal output end of the entire transmission control system, and the output signal is RFout; The power supply control unit includes a power supply voltage stabilizing unit, a data identification control unit and a switch resistor array unit; the input end of the power supply voltage stabilizing unit is a high voltage power supply input end, and the output end is connected to the first input end of the switch resistor array unit; The first input end of the data identification control unit is connected to the analog-to-digital conversion unit, the second input end is the control word initial value input end, and the output end is connected to the second input end of the switch resistor array unit; the output end of the switch resistor array unit is the output end of the power supply control unit.

2. The transmission control system suitable for phased array power weighting according to claim 1, characterized in that: The amplitude and phase control unit comprises a digitally controlled attenuator and a digitally controlled phase shifter. The input end of the digitally controlled attenuator is the input end of the amplitude and phase control unit, and the output end of the digitally controlled phase shifter is connected to the input end of the driving amplifier unit.

3. The transmission control system suitable for phased array power weighting according to claim 2, characterized in that: A gain compensation amplifier is also provided in the amplitude and phase control unit. The input end of the gain compensation amplifier is connected to the output end of the digitally controlled attenuator, and the output end of the gain compensation amplifier is connected to the input end of the digitally controlled phase shifter.

4. The transmission control system suitable for phased array power weighting according to claim 1, characterized in that: The driving amplifier unit includes an adjustable attenuator and a driving amplifier; the input end of the adjustable attenuator is connected to the output end of the amplitude and phase control unit, and the output end is connected to the input end of the driving amplifier, which is used to adjust the input power of the driving amplifier to change the output power of the driving amplifier unit to adapt to the power required by the power amplifier unit; the output end of the driving amplifier is connected to the power amplifier unit, which is used to amplify the signal output by the amplitude and phase control unit to obtain a target amplified signal.

5. The transmission control system suitable for phased array power weighting according to claim 4, characterized in that: The adjustable attenuator is realized by using a gold wire jumper or a digitally controlled attenuator with a control port.

6. The transmission control system suitable for phased array power weighting according to claim 1, characterized in that: The power amplification unit includes a pulse modulation PMOS circuit and a power amplification circuit; The pulse modulation PMOS circuit includes a PMOS tube, whose gate is connected to the pulse control signal provided by the external radar system, the source is connected to the variable VDD provided by the power supply control unit, and the drain is connected to the power amplifier. The PMOS tube is controlled to be turned on and off by the high and low level states presented by the pulse signal to realize the on-off modulation of the power amplifier drain, thereby having a pulse working mode of the radar transmission state; The power amplifier circuit includes an input-stage network matching unit, a power transistor and an output-stage network matching unit; The input end of the input-stage network matching unit is connected to the output end of the driving amplifier, and the output end is connected to the power transistor, receiving the target amplified signal output by the driving amplifier, and is used to achieve impedance matching of the signal at the input end of the power transistor; the power amplifier is used to amplify the power of the target amplified signal; the output-stage network matching unit is connected to the input end of the coupler, and is used to achieve impedance matching between the output end of the power amplifier and the input end of the coupler.

7. The transmission control system suitable for phased array power weighting according to claim 1, characterized in that: The coupler is a high-power passive coupler with a coupling degree of 40 dB. When the input power is 43-51 dBm, the output power is 3-11 dBm.

8. The transmission control system suitable for phased array power weighting according to claim 1, characterized in that: The power supply voltage stabilization unit includes a DC-DC converter and an LDO voltage regulator. The input end of the DC-DC converter is connected to the high voltage power supply input end, and the output end is connected to the input end of the LDO voltage regulator. The output end of the LDO voltage regulator is connected to the switch resistor array unit as the output end of the power supply voltage stabilization unit.

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