Industrial bus-based card address node issuing method

Abstract

The application relates to the technical field of electric digital data processing, in particular to error detection. The technical scheme is as follows: a data access screening method based on a traffic radar, comprising the following steps: a card piece address node issuing method based on an industrial bus, comprising the following steps: a controller monitors the change of a detection pin level in real time; the number of online card pieces is judged according to the change of the level, and a corresponding confirmation signal is issued; after receiving the confirmation signal, the card piece carries out self-checking, replies to a response packet; the controller issues node information, the card piece replies to a secondary response signal after receiving the node information, the controller receives the secondary response signal and issues an online signal, and the card piece is formally online. The application solves the problems that the existing technology cannot cope with the hot plug of multiple card pieces, address identification is prone to error, system reliability is low, and maintenance is difficult, and proposes a card piece address node issuing method based on an industrial bus, so that the purposes of high reliability, hot plug of multiple card pieces, low cost and easy maintenance are achieved.

Description

Technical Field

[0001] This invention relates to the field of electronic digital data processing technology, and more particularly to error detection. Background Technology

[0002] Currently, rackmount card address node assignment typically uses physical address DIP switches / knobs, with the card only reading the node address upon power-up. This method has several drawbacks. For example, in harsh industrial environments, the failure rate of the DIP switches is relatively high, leading to numerous cascading failures. Furthermore, the current card node acquisition mechanism is not correlated with the card's own operating status or the bus status, potentially causing faulty cards to incorrectly connect and affect the entire bus. When faced with the simultaneous hot-swapping of multiple cards, existing technology may cause address recognition errors, thereby affecting bus communication.

[0003] For example, Chinese patent CN112380082A discloses a board compatibility management system and method based on a network-connected test service node, providing the following technical solution: This invention is a board compatibility management method based on a network-connected test service node, belonging to the field of intelligent transportation, aiming to solve problems such as board incompatibility due to the complexity of traffic intersections. This invention includes, when a board is inserted, the power system supplies power and monitors whether the board current is normal, then automatically assigns a hardware address through an address manager. After the address recognition is normal, communication is established with the host via a CAN bus, informing the motherboard of the current power supply status and address status information of the board. After successful bus communication, data exchange is performed via serial port or Ethernet to achieve complete operation of the hardware board system. This invention is simple in design and easy to use: different types and quantities of data acquisition cards can be freely combined without manual or design personnel management, facilitating both development and maintenance. However, the aforementioned board compatibility management method based on a network-connected test service node relies on the network-connected test node, increasing system complexity and cost, having limited hot-swapping support, potential address resolution conflicts, increased maintenance difficulty, and less stable compatibility compared to traditional methods. Summary of the Invention

[0004] This invention solves the problems of existing technologies, such as inability to handle simultaneous hot-swapping of multiple cards, easy address identification errors, low system reliability, and high maintenance difficulty. It proposes a card address node distribution method based on an industrial bus, which achieves the goals of high reliability, simultaneous hot-swapping of multiple cards, low cost, and easy maintenance.

[0005] To achieve the above objectives, the present invention adopts the following technical solution:

[0006] A method for issuing card address nodes based on an industrial bus includes the following steps:

[0007] S1: The controller monitors and detects changes in the level of the detection pin in real time;

[0008] S2: Determine the number of cards online based on the level change and send a corresponding confirmation signal;

[0009] S3: After receiving the confirmation signal, the card performs a self-test and replies with a response packet;

[0010] S4: The controller sends node information, the card receives it and replies with a secondary response signal, the controller receives it and sends an online signal, and the card is officially online.

[0011] The advantage of this design is that it enables the automatic distribution of card addresses, improving the automation and reliability of the system.

[0012] Preferably, step S2 includes the following steps:

[0013] S2.1: Determine the number of cards online based on the level change. If it is a single card, proceed to step S2.3; if it is multiple cards, proceed to step S2.2.

[0014] S2.2: Add the random number enable flag to the online confirmation signal data packet;

[0015] S2.3: The controller sends an online confirmation signal data packet through the bus.

[0016] The advantage of this design is that it can dynamically adjust the processing logic based on the number of cards, avoid conflicts when multiple cards are online at the same time, and improve the accuracy of address allocation and system stability.

[0017] Preferably, in step S3, after the card receives the online confirmation signal data packet, it enters the corresponding self-test program according to the bus status. After the self-test is completed, the self-test result is output. The self-test result and the card information together form a card response packet, which replies to the controller and waits for the next step. The card response packet includes card version and model information as well as self-test result information.

[0018] The advantage of this design is that, through self-checking and information feedback, it ensures that the card is in good condition and meets system requirements, thereby improving the overall reliability and compatibility of the system.

[0019] Preferably, in step S3, if multiple cards are online, after the card's online confirmation signal data packet is parsed, a random number is generated and converted using a built-in random number generation algorithm to finally generate a serial number. Then, the card waits according to the serial number and recovers the data packet according to the waiting time interval.

[0020] The advantage of this design is that it avoids data packet conflicts caused by multiple cards responding simultaneously through random serial numbers and waiting mechanisms, ensuring the smooth progress of the address allocation process.

[0021] Preferably, step S4 includes the following steps:

[0022] S4.1: The controller comprehensively judges whether the card's online status will affect the communication bus based on the response packet information. If so, the card's online status will be rejected. If not, proceed to step S4.2.

[0023] S4.2: The controller sends node address data packets;

[0024] S4.3: After receiving the node address data packet, the card records the node address sent by the controller and then replies with a secondary response signal to the controller;

[0025] S4.4: After receiving the secondary response signal, the controller sends a card online signal through the bus or communicates with the card through the GPIO port to officially go online;

[0026] S4.5: After receiving the card online signal, the card records its own node address and working mode, enters the corresponding working mode according to the controller's requirements, connects to the bus, and enters normal operation.

[0027] The advantage of this design is that, through comprehensive judgment, it ensures that the status and version of the cards meet the requirements before they go online, preventing incompatible or faulty cards from affecting the entire system.

[0028] Preferably, the online confirmation signal data packet includes a system node status enable bit, a main controller information bit, and a reserved bit; in step S2.2, the random number enable flag is added to the reserved bit.

[0029] The advantage of this design is that it enhances the flexibility and information content of data packets through status enable bits and master controller information bits, improves system maintainability, and reserves bits to add random number enable flags to avoid bus conflicts caused by multiple cards replying to response packets at the same time.

[0030] Preferably, the comprehensive judgment of whether the card's online status will affect the communication bus includes judging whether the card is in good condition, judging whether the card version information is consistent with the configuration requirements, judging whether the card version and model meet the requirements based on its own configuration information and version information database, and judging whether the verification device's self-test results meet the requirements; the node address data packet includes the node address data packet flag bit, device working mode information, and device node address.

[0031] The advantage of this design is that a comprehensive judgment mechanism ensures that only cards that meet the conditions can be launched, avoiding communication failures caused by version incompatibility or abnormal status, and improving the overall stability of the system.

[0032] Preferably, the detection pin is an ADC pin with voltage sampling function. The pins connected to the lower card and the detection pin contain pull-down resistors with different resistance values. When the lower card is inserted, the equivalent resistance of the detection pin to ground changes, causing a change in the sampling level. The number of cards currently inserted is determined based on the degree of level change.

[0033] The advantage of this design is that it accurately detects the number of cards by sampling voltage and measuring resistance changes, thereby improving the accuracy and reliability of the detection and ensuring the accuracy of determining the number of cards inserted.

[0034] Preferably, the random number generation algorithm adopts the Mason slew algorithm or the Xorshit algorithm. If the random number generation algorithm generates duplicates, resulting in the same serial number, it will lead to a time slot reporting conflict. After the controller detects the abnormal parsing of the conflicting card, it will re-initiate a confirmation signal confirmation for the card under the problem. Cards that have already been confirmed will not participate until the card completes the normal return packet.

[0035] The advantage of this design is that it reduces communication conflicts caused by duplicate sequence numbers by using efficient random number algorithms and conflict detection mechanisms, thereby improving the success rate of address issuance and system stability.

[0036] Preferably, during normal operation, the controller periodically communicates with the connected cards. When it detects that the card's response data packet is abnormal or fails to respond within the specified time slot, it sends an acknowledgment signal. After receiving the acknowledgment signal after the node address is sent, the card enters its own status response and performs a self-test. If it detects an abnormality in its own status, it replies with an acknowledgment packet to confirm its status; if there is a fault, it enters a fault state, illuminates the card's fault indicator light, closes the interface connected to the bus, and exits the bus.

[0037] The advantage of this design is that continuous monitoring and anomaly handling mechanisms can promptly detect and isolate faulty cards, prevent the spread of faults, and ensure the normal operation of the entire communication bus.

[0038] Compared with the prior art, the beneficial effects of the present invention are as follows.

[0039] 1. This invention uses a controller to monitor and detect pin level changes in real time, accurately determining the number of online cards and dynamically issuing confirmation signals to automatically allocate card addresses. This automated process effectively avoids the errors and inconveniences of traditional manual dialing, significantly improving the overall reliability of the system. Simultaneously, after receiving the confirmation signal, the card performs a self-check and feeds back its status information, ensuring that only cards in good condition and with the required version can be officially launched. This further guarantees stable system operation, greatly reduces the risk of system failures due to card malfunctions or incompatibility, and improves the overall reliability and efficiency of the control system.

[0040] 2. This invention effectively solves the data packet conflict problem that may occur when multiple cards are online simultaneously by introducing a random number generation algorithm and a waiting mechanism. When multiple cards are inserted at the same time, the randomly generated serial number and waiting time ensure that each card replies with an acknowledgment packet at different time intervals, avoiding bus communication conflicts and address allocation errors. In addition, the mechanism for comprehensively judging whether the online card will affect the communication bus ensures that only cards that meet the conditions can be online, preventing system instability caused by simultaneous operation of multiple cards. This not only improves the accuracy of address allocation and the stability of system communication, but also supports hot-swapping of cards, enhancing the flexibility and adaptability of the system.

[0041] 3. This invention reduces hardware costs and maintenance difficulty by eliminating traditional physical address DIP switches and slot DIP switches. Utilizing an ADC pin with voltage sampling capability and pull-down resistors of varying values, the number of cards can be accurately detected, improving detection accuracy and system reliability. Periodic communication and anomaly handling mechanisms enable the system to promptly detect and isolate faulty cards, reducing maintenance workload and system downtime, thereby lowering maintenance costs. Attached Figure Description

[0042] Figure 1 This is a flowchart illustrating the overall process of a card address node distribution method based on an industrial bus according to the present invention.

[0043] Figure 2 This is a flowchart of a periodic detection method for a card address node issuance method based on an industrial bus according to the present invention. Detailed Implementation

[0044] To make the objectives, technical solutions, and advantages of this disclosure clearer, the embodiments of this disclosure will be further described in detail below with reference to the accompanying drawings. The proportions of the components are not drawn to scale, and the proportions and dimensions shown in the drawings should not limit the essential technical solutions of the invention. These embodiments do not exhaustively describe all details, nor do they limit the invention to merely the specific embodiments described.

[0045] See Figure 1-2 As shown, a method for issuing card address nodes based on an industrial bus is characterized by the following steps:

[0046] S1: The controller monitors and detects changes in the level of the detection pin in real time;

[0047] S2: Determine the number of cards online based on the level change and send a corresponding confirmation signal;

[0048] S3: After receiving the confirmation signal, the card performs a self-test and replies with a response packet;

[0049] S4: The controller sends node information, the card receives it and replies with a secondary response signal, the controller receives it and sends an online signal, and the card is officially online.

[0050] like Figure 1 In one embodiment shown, Figure 1 This is a flowchart illustrating the overall process of a card address node assignment method based on an industrial bus, as described in this invention. This invention proposes a card address node assignment method based on an industrial bus, aiming to effectively solve problems encountered in existing technologies such as difficulties in hot-swapping management, address identification errors, low system reliability, and high maintenance difficulty when multiple cards are online simultaneously. This invention dynamically determines the number of online cards by real-time monitoring of the level changes of the detection pins through a controller, and sends corresponding confirmation signals according to different situations, thereby achieving automatic card address allocation and significantly improving the system's automation level and overall reliability.

[0051] Specifically, the controller first monitors the voltage level changes of the detection pin in real time through the ADC pin with voltage sampling function. When a card is inserted or removed, the pull-down resistors of different values ​​will cause changes in the equivalent resistance of the detection pin to ground, thus resulting in changes in the sampling level. The controller accurately determines the number of cards currently inserted based on the degree of level change. If only a single card is detected online, the controller will directly send an online confirmation signal data packet through the bus to ensure that the single card can quickly and accurately obtain address information. If multiple cards are detected online at the same time, the system adds a random number enable flag to the confirmation signal data packet and generates a unique serial number through a built-in random number generation algorithm (such as Mason Shift or XORShift). This allows each card to reply with a response packet at different time intervals, effectively avoiding data packet conflicts and ensuring that each card can successfully obtain a unique address.

[0052] After receiving the confirmation signal, the card enters a self-test program according to the bus status. Upon completion of the self-test, it sends a response packet containing the self-test results and the card's version and model information to the controller. The controller, based on the response packet information, comprehensively judges whether the card's status and version information meet system requirements, ensuring that only cards in good condition and with matching versions can be officially put online. If the evaluation results indicate that the card's online status will not adversely affect the communication bus, the controller will send a node address data packet. The card records the node address and sends a second response signal, finally sending an online signal through the bus or GPIO port. The card then officially connects to the bus and enters normal operation.

[0053] In one embodiment, the hardware requirement is that the main controller sets up one or more GPIO (General Proposal Input / Output) pins for card insertion detection and connects them to each slot in the rack. The core triggering step is that the controller's address node detection pin detects a change in voltage level, determines whether a single node is online or multiple cards are closely connected based on the degree of voltage level change, and enters different node address delivery logic accordingly. The core mechanism of node address online detection is that the controller sets up one or more detection pins for card insertion detection. Based on the magnitude of the voltage level change detected by the pin, it determines whether a single card or multiple cards are inserted and enters different processing branches to prevent address acquisition anomalies and bus communication anomalies caused by multiple card insertions. The detection pin should be an ADC pin with voltage sampling function. The pin connected to the detection pin contains pull-down resistors of different values. As the card is inserted, the equivalent resistance of this pin to ground changes, causing a change in the sampling voltage level. The number of cards currently inserted is determined based on the degree of voltage level change. Upon detecting a card insertion, the controller sends an "online confirmation signal" via the bus. This signal includes querying / judging the card's operating status, determining the current bus status, notifying the card of the current bus status, and outlining requirements for the card. Upon receiving the "online confirmation signal" data packet, the card enters the corresponding self-test procedure based on the bus status and outputs the self-test result upon completion. The self-test result and card information together form a card response packet, which is sent back to the controller to await further action. Based on the response packet information, the controller determines whether the card's status is good, whether the card version information matches the configuration requirements, and comprehensively assesses whether the card's online status will affect the communication bus. If the judgment is successful, the controller sends an confirmation packet containing node address information and operating mode information. Upon receiving the confirmation packet, the connected card records its own node address and operating mode, enters the corresponding operating mode according to the controller's requirements, connects to the bus, and enters normal operation.

[0054] To prevent bus conflicts caused by multiple cards simultaneously replying with response packets when multiple cards are inserted, a random allocation mechanism for card response packet time slots is introduced. When the controller detects multiple card insertions, a random number enable flag is added to the "reserved" bit of the acknowledgment signal sent by the controller. After receiving and parsing the data packet, the downstream card generates a random number using its built-in random number generation algorithm, converts it, and ultimately generates a sequence number from 1 to 16. Then, it waits according to the generated sequence number for a waiting time equal to the sequence number * 10ms, and then resumes receiving data packets at this time interval. Correspondingly, when the controller detects multiple cards coming online, its waiting time for downstream card response packets is changed to 200ms to ensure that it receives responses from all cards.

[0055] Random number generation algorithms can employ methods such as the Mason slew algorithm and the Xorshit algorithm. If the random number algorithm generates duplicates, resulting in identical serial numbers, it will lead to a conflict in the time slot. After the controller detects the abnormal parsing of the conflicting card's response packet, it will initiate a new round of confirmation signals for the problematic card. Cards that have already been confirmed will not participate until the card successfully completes its response.

[0056] The structure of the "signal confirmation" data packet frame sent by the controller is shown in the table below:

[0057]

[0058] The "acknowledgment signal" data packet sent by the controller mainly includes: source address, destination address, system node status enable, controller model, and controller version number. The addition of system node status enable effectively avoids the problem of cards being unclear about their own status and thus affecting the bus operating logic when they undergo abnormal cold / hot resets. Controlling this status by the master controller is more reliable. After receiving the "acknowledgment signal," the card determines which operating state it should enter, completes a self-test, and, based on the card's online status mentioned above, selects an appropriate time to reply to the bus with an "acknowledgment packet," then waits for the master controller to send node information.

[0059] The structure of the data packet frame for the node's reply to the main controller is shown in the table below:

[0060]

[0061] The data packet that a node replies to the master controller with a "response packet" mainly includes: source address, destination address, device model, version number, and device self-test result. After receiving the "response packet," the master controller determines whether the card's version and model meet the requirements based on its own configuration information and version information database, and then verifies the device self-test result. After confirming all information, the controller begins to send out the "node address data packet."

[0062] The structure of the "node address data packet" frame sent by the controller is shown in the table below:

[0063]

[0064] The "node address data packet" sent by the controller contains the source address, destination address, device operating mode information, and device node address. After receiving the "node address data packet," the card records the node address sent by the main controller and then replies to the main controller with a "secondary response signal."

[0065] The structure of the data packet frame for the node's reply to the main controller's "secondary response signal" is shown in the table below:

[0066]

[0067] The node's "secondary acknowledgement signal" to the main controller includes the source address, destination address, and a successful reception flag for the card node address. After receiving the "secondary acknowledgement signal," the controller can, depending on the actual situation, issue a "card online signal" via the bus or notify the card via GPIO to be online and participate in the normal operation of the system.

[0068] This invention proposes a method for issuing card address nodes based on an industrial bus. Through a series of precise steps and mechanisms, it achieves automated and precise allocation of card addresses, significantly improving the overall performance and reliability of the industrial control system. Specifically, the controller utilizes an ADC pin with voltage sampling function to monitor the level changes of the detection pin in real time, and accurately determines the number of currently inserted cards by varying the resistance values ​​of the pull-down resistors. This high-precision detection mechanism not only avoids the errors and inconveniences caused by traditional manual DIP switches or physical address settings, but also greatly improves the system's dynamic adaptability, enabling the system to respond to card insertion and removal in real time, thus enhancing the system's flexibility and adaptability.

[0069] When a single card is detected to be online, the controller can quickly send an acknowledgment signal through the bus, ensuring that the card can obtain address information quickly and accurately, thereby improving the efficiency and accuracy of address allocation. When multiple cards are online simultaneously, the system adds a random number enable flag to the acknowledgment signal data packet and uses a built-in random number generation algorithm (such as Mason Shift or XORShift) to generate a unique sequence number. This allows each card to reply with an acknowledgment packet at different time intervals, effectively avoiding data packet conflicts. This mechanism not only ensures that each card can successfully obtain a unique address but also improves the stability and reliability of the communication bus, preventing address acquisition and bus communication anomalies caused by multiple cards being online simultaneously, thus solving the core bottleneck of traditional methods when handling multiple cards online.

[0070] After receiving the acknowledgment signal, the card performs a self-test according to the bus status and sends a response packet to the controller along with the card's version and model information. This self-test mechanism ensures that only cards in good condition and with matching versions can be officially put into operation, further guaranteeing the stable operation of the system. Based on the response packet information, the controller comprehensively judges whether the card's status and version information meet the system requirements, avoiding system communication failures or functional abnormalities caused by card malfunctions or version incompatibility. This comprehensive judgment mechanism not only improves the system's reliability and compatibility but also ensures the efficient collaborative work of all cards in the system, thereby improving the overall performance of the entire industrial control system.

[0071] Furthermore, this invention incorporates a comprehensive fault detection and anomaly handling mechanism. During normal operation, the controller periodically communicates with the downstream cards, monitoring their status and communication quality in real time. When an abnormal data packet response or failure to respond within a specified time slot is detected, the controller sends an acknowledgment signal, prompting the card to perform a self-check. If the card detects an abnormality in its own status, it enters a fault state, illuminating a fault indicator light and closing the interface to exit the bus, preventing faulty cards from affecting the stable operation of the entire system. This mechanism not only improves the system's fault resistance but also reduces the workload of maintenance personnel and system downtime, significantly lowering system maintenance costs. By promptly detecting and isolating faulty cards, the normal operation of the communication bus is ensured, further enhancing the overall reliability and availability of the system.

[0072] In terms of hardware design, this invention reduces hardware costs and maintenance complexity compared to traditional physical DIP switches and slot DIP switches. Utilizing an ADC pin with voltage sampling capabilities and pull-down resistors of varying values, the number of cards can be accurately detected, improving detection accuracy and system reliability. This not only simplifies hardware design and reduces production costs but also reduces errors caused by inaccurate physical DIP switches, improving system stability and reliability. The introduction of random number generation and conflict resolution mechanisms ensures that data packets do not conflict when multiple cards are online simultaneously, improving the success rate of address allocation and system communication stability. Simultaneously, the system features rich online confirmation signal data packets, including system node status enable bits, master controller information bits, and reserved bits, enhancing the flexibility and information content of the data packets and reserving space for future system expansion and functional upgrades. This flexible information transmission design not only improves system maintainability and scalability but also facilitates long-term system evolution and upgrades.

[0073] When multiple cards are online simultaneously, the design effectively prevents data packet collisions through random number generation algorithms and waiting mechanisms, ensuring that each card can successfully obtain a unique address. The Mason Shift or XORShift algorithm is used to generate efficient, low-collision-probability random numbers, reducing the possibility of duplicate serial numbers and improving the efficiency of collision resolution. When random number generation leads to duplicate serial numbers, causing time slot return packet collisions, the controller can detect and re-initiate the acknowledgment signal, ensuring that all cards can eventually respond normally, thus ensuring the smooth progress of the address issuance process. This efficient random number generation and collision resolution mechanism not only improves the success rate of address issuance but also enhances the stability and reliability of the system in high-load or dynamically changing industrial environments.

[0074] like Figure 2 In one embodiment shown, Figure 2 This is a flowchart of a periodic detection method for a card address node distribution method based on an industrial bus according to the present invention. In normal operation, the controller periodically communicates with the connected cards. If an abnormal card response data packet is detected or a response is not received within a specified time slot, an "acknowledgment signal" is sent, awaiting a response from the target card. Upon receiving the "acknowledgment signal" after the node address distribution is completed, the card enters a self-response state and performs a self-check. If an abnormality is detected in its own state, it replies with an "acknowledgment packet" to confirm the state; otherwise, it enters a fault state, illuminates the card fault indicator light, and shuts down the I / O connected to the bus, disconnecting from the bus to prevent any impact on the bus.

[0075] This invention, in this step, allows for periodic communication between the controller and the downstream cards under normal operating conditions. When an abnormal data packet response from a card is detected or a response is not received within a specified time slot, an "acknowledgment signal" is proactively sent, awaiting a response from the target card. This design offers several significant advantages. First, the periodic communication mechanism ensures real-time monitoring and management of each card, enabling timely detection of potential problems and preventing their escalation. This proactive monitoring not only improves system reliability but also enhances overall stability, reducing system downtime due to card failures and thus increasing production efficiency.

[0076] Secondly, after a card receives an "acknowledgment signal" after the node address is sent, it performs a self-check. This self-check process ensures that only cards in good condition and functioning correctly can continue to participate in system operation. If a card detects an abnormality in its own status, it will reply with an "acknowledgment packet," enter a fault state, illuminate the fault indicator light, and simultaneously close the I / O ports connected to the bus, actively disconnecting from the bus. This mechanism effectively isolates faulty cards, preventing them from adversely affecting the entire bus system, avoiding system-level failures caused by a single card failure, and significantly improving the system's anti-interference and fault tolerance capabilities.

[0077] Furthermore, this design simplifies the fault detection and handling process, reducing reliance on manual maintenance. When a faulty card automatically enters a fault state and indicates the fault location, maintenance personnel can quickly locate and handle the fault, shortening repair time and reducing maintenance costs. Simultaneously, the system's automated fault handling mechanism reduces the risk of human error and improves overall system safety.

[0078] Furthermore, the design of shutting down the I / O ports connected to the bus and disconnecting them from the bus ensures the normal operation of bus communication and avoids interference from faulty cards on data transmission and the normal operation of other cards. This not only maintains the stability of communication but also ensures that the system can still operate efficiently and stably under high load or complex environments.

[0079] This invention is not limited to the above-described embodiments. Any changes made to its shape or material composition, or any structural design using the methods provided by this invention, are considered variations of this invention and should be considered within the scope of protection of this invention.

Claims

1. An industrial bus-based card address node issuing method, characterized in that, Includes the following steps: S1: The controller monitors and detects changes in the level of the detection pin in real time; S2: Determine the number of cards online based on the level change and send a corresponding confirmation signal; S3: After receiving the confirmation signal, the card performs a self-test and replies with a response packet; if multiple cards are online, after receiving and parsing the online confirmation signal data packet, the card will generate a random number through the built-in random number generation algorithm and convert it to finally generate a serial number. Then, it will wait according to the serial number and restore the data packet according to the waiting time interval. S4: The controller sends node information, the card receives it and replies with a secondary response signal, the controller receives it and sends an online signal, and the card is officially online.

2. The method for issuing card address nodes based on an industrial bus according to claim 1, characterized in that, Step S2 includes the following steps: S2.1: Determine the number of cards online based on the level change. If it is a single card, proceed to step S2.3; if it is multiple cards, proceed to step S2.

2. S2.2: Add the random number enable flag to the online confirmation signal data packet; S2.3: The controller sends an online confirmation signal data packet through the bus.

3. A method for issuing card address nodes based on an industrial bus according to claim 1 or 2, characterized in that, In step S3, after receiving the online confirmation signal data packet, the card enters the corresponding self-test program according to the bus status. After the self-test is completed, the self-test result is output. The self-test result and the card information together form a card response packet, which replies to the controller and waits for the next step. The card response packet includes card version and model information as well as self-test result information.

4. A method for issuing card address nodes based on an industrial bus according to claim 1 or 2, characterized in that, Step S4 includes the following steps: S4.1: The controller comprehensively judges whether the card's online status will affect the communication bus based on the response packet information. If so, the card's online status will be rejected. If not, proceed to step S4.

2. S4.2: The controller sends node address data packets; S4.3: After receiving the node address data packet, the card records the node address sent by the controller and then replies with a secondary response signal to the controller; S4.4: After receiving the secondary response signal, the controller sends a card online signal through the bus or communicates with the card through the GPIO port to officially go online; S4.5: After receiving the card online signal, the card records its own node address and working mode, enters the corresponding working mode according to the controller's requirements, connects to the bus, and enters normal operation.

5. The method for issuing card address nodes based on an industrial bus according to claim 2, characterized in that, The online confirmation signal data packet includes a system node status enable bit, a main controller information bit, and a reserved bit; in step S2.2, the random number enable flag is added to the reserved bit.

6. The method for issuing card address nodes based on an industrial bus according to claim 4, characterized in that, The comprehensive judgment of whether the online card will affect the communication bus includes judging whether the card status is good, judging whether the card version information is consistent with the configuration requirements, judging whether the card version and model meet the requirements based on its own configuration information and version information database, and judging whether the verification device self-test results meet the requirements; the node address data packet includes the node address data packet flag bit, device working mode information, and device node address.

7. A method for issuing card address nodes based on an industrial bus according to claim 1, 2, or 6, characterized in that, The detection pin is an ADC pin with voltage sampling function. The pins connected to the detection pin of the lower card contain pull-down resistors with different resistance values. When the lower card is inserted, the equivalent resistance of the detection pin to ground changes, causing a change in the sampling level. The number of cards inserted at the time is determined based on the degree of level change.

8. The method for issuing card address nodes based on an industrial bus according to claim 1, characterized in that, The random number generation algorithm uses either the Mason slew algorithm or the Xorshit algorithm. If the random number generation algorithm produces duplicates, resulting in identical serial numbers, it will lead to time slot reporting conflicts. After the controller detects the abnormal parsing of the conflicting card's return packet, it will re-initiate a round of confirmation signals for the problematic card. Cards that have already been confirmed will not participate until the card returns a normal packet.

9. A method for issuing card address nodes based on an industrial bus according to claim 1, 2, or 8, characterized in that, In normal operation, the controller periodically communicates with the connected cards. When it detects that the card's reply data packet is abnormal or fails to reply within the specified time slot, it sends an acknowledgment signal. After receiving the acknowledgment signal after the node address is sent, the card enters its own status response and performs a self-test. If it detects an abnormality in its own status, it replies with an acknowledgment packet to confirm the status; if there is a fault, it enters a fault state, illuminates the card's fault indicator light, closes the interface connected to the bus, and exits the bus.

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