Floating-point number exponential power rapid calculation method for digital speech processing

Abstract

The invention provides a floating-point number exponential power rapid calculation method for digital voice processing, which is applied to a single chip microcomputer and comprises the following steps: converting floating-point number exponential power calculation in digital voice signal processing into floating-point number second power calculation of logarithm and 2 of a floating-point number; according to the storage structure of the floating-point number in the computer, logarithm calculation of the floating-point number is completed; decomposing exponential power calculation of the floating-point number into multiplication calculation of a floating-point number power without a decimal part of 2 and a floating-point number power with a decimal part of 2 by combining a logarithm calculation result; according to the storage structure of the floating-point number in the computer, after calculation of the floating-point number power without the decimal part of 2 and calculation of the floating-point number power with the decimal part of 2 are completed respectively, calculation results are multiplied to obtain a floating-point number exponential power calculation result stored in the storage structure in the computer. According to the invention, an original algorithm can be replaced under the condition that the call voice quality is not influenced, the calculation complexity is reduced, and voice processing such as echo cancellation and noise suppression of voice communication can be realized on the single-chip microcomputer.

Description

Technical Field

[0001] The invention relates to digital speech signal processing, in particular to a floating point number exponential power fast calculation method for digital speech processing. Background Art

[0002] With the development of digital communication technology, digital voice communication technology is becoming more and more common. Due to the inherent characteristics of voice signals, there are often echoes and environmental noises in voice communication that affect the quality of voice calls. Therefore, most voice communication devices currently have voice processing functions such as echo cancellation, noise suppression, and automatic gain control. However, since the implementation of voice processing technologies such as echo cancellation and noise suppression requires complex mathematical calculations, the requirements for processing chips are high, and the processing chips need to have a high operating frequency and complex mathematical calculation capabilities. Therefore, digital voice processing technologies such as echo cancellation and noise suppression are difficult to implement using single-chip microcomputers.

[0003] In view of the technical problem that digital voice processing technologies such as echo cancellation and noise suppression are difficult to implement using single-chip microcomputers, through the analysis of the algorithm implementation of echo cancellation and noise suppression algorithms and the statistics of algorithm complexity, it is found that in voice processing technologies such as echo cancellation and noise suppression, the calculation of floating-point exponential powers occupies more processing resources, which makes it difficult to implement digital voice processing technologies such as echo cancellation and noise suppression on single-chip microcomputers. Summary of the invention

[0004] In view of the problems existing in the prior art, a method for fast calculation of floating-point exponential powers for digital speech processing is provided, which can greatly reduce the processing complexity of calculating floating-point exponential powers on a single-chip microcomputer, significantly reduce the resource occupancy rate of the single-chip microcomputer, and solve the technical problem that digital speech processing technologies such as echo cancellation and noise suppression are difficult to implement using a single-chip microcomputer.

[0005] The first aspect of the present invention provides a method for fast calculation of floating point exponential power for digital speech processing, which is applied to a single chip microcomputer and includes:

[0006] Transform floating point exponential power calculation in digital speech signal processing into floating point logarithm and floating point power calculation of 2;

[0007] According to the storage structure of floating-point numbers in the computer, complete the logarithmic calculation of floating-point numbers;

[0008] Combined with the logarithmic calculation results, the floating-point exponential power calculation is decomposed into the multiplication calculation of 2's floating-point power without a decimal part and 2's floating-point power with a decimal part;

[0009] According to the storage structure of floating-point numbers in the computer, after completing the calculation of the floating-point power of 2 without a decimal part and the floating-point power of 2 with a decimal part respectively, the calculation results are multiplied to obtain the floating-point exponential power calculation result stored in the storage structure in the computer.

[0010] As a preferred solution, the logarithmic calculation of floating-point numbers is completed according to the storage structure of floating-point numbers in the computer, specifically including:

[0011] The first 13 bits of the mantissa of the floating-point number stored in the computer are truncated, and a lookup table is constructed to quickly calculate the logarithm of the floating-point number through the table lookup.

[0012] As a preferred solution, the specific calculation process of completing the logarithm of the floating point number includes:

[0013] For a floating point number x, its logarithm log2x is calculated as follows:

[0014] log2x=log2((-1) 0 *2 (e-127) *1.f)=log2(2 (e-127) *1.f)

[0015] =(e-127)+log2(1.f)=(e-127)+log2(1.0+0.f)

[0016] Among them, 0≤log2(1+0.f)<1.0, f is the mantissa of the floating point number;

[0017] The first 13 bits of the floating-point number are truncated, and a lookup table is constructed. Log2(1.0+0.f) is calculated by searching, thereby completing the logarithm calculation of the floating-point number.

[0018] As a preferred solution, the combined logarithmic calculation result decomposes the floating point exponential power calculation into a multiplication calculation of 2 floating point powers without a decimal part and 2 floating point powers with a decimal part, specifically including:

[0019] For a floating point number x raised to the power of y y , after transformation, we get

[0020] Assuming f1 = y*log2x, where log2x is the logarithm calculation result of a floating point number, f1 can be decomposed into a floating point number f2 without a decimal part and a floating point number f3 with a decimal part, where:

[0021]

[0022] Then the floating point exponent That is, decomposing the floating point exponential power calculation into 2 floating point powers without decimal parts Floating point number with fractional part raised to power of 2 Multiplication calculation of .

[0023] As a preferred solution, the specific calculation process of the floating point power of 2 without a decimal part is:

[0024] According to the storage structure of floating-point numbers in computers, f2 is a floating-point number without a decimal part. At this time, the mantissa part f of the floating-point number is 0, and the exponent part e = f2 + 127, then the power of 2 is the floating-point number without a decimal part. for:

[0025]

[0026] Among them, s is the sign bit of the floating point number stored in the computer, 0 represents a positive number, and 1 represents a negative number.

[0027] As a preferred solution, the floating point power of 2 with a decimal part The specific calculation process is:

[0028] According to the storage structure of floating-point numbers in computers, f3 is a floating-point number with a decimal part. At this time, the exponent part is 0, that is, e = 127, then the power of 2 with a decimal part of the floating-point number is for:

[0029]

[0030] Since 1<1.f<2, therefore 2<2 1+f <4, in calculation 2 1+f When f3 is truncated to the first 13 bits, a lookup table is constructed to calculate 2 1+f , and then complete the floating point power of 2 with a decimal part Calculation.

[0031] As a preferred solution, the multiplication of the calculation results to obtain the floating point exponential power calculation result stored in the storage structure in the computer specifically includes:

[0032] When two floating-point numbers are multiplied in a computer storage structure, the exponents are added and the mantissas are multiplied, that is, When , the exponents are added and the mantissa is The mantissa of the result is the calculation result x stored in the computer storage structure. y .

[0033] The second aspect of the present invention proposes a system including a memory and a processor, wherein the memory stores a computer program corresponding to the method for fast calculation of floating-point exponential powers for digital speech processing as described in the first aspect and capable of being loaded and executed by the processor.

[0034] The third aspect of the present invention is a computer-readable storage medium having computer program instructions stored thereon, characterized in that when the program instructions are executed by a processor, they are used to implement the process corresponding to the method for fast calculation of floating-point exponential powers for digital speech processing described in the first aspect.

[0035] Compared with the prior art, the beneficial effects of adopting the above technical solution are:

[0036] 1) The complex floating-point exponential power operation is decomposed into floating-point logarithm calculation and 2-exponential power calculation through mathematical transformation, and the floating-point logarithm calculation and 2-exponential power calculation are realized through simple operations such as table lookup, addition, and multiplication. The calculation error is within 0.01%, and the computing performance on a single-chip microcomputer with floating-point operations is improved by more than 31 times.

[0037] 2) The fast calculation method of floating-point exponential power proposed in this paper can replace the original algorithm without affecting the voice quality of the call, reduce the computational complexity, and enable voice processing such as echo cancellation and noise suppression in voice communication to be implemented on a single-chip microcomputer. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] Figure 1 The figure is a flowchart of fast calculation of floating point exponential power in an embodiment of the present invention.

[0039] Figure 2 The figure is a schematic diagram of the storage structure of floating point numbers in a computer according to an embodiment of the present invention. DETAILED DESCRIPTION

[0040] Embodiments of the present application are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar modules or modules with the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application, and cannot be construed as limitations on the present application. On the contrary, the embodiments of the present application include all changes, modifications and equivalents that fall within the spirit and connotation of the appended claims.

[0041] When using voice processing technologies such as echo cancellation and noise suppression to process digital voice signals, in order to obtain better processing effects, the input 16-bit integer data is converted into floating-point numbers for processing, which can improve the accuracy of calculations. Through statistical analysis of the processor performance occupied by the digital voice data processing process in algorithms such as echo cancellation and noise suppression, it is found that the calculation of floating-point exponential powers is called multiple times within the algorithm and occupies the most processing resources. If the floating-point exponential power calculation in digital voice signal processing can be optimized, the algorithm's processing performance requirements can be significantly reduced, and the technical problem that digital voice processing technologies such as echo cancellation and noise suppression are difficult to implement using a single-chip microcomputer can be solved. The embodiment of the present invention proposes a fast calculation method for floating-point exponential powers for digital voice processing, which is applied to a single-chip microcomputer, decomposes complex floating-point exponential power operations into calculations of floating-point logarithms and 2-exponential power operations through mathematical transformation, and implements the floating-point logarithm calculation and 2-exponential power calculation through simple operations such as table lookup, addition, and multiplication. The calculation error is within 0.01%, and the calculation performance on a single-chip microcomputer with floating-point operations is improved by more than 31 times. Please refer to Figure 1 , the specific plan is as follows:

[0042] Step 1: transform the floating point exponential power calculation in digital speech signal processing into the logarithm of the floating point number and the floating point power calculation of 2.

[0043] Assume that the floating point number x to be calculated is the floating point number y power x y , according to the mathematical transformation formula:

[0044]

[0045] By transforming the formula, the exponential power operation of floating-point numbers can be converted into the logarithm of floating-point numbers and the power of 2 of floating-point numbers. The logarithm of floating-point numbers and the power of 2 of floating-point numbers can be calculated by table lookup, which greatly reduces the calculation complexity.

[0046] Step 2: Complete the logarithm calculation of the floating point number according to the storage structure of the floating point number in the computer.

[0047] Please refer to Figure 2 , shows the storage structure of floating-point numbers in the computer. When calculating the logarithm log2x of a floating-point number x, when x is a positive number, the logarithm of x is calculated as follows:

[0048] log2x=log2((-1) 0 *2 (e-127) *1.f)=log2(2 (e-127) *1.f)

[0049] =(e-127)+log2(1.f)=(e-127)+log2(1.0+0.f)

[0050] Since 1.0<=(1+0.f)<2.0, 0≤log2(1+0.f)<1.0.

[0051] In this embodiment, in order to quickly calculate the logarithm of a floating-point number, the first 13 bits of the mantissa f of the floating-point number are truncated, and a first lookup table fast_log2_table

[8192] is constructed to calculate log2(1+0.f) by table lookup method, thereby completing the fast calculation of the logarithm of the floating-point number.

[0052] The calculation principle of the first lookup table fast_log2_table

[8192] is as follows: Since f is the mantissa of a floating point number, for a single-precision floating point number, the mantissa occupies 23 bits when stored in a computer. In order to quickly calculate the logarithm of a floating point number, the first 13 bits of the mantissa f of the floating point number are truncated. The numerical range of a 13-bit binary number represented in a computer is 0 to 8192, so the range of the mantissa f after truncation is also 0 to 8192. Therefore, assuming that the mantissa of the floating point number is x, then log2(1+0.x)=log2(1+x / 8192), and the values ​​of log2(1+0.f) when f is 0 to 8192 are calculated respectively, so that the first lookup table fast_log2_table

[8192] for fast calculation of floating point logarithms can be constructed.

[0053] Step 3: Combined with the logarithmic calculation result, decompose the floating-point exponential power calculation into the multiplication calculation of 2's floating-point power without a decimal part and 2's floating-point power with a decimal part.

[0054] set up f1=y*log2x, wherein the logarithm log2x of the floating point number x has been calculated in step 2. At this time, only the floating point exponential power of 2 needs to be calculated. In this embodiment, f1 is decomposed into a floating point number f2 without a decimal part and a floating point number f3 with a decimal part, wherein:

[0055]

[0056] Calculate the exponential power of a floating point number The floating point exponential power operation can be decomposed into the multiplication of two floating point exponential powers of 2.

[0057] Step 4: After respectively completing the calculation of the floating point power of 2 without a decimal part and the floating point power of 2 with a decimal part according to the storage structure of the floating point number in the computer, the calculation results are multiplied to obtain the floating point exponential power calculation result stored in the storage structure in the computer.

[0058] Specifically, according to the storage structure of floating-point numbers in the computer, the following calculations are made and

[0059] (1) Calculate floating-point numbers

[0060] According to the storage structure of floating-point numbers in a computer, Since f2 is a floating-point number without a fractional part, the mantissa part is 0 when the floating-point number is stored during calculation, i.e., f = 0, and the exponent part e = f2 + 127. When stored during calculation, the mantissa part is 0, i.e., f = 0, and the exponent part e = f2 + 127.

[0061]

[0062] (2) Calculate floating-point numbers

[0063] According to the storage structure of floating-point numbers in a computer, the floating-point number f3 = (-1) s * 2 (e-127) * 1.f. Since f3 = (f1 - (int)f1) + 1, so 1 < f3 < 2. When the floating-point number f3 is stored during calculation, the exponent part is 0, i.e., e = 127, and the mantissa part f is the mantissa of the floating-point number f3. Therefore

[0064]

[0065] Since 1 < 1.f < 2, so 2 < 2 1+f < 4. To quickly calculate 2 1+f , the first 13 bits of the mantissa part f of the floating-point number f3 are intercepted, and the second lookup table fast_pow2_table

[8192] is constructed. By looking up the table to calculate pow2(1 + 0.f), the quick calculation can be completed of.

[0066] The calculation principle of the second lookup table fast_pow2_table

[8192] is as follows: Since f is the mantissa part of the floating-point number, for a single-precision floating-point number, the mantissa part occupies 23 bits when stored in a computer. To quickly calculate the logarithm of the floating-point number, the first 13 bits of the mantissa part f of the floating-point number are intercepted. The numerical range represented by 13-bit binary numbers in a computer is 0 to 8192. Therefore, the range of the mantissa part f after interception is also 0 to 8192. So assuming the mantissa of the floating-point number is x, then pow2(1 + 0.x) = pow2(1 + x / 8192). Calculate the values of pow2(1 + 0.f) when f ranges from 0 to 8192 respectively, and the second lookup table fast_pow2_table

[8192] for quick calculation of the floating-point exponent can be constructed.

[0067] (3) Calculate

[0068] The calculated floating-point numbers Both are stored in the computer's storage structure. When two floating-point numbers represented by the computer's storage structure are multiplied, the exponents are added and the mantissas are multiplied. There is no decimal part, so When , the exponents are added and the mantissa is The mantissa of the result is the calculation result x stored in the computer storage structure. y .

[0069] In order to better illustrate the application mode of the present invention, an application scenario will be described in detail below: In a digital voice communication terminal, the GD32F450 chip is used to implement echo cancellation and noise suppression functions. In the process of echo cancellation and noise suppression, there are many floating point exponential power calculations.

[0070] (1) Use the current floating point exponent to calculate:

[0071] Assume calculation 247.3 5.6 The value of the floating point exponential power calculation formula pow(247.3f,5.6f) is called and the result is 2.5237995389E+13.

[0072] (2) Use the floating-point fast exponential power algorithm proposed in this paper.

[0073] The first step is to perform floating point exponential power transformation:

[0074] The second step is to quickly calculate the logarithm of the floating point number: calculate log2247.3. The floating point number 247.3 is stored in the computer in the format of: 01000011011101110100110011001101 (0x43774CCD), where s is 0, e is 0x86 (134), f is 0x774CCD, and after cutting off the first 13 bits, it is 0x1DD3 (7635).

[0075] log2247.3f=(e-127)+log2(1.0+0.f)=(134-127)+log2(1.0+0.f),

[0076] Look up the table fast_log2_table

[7635] =0.950009047985f, so quickly calculate

[0077] log2247.3f=7.950009047985f.

[0078] The third step is to quickly calculate the exponential power of 2 of floating point numbers:

[0079]

[0080] 1) Calculate floating point numbers Since the floating point number 2 43 When stored in a computer, the exponent part e = f2 + 127 = 43 + 127 = 170, and the mantissa is equal to 0, so the floating point number 2 43 The storage format in the computer is: 0101010100000000000000000000000000 (0x55000000), where s is 0, e is 0xAA(170), so the exponent part is e-127=43, and f is 0.

[0081] 2) Calculate floating point numbers

[0082] The floating point number 1.520050668716f is stored in the computer in the format of: 00111111110000101001000100000101 (0x3FC29105), where s is 0, e is 0x7F (127), f is 0x429105, and the first 13 bits are cut off to 0x10A4 (4260). Look up the table fast_pow2_table

[4260] = 2.869162797928f. The floating point number 2.869162797928f is stored in the computer in the format of: 01000000001101111010000001011101 (0x 4037A05D),

[0084] Here, s is 0, e is 0x80 (128), so the exponent part is 128-127=1, and f is 0x37A05D.

[0085] 3) Calculate 247.3 5.6 =2 43 *2 1.520050668716f

[0086] When two floating-point numbers represented by computer storage structures are multiplied, the exponents are added and the mantissa is The decimal part of . The exponent part is 43, The exponent part is 1, so 247.3 5.6 The exponent part of the storage structure in the computer is 43+1=44, so e=44+127=171=0xAB, and the mantissa is 0x4037A05D. Therefore 247.3 6.5 The storage structure in the computer is stored in the format of:

[0087] (0xAB<<23)+0x4037A05D=0x55B7A05D, converted to a floating point number, is 2.5237422866E+13.

[0088] (3) Computational performance comparison:

[0089] Assume calculation 247.3 5.6 100 times, if the current floating point exponential power calculation method is used, the result is 2.5237995389E+13, and the processing time is 6453ns. Using the fast floating point calculation method proposed in this paper, the calculation result of 247.3 5.6 The value of is calculated 100 times, and the result is 2.5237422866E+13, which takes 207ns of processing time; the processing time multiple is 6453 / 207=31.17.

[0090] Assume calculation 36.54 18.65 100 times, if the current floating point exponential power calculation method is used, the result is 1.398404919E+29, and the processing time is 6458ns. Using the fast floating point calculation method proposed in this paper, the calculation result is 1.398404919E+29, and the processing time is 6458ns. 18.65 The value of is calculated 100 times, and the result is 1.398420475E+29, which takes 207ns of processing time. The processing time multiple is 6458 / 207=31.17

[0091] From the above comparison, we can see that the fast floating-point exponential power calculation method proposed in this paper can significantly reduce the calculation complexity of floating-point exponential power, and the calculation error is within the range of 0.01%. At the same time, the calculation performance on the GD32F450 chip is improved by about 31 times. In addition, through the comparison test of the voice quality before and after the two processing methods in the echo cancellation and noise suppression algorithms, the voice quality when using the fast floating-point exponential power algorithm in this paper is consistent with the original algorithm. Therefore, the fast exponential power calculation method proposed in this paper can replace the original algorithm, reduce the calculation complexity, and realize voice processing such as echo cancellation and noise suppression in voice communication on the single-chip microcomputer.

[0092] The embodiment of the present invention further proposes a system including a memory and a processor, wherein the memory stores a computer program corresponding to the aforementioned method for fast calculation of floating point exponential powers for digital speech processing that can be loaded and executed by the processor.

[0093] In particular, according to an embodiment of the present application, the process described above with reference to the flowchart can be implemented as a computer software program. For example, an embodiment of the present application includes a computer program product, which includes a computer program carried on a computer-readable medium, and the computer program includes a program code for executing the method shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed from a network through a communication section 1509, and / or installed from a removable medium 1511. When the computer program is executed by a central processing unit (CPU) 1501, various functions defined in the system of the present application are executed.

[0094] It should be noted that the computer-readable medium shown in the embodiment of the present application may be a computer-readable signal medium or a computer-readable storage medium or any combination of the above two. The computer-readable storage medium may be, for example, - but not limited to - an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device or device, or any combination of the above. More specific examples of computer-readable storage media may include, but are not limited to: an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM), a flash memory, an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above. In the present application, a computer-readable storage medium may be any tangible medium containing or storing a program, which may be used by an instruction execution system, device or device or used in combination with it. In the present application, a computer-readable signal medium may include a data signal propagated in a baseband or as part of a carrier wave, wherein a computer-readable program code is carried. Such propagated data signals may take a variety of forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination of the above. Computer-readable signal media may also be any computer-readable medium other than computer-readable storage media, which may send, propagate, or transmit programs for use by or in conjunction with an instruction execution system, apparatus, or device. The program code contained on the computer-readable medium may be transmitted using any appropriate medium, including but not limited to: wireless, wired, etc., or any suitable combination of the above.

[0095] The flowchart and block diagram in the accompanying drawings illustrate the possible architecture, functions and operations of the system, method and computer program product according to various embodiments of the present application. Wherein, each box in the flowchart or block diagram can represent a module, a program segment, or a part of the code, and the above-mentioned module, program segment, or a part of the code contains one or more executable instructions for realizing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the box can also occur in a different order from the order marked in the accompanying drawings. For example, two boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram or flowchart, and the combination of boxes in the block diagram or flowchart can be implemented with a dedicated hardware-based system that performs a specified function or operation, or can be implemented with a combination of dedicated hardware and computer instructions.

[0096] The units involved in the embodiments described in this application may be implemented by software or hardware, and the units described may also be set in a processor. The names of these units do not, in some cases, constitute limitations on the units themselves.

[0097] As another aspect, the present application also provides a computer program product or a computer program, which includes a computer instruction stored in a computer-readable storage medium. A processor of a computer device reads the computer instruction from the computer-readable storage medium, and the processor executes the computer instruction, so that the computer device executes the floating-point exponential power fast calculation method for digital speech processing described in the above embodiment.

[0098] As another aspect, the present application also provides a computer-readable medium, which may be included in the electronic device described in the above embodiment; or may exist independently without being assembled into the electronic device. The above computer-readable medium carries one or more programs, and when the above one or more programs are executed by an electronic device, the electronic device implements the floating-point number exponential power fast calculation method for digital speech processing described in the above embodiment.

[0099] It should be noted that, although several modules or units of the equipment for action execution are mentioned in the above detailed description, this division is not mandatory. In fact, according to the embodiments of the present application, the features and functions of two or more modules or units described above can be embodied in one module or unit. On the contrary, the features and functions of one module or unit described above can be further divided into being embodied by multiple modules or units.

[0100] Through the description of the above implementation methods, it is easy for those skilled in the art to understand that the example implementation methods described here can be implemented by software or by combining software with necessary hardware. Therefore, the technical solution according to the implementation methods of the present application can be embodied in the form of a software product, which can be stored in a non-volatile storage medium (which can be a CD-ROM, a USB flash drive, a mobile hard disk, etc.) or on a network, and includes several instructions to enable a computing device (which can be a personal computer, a server, a touch terminal, or a network device, etc.) to execute the method according to the implementation methods of the present application.

[0101] For those skilled in the art, the specific meanings of the above terms in the present invention can be understood in specific situations; the drawings in the embodiments are used to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Generally, the components of the embodiments of the present invention described and shown in the drawings herein can be arranged and designed in various different configurations.

[0102] Although the embodiments of the present application have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limitations on the present application. Ordinary technicians in this field can change, modify, replace and modify the above embodiments within the scope of the present application.

Claims

1. A method for fast calculation of floating point exponential power for digital speech processing, characterized in that: Applied in single chip microcomputer, including: Transform floating point exponential power calculation in digital speech signal processing into floating point logarithm and floating point power calculation of 2; According to the storage structure of floating-point numbers in the computer, complete the logarithmic calculation of floating-point numbers; Combined with the logarithmic calculation results, the floating-point exponential power calculation is decomposed into the multiplication calculation of 2's floating-point power without a decimal part and 2's floating-point power with a decimal part; According to the storage structure of floating-point numbers in the computer, after completing the calculation of the floating-point power of 2 without a decimal part and the floating-point power of 2 with a decimal part respectively, the calculation results are multiplied to obtain the floating-point exponential power calculation result stored in the storage structure in the computer.

2. The method for quickly calculating floating point exponents for digital speech processing according to claim 1, wherein: The method of completing the logarithmic calculation of the floating point number according to the storage structure of the floating point number in the computer specifically includes: The first 13 bits of the mantissa of the floating-point number stored in the computer are truncated, and a lookup table is constructed to quickly calculate the logarithm of the floating-point number through the table lookup.

3. The floating point number exponent power fast calculation method for digital speech processing according to claim 2, characterized in that, The specific calculation process of completing the logarithm of the floating point number includes: For a floating point number x, its logarithm log2x is calculated as follows: log2x=log2((-1) 0 *2 (e-127) *1.f)=log2(2 (e-127) *1.f) =(e-127)+log2(1.f)=(e-127)+log2(1.0+0.f) where 0≤log2(1+0.f)<1.0, and f is the mantissa of the floating point number; The first 13 bits of the floating-point number are truncated, and a lookup table is constructed. Log2(1.0+0.f) is calculated by searching, thereby completing the logarithm calculation of the floating-point number.

4. The method for quickly calculating floating point exponents for digital speech processing according to claim 3, wherein: The combined logarithmic calculation result is used to decompose the floating point exponential power calculation into a multiplication calculation of 2 floating point power without a decimal part and 2 floating point power with a decimal part, specifically including: For a floating point number x raised to the power of y y , after transformation, we get Assuming f1 = y*log2x, where log2x is the logarithm calculation result of a floating point number, f1 can be decomposed into a floating point number f2 without a decimal part and a floating point number f3 with a decimal part, where: Then the floating point exponent That is, decomposing the floating point exponential power calculation into 2 floating point powers without decimal parts Floating point number with fractional part raised to power of 2 Multiplication calculation of .

5. The floating point number exponent power fast calculation method for digital speech processing according to claim 4, characterized in that, The specific calculation process of the floating point power of 2 without a decimal part is: According to the storage structure of floating-point numbers in computers, f2 is a floating-point number without a decimal part. At this time, the mantissa part f of the floating-point number is 0, and the exponent part e = f2 + 127, then the power of 2 is the floating-point number without a decimal part. for: Among them, s is the sign bit of the floating point number stored in the computer, 0 represents a positive number, and 1 represents a negative number.

6. The method for quickly calculating floating point exponents for digital speech processing according to claim 5, characterized in that: The floating point power of 2 with a fractional part The specific calculation process is: According to the storage structure of floating-point numbers in computers, f3 is a floating-point number with a decimal part. At this time, the exponent part is 0, that is, e = 127, then the power of 2 with a decimal part of the floating-point number is for: Since 1<1.f<2, therefore 2<2 1+f <4, in calculation 2 1+f When f3 is truncated to the first 13 bits, a lookup table is constructed to calculate 2 1+f , and then complete the floating point power of 2 with a decimal part Calculation.

7. The method for quickly calculating floating point exponential power for digital speech processing according to claim 6, characterized in that: The multiplication of the calculation results to obtain the floating point exponential power calculation result stored in the storage structure in the computer specifically includes: When two floating-point numbers are multiplied in a computer storage structure, the exponents are added and the mantissas are multiplied, that is, When , the exponents are added and the mantissa is The mantissa of the result is the calculation result x stored in the computer storage structure. y .

8. A system, characterized in that: The invention comprises a memory and a processor, wherein the memory stores a computer program corresponding to the method for fast calculation of floating point exponential power for digital speech processing which can be loaded by the processor and executed as claimed in any one of claims 1 to 7.

9. A computer-readable storage medium having computer program instructions stored thereon, characterized in that: When the program instructions are executed by the processor, they are used to implement the process corresponding to the method for fast calculation of floating-point exponential power for digital speech processing according to any one of claims 1 to 7.

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