Module parameterized file generation method and device
Through the generation method and device of module parameterized files, the cumbersome and complex code problems caused by HDL language parameterized design are solved, and the generated code is more concise and easy to understand, improving the readability and maintenance of the design.
Patent Information
- Application Number
- CN202411633218.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-15
- Publication Date
- 2025-03-11
AI Technical Summary
In the module parameterization design process of integrated circuits, using only the parameterized design method provided by the hardware description language (HDL) will cause the code to be too cumbersome and complex, and it is difficult to read, maintain, simulate and debug.
By providing a method and device for generating a module parameterized file, the method includes receiving preprocessing instructions, parsing the source file, acquiring and storing parameter values, and translating the code statement into a code statement that conforms to the parameter values, thereby generating a more concise target file.
This method makes the generated code more concise and easy to understand, improves the readability and maintenance of the code, and simplifies the simulation and debugging process.
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Figure CN119598918A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of integrated circuit technology, and in particular to a method and device for generating a module parameterization file. Background Art
[0002] In the process of module parameterization design of integrated circuit (IC), it is mainly based on the parameterized statements provided by hardware description language (HDL). For example, in Verilog language, specific parameters can be defined through `define macro definition, parameter, localparm module parameters, and then the parameterized definition of key variables (such as data, address bus bit width, number of ports, etc.) is completed. Parameterization is achieved through conditional compilation such as `ifdef. In the generate statement, parameters can also be used to achieve parameterized design.
[0003] However, if only the parametric design method provided by the HDL language is used, the code will become too cumbersome and complex, making it inconvenient to read, maintain, simulate and debug. Summary of the invention
[0004] The present application provides a method and device for generating a module parameterization file, which can make the code more concise and easy to understand.
[0005] In a first aspect, an embodiment of the present application provides a method for generating a module parameterization file, which can be executed by a device for generating a module parameterization file, and the method includes: receiving a preprocessing instruction, the preprocessing instruction having source file indication information; a source file corresponding to the source file indication information is provided with a preprocessing identifier and a code statement for implementing module parameterization; based on the source file indication information, acquiring and parsing the source file to obtain an intermediate file corresponding to the source file; wherein the intermediate file includes a parameter value of a first parameter; the first parameter is a parameter indicated in a first code statement having a preprocessing identifier; based on the parameter value of the first parameter, the first code statement is transcribed into a second code statement to obtain a target file, wherein the code statement in the target file is a code statement that conforms to the parameter value of the first parameter.
[0006] In one possible implementation, the method includes: parsing the source file to obtain an intermediate file corresponding to the source file, including: deleting the preprocessing identifier in the first code statement and copying it to the intermediate file; obtaining the parameter value of the first parameter in the first code statement and storing it in the intermediate file; setting a direct translation identifier for the second code statement in the source file and storing it in the intermediate file, thereby obtaining the intermediate file.
[0007] In one possible implementation, obtaining the parameter value of the first parameter in the first code statement includes: obtaining the parameter value of the first parameter in the first code statement from a parameter processing instruction; if the parameter value indicated by the parameter processing instruction is not received, obtaining the parameter value of the first parameter in the first code statement from a macro file.
[0008] In a possible implementation, setting a direct translation mark for the second code statement in the source file includes: adding a print instruction before the second code statement in the source file.
[0009] In one possible implementation, the first code statement is a conditional code statement; based on the parameter value of the first parameter, the first code statement is transcribed into a second code statement, including: taking the code statement corresponding to the conditional branch in the conditional code statement that meets the parameter value of the first parameter as the second code statement.
[0010] In one possible implementation, the first code statement is a loop code statement; based on the parameter value of the first parameter, the first code statement is transcribed into a second code statement, including: based on the parameter value of the first parameter, determining the number of loops N of the first code statement; and copying the first code statement N times to obtain a second code statement.
[0011] In a possible implementation, after obtaining the target file, the method further includes: performing simulation verification on the target file, and if the verification result fails, checking the target file and the preprocessor; the preprocessor is used to execute the method in any of the above possible implementations.
[0012] In a second aspect, an embodiment of the present application provides a device for generating a module parameterization file, the device comprising: a receiving module for receiving a preprocessing instruction, the preprocessing instruction having source file indication information; a source file corresponding to the source file indication information being provided with a preprocessing identifier and a code statement for implementing module parameterization; a processing module for acquiring and parsing the source file based on the source file indication information to obtain an intermediate file corresponding to the source file; wherein the intermediate file includes a parameter value of a first parameter; the first parameter is a parameter indicated in a first code statement having a preprocessing identifier; and based on the parameter value of the first parameter, the first code statement is transcribed into a second code statement to obtain a target file, wherein the code statement in the target file is a code statement that conforms to the parameter value of the first parameter.
[0013] In a possible implementation, the processing module is specifically used to delete the preprocessing identifier in the first code statement and copy it to the intermediate file; obtain the parameter value of the first parameter in the first code statement and store it in the intermediate file; set the direct translation identifier for the second code statement in the source file and store it in the intermediate file, thereby obtaining the intermediate file.
[0014] In a possible implementation, the processing module is further specifically used to obtain a parameter value of the first parameter in the first code statement from a parameter processing instruction; if the parameter value indicated by the parameter processing instruction is not received, obtaining the parameter value of the first parameter in the first code statement from a macro file.
[0015] In a possible implementation, the processing module is further specifically configured to add a print instruction before the second code statement in the source file.
[0016] In a possible implementation, the first code statement is a conditional code statement; the processing module is further specifically configured to use, as the second code statement, a code statement corresponding to a conditional branch in the conditional code statement that meets a parameter value of the first parameter.
[0017] In a possible implementation, the first code statement is a loop code statement; the processing module is further specifically used to determine the number of loops N of the first code statement based on the parameter value of the first parameter; and copy the first code statement N times to obtain a second code statement.
[0018] The processing module is also specifically used to, after obtaining the target file, perform simulation verification on the target file, and if the verification result fails, check the target file and the preprocessor; the preprocessor is used to execute the method in any one of the first to sixth possible implementation methods of the first aspect.
[0019] In a third aspect, an embodiment of the present application further provides a device for generating a module parameterization file, the device comprising a memory and a processor, the memory being used to store computer programs or instructions; the processor being used to call the computer programs or instructions stored in the memory to execute a method as in any possible implementation of the first aspect.
[0020] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, in which instructions are stored. When a computer reads and executes the instructions, the computer executes a method in any possible implementation of the first aspect.
[0021] In a fifth aspect, an embodiment of the present application provides a computer program product, wherein instructions are stored in the computer program product. When a computer reads and executes the instructions, the computer executes the method in any possible implementation of the first aspect above. BRIEF DESCRIPTION OF THE DRAWINGS
[0022] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.
[0023] Figure 1 A schematic diagram of a flow chart corresponding to a method for generating a module parameterization file provided in an embodiment of the present application;
[0024] Figure 2 A schematic diagram of a module interface block diagram provided in an embodiment of the present application;
[0025] Figure 3 Another flowchart of a method for generating a parameterized file of a preprocessor processing module provided in an embodiment of the present application;
[0026] Figure 4 A schematic diagram of internal modules of a device 4000 for generating a module parameterization file provided in an embodiment of the present application;
[0027] Figure 5 A schematic diagram of the structure of a module parameterization file generation device 5000 provided in an embodiment of the present application. DETAILED DESCRIPTION
[0028] In order to make the purpose, technical solutions and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present application.
[0029] In the design process of IC modules, designers write the program of the module and instantiate the module in the chip. When instantiating, they need to specify the parameters of the module code in the chip. Parameterized modules can accept different input values and can be used in different chips without modifying the module code each time. The current implementation of parameterized design is mainly based on the statements provided by the HDL language. However, if only the parameterized design method provided by the HDL language is used, the design code will be too cumbersome and complicated, and it will be inconvenient to read, maintain, simulate and debug.
[0030] For example, in the traditional parametric design method, when conditional compilation is used to implement parametric design, the code structure is as follows:
[0031]
[0032] In this code structure, Code_A or Code_B is selected for execution according to the definition of macro Macro_A. That is, if macro Macro_A is defined, the compiler will compile the code of Code_A. If macro Macro_A is not defined, the compiler will compile the code of Code_B. However, in large projects, too much conditional compilation may reduce the readability of the code.
[0033] In the traditional parametric design method, the generate...if statement can also be used to implement parametric design. It is a compile-time conditional statement used in HDL to generate or exclude hardware resources according to certain conditions. The generate block can contain multiple if conditions to create a parameterized hardware design. For the pseudo code of generate...if, this application will not go into details here. In large projects, too many generate...if statements may make the code structure complicated and difficult to understand and maintain.
[0034] In the traditional parametric design method, when the parametric design is implemented using the generate...for statement, the code structure is as follows:
[0035]
[0036] This code structure is a for loop, which allows a code block to be generated repeatedly for a specified number of times. It starts from 0 and ends at Macro_C-1. The value of i increases by 1 for each iteration. Code_C is the code block executed at each iteration. However, since the generate...for type code includes the loop body of multiple rounds of execution, it is not expanded, which makes it difficult to understand and debug.
[0037] Based on this, an embodiment of the present application proposes a method for generating a module parameterization file, which can make the code more concise and easy to understand.
[0038] Figure 1 The following is a flow chart of a method for generating a module parameterization file according to an embodiment of the present application. The flow chart can be executed by a module parameterization file generating device, such as Figure 1 As shown, the process includes the following steps:
[0039] Step 101, a module parameterization file generating device receives a preprocessing instruction, the preprocessing instruction has source file indication information, and a preprocessing identifier and a code statement for realizing module parameterization are set in a source file corresponding to the source file indication information.
[0040] Specifically, the module parameterization file generation device may be a computer device, a tablet computer or a server. The received preprocessing instruction may be input by a staff member, and the preprocessing instruction may contain source file indication information, which may include the file name and path of the source file. After the preprocessing instruction specifies the path of the source file, the module parameterization file generation device may open, read and parse the source file. Exemplarily, the preprocessing instruction may be:
[0041] tools / prpl
[0042] CM / a / b / c / d / mips_soc.v.prpl
[0043] Among them, mips_soc.v.prpl is the file name of the source file, CM / a / b / c / d is the path of the source file, and prpl is the file corresponding to the preprocessor. The preprocessor is used to read and parse the source file in the module parameterization file generation device.
[0044] The source file is written according to the module function requirements. The source file is a plain text file. The source file is provided with a preprocessing mark and a code statement for implementing module parameterization. In order to distinguish it from other source files without preprocessing requirements, the suffix of the source file that needs to be preprocessed can be set to prpl. The suffix of the source file is set to the preset suffix, and the source file that needs to be preprocessed can be more clearly distinguished. The module name can be specified in the source file. For example, if the module name is cm3_top, the module name can be assigned to modname. The code of this function is #pl my$modname=cm3_top, and #pl is the preprocessing mark; the source file can also read in the macro file related to the module. For example, #pl readvh "mips_config.vh", #pl readvh "mips_common_const.vh", indicating that the read macro files are "mips_config.vh" and "mips_common_const.vh".
[0045] For example, Figure 2 A schematic diagram of a module interface block diagram provided in an embodiment of the present application, taking the Coherence Manager (CM) module as an example, the module interface block diagram is as follows Figure 2 As shown. Figure 2As shown in the figure, the CM module can be configured into 8 ports, namely port 0, port 1...port 7. Therefore, the total number of cores and input / output cache coherence units (I / O Coherence Unit, IOCU) connected to the CM module is less than or equal to 8. If there are both cores and IOCUs, connect the core first and then the IOCU. When the core is connected, the corresponding connection bus is the cache coherence protocol (MIPS Coherence Protocol, MCP) bus. When the IOCU is connected, the corresponding connection bus can be configured as the Advanced eXtensible Interface (AXI) or Advanced Interface Coherence Extensions (AXI Coherency Extensions, ACE) bus, and the bus connected to the memory can be configured as the AXI or ACE bus.
[0046] For example, part of the source file code is as follows:
[0047] #pl for(my$ii=0;$ii<${MIPS_CSS_NUM_IOCUS};$ii++){
[0048] input wire IOC${ii}_ARVALID,
[0049] output wire IOC${ii}_ARREADY, ......
[0051] #pl if($CM3_IOC_APAR_IMPL_ARRAY[$ii]){
[0052] input wire[`CM3_IOC_AXI_APAR_w-1:0]IOC${ii}_ARPAR,
[0053] #pl} ......
[0055] }
[0056] Among them, the preprocessing identifier is #pl, and the code after #pl is the code statement for implementing module parameterization. The preprocessing identifier can also be other identifiers, and this application will not go into details about this.
[0057] Step 102, the module parameterization file generation device obtains and parses the source file based on the source file indication information to obtain an intermediate file corresponding to the source file, wherein the intermediate file includes a parameter value of a first parameter, and the first parameter is a parameter indicated in a first code statement with a preprocessing identifier.
[0058] Exemplarily, after obtaining the source file according to the path of the source file, the source file is parsed to obtain an intermediate file corresponding to the source file. The source file includes a first code statement with a preprocessing identifier and a second code statement without a preprocessing identifier. Using the above example, for(my$ii=0;$ii<${MIPS_CSS_NUM_IOCUS};$ii++) is the first code statement in the embodiment of the present application, and input wire IOC${ii}_ARVALID is the second code statement in the embodiment of the present application. The source file is parsed to obtain an intermediate file corresponding to the source file, including deleting the preprocessing identifier in the first code statement and copying it to the intermediate file, obtaining the parameter value of the first parameter in the first code statement and storing it in the intermediate file, and setting the second code statement in the source file with a literal translation identifier and storing it in the intermediate file, thereby obtaining the intermediate file. Optionally, setting the literal translation identifier for the second code statement in the source file includes adding a print instruction before the second code statement in the source file.
[0059] Exemplarily, the above source file is used, and part of the code of the intermediate file corresponding to the above source file after parsing is as follows:
[0060] for(my$ii=0;$ii<${MIPS_CSS_NUM_IOCUS};$ii++){
[0061] print FD"input wire IOC${ii}_ARVALID,
[0062] print FD"output wire IOC${ii}_ARREADY, ......
[0064] if($CM3_IOC_APAR_IMPL_ARRAY[$ii]){
[0065] print FD"input wire[`CM3_IOC_AXI_APAR_w-1:0]IOC${ii}_ARPAR,
[0066] } ......
[0068] }
[0069] Among them, print FD is a print instruction, and the intermediate file includes the parameter value of the first parameter. The first parameter is the parameter indicated in the first code statement with a preprocessing identifier. In some codes of the above intermediate file, MIPS_CSS_NUM_IOCUS is the first parameter, and the macro file where the parameter is located is "mips_common_const.vh". CM3_IOC_APAR_IMPL_ARRAY[$ii] is an array and also belongs to the first parameter. The intermediate file also includes the parameter value of the first parameter, which will not be described in detail here.
[0070] Optionally, obtaining the parameter value of the first parameter in the first code statement includes obtaining the parameter value of the first parameter in the first code statement from a parameter processing instruction, and if the parameter value indicated by the parameter processing instruction is not received, obtaining the parameter value of the first parameter in the first code statement from a macro file.
[0071] That is, the parameter value of the first parameter is obtained according to the parameter processing instruction, and the parameter processing instruction may also be a preprocessing instruction. Exemplarily, the preprocessing instruction includes the parameter value of the first parameter, and the preprocessing instruction is adjusted as follows:
[0072] tools / prpl+define+MIPS_CSS_NUM_IOCUS=8
[0073] CM / a / b / c / d / mips_soc.v.prpl
[0074] If the parameter value indicated by the parameter processing instruction is not received, the parameter value of the first parameter is obtained from the macro file; if both the parameter processing instruction and the macro file have the parameter value of the first parameter, the parameter value indicated by the parameter processing instruction shall prevail; if neither the parameter processing instruction nor the macro file has the parameter value of the first parameter, the first code statement is invalid.
[0075] Step 103 , the module parameterization file generation device transcribes the first code statement into a second code statement based on the parameter value of the first parameter, thereby obtaining a target file, wherein the code statement in the target file is a code statement that conforms to the parameter value of the first parameter.
[0076] Exemplarily, based on the parameter value of the first parameter, the first code statement is transcribed into the second code statement to obtain the target file, and if the first code statement is a conditional code statement, the code statement corresponding to the conditional branch in the conditional code statement that meets the parameter value of the first parameter is used as the second code statement.
[0077] #pl if($CM3_IOC_APAR_IMPL_ARRAY[$ii]){
[0078] input wire[`CM3_IOC_AXI_APAR_w-1:0]IOC${ii}_ARPAR,
[0079] #pl}
[0080] This code statement is a conditional code statement. The first parameter is $CM3_IOC_APAR_IMPL_ARRAY[$ii]. According to the specific parameter value of the first parameter in the intermediate file, if the parameter value of the first parameter is true, the code statement corresponding to the conditional branch input wire[`CM3_IOC_AXI_APAR_w-1:0]IOC${ii}_ARPAR is the second code statement; if the parameter value of the first parameter is false, there is no code statement corresponding to the conditional branch that meets the parameter value of the first parameter. If the first code statement is a loop code statement, based on the parameter value of the first parameter, determine the number of loops N of the first code statement, copy the first code statement N times, and obtain the second code statement. Using the above example,
[0081] #pl for(my$ii=0;$ii<${MIPS_CSS_NUM_IOCUS};$ii++){
[0082] input wire IOC${ii}_ARVALID,
[0083] output wire IOC${ii}_ARREADY, ......
[0085] #pl if($CM3_IOC_APAR_IMPL_ARRAY[$ii]){
[0086] input wire[`CM3_IOC_AXI_APAR_w-1:0]IOC${ii}_ARPAR,
[0087] #pl} ......
[0089] }
[0090] If $CM3_IOC_APAR_IMPL_ARRAY[$ii] is false and MIPS_CSS_NUM_IOCUS is N-1, it is determined that the number of loops of the first code statement is N, and the first code statement is copied N times to obtain the second code statement. For example, if N is 3, the second code statement is
[0091] input wire IOC0_ARVALID,
[0092] output wire IOC0_ARREADY, ......
[0094] input wire IOC1_ARVALID,
[0095] output wire IOC1_ARREADY, ......
[0097] input wire IOC2_ARVALID,
[0098] output wire IOC2_ARREADY, ......
[0100] It can be seen from this that, using the module parameterization file generation method of the present application, for conditional code statements, the generated target file contains code statements corresponding to the conditional branch that meets the parameter value of the first parameter, and the target file is more concise because some codes are reduced; for loop code statements, because the code executed in the loop is looped and generated N times, the code is looped and expanded, and the code is not as concise as the traditional method, but it is easier to understand and debug. Moreover, the module parameterization file generation method in the embodiment of the present application can loop and generate corresponding code for files with certain regularities in the code.
[0101] Optionally, after obtaining the target file, the method further includes: simulating and verifying the target file. If the verification result fails, the target file and the preprocessor are checked. The preprocessor is used to execute the above-mentioned method for generating the module parameterization file. The preprocessor can also support the specification of the module name, and add a suffix name as the target file. For example, #pl my$modname=specified_module_name. Optionally, the generated target file can also be checked with the help of simulation and synthesis tools. For example, Figure 3 A flowchart of a method for generating a parameterized file of a preprocessor processing module provided in an embodiment of the present application is shown in FIG. Figure 3 As shown, the preprocessor parses the source file to generate an intermediate file, and further, the preprocessor processes the intermediate file to generate a target file. After obtaining the target file, the target file is subjected to subsequent simulation and verification.
[0102] It can be understood that the module parameterization file provided in the embodiment of the present application can be used for the design code written by the designer, and can also be used for the verification code written by the verifier.
[0103] Figure 4 A schematic diagram of the internal modules of a device 4000 for generating a module parameterization file provided in an embodiment of the present application is shown in FIG. Figure 4 As shown, the device may include: a receiving module 401, a processing module 402, and optionally, a storage module, the storage module is used to store computer instructions or programs, and the processing module 402 can call the computer instructions or programs in the storage module.
[0104] Among them, the receiving module 401 is used to receive a preprocessing instruction, and the preprocessing instruction has source file indication information; the source file corresponding to the source file indication information is provided with a preprocessing identifier and a code statement for implementing module parameterization; the processing module 402 is used to obtain and parse the source file based on the source file indication information to obtain an intermediate file corresponding to the source file; wherein the intermediate file includes a parameter value of a first parameter; the first parameter is a parameter indicated in a first code statement with a preprocessing identifier; and based on the parameter value of the first parameter, the first code statement is transcribed into a second code statement, thereby obtaining a target file, and the code statement in the target file is a code statement that conforms to the parameter value of the first parameter.
[0105] In a possible implementation, the processing module 402 is specifically used to delete the preprocessing identifier in the first code statement and copy it to the intermediate file; obtain the parameter value of the first parameter in the first code statement and store it in the intermediate file; set the direct translation identifier for the second code statement in the source file and store it in the intermediate file, thereby obtaining the intermediate file.
[0106] In a possible implementation, the processing module 402 is further specifically used to obtain a parameter value of the first parameter in the first code statement from a parameter processing instruction; if the parameter value indicated by the parameter processing instruction is not received, obtaining the parameter value of the first parameter in the first code statement from a macro file.
[0107] In a possible implementation, the processing module 402 is further specifically configured to add a print instruction before the second code statement in the source file.
[0108] In a possible implementation, the first code statement is a conditional code statement; the processing module 402 is further specifically configured to use a code statement corresponding to a conditional branch in the conditional code statement that meets a parameter value of the first parameter as the second code statement.
[0109] In a possible implementation, the first code statement is a loop code statement; the processing module 402 is further specifically used to determine the number of loops N of the first code statement based on the parameter value of the first parameter; and copy the first code statement N times to obtain a second code statement.
[0110] The processing module 402 is also specifically used to, after obtaining the target file, perform simulation verification on the target file, and if the verification result fails, check the target file and the preprocessor; the preprocessor is used to execute the method in any possible implementation method described above.
[0111] Figure 5 The structure diagram of a device 5000 for generating a module parameterization file provided in an embodiment of the present application is shown in FIG. Figure 5 As shown, it includes at least one processor 501 and a memory 502 connected to the at least one processor 501. The specific connection medium between the processor 501 and the memory 502 is not limited in the embodiment of the present application. Figure 5 For example, the processor 501 and the memory 502 are connected via a bus. The bus can be divided into an address bus, a data bus, a control bus, etc.
[0112] In the embodiment of the present application, the memory 502 stores instructions that can be executed by at least one processor 501. The at least one processor 501 can implement the steps of the above-mentioned module parameterization file generation method by executing the instructions stored in the memory 502.
[0113] The processor 501 is the control center of the computer device, and can use various interfaces and lines to connect various parts of the computer device, and perform resource settings by running or executing instructions stored in the memory 502 and calling data stored in the memory 502. Optionally, the processor 501 may include one or more processing units, and the processor 501 may integrate an application processor and a modem processor, wherein the application processor mainly processes the operating system, user interface, and application programs, and the modem processor mainly processes wireless communications. It is understandable that the above-mentioned modem processor may not be integrated into the processor 501. In some embodiments, the processor 501 and the memory 502 may be implemented on the same chip, and in some embodiments, they may also be implemented separately on independent chips.
[0114] The processor 501 may be a general-purpose processor, such as a central processing unit (CPU), a digital signal processor, an application-specific integrated circuit (ASIC), a field programmable gate array or other programmable logic device, a discrete gate or transistor logic device, or a discrete hardware component, and may implement or execute the methods, steps, and logic block diagrams disclosed in the embodiments of the present application. A general-purpose processor may be a microprocessor or any conventional processor, etc. The steps of the method disclosed in the embodiments of the present application may be directly embodied as being executed by a hardware processor, or may be executed by a combination of hardware and software modules in the processor.
[0115] The memory 502 is a non-volatile computer-readable storage medium that can be used to store non-volatile software programs, non-volatile computer executable programs and modules. The memory 502 may include at least one type of storage medium, such as a flash memory, a hard disk, a multimedia card, a card-type memory, a random access memory (Random Access Memory, RAM), a static random access memory (Static Random Access Memory, SRAM), a programmable read-only memory (Programmable Read Only Memory, PROM), a read-only memory (Read Only Memory, ROM), an electrically erasable programmable read-only memory (Electrically Erasable Programmable Read-Only Memory, EEPROM), a magnetic memory, a disk, an optical disk, etc. The memory 502 is any other medium that can be used to carry or store a desired program code in the form of an instruction or data structure and can be accessed by a computer, but is not limited thereto. The memory 502 in the embodiment of the present application can also be a circuit or any other device that can realize a storage function, for storing program instructions and / or data.
[0116] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment in combination with software and hardware. Moreover, the present application may adopt the form of a computer program product implemented in one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) that include computer-usable program code.
[0117] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.
[0118] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.
[0119] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.
[0120] Obviously, those skilled in the art can make various changes and modifications to the present application without departing from the spirit and scope of the present application. Thus, if these modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is also intended to include these modifications and variations.
Claims
1. A method for generating a module parameterization file, characterized in that: include: receiving a preprocessing instruction, wherein the preprocessing instruction has source file indication information; The source file corresponding to the source file indication information is provided with a preprocessing identifier and a code statement for implementing module parameterization; Based on the source file indication information, the source file is acquired and parsed to obtain an intermediate file corresponding to the source file; wherein the intermediate file includes a parameter value of a first parameter; the first parameter is a parameter indicated in a first code statement having a preprocessing identifier; Based on the parameter value of the first parameter, the first code statement is transcribed into a second code statement, thereby obtaining a target file, wherein the code statement in the target file is a code statement that conforms to the parameter value of the first parameter.
2. The method according to claim 1, characterized in that The method comprises: Parsing the source file to obtain an intermediate file corresponding to the source file includes: Deleting the preprocessing identifier in the first code statement and copying it to the intermediate file; Obtaining a parameter value of a first parameter in the first code statement and storing the value in the intermediate file; The second code statement in the source file is set with a direct translation mark and then stored in the intermediate file, thereby obtaining the intermediate file.
3. The method according to claim 2, characterized in that Obtaining a parameter value of a first parameter in the first code statement includes: Obtaining a parameter value of a first parameter in the first code statement from a parameter processing instruction; If the parameter value indicated by the parameter processing instruction is not received, the parameter value of the first parameter in the first code statement is obtained from the macro file.
4. The method according to claim 2, characterized in that: Setting a direct translation flag for the second code statement in the source file includes: A print instruction is added before the second code statement in the source file.
5. The method according to any one of claims 1 to 4, characterized in that The first code statement is a conditional code statement; Based on the parameter value of the first parameter, translating the first code statement into a second code statement includes: The code statement corresponding to the conditional branch that meets the parameter value of the first parameter in the conditional code statement is used as the second code statement.
6. The method according to any one of claims 1 to 4, characterized in that The first code statement is a loop code statement; Based on the parameter value of the first parameter, translating the first code statement into a second code statement includes: Determining the number of loops N of the first code statement based on the parameter value of the first parameter; The first code statement is copied N times to obtain a second code statement.
7. The method according to claim 1, characterized in that After getting the target file, it also includes: The target file is simulated and verified. If the verification result fails, the target file and the preprocessor are checked; the preprocessor is used to execute the method according to any one of claims 1 to 6.
8. A device for generating a module parameterization file, characterized in that: include: A receiving module, used for receiving a preprocessing instruction, wherein the preprocessing instruction has source file indication information; The source file corresponding to the source file indication information is provided with a preprocessing identifier and a code statement for implementing module parameterization; A processing module is used to obtain and parse the source file based on the source file indication information to obtain an intermediate file corresponding to the source file; wherein the intermediate file includes a parameter value of a first parameter; the first parameter is a parameter indicated in a first code statement with a preprocessing identifier; and based on the parameter value of the first parameter, the first code statement is transcribed into a second code statement to obtain a target file, wherein the code statement in the target file is a code statement that conforms to the parameter value of the first parameter.
9. A device for generating a module parameterization file, characterized in that: include: Memory, used to store computer programs or instructions; A processor, configured to call a computer program or instruction stored in the memory to execute the method according to any one of claims 1 to 7.
10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores instructions, and when a computer reads and executes the instructions, the computer executes the method according to any one of claims 1 to 7.
11. A computer program product, characterized in that The computer program product stores instructions, and when a computer reads and executes the instructions, the computer executes the method according to any one of claims 1 to 7.