Multi-type interface access unified scheduling determinacy Ethernet scheduling device

Abstract

The invention belongs to the technical field of airborne bus communication in an airborne avionics system, and particularly relates to a multi-type interface access unified scheduling determinacy Ethernet scheduling device. Comprising a host machine access interface module, a hardware interface access module, a standard Ethernet interface access module, a communication configuration receiving management module, a communication configuration storage and state management module, a multi-service type interface output processing module, a service priority mapping management module, an enqueue flow management module and a network data processing module. Different QoS capability integration services are provided for different interface access service characteristics, so that the timeliness of service access of each interface is effectively controlled, and the control and buffer capabilities are met; according to the invention, the Ethernet based on dynamic flexibility and high determinacy communication architecture provides distributed synchronous collaboration and time-sharing gating scheduling, so that access of multiple types of interfaces to unified transmission equipment is realized.

Description

Technical Field

[0001] The invention belongs to the technical field of airborne bus communication in airborne avionics systems, and in particular relates to a multi-type interface access unified scheduling deterministic Ethernet scheduling device. Background Art

[0002] The existing mainstream aviation airborne bus network adopts an event-triggered communication mechanism. The end systems of the network can access the communication at any time and send messages as soon as there is one. This inevitably causes transmission competition, brings uncontrollable delay and jitter to the end-to-end data stream transmission, and cannot meet the needs of new avionics systems for distributed communication applications related to different time criticality and safety. Time-triggered Ethernet (TTE) belongs to the new generation of aviation airborne bus under the time-triggered architecture. On the basis of introducing the clock synchronization mechanism, a global network synchronization clock is established. Through the deterministic time-triggered communication mechanism, non-competitive TT frame communication is guaranteed, which greatly improves the time determinism and real-time performance of network communication; at the same time, it supports the transmission of event-triggered communication frames to meet the application task integration of different time criticality levels. However, under the TTE technical system, the communication bandwidth time slots are divided by TDMA and mapped to each message stream. This fine-grained level requires strong coupling binding of the corresponding category of applications in the system, making the TT services carried by the system too closed and lacking the space for flexible design, which is not conducive to system integration and iterative maintenance in airborne environments with diverse working modes. Summary of the invention

[0003] The technical problem solved by the present invention is as follows: the current general Ethernet, AFDX, FC and other switching networks cannot realize strong real-time and low-jitter communication architecture services. At the same time, the time-triggered TTE technology is too closed, and the constraints and definitions of its TT services do not support flexible dynamic access and reconfigurable features. The purpose of the present invention is to provide a deterministic Ethernet scheduling device for unified scheduling of multi-type interface access, provide different QoS capability integration services for different interface access service characteristics, effectively control the timeliness of each interface service access, meet the control and buffering capabilities, and realize a design method for a unified transmission device for multi-type interface access based on dynamic flexibility and high deterministic communication architecture to provide distributed synchronous collaboration and time-sharing gating scheduling of Ethernet.

[0004] The technical solution of the present invention:

[0005] A device for uniformly scheduling deterministic Ethernet access for multiple types of interfaces, the device comprising:

[0006] Host machine access interface module 1, hardware interface access module 2, standard Ethernet interface access module 3, communication configuration receiving management module 4, communication configuration storage and status management module 5, multi-service type interface output processing module 6, service priority mapping management module 7, queue flow management module 8, network data processing module 11;

[0007] The host access interface module 1, the hardware interface access module 2, and the standard Ethernet interface access module 3 are parallel modules, all of which are connected to the multi-service type interface output processing module 6; the input data of the host access interface module 1 is divided into configuration data and communication data, and the configuration data is input into the communication configuration receiving management module 4, and the output of the communication configuration receiving management module 4 is connected to the communication configuration storage and status management module 5 for storage, and the output of the communication configuration storage and status management module 5 is connected to the multi-service type interface output processing module 6, and the output of the multi-service type interface output processing module 6 is connected to the service priority mapping management module 7, and the output of the service priority mapping management module 7 enters the priority queue cache of the network data processing module 11.

[0008] Furthermore, the device also includes: an enqueue traffic management module 8, a global synchronization module 9, and a synchronization establishment and maintenance module 10;

[0009] The enqueue traffic management module 8 is arranged between the service priority mapping management module 7 and the network data processing module 11 . The network data processing module 11 completes initialization synchronization through the global synchronization module 9 . The network data processing module 11 performs communication band scheduling through the synchronization establishment and maintenance module 10 .

[0010] Furthermore, the host access interface module 1 supports PCIe, PCI, and localbus interface access communications, and is also compatible with the above-mentioned types of interface software simulation interfaces, and transmits the interface access data to the multi-service type interface output processing module 6;

[0011] The hardware interface access module 2 supports the data input and output of the SRIO, IB, and DVR interfaces, and implements the characteristic attribute encapsulation and stripping of the data hardware of the interface, and transmits the interface access data to the multi-service type interface output processing module 6;

[0012] The standard Ethernet interface access module 3 supports standard Ethernet access communication, provides network frame parsing processing, and transmits the interface access data to the multi-service type interface output processing module 6.

[0013] Furthermore, the communication configuration storage and status management module 5 stores predefined configuration rules: at least including the type and number of external access interfaces of the scheduling device when it is currently online, the mapping relationship between the interface service type characteristics and the scheduling queue of the uniformly scheduled deterministic Ethernet, the bandwidth capacity of each type of interface service, the deterministic Ethernet device ID of the interface service transparent transmission peer end, and the scheduling queue buffer depth of the deterministic Ethernet.

[0014] Further, the communication configuration receiving management module 4 receives the configuration data from the data path of the host access interface module 1, parses it according to the rules agreed upon in the configuration, and stores the parsing result in the communication configuration storage and status management module 5;

[0015] The communication configuration storage and status management module 5 stores and provides query access paths for the above modules according to the table lookup method required by the multi-service type interface output processing module 6, the service priority mapping management module 7, the queue flow management module 8, and the network data processing module 11;

[0016] The multi-service type interface output processing module 6 receives data access from three interfaces: the host machine access interface module 1, the hardware interface access module 2, and the standard Ethernet interface access module 3, and performs classified processing;

[0017] The multi-service type interface output processing module 6 implements the updating of the protocol header of the Ethernet data frame accessed by the standard Ethernet interface access module 3 according to the interface type and the data frame priority classification, and the update parameters are derived from the communication configuration storage and status management module 5;

[0018] The multi-service type interface output processing module 6 performs complete protocol encapsulation on the pure user data accessed by the host access interface module 1. Two different processing methods can be selected for the data of the hardware interface of the hardware interface access module 2. One is to directly perform tunnel encapsulation on the data collected by the hardware interface and transparently transmit it after complete protocol encapsulation. The other is to strip the hardware attribute characteristics of the interface and perform complete protocol encapsulation on the remaining valid data.

[0019] Furthermore, the service priority mapping management module 7 receives the input of the multi-service type interface output processing module 6, and according to the communication configuration storage and status management module 5, obtains the independent priority category of the input data of the multi-service type interface output processing module 6, and accesses the corresponding priority scheduling cache queue.

[0020] Furthermore, the queue traffic management module 8 is a functional module between the service priority mapping management module 7 and the priority scheduling cache. For each priority queue data input by the service priority mapping management module 7, bandwidth agreement is performed according to the parameters of the communication configuration storage and status management module 5 to avoid extraordinary bandwidth services.

[0021] Further, the global synchronization module 9 constructs synchronization according to the interactive processing of external input data, and the synchronization establishment and maintenance module 10 performs maintenance and reconstruction based on the synchronization signal provided by the global synchronization module 9;

[0022] The synchronization establishment and maintenance module 10 provides the synchronization information to the network data processing module 11 , and the network data processing module 11 performs scheduling processing according to the pre-planned configuration of the communication configuration storage and status management module 5 based on the data entering the priority scheduling cache.

[0023] The technical solution of the present invention utilizes a gated scheduling transmission mechanism established on the basis of high-precision network clock synchronization, which can realize the non-competition transmission of TAS data streams in the network, realize the integration of bandwidth access controllable services and TAS data streams on the same physical link, and at the same time, the business resource division can support dynamic access planning, thereby improving the flexibility of system business access and integrated expansion while improving the certainty and real-time performance of data communication; so that the airborne bus can better cope with applications with certain real-time requirements and security, and the system business communication supports flexible access and dynamic reconstruction. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 A structural diagram of a deterministic Ethernet scheduling device for accessing multiple types of interfaces in a unified scheduling manner provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0025] The technical solution of the present invention is described in detail below in conjunction with the accompanying drawings.

[0026] Aiming at the network architecture design and application requirements in future intelligent airborne systems, in the communication architecture scenario of layered and hierarchical multi-service integration, the data collection, processing and exchange of intelligent avionics need to have a certain degree of certainty and reliability, as well as a certain degree of openness and flexibility. In view of the constantly iterative system requirements and the changing working modes, there is a need for communication resource reconstruction and migration planning. A deterministic communication transmission architecture with flexible and dynamic access for differentiated business scenarios is proposed.

[0027] As an indispensable component of the network architecture, the deterministic transmission communication equipment for differentiated business scenarios is embedded in each avionics communication subsystem, providing a unified interface for the connection between each communication subsystem and the network system switch, thus realizing different time-critical data transmission applications between network devices.

[0028] The embodiment of the present invention provides a multi-type interface access unified scheduling deterministic Ethernet scheduling device, such as Figure 1 As shown, the device comprises:

[0029] Host machine access interface module 1, hardware interface access module 2, standard Ethernet interface access module 3, communication configuration receiving management module 4, communication configuration storage and status management module 5, multi-service type interface output processing module 6, service priority mapping management module 7, queue flow management module 8, network data processing module 11;

[0030] The host access interface module 1, the hardware interface access module 2, and the standard Ethernet interface access module 3 are parallel modules, all of which are connected to the multi-service type interface output processing module 6; the input data of the host access interface module 1 is divided into configuration data and communication data, and the configuration data is input into the communication configuration receiving management module 4, and the output of the communication configuration receiving management module 4 is connected to the communication configuration storage and status management module 5 for storage, and the output of the communication configuration storage and status management module 5 is connected to the multi-service type interface output processing module 6, and the output of the multi-service type interface output processing module 6 is connected to the service priority mapping management module 7, and the output of the service priority mapping management module 7 enters the priority queue cache of the network data processing module 11.

[0031] The device also includes: an enqueue flow management module 8, a global synchronization module 9, and a synchronization establishment and maintenance module 10;

[0032] The enqueue traffic management module 8 is arranged between the service priority mapping management module 7 and the network data processing module 11 . The network data processing module 11 completes initialization synchronization through the global synchronization module 9 . The network data processing module 11 performs communication band scheduling through the synchronization establishment and maintenance module 10 .

[0033] The host access interface module 1 supports PCIe, PCI, localbus interface access communications, and is also compatible with the above-mentioned types of interface soft simulation interfaces, and transmits the interface access data to the multi-service type interface output processing module 6;

[0034] The hardware interface access module 2 supports the data input and output of the SRIO, IB, and DVR interfaces, and implements the characteristic attribute encapsulation and stripping of the data hardware of the interface, and transmits the interface access data to the multi-service type interface output processing module 6;

[0035] The standard Ethernet interface access module 3 supports standard Ethernet access communication, provides network frame parsing processing, and transmits the interface access data to the multi-service type interface output processing module 6.

[0036] The communication configuration storage and status management module 5 stores predefined configuration rules: at least including the type and number of external access interfaces of the scheduling device when it is currently online, the mapping relationship between the interface service type characteristics and the scheduling queue of the uniformly scheduled deterministic Ethernet, the bandwidth capacity of each type of interface service, the deterministic Ethernet device ID of the interface service transparent transmission peer end, and the scheduling queue buffer depth of the deterministic Ethernet.

[0037] The communication configuration receiving management module 4 receives the configuration data from the data path of the host access interface module 1, parses it according to the configuration agreed rules, and stores the parsing results in the communication configuration storage and status management module 5;

[0038] The communication configuration storage and status management module 5 stores and provides query access paths for the above modules according to the table lookup method required by the multi-service type interface output processing module 6, the service priority mapping management module 7, the queue flow management module 8, and the network data processing module 11;

[0039] The multi-service type interface output processing module 6 receives data access from three interfaces: the host machine access interface module 1, the hardware interface access module 2, and the standard Ethernet interface access module 3, and performs classified processing;

[0040] The multi-service type interface output processing module 6 implements the updating of the protocol header of the Ethernet data frame accessed by the standard Ethernet interface access module 3 according to the interface type and the data frame priority classification, and the update parameters are derived from the communication configuration storage and status management module 5;

[0041] The multi-service type interface output processing module 6 performs complete protocol encapsulation on the pure user data accessed by the host access interface module 1. Two different processing methods can be selected for the data of the hardware interface of the hardware interface access module 2. One is to directly perform tunnel encapsulation on the data collected by the hardware interface and transparently transmit it after complete protocol encapsulation. The other is to strip the hardware attribute characteristics of the interface and perform complete protocol encapsulation on the remaining valid data.

[0042] The service priority mapping management module 7 receives the input of the multi-service type interface output processing module 6, and obtains the independent priority category of the input data of the multi-service type interface output processing module 6 according to the communication configuration storage and status management module 5, and accesses the corresponding priority scheduling cache queue.

[0043] The queue traffic management module 8 is a functional module between the service priority mapping management module 7 and the priority scheduling cache. It performs bandwidth agreement for each priority queue data input by the service priority mapping management module 7 according to the parameters of the communication configuration storage and status management module 5 to avoid extraordinary bandwidth services.

[0044] The global synchronization module 9 constructs synchronization according to the interactive processing of external input data, and the synchronization establishment and maintenance module 10 performs maintenance and reconstruction based on the synchronization signal provided by the global synchronization module 9;

[0045] The synchronization establishment and maintenance module 10 provides the synchronization information to the network data processing module 11 , and the network data processing module 11 performs scheduling processing according to the pre-planned configuration of the communication configuration storage and status management module 5 based on the data entering the priority scheduling cache.

[0046] The host access interface module 1, hardware interface access module 2, and standard Ethernet interface access module 3 can be interfaces with pure hardware characteristics or software bus interfaces. The mapping to the scheduling queue of the uniformly scheduled deterministic Ethernet is determined based on the transmission time-sensitive characteristics of the input frames of the above interfaces and the length of the single-frame code stream. The single-frame length of the interface input exceeds the maximum MTU (payload) of the deterministic Ethernet, and it is necessary to adapt the frame cache of the unified network scheduling queue according to the agreed slicing mechanism (such as Ethernet IP slicing).

[0047] The premise of multi-interface service access is that the total service bandwidth received by multiple interfaces cannot exceed the service bandwidth capacity of the device's external output interface. At the same time, the MAC layer access bandwidth of the deterministic Ethernet device is shared by multiple priority scheduling queues. The same service type from different input interfaces will share access to a certain priority scheduling queue of the MAC layer. Therefore, the system allows multi-type interface service access and can be fully scheduled and transmitted through the MAC layer of the deterministic Ethernet device. The entire system design needs to be constrained within a reasonable boundary range. Even if the bandwidth statistics of multi-interface access services do not exceed the output scheduling bandwidth of the deterministic Ethernet device at a certain time granularity (such as 1s access bandwidth or a finer granularity common avionics task operation cycle of 50ms), the multi-interface service The services are not collaboratively constrained. There are multiple interfaces that concurrently access data streams mapped to a scheduling shared queue at the MAC layer, and the internal cache of the device is limited. For TAS services, there are fixed scheduling authority time slots within the cycle. Accessing services during non-scheduling authority time may burst the TAS queue cache, resulting in an intolerable transmission situation in which access data is lost within the device. There is back pressure control in the priority scheduling queue of the MAC layer, that is, the priority scheduling queue of the MAC layer informs the interface end to stop the shared time-sharing scheduling of multiple interface services mapped to this priority scheduling queue; thereby, the shared cache at the interface end no longer copies and moves data to the priority scheduling queue at the MAC layer; when the shared cache at the interface end is full, a back pressure mechanism is used to control the interface end data source to stop sending.

[0048] Multi-type interface access transmission, supported access interfaces include: PCIe / PCI / localbus and other data access interfaces provided by common CPU / DSP and other processors; standard Ethernet service access interface; SRIO / IB / DVR and other airborne sensor communication access interfaces; or software-based bus interfaces that simulate hardware characteristics while isolating physical hardware.

[0049] The services accessed by each interface are classified in different modes: 1. The data accessed by the host machine carries a classification identifier when accessed through PCIe / PCI / localbus. The identifier is pre-defined and issued by the user when generating application data. The device performs frame classification table lookup and mapping based on the classification identifier of the data, and maps it to the scheduling queue of the uniformly scheduled deterministic Ethernet according to the relationship obtained from the table lookup; 2. The data of the standard Ethernet service access interface enters the frame classification mapping and dispatching module for classification scheduling according to the QoS type of the service and the VLANID identifier, and is classified into the scheduling queue of the uniformly scheduled deterministic Ethernet; 3. Sensor data such as SRIO / IB / DVR are classified and processed according to the characteristics of the access service type: in the single-characteristic service mode, a single-channel interface is used to map to a single type of uniformly scheduled deterministic Ethernet scheduling service queue; in the multi-type service mode, different service types in the single-channel interface are mapped to different scheduling service queues of the uniformly scheduled deterministic Ethernet; 4. The services of the software bus interface are mapped to the queue identifier according to the service characteristics of the first few hardware interfaces it simulates.

[0050] The configuration rules pre-defined in the communication configuration receiving management module 4 and the communication configuration storage and status management module 5 can be manually configured or configured to the product in an interface programmable manner, or can be remotely loaded and configured through a host interface or a general Ethernet: the pre-defined configuration rules include the type and quantity of external access when the scheduling device is currently online, the mapping relationship between the interface service type characteristics and the scheduling queue of the uniformly scheduled deterministic Ethernet, the bandwidth capacity of each type of interface service, the deterministic Ethernet device ID of the interface service transparent transmission peer end, and the scheduling queue buffer depth of the deterministic Ethernet.

[0051] The multi-service type interface output processing module 6, each interface is equipped with an independent data cache queue of the interface, and the queue cache data is designed to adopt shared time-sharing scheduling to write into the MAC scheduling shared queue corresponding to the deterministic Ethernet; the scheduling shared queue of the MAC layer is for physical port access transmission, and the rate of the cache scheduling output is determined by the proportion of the system allocated to the queue in the system scheduling cycle. Under the access bandwidth of 10Gbps, the ratio between the total gated time slots allocated by the queue and the scheduling cycle obtains the maximum capacity of the queue scheduling.

[0052] The network data processing module 11 generates periodic multi-queue scheduling pulses based on the system synchronization time base (the deterministic Ethernet device is connected to the system to obtain the synchronization time, and the time is kept by the local crystal oscillator of the device). The pulse of a single queue is divided into a scheduling start pulse and a scheduling end pulse. The pulse excitation comes from the time base gate switch action of the queue. The scheduling and sending control of the service is triggered based on the pulse signal. The corresponding queue data frame is gated and sent back-to-back in a first-in-first-out mode until it is sensed that the scheduling end pulse is about to arrive. It is judged whether the remaining time fragment plus the protection bandwidth time slot (the system chooses whether to enable the protection bandwidth time slot setting according to different scheduling modes) meets the bandwidth requirement of the current scheduling frame in the queue. If the conditions are met, it is continuously sent; if not, the queue scheduling can be terminated and the gate enable switch of the scheduling queue can be turned off in advance; or it can be selected to continue sending and send in a fragmented frame management mode, that is, the data frame of this scheduling is split into frames that meet the transmission within the protection bandwidth for transmission. Two types of scheduling controls can be used at the end boundary of the device's gated scheduling: 1. After the current gated time slot ends, the system allocates a sending continuation time slot for this queue, which is also the start protection time slot for the next gated scheduling. The protection time slot can be defined as the single longest frame code stream sending time in the current gate (code stream number bit x / yMbps, x is "the longest frame byte number + 20 bytes" multiplied by 8; y is the deterministic Ethernet port rate in Mbps) or a single fragmented frame code stream sending time; 2. The next gated scheduling starts scheduling, regardless of whether the current physical link status is idle, and the data of the gated queue is scheduled for transmission.

[0053] The services of the access interface of the network data processing module 11 are mapped according to the service characteristics. The same type of services from different interfaces are assigned to a certain type of scheduling queue in the deterministic Ethernet to wait for scheduling. The same type of messages on each interface use a time-division multiplexing access mechanism to access a certain type of shared scheduling queue of the corresponding MAC layer.

[0054] The network data processing module 11 designs the following receiving and processing flow before storing the services from each interface into the shared scheduling queue, such as checking the routing group packet, etc., and then maps the data classification of each interface to the shared scheduling queue of the deterministic Ethernet MAC to queue for output communication; for the data transmission between the MAC shared scheduling queue of the deterministic Ethernet and the deterministic Ethernet MAC scheduling shared queue of each interface, an asynchronous same-frequency or asynchronous cross-frequency dual-port queue control mechanism is designed.

[0055] The services of each interface of the network data processing module 11 are stored in the TDMA cycle and time slot allocation of the deterministic Ethernet MAC scheduling shared queue, which has intelligent autonomous capabilities. The device side collects and counts the service type, service bandwidth capacity ratio and service frame access cycle characteristic parameters of each interface (or the device side adopts the user programmable mode access configuration, the user side collects and counts the above information in advance for calculation, and configures it through the programmable interface) to define the TDMA cycle and time slot allocation of each corresponding shared scheduling queue online: 1. The allocated time slot is converted to the accumulated bandwidth within 1S to meet the bandwidth requirements of the statistical input; 2. The frequency corresponding to the number of frames written into the shared scheduling queue in the allocated TDMA cycle is not less than the frequency corresponding to the service frame access cycle; 3. The services corresponding to each interface write the service data in the interface into the corresponding shared scheduling queue according to the allocated time slot control right; 4. Each shared scheduling queue performs TDMA cycle timing independently and in parallel, and allocates the control right of the corresponding time slot to the service of the corresponding interface. For each MAC shared scheduling queue, a time-division multiplexing mechanism needs to be used to schedule the interface-side data cache (when the mode becomes a one-to-one architecture, a single interface occupies the entire TDMA time slot, and a simple configuration of a unique time slot occupies the entire TDMA cycle). At the same time, the number of internal data cache levels is controlled to the minimum range to avoid copies between internal caches that increase transmission scheduling delays.

[0056] Ethernet interface input process in standard Ethernet interface access module 3: The communication frames of the general Ethernet interface access system include the device's own communication configuration information and the services sent through deterministic Ethernet. The data frames as communication configuration information complete closed-loop reception processing in the device's configuration reception and processing module and do not need to be sent externally. The service frames sent as deterministic Ethernet are relayed and forwarded on the local device side and need to be mapped to the deterministic Ethernet MAC scheduling shared queue through the service type for scheduling and transmission. The data frames received by the general Ethernet interface are stored in the data cache queue of this interface after passing the MAC protocol compliance check. The MAC address of the data frame is extracted for address-based type distinction. The data frame with the MAC address pointing to the local device enters the configuration reception and processing module as the data frame of communication configuration information, and other services are relayed and forwarded as data frames. As a relay forwarding data frame, that is, a data frame used for forwarding by a deterministic Ethernet interface, it is stored in the data cache queue of this interface, the scheduling descriptor of the data frame is output, the priority and type information are extracted from the data frame, and the information is input into the relay frame type mapping module to obtain the mapping relationship between the frame and the multi-type frame management queue managed by this interface, and the scheduling descriptor of the data frame is stored in the corresponding multi-type frame management queue; each description of the multi-type frame management queue can be uniquely mapped to a shared scheduling queue in the MAC layer of the deterministic Ethernet device.

[0057] The host access interface module 1 controls the host access through the internal bus: the data generated by the host on the device side is transmitted through the internal bus inside the scheduling device, and after completing the protocol grouping of the load data, it is stored in the data cache queue of this interface. According to its service characteristics classification, the user configuration type table is looked up, and the access is mapped to the MAC scheduling shared queue corresponding to the deterministic Ethernet for scheduling transmission. The internal bus transmission data information carries the service characteristic identifier, and the identifier is extracted to enter the user global configuration module for table lookup to obtain the link relationship of the corresponding MAC layer scheduling shared queue, forming the scheduling descriptor of the data frame, and obtaining the mapping relationship between the frame and the multi-type frame management queue managed by this interface, and the scheduling descriptor of the data frame is stored in the corresponding multi-type frame management queue; each description of the multi-type frame management queue can be uniquely mapped to a shared scheduling queue in the MAC layer of the deterministic Ethernet device;

[0058] In the hardware interface access module 2, the SRIO / IB / DVR and other interface access control: the input data generated by the SRIO / IB / DVR and other interfaces are processed by the physical layer serial-to-parallel conversion of the corresponding interface, and are stored in the data cache queue of each interface, and the scheduling descriptor of the data frame is extracted. According to the characteristics of each interface and the type identification of different types of data of the unified interface (usually for SRIO / IB / DVR type interfaces, each interface input data corresponds to a service type of deterministic Ethernet device, and no distinction is made within the interface. If there is a distinction, the user needs to make detailed plans in advance and identify and distinguish it in the input data), it is input into the user configuration type lookup module to obtain the mapping relationship between the frame and the multi-type frame management queue managed by this interface, and the scheduling descriptor of the data frame is stored in the corresponding multi-type frame management queue; each description of the multi-type frame management queue can be uniquely mapped to a shared scheduling queue in the MAC layer of the deterministic Ethernet device. For the sending scheduling of SRIO / IB / DVR type interface service access equipment and the receiving processing of access to the opposite device, the interface-to-interface mode is adopted instead of the transceiver service docking mode, that is, the sending data input by one interface does not have the situation where different addressing is used to access different receiving devices.

[0059] The abstract software bus interface of the host access interface module 1, the hardware interface access module 2, and the standard Ethernet interface access module 3 simulates the frame processing process similar to the above hardware interface. The data frame content received by the software bus interface is stored in the interface cache, and the frame descriptor is obtained. The identification information on the corresponding field inside the frame is provided, and the corresponding configuration module is queried to obtain the corresponding mapping relationship, and the data descriptor is stored in the multi-type frame management queue of the interface management.

[0060] The multi-type frame management queues corresponding to each interface in the network data processing module 11 are used to store and manage frame descriptors from each interface. The classification mode of the multi-type frame management queues of each interface is consistent and does not exceed three types (scheduling queues for time-aware scheduling type TAS services, flow control type CBS services, and intermittent transmission type BE services). Some interfaces have less than three situations, such as SRIO / IB / DVR interfaces, which have the same data frame characteristics and usually correspond to a single type of frame management mechanism. The deterministic Ethernet scheduling device coordinates the total number of each type of multi-type frame management queue in each interface, and connects to the service type, service bandwidth capacity ratio, and service frame access cycle characteristic parameters of each interface collected and counted in the description in Part 10 (or the device end adopts the user programmable mode access configuration, the user end collects and counts the above information in advance for calculation, and configures through the programmable interface) to online define the TDMA cycle and time slot allocation of each corresponding shared scheduling queue.

[0061] A shared queue time-sharing scheduling mechanism for copying data from the priority scheduling queue at the MAC layer is designed in the network data processing module 11. The time-sharing design principle of this mechanism is to classify the received data from three types of interfaces and perform time-sharing scheduling of the same type: according to (how to time-share is a science, and various combination modes can be designed. The maximum boundary time-sharing design mode is to support scheduling of data of the same type of queues in multiple types of frame queues from three different interfaces. The data are copied to the corresponding MAC layer priority scheduling queue cache at the rate of the deterministic Ethernet device interface and wait for scheduling. In this mode, there are great requirements for the capacity of the priority scheduling queue of the MAC layer. After adopting the back pressure mechanism, there may be high-frequency back pressure that interrupts the above-mentioned time-sharing scheduling operation) the data bandwidth resource occupancy rate and total bandwidth of the same type of queues in the multiple types of frame queues corresponding to each interface are used to define the total time-sharing operation period and the number of time slices occupied by each queue in the total time-sharing operation period. The time slices are usually defined as equal lengths. Within the multi-type frame queue scheduling time slice of the corresponding interface, complete the scheduling descriptor output of the current queue cache cell of the multi-type frame queue, extract the data content through the description of the unique shared queue cache of the corresponding interface, write it into the data cache of the priority scheduling queue of the corresponding MAC layer, and store the descriptor formed by the data in the new queue into the descriptor scheduling cache of the priority scheduling queue.

[0062] Considering a new feature, data from different interfaces are mapped and uniformly scheduled within the network. How to distinguish and process them at the receiving end? The receiving port proposes frames for unified protocol processing. If no further service encapsulation distinction is performed, the receiving end will lack the ability to distinguish and process them. Designing unified hybrid scheduling for multiple interfaces also requires distinction and identification in the unified process.

[0063] This embodiment implements a time-triggered transmission mechanism based on fault-tolerant network clock synchronization, which can improve the time certainty, real-time, reliability and security of data communication to a certain extent, and support event-type message transmission to meet applications with different levels of real-time requirements. This design method greatly enriches the user's methods for selecting aviation airborne buses based on a time-triggered architecture and promoting the integration of aviation buses. At the same time, the application of this patent is independent of the hardware platform, has a wide range of applications, and has significant market prospects and economic benefits.

[0064] It is understandable that those skilled in the art can make equivalent substitutions or changes based on the technical solution and inventive concept of the present invention, and all these changes or substitutions should fall within the protection scope of the claims attached to the present invention.

Claims

1. A multi-type interface access unified scheduling deterministic Ethernet scheduling device, characterized in that: The device comprises: Host machine access interface module (1), hardware interface access module (2), standard Ethernet interface access module (3), communication configuration receiving management module (4), communication configuration storage and status management module (5), multi-service type interface output processing module (6), service priority mapping management module (7), queue flow management module (8), network data processing module (11); The host machine access interface module (1), the hardware interface access module (2), and the standard Ethernet interface access module (3) are parallel modules, all of which are connected to a multi-service type interface output processing module (6); the input data of the host machine access interface module (1) is divided into configuration data and communication data, the configuration data is input into a communication configuration receiving management module (4), the output of the communication configuration receiving management module (4) is connected to a communication configuration storage and status management module (5) for storage, the output of the communication configuration storage and status management module (5) is connected to a multi-service type interface output processing module (6), the output of the multi-service type interface output processing module (6) is connected to a service priority mapping management module (7), and the output of the service priority mapping management module (7) enters the priority queue cache of the network data processing module (11).

2. A device for unified scheduling of deterministic Ethernet scheduling for access of multiple types of interfaces according to claim 1, characterized in that: The device further comprises: an enqueue flow management module (8), a global synchronization module (9), and a synchronization establishment and maintenance module (10); The queue flow management module (8) is arranged between the service priority mapping management module (7) and the network data processing module (11), the network data processing module (11) completes initialization synchronization through the global synchronization module (9), and the network data processing module (11) performs communication band scheduling through the synchronization establishment and maintenance module (10).

3. A device for unified scheduling of deterministic Ethernet scheduling for access of multiple types of interfaces according to claim 1, characterized in that: The host machine access interface module (1) supports PCIe, PCI, and localbus interface access communications, and is also compatible with the above-mentioned types of interface software simulation interfaces, and transmits the interface access data to the multi-service type interface output processing module (6); The hardware interface access module (2) supports the data input and output of the SRIO, IB, and DVR interfaces, and implements the encapsulation and stripping of the characteristic attributes of the data hardware of the interface, and transmits the data accessed by the interface to the multi-service type interface output processing module (6); The standard Ethernet interface access module (3) supports standard Ethernet access communication, provides network frame analysis processing, and transmits the interface access data to the multi-service type interface output processing module (6).

4. A device for unified scheduling of deterministic Ethernet scheduling for access of multiple types of interfaces according to claim 3, characterized in that: The communication configuration storage and state management module (5) stores predefined configuration rules, including at least the type and quantity of the external access interface of the scheduling device when it is currently online, the mapping relationship between the interface service type characteristics and the scheduling queue of the deterministic Ethernet for unified scheduling, the bandwidth capacity of each type of service of the interface, the deterministic Ethernet device ID of the interface service transparent transmission opposite end, and the scheduling queue buffer depth of the deterministic Ethernet.

5. A device for unified scheduling of deterministic Ethernet scheduling for access of multiple types of interfaces according to claim 4, characterized in that: The communication configuration receiving management module (4) receives the configuration data from the data path of the host access interface module (1), parses it according to the rules agreed upon in the configuration, and stores the parsing result in the communication configuration storage and status management module (5); The communication configuration storage and status management module (5) stores the information according to the table lookup method required by the multi-service type interface output processing module (6), the service priority mapping management module (7), the queue flow management module (8), and the network data processing module (11), and provides the above modules with access paths for query access; The multi-service type interface output processing module (6) receives data access from three interfaces, namely, the host machine access interface module (1), the hardware interface access module (2), and the standard Ethernet interface access module (3), and performs classified processing; The multi-service type interface output processing module (6) implements updating of the protocol header of the Ethernet data frame accessed by the standard Ethernet interface access module (3) according to the interface type and data frame priority classification, and the update parameters are derived from the communication configuration storage and status management module (5); The multi-service type interface output processing module (6) performs complete protocol encapsulation on the pure user data accessed by the host access interface module (1), and can select two different processing methods for the data of the hardware interface of the hardware interface access module (2), one of which is to directly perform tunnel encapsulation on the data collected by the hardware interface and transparently transmit it after complete protocol encapsulation, and the other is to strip the hardware attribute characteristics of the interface and perform complete protocol encapsulation on the remaining valid data.

6. A device for unified scheduling of deterministic Ethernet scheduling for access of multiple types of interfaces according to claim 5, characterized in that: The service priority mapping management module (7) receives the input of the multi-service type interface output processing module (6), obtains the independent priority category of the input data of the multi-service type interface output processing module (6) according to the table lookup of the communication configuration storage and status management module (5), and accesses the corresponding priority scheduling cache queue.

7. A device for unified scheduling of deterministic Ethernet scheduling for access of multiple types of interfaces according to claim 6, characterized in that: The queue flow management module (8) is a functional module between the service priority mapping management module (7) and the priority scheduling cache. It performs bandwidth agreement on each priority queue data input by the service priority mapping management module (7) according to the parameters of the communication configuration storage and state management module (5) to avoid extraordinary bandwidth services.

8. A device for unified scheduling of deterministic Ethernet scheduling for access of multiple types of interfaces according to claim 7, characterized in that: The global synchronization module (9) constructs synchronization according to the interactive processing of external input data, and the synchronization establishment and maintenance module (10) performs maintenance and reconstruction based on the synchronization signal provided by the global synchronization module (9); The synchronization establishment and maintenance module (10) provides synchronization information to the network data processing module (11), and the network data processing module (11) performs scheduling processing according to the data entering the priority scheduling cache and the pre-planned configuration of the communication configuration storage and status management module (5).

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