Pad assembly, circuit board, memory card, card holder and start-up determination device

Abstract

The present application relates to the technical field of solid-state hard disks, and in particular to a pad assembly, a circuit board, a memory card, a card holder, and a startup determination device. The pad assembly is distributed on the substrate of the memory card; the pad assembly includes multiple rows of pads; the multiple rows of pads include a first row of pads; the first row of pads includes a first ground pad; the width of the first ground pad is greater than the width of any pad in the first row of pads; the length of the first ground pad is greater than or equal to the length of any pad in the first row of pads; the distance from the center point of the first ground pad to a preset reference line on the substrate is less than the distance from the center point of any pad in the first row of pads to the reference line; wherein the straight line direction parallel to the reference line is the width direction of each component of the pad assembly. The pad assembly is small in size and can support hot plugging.

Description

Technical Field

[0001] The present application relates to the technical field of solid-state hard disks, and in particular to a pad assembly, a circuit board, a memory card, a card holder, and a startup determination device. Background Art

[0002] BGA packaging is a technology that directly solders integrated circuit chips onto PCBs, connecting the chip and PCB via a series of solder balls. A BGA SSD is a solid-state drive (SSD) that uses BGA (Ball Grid Array) packaging technology. For example, a controller and a bare NAND chip are packaged together using BGA technology and then soldered to a PCB as a single chip, creating a BGA SSD. However, BGA SSDs require fixed soldering to the system PCB, making them difficult to replace, which presents challenges for repairs or system upgrades. Furthermore, the solder balls themselves, which can be several hundred microns in height, pose challenges for further thinning. Summary of the Invention

[0003] In view of this, embodiments of the present application provide a pad assembly, a circuit board, a memory card, a card holder, and a startup determination device, wherein the pad assembly is small in size and can support hot plugging.

[0004] In a first aspect, an embodiment of the present application provides a pad assembly, wherein the pad assembly is distributed on a substrate of a memory card;

[0005] The pad assembly includes multiple rows of pads;

[0006] The multiple rows of pads include a first row of pads; the first row of pads includes a first ground pad; the width of the first ground pad is greater than the width of any pad in the first row of pads; the length of the first ground pad is greater than or equal to the length of any pad in the first row of pads;

[0007] The distance between the center point of the first ground pad and a preset reference line on the substrate is smaller than the distance between the center point of any pad in the first row of pads and the reference line;

[0008] The straight line direction parallel to the reference line is the width direction of each component of the pad assembly.

[0009] In some embodiments, the first row of pads is a row of pads having the smallest vertical distance to the reference line among the multiple rows of pads; the first row of pads further includes a plurality of strip-shaped power pads and a plurality of strip-shaped second ground pads;

[0010] The lengths of the second ground pads and the first ground pads are equal, and the center points of the first ground pad and the second ground pads are on a first straight line parallel to the reference line;

[0011] The lengths of the power pads are consistent, and the center points of the power pads are located on a second straight line parallel to the reference line;

[0012] The distance between the first straight line and the reference line is less than the distance between the second straight line and the reference line. In some embodiments, the width of the first ground pad is N times the width of the second ground pad, where N is an integer greater than or equal to 2. The length of the first ground pad is equal to the length of each of the power pads.

[0013] In some embodiments, the plurality of power pads are divided into a corresponding number of power pad units according to the number of planned power networks, and each group of power pad units includes at least two power pads; the plurality of second ground pads are divided into a plurality of groups of second ground pad units, and each group of second ground pad units includes at least one second ground pad;

[0014] Arranged in sequence from both ends of the first row of pads to the middle are: the power pad unit, the second ground pad unit and the first ground pad.

[0015] In some embodiments, the first row of pads includes two groups of power pad units, one group of power pad units includes two power pads belonging to a first power network, and the other group of power pad units includes three power pads belonging to a second power network;

[0016] The first row of pads includes two groups of second ground pad units, one group of second ground pad units includes one second ground pad, and the other group of second ground pad units includes two second ground pads.

[0017] In some embodiments, the invention further comprises a second row of pads; the vertical distance between the second row of pads and the reference line is greater than the vertical distance between the first row of pads and the reference line;

[0018] The second row of pads includes at least two groups of mixed pad units;

[0019] Each group of the mixed pad units includes at least one second ground pad and at least one first signal pad; the second ground pad is arranged adjacent to the first signal pad in the mixed pad unit to which it belongs; the length of the first signal pad is shorter than the length of the second ground pad;

[0020] Center points of all the second ground pads and all the first signal pads are on a third straight line parallel to the reference line.

[0021] In some embodiments, a third row of pads is further included; the vertical distance between the third row of pads and the reference line is greater than the vertical distance between the first row of pads and the reference line;

[0022] Center points of the pads in the third row of pads are arranged at intervals on a fourth straight line parallel to the reference line;

[0023] The third row of pads includes at least one group of differential signal pads, and a third ground pad is provided on each side of the differential signal pads; the length of the third ground pad is greater than that of the differential signal pads.

[0024] In some embodiments, the invention further comprises a rectangular solder resist component having the same number as the third ground pads; the differential signal pads include a positive phase signal pad and a negative phase signal pad;

[0025] The solder resist component is provided with a plurality of via holes;

[0026] The wide side of the third ground pad is parallel to a long side of the corresponding solder resist component and the distance between them is less than a preset spacing threshold, and the first wide side of the solder resist component is located on the center line of the positive phase signal pad adjacent to one side of the third ground pad, and the second wide side of the solder resist component is located on the center line of the negative phase signal pad adjacent to the other side of the third ground pad and overlaps with it.

[0027] In some embodiments, the substrate includes a first short side and a first long side; an anti-missing corner is set between the first short side and the first long side; the reference line is the first short side, the second short side corresponding to the first short side, or a middle line in the substrate parallel to the first short side.

[0028] In some embodiments, each pad in the pad assembly is a gold finger pad.

[0029] In a second aspect, an embodiment of the present application provides a printed circuit board, comprising a substrate; a pad assembly as provided in the first aspect of the present application is welded on a passive surface of the substrate;

[0030] The substrate is provided with a multi-layer circuit layer; a plurality of device pads are welded on the active surface of the substrate; the device pads are used for welding bare cores, and each of the device pads is connected to the corresponding pad in the pad assembly through the circuit in the multi-layer circuit layer and the opened via.

[0031] In some embodiments, the method further includes: providing a plurality of hollowed-out areas in other circuit layers except the determined middle circuit layer;

[0032] The middle circuit layer is a complete circuit layer.

[0033] In some embodiments, the intermediate circuit layer is determined by the following method:

[0034] According to the fact that the area of ​​each device pad and each pad in the pad assembly is positively correlated with the plane capacitance and inversely correlated with the distance from the reference plane, a signal quality simulation is performed with the minimum plane capacitance as the goal to obtain the intermediate circuit layer; wherein the reference plane is the projection of the pad on the circuit layer.

[0035] In a third aspect, an embodiment of the present application provides a memory card, the memory card comprising a main control die, at least one flash memory die, a plurality of electronic components, and a printed circuit board as provided in the second aspect of the present application;

[0036] The master bare core, the flash memory bare core and the plurality of electronic components are soldered to the printed circuit board via corresponding device pads on the printed circuit board.

[0037] In some embodiments, the memory card further includes a plastic package; the master bare core, the at least one flash memory bare core, and the plurality of electronic components are all wrapped by the plastic package.

[0038] In a fourth aspect, an embodiment of the present application provides a card holder, comprising: a sampling signal terminal, a comparison signal terminal, and a plurality of spring electrode terminals;

[0039] When a memory card according to the third aspect of the present application is inserted into the card holder, the comparison signal terminal begins to contact the first ground pad to output a comparison signal.

[0040] At a second moment when the memory card is inserted into the card holder, the plurality of spring electrode terminals begin to contact one-to-one with each pad on the edgeless surface of the printed circuit board in the memory card except the first ground pad;

[0041] At a third moment when the memory card is inserted into the card holder, the sampling signal terminal starts to contact the first ground pad to output a start signal of the memory card;

[0042] The first time is earlier than the second time, and the second time is earlier than the third time.

[0043] In some embodiments, the length of the comparison signal terminal is greater than the length of the sampling signal terminal.

[0044] In a fifth aspect, an embodiment of the present application provides a startup determination device for an electronic device, comprising a processor; the processor is connected to a sampling signal terminal and a comparison signal terminal on a card holder provided in the fourth aspect of the present application;

[0045] When a memory card provided in the third aspect of the present application is inserted into the card holder, a comparison signal is acquired through the comparison signal terminal;

[0046] At a third moment when the memory card is completely inserted into the card holder, a start signal is acquired through the sampling signal terminal;

[0047] Turning on power is determined according to the comparison signal and the start signal to start the memory card.

[0048] The embodiments of the present application have the following beneficial effects:

[0049] The pad assembly of the present application includes multiple rows of pads; the multiple rows of pads include a first row of pads; the first row of pads includes a first ground pad; the width of the first ground pad is greater than the width of any pad in the first row; the length of the first ground pad is greater than or equal to the length of any pad in the first row; the distance from the center point of the first ground pad to a preset reference line on the substrate is less than the distance from the center point of any pad in the first row to the reference line; wherein the straight line parallel to the reference line is the width direction of each component of the pad assembly. The pad assembly of the present application is obtained using LGA (Land Grid Array) packaging technology. The pad assembly is small in size and can support hot swapping. Secondly, the distance between the first ground pad and the reference line is the shortest, which is conducive to discharging static electricity and improving safety. Finally, the first ground pad is relatively wide to accommodate two spring electrode terminals for memory card startup detection. BRIEF DESCRIPTION OF THE DRAWINGS

[0050] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without creative work.

[0051] Figure 1 A physical diagram of a memory card according to an embodiment of the present application is shown;

[0052] Figure 2 A physical diagram of a card holder according to an embodiment of the present application is shown;

[0053] Figure 3 A schematic structural diagram of a pad assembly according to an embodiment of the present application is shown;

[0054] Figure 4-1 A schematic diagram of a first pad layout of a pad assembly according to an embodiment of the present application is shown;

[0055] Figure 4-2A second pad layout schematic diagram of the pad assembly according to an embodiment of the present application is shown;

[0056] Figure 4-3 A third pad layout schematic diagram of the pad assembly according to an embodiment of the present application is shown;

[0057] Figure 5 A schematic structural diagram of a substrate with anti-missing corners according to an embodiment of the present application is shown;

[0058] Figure 6 A schematic structural diagram of a pad assembly according to an embodiment of the present application is shown;

[0059] Figure 7 A front view of a memory card according to an embodiment of the present application is shown;

[0060] Figure 8 A side view of a memory card according to an embodiment of the present application is shown;

[0061] Figure 9 A cross-sectional view of a printed circuit board according to an embodiment of the present application is shown.

[0062] Description of main component symbols:

[0063] 100 - memory card; 110 - printed circuit board; 120 - main control die; 130 - flash memory die; 140 - electronic components; 150 - epoxy resin molding compound;

[0064] 111-pad assembly; 1111-rectangular solder mask component; 1112-high-speed differential signal line and layer-changing via; 1113-LGA pad;

[0065] 112 - substrate; 1121 - anti-missing corner; 1122 - first short side; 1123 - first long side, 1124 - second short side; 1125 - circuit layer; 1126 - device pad; 1127 - hollowed area;

[0066] 200-Card holder; 201-Comparison signal terminal; 202-Sampling signal terminal. DETAILED DESCRIPTION

[0067] The technical solutions in the embodiments of the present application will be described clearly and completely below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments.

[0068] The components of the embodiments of the present application generally described and illustrated in the drawings herein may be arranged and designed in a variety of different configurations. Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the claimed application, but rather merely represents selected embodiments of the present application. All other embodiments obtained by those skilled in the art based on the embodiments of the present application without creative effort are within the scope of protection of the present application.

[0069] Hereinafter, the terms "including", "having" and their cognates used in various embodiments of the present application are intended only to indicate specific features, numbers, steps, operations, elements, components or combinations of the aforementioned items, and should not be understood as excluding the existence of one or more other features, numbers, steps, operations, elements, components or combinations of the aforementioned items or adding the possibility of one or more features, numbers, steps, operations, elements, components or combinations of the aforementioned items. In addition, the terms "first", "second", "third" and the like are only used to distinguish descriptions and should not be understood as indicating or implying relative importance.

[0070] Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by those skilled in the art to which the various embodiments of the present application belong. The terms (such as those defined in generally used dictionaries) will be interpreted as having the same meaning as in the context of the relevant technical field and will not be interpreted as having an idealized meaning or an overly formal meaning unless clearly defined in the various embodiments of the present application.

[0071] The following describes some embodiments of the present application in detail with reference to the accompanying drawings. In the absence of conflict, the following embodiments and features in the embodiments may be combined with each other.

[0072] In the prior art, BGA SSDs, due to the use of BGA packaging technology, require two reflow soldering processes: particle ball planting and particle PCB mounting. That is, before being divided into unit particles, they will undergo a high-temperature reflow soldering process for ball planting, and after being divided and mounted on the PCB, they will undergo another high-temperature reflow soldering process. These two processes will increase the production cycle and cost, and multiple high-temperature reflow soldering processes will reduce product reliability. Therefore, the present application provides a pad assembly, circuit board, memory card, card holder and startup determination device. The pad assembly is small in size, supports hot plugging of memory cards, and improves the reliability of memory cards.

[0073] like Figure 1 As shown, an embodiment of the present application provides a memory card 100. Exemplarily, the memory card 100 includes a printed circuit board 110 and a bare die disposed on an active surface.

[0074] This application also provides a printed circuit board 110 for use in the aforementioned memory card 100. Exemplarily, printed circuit board 110 includes a substrate 112; a pad assembly 111 provided herein is soldered to a passive surface of substrate 112. This application provides a layout design for pad assembly 111, which is distributed across substrate 112. Pad assembly 111 is used to provide a pluggable connection between memory card 100 and a card holder 200 provided herein.

[0075] The embodiment of the present application also provides a card holder 200. For example, Figure 2 As shown, the card holder 200 includes a comparison signal terminal 201, a sampling signal terminal 202, and multiple spring electrode terminals (e.g., spring-loaded electronic terminals). In this embodiment of the present application, the card holder 200 is fixedly mounted on the system PCB. Exemplarily, the length of the comparison signal terminal 201 is greater than that of the sampling signal terminal 202.

[0076] The memory card 100 (also known as an LGA SSD) in this application is packaged using LGA (Land Grid Array) packaging technology, eliminating the need for a secondary high-temperature reflow process, which improves the stability of the memory card. In this application, the card holder 200 is first mounted on the PCB. The LGA SSD is decoupled from the PCB mounting. Simply inserting the LGA SSD into the card holder 200 allows for signal transmission between the LGA SSD and the PCB. The LGA SSD is hot-swappable, allowing it to be removed from the card holder 200 at any time, simplifying installation.

[0077] The pad assembly 111 is described below with reference to some specific embodiments.

[0078] The embodiment of the present application provides a pad assembly 111. It can be understood that the pad assembly is distributed on the substrate of the memory card.

[0079] For example, Figure 3 As shown, the pad assembly includes multiple rows of pads. The multiple rows of pads include a first row of pads; the first row of pads includes a first ground pad; the width of the first ground pad is greater than the width of any pad in the first row; and the length of the first ground pad is greater than or equal to the length of any pad in the first row. In other words, the first ground pad is of different sizes from the other pads. The first ground pad requires a larger width to accommodate two spring-loaded electrode terminals (spring-loaded electrode terminals), while the other pads only need to accommodate one spring-loaded electrode terminal to ensure support for memory card startup detection.

[0080] The distance from the center point of the first ground pad to a preset reference line on the substrate is smaller than the distance from the center point of any pad in the first row of pads to the reference line.

[0081] The straight line direction parallel to the reference line is the width direction of each component of the pad assembly. Figure 3 The pad numbered "5" is a first ground pad. Exemplarily, each pad in the pad assembly 111 is a long strip of gold finger pads, such as rectangular gold finger pads, where the short side of the rectangular pad is parallel to the reference line of the substrate 112. If the pad is an elliptical gold finger pad, the long axis of the ellipse is perpendicular to the reference line of the substrate 112.

[0082] In this application, LGA packaging technology is used to design the original circular solder ball pads into rectangular pads. The original solder balls are removed, and the surface treatment is designed to be hard gold. The pads in the pad assembly 111 are collectively referred to as LGA pads 1113 to facilitate plug-in contact and ensure plug-in reliability. Hardware gold fingers replace the solder balls of a certain height, allowing the thickness of the LGA SSD to be further reduced, and the integration is higher.

[0083] In one embodiment, the substrate includes a first short side 1122 and a first long side 1123. An anti-missing corner 1121 is set between the first short side 1122 and the first long side 1123; the reference line is the first short side 1122, the second short side 1124 corresponding to the first short side 1122, or a middle line of the substrate parallel to the first short side 1122. Exemplarily, the pad assembly includes three rows of pads. If the reference line is the first short side 1122, the first row of pads is the row of pads closest to the first short side 1122, such as Figure 4-1 If the reference line is the second short side 1124, as shown in Figure 4-2 As shown, the first row of pads is the row of pads closest to the second short side 1124; if the reference line is the middle line, such as Figure 4-3 As shown, the first row of pads is the row of pads closest to the middle line, where the middle line is the line between the first short side 1122 and the second short side 1124 .

[0084] In one embodiment, the first row of pads is a row of pads having the smallest vertical distance to the reference line among the multiple rows of pads. The first row of pads further includes a plurality of strip-shaped power pads and a plurality of strip-shaped second ground pads.

[0085] Each of the second ground pads is equal to the length of the first ground pad, and the center points of the first ground pad and each of the second ground pads are aligned on a first straight line parallel to the reference line. Furthermore, the width of the first ground pad is N times the width of the second ground pad, where N is an integer greater than or equal to 2. For example, the width of the first ground pad is twice the width of the second ground pad. This ensures that the first ground pad can accommodate two spring-loaded electronic terminals.

[0086] The length of the first ground pad is equal to the length of each of the power pads.

[0087] The power pads are of the same length, and the center points of the power pads are located on a second straight line parallel to the reference line. The lengths of the second ground pad and the first ground pad are greater than or equal to the length of the power pad. The perpendicular distance between the first straight line and the second straight line is less than the length of the power pad.

[0088] The distance from the first straight line to the reference line is smaller than the distance from the second straight line to the reference line. That is, the vertical distance from the center points of the plurality of second ground pads and the first ground pad to the reference line is smaller than the vertical distance from the center point of any of the plurality of power pads to the reference line.

[0089] Exemplarily, the second ground pad, the first ground pad, and the power pad are all rectangular pads, and a vertical distance between a target wide side of the plurality of second ground pads and the first ground pad and the reference line is less than a vertical distance between a target wide side of any of the plurality of power pads and the reference line; wherein the target wide side is the wide side of the plurality of second ground pads and the first ground pad with the smallest vertical distance from the reference line. The ground pad is closest to the reference line to ensure that the electrode terminal of the spring sheet contacts the ground pad first to release static electricity.

[0090] A first ground pad, capable of accommodating two spring electrode terminals, is positioned within the first row of pads. This first ground pad interfaces with two spring electrode terminals on card holder 200. These terminals are of different lengths, one in front of the other. The longer spring electrode terminal matches the length of the spring electrode terminals interfaced with the other pads. The shorter spring electrode terminal serves as a detection pin. When a card is inserted but not yet fully seated, all but the detection pins are already in contact with the pads within pad assembly 111. At this point, no function commands are output, and no function output is present. When memory card 100 is fully inserted, the detection pin short-circuits with the detection pin in card holder 200, power is applied to memory card 100, and the system recognizes the insertion of memory card 100, starting operation.

[0091] In one embodiment, multiple power pads are divided into a corresponding number of power pad units based on the number of planned power networks, with each group of power pad units including at least two power pads. Each power pad is divided into different power pad units based on the power network to which it belongs. A power network refers to different voltage rails used for power supply on a circuit board. Each power network typically represents a specific power supply voltage, such as +5V, +3.3V, or +1.8V.

[0092] The plurality of second ground pads are divided into a plurality of second ground pad units, and each second ground pad unit includes at least one second ground pad.

[0093] Arranged in sequence from both ends of the first row of pads to the middle are: the power pad unit, the second ground pad unit and the first ground pad.

[0094] For example, Figure 5 As shown, the first row of pads includes two groups of power pad units, and one group of power pad units includes two power pads (PWR1) belonging to the first power network. Figure 5 The other group of power pad units includes three power pads (PWR2) belonging to the second power network. Figure 5 The winning bids are "1", "2" and "3".

[0095] The first row of pads includes two groups of second ground pad units, and one group of second ground pad units includes one second ground pad (GND). Figure 5 The second ground pad unit of another group includes two second ground pads (GND), such as Figure 5 The winning numbers are "6" and "7".

[0096] In one embodiment, a second row of pads is further included, wherein the vertical distance between the second row of pads and the reference line is greater than the vertical distance between the first row of pads and the reference line, and the second row of pads includes at least two groups of mixed pad units.

[0097] Each group of the hybrid pad units includes at least one second ground pad and at least one first signal pad; the second ground pad is arranged in close proximity to the first signal pad in the hybrid pad unit to which it belongs; the length of the first signal pad is less than the length of the second ground pad. The first signal pad is small and short in order to reduce the pad area, further reduce the capacitive reactance value, and improve impedance continuity. The ground pad next to the first signal pad is longer, which can increase the contact area of ​​the electronic terminal of the pressure spring to reduce the contact resistance. The extended section of the ground pad can also better shield the signal, forming an enclosure.

[0098] The center points of all the second ground pads and all the first signal pads are on a third straight line parallel to the reference line. For example, two mixed pad units are included, each of which includes two first signal pads (SIGNAL) and one second ground pad (GND). Figure 5 The two first signal pads in one hybrid pad unit are numbered "11" and "12," and the second ground pad is numbered "10." The two first signal pads in another hybrid pad unit are numbered "14" and "15," and the second ground pad is numbered "13." The distance between the third straight line and the second straight line is greater than the length of the second ground pad.

[0099] In one embodiment, a third row of pads is further included; the vertical distance between the third row of pads and the reference line is greater than the vertical distance between the first row of pads and the reference line. The center points of the pads in the third row are spaced apart and arranged on a fourth straight line parallel to the reference line. The third row of pads includes at least one group of differential signal pads, and a third ground pad is provided on each side of the differential signal pads; the length of the third ground pad is greater than the length of the differential signal pad. For example, the difference between the length of the third ground pad and the length of the differential signal pad is 0.3 mm.

[0100] For example, Figure 4-1 As shown, if the reference line is the first short side 1122, and the first row of pads is the row of pads closest to the first short side 1122, the distance between the third straight line and the second straight line is greater than (L1 + L2) / 2 and less than L3 / 2. L1 is the length of the power pad, L2 is the length of the first signal pad, and L3 is the length of the substrate. The perpendicular distance between the fourth straight line and the second short side 1124 is the smallest. The distance from the fourth straight line to the second short side 1124 is greater than half the length of the third ground pad and less than half the length of the substrate.

[0101] For example, Figure 5 As shown, there are four groups of differential signal pads. Each group includes a positive phase signal pad (SIGNAL) and a negative phase signal pad (DIFF), numbered "17, 18," "20, 21," "23, 24," and "26, 27," respectively. There is a ground pad GND between each group of differential signal pads, and there is a ground pad GND outside the differential signal pads at both ends, numbered "16," "19," "22," "25," and "28," respectively.

[0102] Furthermore, it also includes rectangular solder resist components 1111 with the same number as the third ground pads; the differential signal pads include positive phase signal pads and negative phase signal pads. Figure 6As shown, the solder resist component is provided with a plurality of vias. A high-speed differential signal line and a layer-changing via 1112 are provided on the substrate 112 above one end of the positive phase signal pad and the negative phase signal pad close to the reference line.

[0103] The wide side of the third ground pad is parallel to a corresponding long side of the solder resist component and the distance is less than a preset spacing threshold, and the first short wide side of the solder resist component is located on the center line of the positive phase signal pad adjacent to one side of the third ground pad, and the second short wide side of the solder resist component is located on the center line of the negative phase signal pad adjacent to the other side of the third ground pad and overlaps. For example, the preset spacing threshold is zero, and the wide side of the third ground pad is spliced ​​together with the corresponding long side of the solder resist component. That is, the present application also combines SIPI technology to perform impedance continuity and crosstalk reduction design for key signals, and uses the impedance continuity dynamic processing method to further reduce the capacitive reactance value of the large pad.

[0104] The third row of pads is a high-speed signal pad. Two short pads form a pair of differential signal pads, and there are multiple pairs of high-speed differential signal pads. A long ground pad is set adjacent to the high-speed differential signal pad to form a semi-enclosed shape for the high-speed signal pad, which plays a good role in ground shielding. The high-speed differential signal is connected to the circuit layer through the high-speed differential signal line through the layer-changing via. The high-speed differential signal line and the layer-changing via are set between two rectangular solder mask components 1111. The adjacent ground pads and the corresponding solder mask components form a semi-enclosed circular shielding component, which can further enclose and shield the differential signal. The adjacent ground vias can shorten the signal return path and improve the signal quality. The solder mask insulation can prevent the spring electrode terminal on the card holder 200 from contacting the area beyond the open solder mask rectangular pad, so as to cause a signal short circuit.

[0105] This application redesigns the pad position layout based on the characteristics of high-speed interface signals and reduces the number of pads to dozens less than that of BGA SSD. The reduced space can be used for circuit design optimization, improving signal design quality and achieving higher particle integration.

[0106] The embodiment of the present application also provides a memory card 100. For example, Figure 7 、 Figure 8 The memory card 100 includes a printed circuit board 110 , a master die 120 , a plurality of stacked flash memory die 130 , and a plurality of electronic components 140 .

[0107] The master bare core 120 , the flash bare core 130 and the plurality of electronic components 140 are soldered to the printed circuit board 110 via corresponding device solder pads 1126 on the printed circuit board 110 .

[0108] Furthermore, the memory card 100 further includes a plastic package, wherein the master die 120 , the plurality of flash memory die 130 , and the plurality of electronic components 140 are all encapsulated by the plastic package, which includes but is not limited to an epoxy resin molding compound 150 .

[0109] The present application also provides a printed circuit board 110 for the memory card 100, which exemplarily includes a substrate 112. A pad assembly 111 provided by the present application is soldered to a passive surface of the substrate 112. The various types of pads in the pad assembly 111 are collectively referred to as LGA pads 1113.

[0110] like Figure 8 As shown, a multi-layer circuit layer 1125 is provided on the substrate 112; a plurality of device pads 1126 are welded on the active surface of the substrate 112; the device pads 1126 are used for welding bare cores, and each of the device pads 1126 is connected to the corresponding LGA pad 1113 in the pad assembly 111 through the circuit in the multi-layer circuit layer 1125 and the opened via.

[0111] Exemplarily, substrate 112 has two or more circuit layers 1125 for transmitting electrical signals. The surface of substrate 112 that contacts the master die 120, multiple flash die 130, and multiple electronic components 140 is the top surface, and has device pads 1126. Chip signals are transferred from the chip pads to the device pads 1126 on the top surface of the substrate via wirebonds or solder balls. The other side of substrate 112 is the back surface, where LGA pads 1113 are located. These serve as external contact electrodes. The LGA SSD contacts the spring-loaded electrode terminals on the card holder 200 on the PCB motherboard via the LGA pads, thereby transmitting signals to the PCB motherboard.

[0112] Further, if Figure 9 As shown, it also includes: multiple hollowed-out areas 1127 set in other circuit layers except the determined middle circuit layer; the middle circuit layer is a complete circuit layer 1125; the hollowed-out areas 1127 are empty areas obtained by hollowing out the copper foil of the projection areas of each device pad 1126 or each pad in the pad assembly 111 on the corresponding circuit layer 1125.

[0113] Furthermore, the intermediate circuit layer is determined by the following method:

[0114] According to the fact that the area of ​​each device pad 1126 and each pad in the pad assembly 111 is positively correlated with the plane capacitance and inversely correlated with the distance from the reference plane, a signal quality simulation is performed with the minimum plane capacitance as the goal to obtain the intermediate circuit layer; wherein, the reference plane is the projection of the pad on the circuit layer 1125. A device pad 1126 is provided on the front side of the substrate 112. The substrate 112 has several circuit layers 1125. The device pad 1126 on the front side of the substrate and the LGA pad 1113 on the back side of the substrate will form a planar capacitor with the adjacent circuit layer 1125. The planar capacitor produces a large capacitive reactance on the link and damages the impedance continuity. According to the formula C=ε*S / d, (ε is the dielectric constant, S is the projection of the pad on the plane of the circuit layer 1125, and d is the planar distance), the area size of the device pad 1126 and the LGA pad 1113 is positively correlated with the planar capacitance, and the planar distance between the pad and the adjacent circuit layer 1125 is inversely related. A circuit layer 1125 is retained between the device pad 1126 and the LGA pad on the Z axis, and the conductors of other layers are removed. The signal quality of the different pad areas can be confirmed through signal quality simulation to determine the retained intermediate circuit layer. This dynamic selection of the middle circuit layer can minimize the space that needs to be hollowed out for copper processing, isolate it from other signals, and facilitate the anti-interference routing of high-speed signals in high-density circuit areas.

[0115] Signal quality is closely related to the parasitic capacitance of the pad. Larger parasitic capacitance degrades signal quality. The magnitude of the parasitic capacitance is related to the area of ​​the reference layer (also known as the middle circuit layer) relative to the pad and the distance between them. Since the substrate thickness is fixed, signal quality can only be adjusted by adjusting the area and distance of the reference layer relative to the pad.

[0116] Ideally, the front and back pads have their own decoupled reference layers and the distance and area can be adjusted at will. However, due to distance limitations, retaining the middle circuit layer 1125 is already the best approach. Therefore, the middle reference layer will be either close or far from the pads on both sides, and the parasitic capacitance of the pads at both ends will be either small or large. Simulation is needed to confirm the proportion of the capacitance values ​​at both ends to find an optimal reference layer.

[0117] Exemplarily, in the embodiment of the present application, the pad assembly 111 is divided into three rows, the memory card 100 is rectangular, and an anti-mistake notch 1121 is provided on the substrate 112. The wide side connected to the anti-mistake notch 1121 is used as a reference line. Starting from the end of the anti-mistake notch 1121, the socket card holder 200 is pushed in. The first row of pads, the second row of pads, and the third row of pads are arranged in order according to the time of contact with the card holder 200. The first row of pads includes power pads, the second row includes ordinary signal pads, and the third row includes high-speed signal pads (differential signals). A certain number of ground pads are arranged adjacent to the power pads and the signal pads. Moreover, in the first row of pads, the ground pads are closer to the wide side (first short side 1122) connected to the notch edge of the anti-mistake notch 1121 than the power pads. When the LGA SSD is pushed into the card holder 200, the ground pad first contacts the spring electrode terminal on the card holder 200, which discharges the static electricity of the LGA SSD and reduces the electrostatic reliability risk of the product.

[0118] In summary, substrate 112 has two or more circuit layers (circuit layers) for transmitting electrical signals. The surface of substrate 112 that contacts the chip is the active surface (also known as the front surface), which has electrical pads (device pads 1126). Chip signals are transferred from the chip pads to the pads on the active surface of substrate 112 via wirebonds or solder balls. The other side of substrate 112 is the passive surface (also known as the back surface), where pad assemblies 111 are located. The LGA SSD contacts the spring electrode terminals on the card holder 200 on the PCB motherboard through these pad assemblies 111, thereby transmitting signals to the PCB template.

[0119] The card holder 200 provided in this embodiment of the present application exemplarily includes: a sampling signal terminal 202, a comparison signal terminal 201, and a plurality of spring electrode terminals; the sampling signal terminal 202 and the comparison signal terminal 201 are connected to the same voltage. Exemplarily, the length of the comparison signal terminal 201 is greater than the length of the sampling signal terminal 202.

[0120] When the memory card 100 of the present embodiment is first inserted into the card holder 200, the comparison signal terminal 201 begins to contact the first ground pad to output a comparison signal. During the insertion of the memory card 100, the first ground pad is used to initially contact the comparison signal terminal 201 on the card holder 200.

[0121] At the second moment when the memory card 100 is inserted into the card holder 200 , the plurality of spring electrode terminals begin to contact one-to-one with each pad on the non-edge surface of the printed circuit board 110 in the memory card 100 except the first ground pad.

[0122] At the third moment when the memory card 100 is inserted into the card holder 200, the sampling signal terminal 202 begins to contact the first ground pad to output a start signal for the memory card 100. The first ground pad is also used to begin to contact the sampling signal terminal 202 on the card holder 200 at the third moment.

[0123] The first moment is earlier than the second moment, and the second moment is earlier than the third moment. The order in which the pads contact the terminals on the card holder 200 is, from first to last, the comparison signal terminal 201 (long terminal), each spring electrode terminal, and the sampling signal terminal 202 (short terminal). The spring electrode terminal and the sampling signal terminal 202 are of the same length.

[0124] Exemplarily, the card holder 200 in the embodiment of the present application is fixedly arranged on the system PCB board.

[0125] The sampling signal terminal 202 is shorter in size than the comparison signal terminal 201 . The specific length can be adjusted according to specific product requirements and is not limited in this application.

[0126] The comparison signal terminal 201 is grounded in the link between the card holder 200 and the PCB board. The short sampling signal terminal 202 is the detection PIN, which will be connected to the startup judgment device of the electronic device on the PCB board. By judging whether the detection PIN is grounded, it is determined whether the memory card 100 is installed in place, and then whether to start the memory card 100 to run.

[0127] That is to say, compared with the existing technology, in order to support the hot plugging of the memory card 100, the present application adds an additional detection signal on the card holder 200. The detection signal requires adding a PIN pin and a spring-loaded electrode terminal on the card holder 200 to support its signal transmission to the hot plugging start judgment device.

[0128] The first grounding pad of the present application first contacts the signal terminal on the card holder, which can release static electricity first. When the pad assembly of the present application is used in a memory card, the first grounding pad in the present application contacts the comparison signal terminal and the sampling signal terminal at the first time and the third time respectively, and the function of starting the memory card can be determined based on the two signal terminals to realize hot plugging of the memory card. When the pad assembly of the present application is used in a memory card, there is no need for secondary high-temperature reflow soldering, which can improve the reliability of the memory card.

[0129] The present application also provides a startup determination device for an electronic device, which includes a processor; the processor is connected to a sampling signal terminal 202 and a comparison signal terminal 201 on a card holder 200 provided in the present application.

[0130] When the memory card 100 in the present application is first inserted into the card holder 200 , a comparison signal is acquired through the comparison signal terminal 201 .

[0131] At the third moment when the memory card 100 is completely inserted into the card holder 200 , a start signal is acquired through the sampling signal terminal 202 .

[0132] It is determined to turn on the power supply according to the comparison signal and the start signal to start the memory card 100 .

[0133] The solid-state hard disk SSD in the prior art is soldered with BGA tin balls and does not support plugging and unplugging. In order to support hot plugging, this application needs to set a startup judgment device (for example, a control circuit) of the electronic device at the PCB end of the SSD circuit. The detection PIN is connected to the control circuit. The working principle of the control circuit is: when the control circuit recognizes that the detection PIN is in contact with the first ground pad, it confirms that the memory card 100 has been installed in place, the system recognizes that the memory card 100 is inserted, and the memory card 100 starts running; when the memory card 100 is inserted and the card holder 200 is not yet in place, except for the detection pin, all other spring electrode terminals have contacted the target pad, the detection PIN and GND are open, the memory card 100 does not execute the function, does not output the instruction, and has no function output.

[0134] The pad assembly 111 of the present application redesigns the pad position layout according to the characteristics of the high-speed interface signal, and reduces the number of pads to dozens less than that of a BGA SSD. The reduced space can be used for circuit design optimization, improving signal design quality, and achieving higher particle integration.

[0135] In summary, the LGA SSD in this application not only has the advantages of being light, small, large in capacity, and having high-frequency read and write performance, but also supports hot plugging and is easy to replace. Since the LGA hard gold finger pad on the back replaces the solder balls with a certain height, the thickness of the LGA SSD can be further reduced and the integration is higher.

[0136] The above is only a specific implementation method of the present application, but the scope of protection of the present application is not limited thereto. Any technician familiar with this technical field can easily think of changes or replacements within the technical scope disclosed in this application, which should be covered by the scope of protection of the present application.

Claims

1. A pad assembly, characterized in that: The pad components are distributed on the substrate of the memory card; The pad assembly includes multiple rows of pads; The multiple rows of pads include a first row of pads; the first row of pads includes a first ground pad; the first row of pads also includes a plurality of long strip-shaped power pads and a plurality of long strip-shaped second ground pads; The width of the first grounding pad is greater than the width of any pad in the first row of pads; the length of the first grounding pad is greater than or equal to the length of any pad in the first row of pads; The distance between the center point of the first ground pad and a preset reference line on the substrate is smaller than the distance between the center point of any non-ground pad in the first row of pads and the reference line; The first row of pads is a row of pads having the smallest vertical distance to the reference line among the multiple rows of pads; the straight line direction parallel to the reference line is the width direction of each component of the pad assembly.

2. The pad assembly according to claim 1, wherein: The lengths of the second ground pads and the first ground pads are equal, and the center points of the first ground pad and the second ground pads are on a first straight line parallel to the reference line; The lengths of the power pads are consistent, and the center points of the power pads are located on a second straight line parallel to the reference line; A distance from the first straight line to the reference line is smaller than a distance from the second straight line to the reference line.

3. The pad assembly according to claim 2, wherein: The width of the first ground pad is N times the width of the second ground pad; N is an integer greater than or equal to 2; and the length of the first ground pad is equal to the length of each of the power pads.

4. The pad assembly according to claim 2, wherein: The plurality of power pads are divided into a corresponding number of power pad units according to the number of planned power networks, and each group of power pad units includes at least two power pads; the plurality of second ground pads are divided into a plurality of groups of second ground pad units, and each group of second ground pad units includes at least one second ground pad; Arranged in sequence from both ends of the first row of pads to the middle are: the power pad unit, the second ground pad unit and the first ground pad.

5. The pad assembly according to claim 4, wherein: The first row of pads includes two groups of power pad units, one group of power pad units includes two power pads belonging to a first power network, and the other group of power pad units includes three power pads belonging to a second power network; The first row of pads includes two groups of second ground pad units, one group of second ground pad units includes one second ground pad, and the other group of second ground pad units includes two second ground pads.

6. The pad assembly according to claim 2, wherein: Also comprising a second row of pads; wherein the vertical distance between the second row of pads and the reference line is greater than the vertical distance between the first row of pads and the reference line; The second row of pads includes at least two groups of mixed pad units; Each group of the mixed pad units includes at least one second ground pad and at least one first signal pad; the second ground pad is arranged adjacent to the first signal pad in the mixed pad unit to which it belongs; the length of the first signal pad is shorter than the length of the second ground pad; Center points of all the second ground pads and all the first signal pads are on a third straight line parallel to the reference line.

7. The pad assembly according to claim 2, wherein: Also comprising a third row of pads; wherein the vertical distance between the third row of pads and the reference line is greater than the vertical distance between the first row of pads and the reference line; Center points of the pads in the third row of pads are arranged at intervals on a fourth straight line parallel to the reference line; The third row of pads includes at least one group of differential signal pads, and a third ground pad is provided on each side of the differential signal pads; the length of the third ground pad is greater than that of the differential signal pads.

8. The pad assembly according to claim 7, wherein: It also includes rectangular solder resist components with the same number as the third ground pads; the differential signal pads include a positive phase signal pad and a negative phase signal pad; The solder resist component is provided with a plurality of via holes; The wide side of the third ground pad is parallel to a long side of the corresponding solder resist component and the distance between them is less than a preset spacing threshold, and the first wide side of the solder resist component is located on the center line of the positive phase signal pad adjacent to one side of the third ground pad, and the second wide side of the solder resist component is located on the center line of the negative phase signal pad adjacent to the other side of the third ground pad and overlaps with it.

9. The pad assembly according to any one of claims 1 to 8, characterized in that: The substrate includes a first short side and a first long side; an anti-missing corner is set between the first short side and the first long side; the reference line is the first short side, the second short side corresponding to the first short side, or a middle line in the substrate parallel to the first short side.

10. The pad assembly according to any one of claims 1 to 8, characterized in that: Each pad in the pad assembly is a gold finger pad.

11. A printed circuit board, characterized in that: Comprising a substrate; a pad assembly according to any one of claims 1 to 10 is welded on the passive surface of the substrate; The substrate is provided with a multi-layer circuit layer; a plurality of device pads are welded on the active surface of the substrate; the device pads are used for welding bare cores, and each of the device pads is connected to the corresponding pad in the pad assembly through the circuit in the multi-layer circuit layer and the opened via.

12. The printed circuit board according to claim 11, wherein Also includes: a plurality of hollowed-out areas provided in other circuit layers except the determined middle circuit layer; The middle circuit layer is a complete circuit layer.

13. The printed circuit board according to claim 12, wherein: The intermediate circuit layer is determined by the following method: According to the fact that the area of ​​each device pad and each pad in the pad assembly is positively correlated with the plane capacitance and inversely correlated with the distance from the reference plane, a signal quality simulation is performed with the minimum plane capacitance as the goal to obtain the intermediate circuit layer; wherein the reference plane is the projection of the pad on the circuit layer.

14. A memory card, characterized in that: The memory card comprises a main control die, at least one flash memory die, a plurality of electronic components and a printed circuit board according to any one of claims 11 to 13; The master bare core, the flash memory bare core and the plurality of electronic components are soldered to the printed circuit board via corresponding device pads on the printed circuit board.

15. The memory card according to claim 14, wherein: The memory card further includes a plastic package; the master bare core, the at least one flash memory bare core and the plurality of electronic components are all wrapped by the plastic package.

16. A card seat, characterized in that: include: Sampling signal terminal, comparison signal terminal and multiple spring electrode terminals; When the memory card according to claim 14 or 15 is inserted into the card holder, the comparison signal terminal starts to contact the first ground pad to output a comparison signal; At a second moment when the memory card is inserted into the card holder, the plurality of spring electrode terminals begin to contact one-to-one with each pad on the edgeless surface of the printed circuit board in the memory card except the first ground pad; At a third moment when the memory card is inserted into the card holder, the sampling signal terminal starts to contact the first ground pad to output a start signal of the memory card; The first time is earlier than the second time, and the second time is earlier than the third time.

17. The card holder according to claim 16, characterized in that: The length of the comparison signal terminal is greater than the length of the sampling signal terminal.

18. A startup determination device for an electronic device, characterized in that: comprising a processor; the processor being connected to the sampling signal terminal and the comparison signal terminal on the card holder according to claim 16 or 17; When the memory card according to claim 14 or 15 is inserted into the card holder, a comparison signal is acquired through the comparison signal terminal; At a third moment when the memory card is completely inserted into the card holder, a start signal is acquired through the sampling signal terminal; Turning on power is determined according to the comparison signal and the start signal to start the memory card.

Images