Cabin-driving integrated chip system and vehicle

Abstract

The invention discloses a cabin-driving integrated chip system and a vehicle. The cabin-driving integrated chip system comprises an automatic driving chip, at least one intelligent cabin chip and at least one computing power chip, wherein the intelligent cabin chip is connected with the automatic driving chip through a core-to-core interface; the computing power chip is connected with the automatic driving chip through the core-to-core interface; wherein at least one of a central processing unit resource, a storage resource and a digital signal processor resource of the automatic driving chip and the intelligent cabin chip is pooled to form a corresponding resource pool, and the corresponding resource pool comprises at least one of a processor resource pool, a storage resource pool and a digital signal processor resource pool; and / or the computing power resources of the intelligent cabin chip and the automatic driving chip are pooled to form a computing power resource pool. According to the technical scheme provided by the invention, the problems that a cabin-driving integrated chip used in the prior art is low in mass production yield, long in development period and poor in expandability can be solved.

Description

Technical Field

[0001] The present application belongs to the field of autonomous driving technology, and in particular, relates to a cabin-driver integrated chip system and vehicle. Background Art

[0002] With the development of the automotive industry, users have an increasing demand for autonomous driving and smart cockpit experience. Related technologies integrate various systems on a cockpit-driver integrated chip to meet various user needs. In the process of implementing the present invention, the inventor found that the mass production yield of the cockpit-driver integrated chip in the prior art is low, the development cycle is long, and the scalability is poor. Summary of the invention

[0003] The present application aims to solve at least one of the technical problems existing in the prior art. To this end, the present application proposes a cabin-driver integrated chip system and a vehicle, as well as a resource processing method based on the cabin-driver integrated chip system, to solve the problems of low chip mass production yield, long development cycle, and poor scalability of the cabin-driver integrated chip used in the prior art.

[0004] In a first aspect, an embodiment of the present application provides a cabin-pilot integrated chip system, including:

[0005] Autonomous driving chips;

[0006] At least one smart cockpit chip connected to the autonomous driving chip via a chiplet-to-chiplet interface;

[0007] and at least one computing chip connected to the autonomous driving chip via a chiplet-to-chiplet interface;

[0008] At least one of the central processing unit resources, storage resources and digital signal processor resources of the above-mentioned autonomous driving chip and smart cockpit chip are pooled to form a corresponding resource pool, and the corresponding resource pool includes at least one of the processor resource pool, storage resource pool and digital signal processor resource pool, and / or, the computing power resources of the smart cockpit chip and the autonomous driving chip are pooled to form a computing power resource pool.

[0009] In some embodiments, the number of the smart cockpit chip connected to the autonomous driving chip through the chip-to-chip interface is one, and the number of the computing power chip connected to the autonomous driving chip through the chip-to-chip interface is one.

[0010] In some embodiments, the number of smart cockpit chips connected to the autonomous driving chip through a chip-to-chip interface is one, and the number of computing power chips connected to the autonomous driving chip through a chip-to-chip interface is four.

[0011] In some embodiments, the number of smart cockpit chips connected to the autonomous driving chip through a chip-to-chip interface is two, and the number of computing power chips connected to the autonomous driving chip through a chip-to-chip interface is four.

[0012] In some embodiments, the above-mentioned autonomous driving chip includes a processor module, a security module, a perception module, a storage module and a system management module; the smart cockpit chip includes a processor module, a security module, a perception module, a storage module and a system management module; the computing power chip includes a computing power module.

[0013] In a second aspect, an embodiment of the present application provides a resource processing method of the cabin-driver integrated chip system based on the first aspect, including:

[0014] Constructing a chip system resource pool, the chip system resource pool including at least one of a central processing unit resource pool, a storage resource pool, a digital signal processor resource pool, and a computing power resource pool, wherein the central processing unit resource pool, the storage resource pool, and the digital signal processor resource pool are obtained by pooling corresponding resources of the autonomous driving chip and the smart cockpit chip, and the computing power resource pool is obtained by pooling computing power resources of the smart cockpit chip and the autonomous driving chip;

[0015] According to the resource requirements of the tasks to be processed, the required resources are allocated to the tasks to be processed.

[0016] In some embodiments, the above-mentioned allocating required resources to the task to be processed according to the resource requirements of the task to be processed includes:

[0017] Analyze the resource requirements of the tasks to be processed and obtain the analysis results;

[0018] Retrieving resources in the resource management table based on the analysis results;

[0019] The retrieved resources are allocated to allocate the required resources for the tasks to be processed.

[0020] In some embodiments, it also includes:

[0021] After the pending tasks are processed, the resources allocated to the pending tasks are released.

[0022] In some embodiments, the tasks to be processed include at least one of a computing task, a display task, a voice task, or an audio task.

[0023] In a third aspect, an embodiment of the present application provides a vehicle, comprising the cabin-driver integrated chip system of the first aspect.

[0024] An embodiment of the present application provides a cabin-cockpit integrated chip system, which includes an autonomous driving chip, at least one smart cockpit chip connected to the autonomous driving chip through a chip-to-chip interface, and at least one computing power chip connected to the autonomous driving chip through a chip-to-chip interface. At least one of the central processing unit resources, storage resources, and digital signal processor resources of the above-mentioned autonomous driving chip and smart cockpit chip are pooled to form a corresponding resource pool; the computing power resources of the smart cockpit chip and the autonomous driving chip are also pooled to form a computing power resource pool. Since the above technical solution is to connect the autonomous driving chip, the smart cockpit chip, and the computing power chip on demand through the chip-to-chip interface, different levels of cabin integrated chips can be constructed, and the resources of the chip can be pooled, thereby saving chip development time and reducing design risks while realizing resource sharing, thereby providing a better method for product upgrades and iterations according to demand.

[0025] Additional aspects and advantages of the present application will be given in part in the description below, and in part will become apparent from the description below, or will be learned through the practice of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] The above and / or additional aspects and advantages of the present application will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:

[0027] Figure 1 This is a schematic diagram of the architecture of a cabin-driver integrated chip system in an embodiment of the present application;

[0028] Figure 2 This is a schematic diagram of the structure of a specific cabin-driver integrated chip system in an embodiment of the present application;

[0029] Figure 3 This is a structural schematic diagram of another specific cabin-driver integrated chip system in an embodiment of the present application;

[0030] Figure 4 This is a structural schematic diagram of another specific cabin-driver integrated chip system in the embodiment of the present application;

[0031] Figure 5 This is a schematic diagram of the structure of an autonomous driving chip in an embodiment of the present application;

[0032] Figure 6 This is a schematic diagram of the structure of a smart cockpit chip in an embodiment of the present application;

[0033] Figure 7 This is a flow chart of a resource processing method of a cabin-driver integrated chip system in an embodiment of the present application;

[0034] Figure 8This is a schematic diagram of the structure of a chip system resource pool in an embodiment of the present application;

[0035] Fig. 9 for Figure 7 A schematic diagram of a specific execution flow of step 702 of the illustrated embodiment;

[0036] Fig.10 It is a schematic diagram of the structure of a vehicle in an embodiment of the present application. DETAILED DESCRIPTION

[0037] The embodiments of the present application are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application, and cannot be understood as limiting the present application.

[0038] The cabin-driver integrated chip used in some related technologies integrates the autonomous driving system, intelligent cockpit system, high-computing AI system, storage system, high-speed peripheral interface system, etc. on a single chip. It is huge in size. When a single chip integrates more functions, there are problems such as poor scalability, low chip mass production yield, and long development cycle. As a result, when user demand increases, the internal architecture of the chip cannot be adjusted in time.

[0039] In addition, the above-mentioned cabin-driver integrated chip cannot adjust the system computing resources and storage resource redistribution through software definition as the application scenarios change, thus wasting system resources.

[0040] Therefore, an embodiment of the present application provides a cabin-cockpit integrated chip system, which includes an autonomous driving chip, at least one smart cockpit chip connected to the autonomous driving chip through a chip-to-chip interface, and at least one computing power chip connected to the autonomous driving chip through a chip-to-chip interface. At least one of the central processing unit resources, storage resources, and digital signal processor resources of the above-mentioned autonomous driving chip and smart cockpit chip are pooled to form a corresponding resource pool; the computing power resources of the smart cockpit chip and the autonomous driving chip are also pooled to form a computing power resource pool. Since the above technical solution is to connect the autonomous driving chip, the smart cockpit chip, and the computing power chip on demand through the chip-to-chip interface, different levels of cabin integrated chips can be constructed, and the resources of the chip can be pooled, so that resource sharing can be achieved while saving chip development time and reducing design risks, thereby providing a better method for product upgrades and iterations according to demand. Figure 1 Schematic diagram of the architecture of a cabin-driver integrated chip system in an embodiment of the present application. Figure 1 As shown, it includes an autonomous driving chip 1, a smart cockpit chip 2, and a computing power chip 3.

[0041] Among them, the above-mentioned autonomous driving chip 1 is used for data processing and decision-making in the autonomous driving system to guide the vehicle to complete autonomous driving. The above-mentioned data processing refers to the recognition, fusion and classification of data from sensors such as cameras, radars, and lidars; decision-making refers to making driving decisions based on the above-mentioned processed data and using deep learning algorithms, such as acceleration, braking, steering, etc.

[0042] The smart cockpit chip 2 is connected to the autonomous driving chip through a die-to-die interface and is used to process various data and instructions in the cockpit. Specifically, the smart cockpit chip receives real-time environmental information from on-board sensors, cameras, microphones and other devices, such as vehicle speed, location, surrounding obstacles, driver and passenger behavior, etc., and then quickly analyzes and processes these data, and extracts useful information, thereby providing strong guidance for subsequent decision-making and control. In this application, at least one smart cockpit chip is connected to the autonomous driving chip through a die-to-die interface. The above-mentioned die-to-die interface (Die-to-Die, referred to as D2D) refers to a functional block that provides a data interface between two chip dies in the same package, which is usually composed of a physical layer and a controller. The physical layer is responsible for signal transmission between package media, and the architecture of this layer can be divided into parallel and serial according to different transmission modes; the controller includes a link layer and a logical physical layer, which is responsible for protocol interface adaptation, arbitration and negotiation, as well as link training and management functions. Using D2D technology to connect chips can achieve high-speed connection between chips, thereby improving the overall performance and user experience of the system.

[0043] The computing power chip 3 is also connected to the autonomous driving chip through a core-to-core interface, and is used to provide powerful computing power for the device to support various complex applications and tasks. It is usually composed of multiple transistors and gate units, and each core is composed of a completely independent control machine and data channel. In addition, multiple cores can be integrated on the same computing power chip to achieve the ability to perform multiple computing tasks in parallel. The computing power of the computing power chip can be measured using computing power units such as TOPS, TFLOPS, and FLOPS. Among them, TOPS is the most commonly used, which represents the number of operations performed per second. For example, 1TOPS means 1 trillion operations per second. In this application, at least one computing power chip is connected to the autonomous driving chip through a core-to-core interface.

[0044] In an embodiment of the present application, various resources in the above-mentioned autonomous driving chip, smart cockpit chip and computing power chip can be pooled to form a corresponding resource pool, which includes at least one of a processor resource pool, a storage resource pool and a digital signal processor resource pool. Pooling refers to integrating central processing unit resources, computing resources and storage resources to form a unified resource library, namely a resource pool, so as to dynamically allocate and manage resources, thereby achieving efficient resource utilization and cost optimization. Specifically, the various resources in the above-mentioned chips are pooled, including the following two situations:

[0045] First, at least one of the processor resources, storage resources, and digital signal processor resources of the autonomous driving chip and the smart cockpit chip is pooled to form a corresponding resource pool, such as a processor resource pool, a storage resource pool, etc.;

[0046] Second, the computing resources of smart cockpit chips and autonomous driving chips are pooled to form a computing resource pool.

[0047] The above-mentioned processing resources include central processing units, neural network processors, image processing units, etc., storage resources include various types of memory or devices, digital signal processor resources include core processors, input and output devices, auxiliary components, etc.; computing power resources include hardware facilities such as central processing units and image processing units, as well as software technologies such as operating systems and databases.

[0048] As described above, the cabin integrated chip system provided in the embodiment of the present application can connect the autonomous driving chip, the smart cockpit chip and the computing power chip on demand through a chip-to-chip interface, so as to build cabin integrated chips of different levels and pool the chip resources, thereby saving chip development time and reducing design risks while realizing resource sharing, thereby providing a better method for product upgrades and iterations based on demand.

[0049] In some embodiments, the autonomous driving chip can be connected to the smart cockpit chip and the computing chip through a chip-to-chip interface. When performing the above connection, the number of smart cockpit chips and the number of computing chips can both be one. The above autonomous driving chip is connected to the smart cockpit chip and the computing chip through a chip-to-chip interface to form a cockpit integrated chip, for example, an L3 level cockpit integrated chip, whose structural diagram is as follows: Figure 2 As shown. The computing power of the above computing power chip can be set according to actual needs, for example, a computing power chip with a computing power of 300TOPS. In this way, efficient integration between autonomous driving chips, smart cockpit chips and computing power chips can be achieved.

[0050] In some embodiments, when the autonomous driving chip is connected to the smart cockpit chip and the computing power chip through a chip-to-chip interface, the number of smart cockpit chips can be one, and the number of computing power chips can be four or more. The above autonomous driving chip is connected with one smart cockpit chip and four computing power chips through a chip-to-chip interface to form another cockpit integrated chip, for example, an L4 level cockpit integrated chip, and its structural diagram is as follows: Figure 3 The computing power of the above computing chip can be set according to actual needs, for example, a computing chip with a computing power of 300TOPS. The cabin-driver integrated chip built in this way can have more powerful computing power, thus laying a solid foundation for higher-level autonomous driving technology.

[0051] In some embodiments, the autonomous driving chip can be connected to two intelligent cockpit chips and four computing chips or more through a chip-to-chip interface to construct another cockpit integrated chip, for example, a high-end cockpit integrated chip of L4 level, as shown in the structural diagram. Figure 4 The computing power of the above computing chip can be set according to actual needs, for example, a computing chip with a computing power of 300TOPS. The integrated cockpit chip constructed in this way has stronger computing power while also enhancing the functionality of the smart cockpit, thus bringing users a more intelligent and personalized driving experience.

[0052] In the embodiment of the present application, the above-mentioned autonomous driving chip includes a processor module 11, a security module 12, a perception module 13, a storage module 14 and a system management module 15, and its structure is as follows: Figure 5As shown. The processor module 11 is used to perform all computing tasks and control operations, including a central processing unit (CPU) and a neural network processor (NPU). The CPU supports the operation of the operating system, is responsible for processing large amounts of data, executing various algorithms, making decisions and scheduling resources, and also controls the operation of other devices in the system. Specifically, the CPU reads instructions and data from the memory, decodes and executes them, and then stores the results back to the memory or outputs them to an external device; the NPU is a hardware processor specially designed to accelerate neural network operations, with the characteristics of high efficiency, low latency, low power consumption and programmability. It accelerates complex calculations in deep neural networks through large-scale parallel processing units and efficient interconnection structures, while reducing power consumption and latency. In this application, the NPU is crucial in real-time analysis tasks with high latency requirements, for example, in real-time processing and analysis of sensor data to ensure accurate control of the vehicle's driving state, thereby achieving safe driving. In actual use, if the computing power of the NPU is not enough to meet the demand, the computing power can be expanded through the core-to-core interface.

[0053] The security module 12 is used to ensure the safety of the entire vehicle and the integrity and confidentiality of data information, as well as the protection of privacy. It includes functional safety and information security. The above-mentioned functional safety is mainly used to ensure that the vehicle system can operate normally under various operating conditions and prevent accidents caused by system failures, thereby ensuring the safety of passengers, pedestrians and other road users. Specifically, it includes fault prediction, diagnosis and redundancy design of components such as vehicle control systems, power systems, and braking systems to ensure that when a single or multiple components fail, the vehicle can still maintain basic operating functions and alarm or park safely; information security is mainly used to protect the data information and systems inside the vehicle from external attacks, unauthorized access, data leakage or tampering and other threats. Specifically, it includes encryption processing of vehicle communication networks, implementation of identity authentication mechanisms, detection and defense of malicious software, and strict control of the storage and transmission of sensitive data to ensure the confidentiality, integrity and availability of information.

[0054] The perception module 13 is used to collect and process information from the vehicle's surrounding environment and provide basic data for the vehicle's decision-making and planning. It includes video input, peripherals and other parts. The above-mentioned video input can capture image information through a camera, which is used to identify road signs, pedestrians and other vehicles, etc., as well as to perform obstacle avoidance operations, thereby helping the system to make correct decisions and responses; peripherals can further enhance the vehicle's perception of the surrounding environment. Common peripherals include laser radar, millimeter wave radar, ultrasonic radar, etc. The access of the above-mentioned multiple peripherals can detect the distance, speed and direction of objects, as well as the identification of close-range obstacles, etc., providing solid technical support for the intelligent driving of the vehicle. In an embodiment of the present application, the perception module also supports docking with other related body control devices such as an external microcontroller unit and an on-board communication box to achieve deep integration and collaborative work with other vehicle systems.

[0055] The storage module 14 is used to store a large amount of data generated during the operation of the vehicle, such as data collected and processed by the perception module, and includes data storage technologies such as on-chip memory, off-chip universal flash memory, off-chip embedded multimedia storage card, off-chip secure digital input and output card, and high-bandwidth memory. Among them, the universal flash storage (Universal Flash Storage, referred to as UFS), embedded multimedia storage card (embedded MultiMedia Card, referred to as eMMC), and secure digital input and output card (Secure Digital Input and Output Card, referred to as SDIO) are used to store data that will not be lost when power is off, such as operating system, main data, etc. In addition, when the vehicle is started, the data in these storage devices may be copied to the high-bandwidth memory (High Bandwidth Memory, referred to as HBM) so that the CPU can quickly access the HBM to run the operating system or process data.

[0056] The system management module 15 is used to complete the functions of safe startup of the system, perform safety self-check, and manage low power consumption mode, and includes a startup component and a power management unit. The startup component is responsible for the initialization process of the system to ensure that the system can start running from the correct state; the power management unit (Power Management Unit, referred to as PMU) is responsible for monitoring and managing the power status of the system to ensure the low power consumption and safety of the system. The system management module realizes the functions of safe startup, safety self-check, and low power consumption management of the system through the close cooperation of the Startup component and the PMU, providing strong support for the stable operation and efficient performance of the system.

[0057] In the embodiment of the present application, the above modules are interconnected through the interconnection matrix and the internal interconnection bus (Matrix & Internal Interconnection Bus) to exchange data with each other. Through the interconnection of the Matrix & Internal Interconnection Bus, each module can achieve efficient data interaction and resource sharing. This interconnection method improves the overall performance of the system, enhances the flexibility and scalability of the system, and also helps to reduce the complexity and cost of the system.

[0058] The above-mentioned autonomous driving chip can also be connected to other chips through a chiplet-to-chiplet interface, and it can support at least 8 interface expansions, that is, at least 8 chips can be connected.

[0059] In the embodiment of the present application, the above-mentioned smart cockpit chip includes a processor module 21, a security module 22, a perception module 23, a storage module 24 and a system management module 25, and each module is interconnected through an interconnection matrix and an internal interconnection bus to exchange data with each other. Its structure is as follows Figure 6 As shown. The processor module 21 includes a central processing unit, a graphics processing unit, and a data processing unit. The graphics processing unit (Graphics Processing Unit, referred to as GPU) is a processor specially designed to process graphics data and perform graphics rendering tasks. Compared with the CPU, the GPU has more processing cores and higher parallel computing capabilities, and can process images and video data more efficiently, providing a smooth graphical interface and visual experience. Specifically, in the smart cockpit system, the GPU is responsible for rendering the display screen content inside the vehicle, including navigation maps, vehicle information, entertainment content, etc., to provide intuitive and clear visual information for the driver and passengers;

[0060] DPU (Display Processing Unit) is a display processing unit that supports video and graphics processing functions and interfaces with video and static display sensors and displays. After the GPU draws the image or the video is processed, the display image data is submitted to the DPU for pre- / post-processing, and then transmitted to the display screen through the display interface to display the image.

[0061] The security module 22 is used to ensure the data information security and privacy confidentiality of the cockpit, which mainly includes information security. The above information security is used to protect the data information and systems inside the vehicle from external attacks, unauthorized access, data leakage or tampering and other threats. Specifically, it includes encryption processing of vehicle communication networks, implementation of identity authentication mechanisms, detection and defense of malicious software, and strict control of the storage and transmission of sensitive data to ensure the confidentiality, integrity and availability of information.

[0062] The perception module 23 is used to collect and process information from the vehicle's surrounding environment and provide basic data for the vehicle's decision-making and planning. It includes video output, audio subsystem, peripherals and other parts. The above-mentioned video output displays images through a display screen, such as a dashboard, head-up screen, central control screen, entertainment screen and other display screens; the audio subsystem can not only realize the voice input and keyword detection functions of human-computer interaction, but also provide high-quality music playback and emergency call dialing services, which can bring users a more convenient, safe and comfortable driving experience; peripherals can further enhance the vehicle's perception of the surrounding environment, including high-speed peripherals and low-speed peripherals, among which high-speed peripherals include universal serial bus, peripheral component interconnect standard, gigabit media access controller, etc.; low-speed peripherals include two-wire serial bus, universal asynchronous receiver and transmitter, serial peripheral interface and general input and output, etc. In the intelligent cockpit system or other electronic equipment, choosing a suitable peripheral interface is of great significance to improving system performance, reducing costs and enhancing system flexibility.

[0063] The storage module 24 is used to store a large amount of data generated during the operation of the vehicle. Compared with the storage module 14 in the autonomous driving chip, this module also includes the sixth-generation low-power double data rate memory (Low Power Double Data Rate6, referred to as LPDDR6). Specifically, when the vehicle is started, the data in these storage devices may be copied to LPDDR6 so that the CPU can quickly access LPDDR6 for operating system operation or data processing.

[0064] The system management module 25 is used to complete functions such as safe startup of the system, perform safety self-checks, and manage low power consumption modes. It has the same components as the system management module 14 of the autonomous driving chip and will not be repeated here.

[0065] In an embodiment of the present application, the above-mentioned smart cockpit chip can be connected to the autonomous driving chip through a chip-to-chip interface, which can support the smart cockpit system to communicate and share information with the autonomous driving system, thereby improving the collaborative work efficiency and intelligence level of the entire vehicle system.

[0066] In the embodiment of the present application, the computing power chip includes a computing power module 31, which is used to expand the computing power of other chips, for example, neural network processor expansion computing power, artificial intelligence expansion computing power, etc. The artificial intelligence expansion computing power is used to support the computing power required by artificial intelligence applications of other chips. In autonomous driving, using computing power modules to expand the computing power of other chips can not only improve autonomous driving performance and real-time decision-making capabilities, but also support high-level autonomous driving, optimize energy consumption and costs, and enhance system reliability and security.

[0067] In the embodiment of the present application, after the cabin-driver integrated chip system of different levels is constructed in the above manner, it is necessary to further process various resources in the above chip system to realize resource sharing, thereby maximizing the utility of resources and improving the performance and efficiency of the overall system. Figure 7 As shown, the following steps are included:

[0068] Step 701: construct a chip system resource pool, where the chip system resource pool includes at least one of a processor resource pool, a storage resource pool, a digital signal processor resource pool, and a computing power resource pool, wherein the processor resource pool, the storage resource pool, and the digital signal processor resource pool are obtained by pooling corresponding resources of the autonomous driving chip and the smart cockpit chip, and the computing power resource pool is obtained by pooling computing power resources of the smart cockpit chip and the autonomous driving chip;

[0069] After the different levels of cabin-driver integrated chip systems are constructed in the above embodiments, this step further pools the resources of each chip system to form a chip system resource pool. The above-mentioned chip system resource pool includes one or more of a central processing unit resource pool, a storage resource pool, a digital signal processor resource pool, and a computing power resource pool. Specifically, the central processing unit resource pool, the storage resource pool, and the digital signal processor resource pool can be obtained by pooling the corresponding resources in the autonomous driving chip and the smart cockpit chip; and the computing power resource pool is obtained by pooling the computing power resources of the smart cockpit chip and the autonomous driving chip. A structural diagram of the chip system resource pool is shown below. Figure 8 As shown, resources are reallocated through upper-layer system software, such as application software or application layer software, to achieve resource sharing.

[0070] Step 702: Allocate required resources to the task to be processed according to the resource requirements of the task to be processed.

[0071] This step is to allocate the required resources to the task to be processed according to the resource requirements after the chip system resource pool is built in step 701.

[0072] As described above, by using the resource processing method of the above-mentioned cabin-driver integrated chip system, various resources in the constructed cabin-driver integrated chip can be processed, which can improve resource utilization, thereby enabling the system to flexibly allocate resources according to the needs of different application scenarios to achieve optimal performance.

[0073] In an embodiment of the present application, the above-mentioned tasks to be processed include at least one of computing tasks, display tasks, voice tasks or audio tasks. Specifically, computing tasks usually involve high-intensity data processing and calculations, such as path planning, environmental perception, and decision-making in autonomous driving; display tasks mainly focus on the information display in the smart cockpit, such as the rendering of the navigation interface, the display of vehicle status information, etc.; voice tasks involve speech recognition and synthesis, such as the human-computer interaction function of the in-vehicle voice assistant; and audio tasks focus on the acquisition, processing and playback of audio signals, such as the audio output of the in-car entertainment system. Together, the above tasks constitute the main workload that the cabin-driver integrated chip system needs to handle.

[0074] In some embodiments, required resources may be allocated to the tasks to be processed according to the resource requirements of the tasks to be processed. Specifically, Fig. 9 for Figure 7 The specific execution flow diagram of step 702 of the embodiment shown in FIG. Fig. 9 As shown, the following steps are included:

[0075] Step 901: Analyze the resource requirements of the task to be processed and obtain the analysis results;

[0076] In this step, after the chip system resource pool is constructed in step 701 and used in the task to be processed, it is necessary to analyze the resources required to execute the task to be processed and obtain the analysis results. The above analysis results include the type, quantity and performance requirements of the resources required to execute the task to be processed. Analyzing the resource requirements of the task to be processed can ensure that the most appropriate resources can be better identified and allocated to the task, thereby maximizing the efficiency of resource utilization and meeting the various requirements of task execution.

[0077] Step 902: Retrieve resources in the resource management table based on the analysis result;

[0078] This step is based on step 901, and searches for resources in the resource management table according to the analysis results. The resource management table records the status, performance parameters, and allocation of various resources in the chip system resource pool. The status of the various resources can be determined based on the corresponding tag values. For example, if the tag value of the CPU status is 0, it means that the CPU is in an available state; conversely, if the tag value of the CPU status is 1, it means that the CPU is being used.

[0079] Step 903: Allocate the retrieved resources to allocate required resources to the tasks to be processed.

[0080] This step is to further allocate these resources after retrieving matching resources in the resource management table according to the analysis results obtained in step 902, so as to allocate various resources required for executing the above-mentioned pending tasks. Specifically, the retrieved computing resources, storage resources, etc. are reasonably configured according to the actual needs of the task to ensure the smooth execution and efficient completion of the task. For example, 1200TOPS of computing power resources are allocated to the autonomous driving control task.

[0081] In an embodiment of the present application, the monitoring component in the operating system monitors the allocation of various resources in the chip system resource pool in real time to ensure that the resources used by each task do not exceed its allocated limit. In addition, the system can flexibly adjust resource allocation according to the execution progress of the task or the overall system status. For example, during certain light-load periods of the autonomous driving system, when the current processing task load is relatively easy, the system will automatically reduce the computing, storage and other resources allocated to these tasks, thereby freeing up idle resources for other needs; when the smart cockpit chip 0 supports the instrument panel and 3D games, then the smart cockpit chip 1 only performs auxiliary display and only supports ordinary screen display. At this time, the smart cockpit chip 1 can release the computing power of the GPU and the static random access memory in the GPU for use by other tasks of the system.

[0082] In the embodiment of the present application, after the above-mentioned pending tasks are completed, the system will release the various resources previously allocated to them so that these resources can be effectively used by other tasks. Specifically, the system will update the status information of the resources allocated to the above-mentioned pending tasks, that is, by modifying their status mark values, marking them as available, thereby ensuring that resources can be flexibly scheduled and allocated between different tasks.

[0083] This application Figure 2-Figure 4 The cabin-driver integrated chip system in the illustrated embodiment can have the number of computing chips connected thereto and the corresponding computing power thereof adjusted accordingly according to actual usage requirements. The embodiment shown above is only one exemplary configuration.

[0084] The present application also provides a vehicle, such as Fig.10 As shown, the vehicle includes the above Figure 1-Figure 5 The cabin-driver integrated chip system 4 shown in the figure allows the number of smart cockpit chips and computing power chips connected to the autonomous driving chip through the chip-to-chip interface to be adjusted according to actual needs. It is possible to construct cabin-driver integrated chips of different levels, so that the vehicle can use different cabin-driver integrated chips to perform corresponding tasks, thereby improving the user's driving.

[0085] The terms "first", "second", etc. in the specification and claims of the present application are used to distinguish similar objects, and are not used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable under appropriate circumstances, so that the embodiments of the present application can be implemented in an order other than those illustrated or described here, and the objects distinguished by "first", "second", etc. are generally of one type, and the number of objects is not limited. For example, the first object can be one or more. In addition, "and / or" in the specification and claims represents at least one of the connected objects, and the character " / " generally indicates that the objects associated with each other are in an "or" relationship.

[0086] In the description of the present application, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.

[0087] In the description of this application, "first feature" or "second feature" may include one or more of the features.

[0088] In the description of the present application, “plurality” means two or more.

[0089] In the description of the present application, a first feature being “on” or “under” a second feature may include that the first and second features are directly in contact with each other, or may include that the first and second features are not in direct contact with each other but are in contact with each other via another feature therebetween.

[0090] In the description of the present application, “above”, “over” and “above” a first feature to a second feature includes the first feature being directly above and obliquely above the second feature, or simply means that the first feature is horizontally higher than the second feature.

[0091] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "illustrative embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials, or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0092] Although the embodiments of the present application have been shown and described, those skilled in the art will appreciate that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present application, and that the scope of the present application is defined by the claims and their equivalents.

Claims

1. A cabin-pilot integrated chip system, characterized in that: include: Autonomous driving chips; At least one smart cockpit chip connected to the autonomous driving chip via a chiplet-to-chiplet interface; and at least one computing chip connected to the autonomous driving chip via a chiplet-to-chiplet interface; At least one of the processor resources, storage resources and digital signal processor resources of the autonomous driving chip and the smart cockpit chip are pooled to form a corresponding resource pool, and the corresponding resource pool includes at least one of the processor resource pool, the storage resource pool and the digital signal processor resource pool, and / or the computing power resources of the smart cockpit chip and the autonomous driving chip are pooled to form a computing power resource pool.

2. The chip system according to claim 1, characterized in that: The number of smart cockpit chips connected to the autonomous driving chip through a chip-to-chip interface is one, and the number of computing power chips connected to the autonomous driving chip through a chip-to-chip interface is one.

3. The chip system according to claim 1, characterized in that: The number of smart cockpit chips connected to the autonomous driving chip through a chip-to-chip interface is one, and the number of computing power chips connected to the autonomous driving chip through a chip-to-chip interface is four.

4. The chip system according to claim 1, characterized in that: The number of smart cockpit chips connected to the autonomous driving chip through a chip-to-chip interface is two, and the number of computing power chips connected to the autonomous driving chip through a chip-to-chip interface is four.

5. The chip system according to any one of claims 1 to 4, characterized in that: The autonomous driving chip includes a processor module, a security module, a perception module, a storage module and a system management module; the smart cockpit chip includes a processor module, a security module, a perception module, a storage module and a system management module; the computing power chip includes a computing power module.

6. A resource processing method based on the cabin-driver integrated chip system according to any one of claims 1-5, characterized in that: include: Constructing a chip system resource pool, wherein the chip system resource pool includes at least one of a processor resource pool, a storage resource pool, a digital signal processor resource pool, and a computing power resource pool, wherein the processor resource pool, the storage resource pool, and the digital signal processor resource pool are obtained by pooling corresponding resources of the autonomous driving chip and the smart cockpit chip, and the computing power resource pool is obtained by pooling computing power resources of the smart cockpit chip and the autonomous driving chip; According to the resource requirements of the tasks to be processed, required resources are allocated to the tasks to be processed.

7. The method according to claim 6, characterized in that The step of allocating required resources to the task to be processed according to the resource requirements of the task to be processed includes: Analyze the resource requirements of the tasks to be processed to obtain analysis results; Retrieving resources in the resource management table based on the analysis result; The retrieved resources are allocated to allocate required resources to the task to be processed.

8. The method according to claim 7, characterized in that Also includes: After the processing of the pending task is completed, the resources required for allocating the pending task are released.

9. The method according to any one of claims 6 to 8, characterized in that: The task to be processed includes at least one of a computing task, a display task, a voice task or an audio task.

10. A vehicle, characterized in that: It comprises the cabin-driver integrated chip system as described in any one of claims 1-5.

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