A control plane verification method and system for distributed routing protocols

Through the control plane verification method based on neural algorithm inference, the configuration of distributed routing protocols is transformed and validated, and the challenges of existing methods in generalization and scalability are solved, achieving efficient and accurate verification results.

CN119629106BActive Publication Date: 2025-04-29NAT UNIV OF DEFENSE TECH
View PDF 2 Cites 0 Cited by

Patent Information

Application Number
CN202510164034.2
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-02-14
Publication Date
2025-04-29
Estimated Expiration
2045-02-14

AI Technical Summary

Technical Problem

Existing control plane verification methods face challenges in generalization and scalability, and it is difficult to effectively verify whether the configuration of the distributed routing protocol complies with the specified forwarding behavior.

Method used

The control plane verification method based on neural algorithm inference is adopted, and the network topology, configuration and specifications are converted into facts in preset data query language formats through a graph builder, and a verification model containing fact library embedding, encoder, processor and decoder is constructed. The inductive representation learning mechanism is used to improve the hidden space representation to output the satisfaction Boolean value of the predicted specification.

Benefits of technology

It achieves high verification accuracy and efficiency, enables comprehensive end-to-end verification without requiring heavy formal modeling tasks.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN119629106B_ABST
    Figure CN119629106B_ABST
Patent Text Reader

Abstract

The present invention discloses a control plane verification method and system for distributed routing protocols. The method includes obtaining network topology, configuration and protocol; using a graph builder to convert the network topology, configuration and protocol into a series of facts in a preset data query language format; building a control plane verification model based on neural algorithm reasoning; inputting facts into the control plane verification model so that the fact library in the control plane verification model is embedded to integrate the facts into a fact graph, and the encoder in the control plane verification model encodes the fact graph into a latent space representation; the processor in the control plane verification model improves the latent space representation using an inductive representation learning mechanism; the decoder in the control plane verification model outputs a Boolean value of the satisfaction of the prediction protocol based on the improved latent space representation; and the control plane verification result is determined based on the Boolean value of the satisfaction of the prediction protocol. The scheme of the present invention has high verification accuracy and efficiency, and can achieve comprehensive end-to-end verification.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present invention relates to the technical field of control plane verification, and in particular to a control plane verification method and system for a distributed routing protocol. Background Art

[0002] Distributed routing protocols are fundamental components for implementing robust network functionality and are critical to the successful operation of a network. Despite the increasing adoption of software-defined networking (SDN) and programmable networks, many existing traditional networks are expected to continue to rely on distributed routing protocols for the foreseeable future. This reliance stems from existing infrastructure investments, the complexity involved in transitioning to SDN, and the inherent scalability and fault-tolerance benefits provided by a distributed control plane. Controlling the configuration of routing protocols is critical to accurately implement network functionality. However, configuration errors can lead to serious issues such as network black holes, unauthorized access, suboptimal routing paths, and various performance and security vulnerabilities.

[0003] In traditional networks, control plane verification aims to answer whether the configuration of a routing protocol is able to achieve the specified forwarding behavior in conjunction with the network environment, including topology and enabled protocols. However, the relationship between configuration and forwarding behavior is both implicit and complex, mainly due to the complex nature of distributed routing protocols. Over the past decade, academia and industry have explored various approaches to model this relationship, using techniques such as Datalog, Binary Decision Diagrams (BDDs), Abstract Interpretation, Explicit State Model Checking, and Satisfiability Modulo Theory (SMT). Due to the complexity involved in modeling a network and its environment, these approaches face challenges in terms of generalization (when adapting to a variety of protocols) or scalability (when applied to larger networks). Summary of the invention

[0004] In order to solve the technical problems that existing control plane verification methods face challenges in generalization and scalability, an embodiment of the present invention provides a control plane verification method and system for a distributed routing protocol.

[0005] The technical solution of the embodiment of the present invention is achieved as follows:

[0006] An embodiment of the present invention provides a control plane verification method for a distributed routing protocol, the method comprising:

[0007] Obtain the network topology, configuration and specifications of the network to be verified;

[0008] Using a graph builder, the network topology, configuration and specification are converted into a series of facts in a preset data query language format; the facts are abstract representations of the network topology, configuration and specification;

[0009] Constructing a control plane verification model based on neural algorithm reasoning; the control plane verification model includes fact base embedding, encoder, processor and decoder;

[0010] The facts are input into the control plane verification model so that the fact base in the control plane verification model is embedded to integrate the facts into a fact graph, and the encoder in the control plane verification model encodes the fact graph into a latent space representation; the processor in the control plane verification model improves the latent space representation using an inductive representation learning mechanism; the decoder in the control plane verification model outputs a Boolean value of satisfaction of the prediction specification based on the improved latent space representation;

[0011] A control plane validation result is determined based on a Boolean value of the satisfaction of the prediction specification.

[0012] In one embodiment, the network topology is converted into a series of facts in a preset data query language format using a graph builder, including:

[0013] The nodes in the network topology are divided into routers, external BGP peers, route reflectors, and network prefixes according to their roles, and are used in turn. , , and express.

[0014] In one embodiment, the configuration is converted into a series of facts in a preset data query language format using a graph builder, including:

[0015] For the OSPF protocol, the source node and destination node The link weight between use express;

[0016] For the BGP protocol, routers in the same AS and Internal BGP sessions between Indicates routers belonging to different ASs and External BGP sessions between Indicates; encapsulates the attributes of BGP routes Indicates; among them, Represents the source entity , Indicates the network prefix, integer , , , and Represents various attributes of a BGP route, including local preference, AS path length, origin type, multi-exit discriminator value, and community tags.

[0017] In one embodiment, the specification is converted into a series of facts in a preset data query language format using a graph builder, including:

[0018] router Through its neighbor router Forward traffic to the target network use express;

[0019] When the destination is a network When Flow to router use express;

[0020] From the router To destination Through its neighbors traffic, and from the router To the target network pass The traffic is isolated, using express.

[0021] In one embodiment, the control plane verification model is expressed as:

[0022]

[0023] in, is an embedding function in fact base embedding, which is used to generate node embedding for unseen nodes using local node feature information in the fact graph; Depends on a set of configuration parameters, including Used to represent fact base For each fact type in Used to represent Boolean values. Used to represent fact types Each integer parameter of , and Used to indicate unknown specification satisfaction, represents the dimension of the latent space, Represents the number of supported integer values; and For each node in the fact graph The intermediate node of The encoder is a graph neural network consisting of a 2-layer SageConv module; It is a processor, modeled as an iterative process consisting of a 6-layer SageConv module; Decoder for the protocol The unknown Boolean value of the output distribution .

[0024] The embodiment of the present invention further provides a control plane verification system for a distributed routing protocol, comprising: a processor and a memory for storing a computer program that can be run on the processor; wherein when the processor is used to run the computer program, the processor performs the following steps:

[0025] Obtain the network topology, configuration and specifications of the network to be verified;

[0026] Using a graph builder, the network topology, configuration and specification are converted into a series of facts in a preset data query language format; the facts are abstract representations of the network topology, configuration and specification;

[0027] Constructing a control plane verification model based on neural algorithm reasoning; the control plane verification model includes fact base embedding, encoder, processor and decoder;

[0028] The facts are input into the control plane verification model so that the fact base in the control plane verification model is embedded to integrate the facts into a fact graph, and the encoder in the control plane verification model encodes the fact graph into a latent space representation; the processor in the control plane verification model improves the latent space representation using an inductive representation learning mechanism; the decoder in the control plane verification model outputs a Boolean value of satisfaction of the prediction specification based on the improved latent space representation;

[0029] A control plane validation result is determined based on a Boolean value of the satisfaction of the prediction specification.

[0030] In one embodiment, the network topology is converted into a series of facts in a preset data query language format using a graph builder, including:

[0031] The nodes in the network topology are divided into routers, external BGP peers, route reflectors, and network prefixes according to their roles, and are used in turn. , , and express.

[0032] In one embodiment, the configuration is converted into a series of facts in a preset data query language format using a graph builder, including:

[0033] For the OSPF protocol, the source node and destination node The link weight between use express;

[0034] For the BGP protocol, routers in the same AS and Internal BGP sessions between Indicates routers belonging to different ASs and External BGP sessions between Indicates; encapsulates the attributes of BGP routes Indicates; among them, Represents the source entity , Indicates the network prefix, integer , , , and Represents various attributes of a BGP route, including local preference, AS path length, origin type, multi-exit discriminator value, and community tags.

[0035] In one embodiment, the specification is converted into a series of facts in a preset data query language format using a graph builder, including:

[0036] router Through its neighbor router Forward traffic to the target network use express;

[0037] When the destination is a network When Flow to router use express;

[0038] From the router To destination Through its neighbors traffic, and from the router To the target network pass The traffic is isolated, using express.

[0039] In one embodiment, the control plane verification model is expressed as:

[0040]

[0041] in, is an embedding function in fact base embedding, which is used to generate node embedding for unseen nodes using local node feature information in the fact graph; Depends on a set of configuration parameters, including Used to represent fact base For each fact type in Used to represent Boolean values. Used to represent fact types Each integer parameter of , and Used to indicate unknown specification satisfaction, represents the dimension of the latent space, Represents the number of supported integer values; and For each node in the fact graph The intermediate node of The encoder is a graph neural network consisting of a 2-layer SageConv module; It is a processor, modeled as an iterative process consisting of a 6-layer SageConv module; Decoder for the protocol The unknown Boolean value of the output distribution .

[0042] This embodiment has the following beneficial effects:

[0043] The solution of this embodiment can achieve high verification accuracy and efficiency, can realize comprehensive end-to-end verification, and does not have to undertake the heavy formal modeling tasks usually associated with distributed routing protocols. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] Figure 1 A schematic diagram of a control plane verification method for a distributed routing protocol according to an embodiment of the present invention;

[0045] Figure 2 A schematic diagram for describing the configuration verification problem of an embodiment of the present invention; wherein: Figure 2 (a) is a schematic diagram showing the error introduced by configuration W; Figure 2 (b) is an error caused by the validator Introduce schematic diagram; Figure 2 (c) in the figure is to learn the verifier through perfect mapping Schematic diagram;

[0046] Figure 3 A schematic diagram of a specific rule set for selecting the best BGP route according to an embodiment of the present invention;

[0047] FIG4 (a) is a schematic diagram of a forwarding table obtained through simulation according to an embodiment of the present invention;

[0048] FIG4( b ) is a schematic diagram of a data set with a satisfying Boolean value obtained by transferring a table according to an embodiment of the present invention;

[0049] Figure 5 A schematic diagram of the number of nodes in the topology of the Topology Zoo data set and the number of corresponding three types of protocols in an embodiment of the present invention;

[0050] Figure 6 It is a schematic diagram of the overall accuracy of the verifier of the embodiment of the present invention on the Topology Zoo dataset and the accuracy on the corresponding three types of specifications;

[0051] Figure 7 A schematic diagram of the reasoning efficiency of CPU and GPU on the Topology Zoo dataset according to an embodiment of the present invention;

[0052] Figure 8 1 is a diagram showing the internal structure of a computer device according to an embodiment of the present invention. DETAILED DESCRIPTION

[0053] The present invention will be described in further detail below with reference to the accompanying drawings and embodiments.

[0054] The embodiment of the present invention provides a control plane verification method for a distributed routing protocol, such as Figure 1 As shown, the method includes:

[0055] Step 101: Obtain the network topology, configuration and protocol of the network to be verified;

[0056] Step 102: using a graph builder to convert the network topology, configuration and protocol into a series of facts in a preset data query language format; the facts are abstract representations of the network topology, configuration and protocol;

[0057] Step 103: construct a control plane verification model based on neural algorithm reasoning; the control plane verification model includes fact base embedding, encoder, processor and decoder;

[0058] Step 104: input the facts into the control plane verification model, so that the fact base embedding in the control plane verification model integrates the facts into a fact graph, and the encoder in the control plane verification model encodes the fact graph into a latent space representation; the processor in the control plane verification model improves the latent space representation using an inductive representation learning mechanism; the decoder in the control plane verification model outputs a Boolean value of satisfaction of the prediction specification based on the improved latent space representation;

[0059] Step 105: Determine a control plane verification result based on the Boolean value of the satisfaction of the prediction specification.

[0060] Distributed control plane routing protocols of networks, such as BGP and OSPF, are inherently complex and error-prone, which requires rigorous verification to ensure that the configuration complies with the specification. Traditional configuration verification methods mainly rely on formal verification techniques, which model the intricate relationship between network configuration and its forwarding behavior under some assumptions about the network environment. However, these methods usually require a lot of manual work to develop and maintain. This embodiment provides a new verification framework based on neural algorithm reasoning (NAR), named GraphSAGE, which is designed to verify distributed routing protocol configurations. The method of this embodiment can directly and continuously learn how to verify from the perfect mapping of configuration to specification satisfaction, thereby capturing the underlying knowledge of distributed control plane protocols and their verification process. With such a learning-based verifier, comprehensive end-to-end verification can be achieved without having to undertake the heavy formal modeling tasks usually associated with distributed routing protocols. In addition, the inductive learning ability of GraphSAGE enables the verifier to learn how to integrate local node attribute information and generate embedded representations for previously unseen nodes. Evaluations on the Topology Zoo dataset and BGP&OSPF protocols show that the NAR-based learning verifier of this embodiment achieves high accuracy and efficiency. GraphSAGE is twice as fast as GraphGAT, which was originally developed for network configuration generation, while being comparable in accuracy.

[0061] The following is an introduction to the research ideas of this embodiment.

[0062] Existing verification methods face challenges in terms of generalization (when adapting to various protocols) or scalability (when applied to larger networks). These obstacles stem from the complexity involved in modeling the network and its environment. In addition, once the modeling process is completed, the model developed under the assumption of a specific network environment reaches a fixed level of verification accuracy, which may not be 100%. In order to improve the verification performance, model-based methods require a lot of time and manual effort to modify the model because they lack the ability to be further optimized.

[0063] Network configuration synthesis generation is the inverse problem of configuration verification. Its goal is to automatically generate configurations synthetically given the specifications of the network environment (including topology and protocol), avoiding misconfigurations caused by manual configuration. Traditional network configuration synthesis generators also face generalization limitations or scalability limitations. These systems are usually customized for specific network protocols or have difficulty adapting to larger networks. The root cause of these obstacles is that complex modeling methods are required to handle the complex relationship between specifications and configurations, including formal modeling or automata theory. Recent research in the field of network configuration synthesis generation has shown that neural algorithmic reasoning (NAR) and graph neural networks (GNNs) have the potential to overcome the limitations of generalization and scalability by effectively learning abstractions of network topology and protocol inverses. The core idea behind these works is that the intrinsic computations performed by routing protocols can be formalized as message passing propagation processes, similar to the Bellman-Ford (BF) algorithm. This BF algorithm can be imitated using NAR.

[0064] Both network verification and synthetic generation are tasks that focus on configurations and specifications in the context of network topology and enabled protocols. The network verification process involves inferring whether the specifications are satisfied from a given configuration through an abstract model of the underlying topology and protocols. In contrast, network synthetic generation starts from satisfying the specifications and seeks to infer the corresponding configuration by abstractly modeling the inverse process of topology and protocols. Network verification and synthetic generation share common components, in particular, network topology and enabled protocols. Based on the above findings, this embodiment proposes a learning-based data analysis verification framework similar to learning-based synthetic generation. Therefore, it uses NAR and GNN to effectively break the limitations faced by traditional verifiers and obtains continuous optimization capabilities.

[0065] This example first formulates the general configuration verification problem and introduces an additional evaluation metric, verification accuracy. The distinction between specification consistency and verification accuracy can isolate errors caused by configuration and verifier, respectively. Therefore, verification accuracy is used as a metric to measure the effectiveness of the verifier in verifying perfect configurations and specifications. Inspired by the progress in the field of network synthesis generation, this example proposes a novel verification framework that integrates the advantages of GNN and NAR to model the complex relationship between configuration and specification in topological and enabled protocol environments. To further enhance the generalization and scalability of the learning-based, data-centric verifier of this example, this example introduces the GraphSAGE verifier, a variant of SageConv that uses its inductive ability to adapt to unseen topologies and their configurations and specifications. Finally, this example conducts comprehensive experiments on datasets generated by Topology Zoo and BGP&OSPF protocols to evaluate the accuracy and efficiency of the learning-based verifier. To demonstrate the effectiveness of GraphSAGE, this example adapts existing learning-based models originally designed for network synthesis generation tasks to the context of network verification and compares their verification performance. Experimental results demonstrate the capability of the learning-based framework in addressing verification challenges associated with distributed control plane protocols. Crucially, although the evaluation was conducted only on BGP & OSPF for three types of protocols, the approach can be easily extended to other routing protocols and protocols.

[0066] Below, this embodiment will be introduced in detail from the following aspects (verification problem and introduction of related background, neural configuration verification framework and model, and experiments to evaluate the effectiveness and efficiency of learning-based verifiers in configuration verification tasks).

[0067] 1. Problem description

[0068] In this section, the present embodiment proposes formulations of exact and learning-based configuration verification problems and discusses relevant routing protocols and verification settings.

[0069] 1.1 Exact and Learning-based Configuration Verification Problems

[0070] Precisely configure validation questions, such as Figure 2 As shown in (a) of FIG. 1 , this embodiment assumes that the given specification and verifier are perfect, that is, there are no errors in the specification (the specifications that are satisfied and not satisfied are all given correctly), and the verifier performs verification correctly (the accuracy of verification is 100%). Under this assumption, for a specific network topology , Enabled network protocols , corresponding configuration , Regulations Requirements And forwarding plane , use specific authentication tools or schemes when performing network authentication , network configuration Relative to the regulations Specification consistency Must be a positive number less than (not all specifications are satisfied) or equal to 1 (all specifications are satisfied). The formula expression is:

[0071]

[0072]

[0073] Given a topology , Configuration and Protocol , this implementation will The forwarding specification of the traffic flow is considered as the input of the verification problem. In this implementation, we consider examples of actual specification requirements, including reachability, traffic isolation, and specific forwarding paths. Each requirement in Input to validator For the regulations The verification result is that if If the requirements are met, , otherwise 0. The specification consistency is ,in Representative Regulations Expected Boolean value of Represents a specific validator pair specification The Boolean value of the validation result. Ideally, when and When matching, the specification consistency is equal to 1, that is, the specification is satisfied by the given configuration. But for many configurations provided by imperfect synthesis generators or human operators, the specification consistency is always less than 1. Regardless of the specification consistency, under the above assumptions, the verification accuracy is 100%. Unsatisfied specifications can be attributed to incorrect configurations.

[0074] However, designing a perfect validator faces scalability and generality challenges. Existing control plane validators focus on how to , and Obtained . Network devices and their configurations are typically simulated or modeled. This process requires a lot of manual effort to develop and maintain. In addition, these tools require users to make assumptions about the network environment and may therefore produce false positives. Consider the case where the validator is not perfect and the specification matches the configuration exactly, such as Figure 2Ideally, when the verifier has no errors, the specification consistency must be 100%. However, when the specification consistency is less than 100%, it is because the imperfect verifier has incorrectly verified some specifications. In order to distinguish and In addition to the protocol consistency, this embodiment defines the verification accuracy The ratio of the number of accurate verifications to the total number of reductions is used to evaluate the accuracy of the verifier. Therefore, this embodiment expresses the accurate configuration verification problem as the following optimization goal:

[0075]

[0076] Represents the set of all possible configuration validation results given by the validator. ,in Representative Regulations The true Boolean value of Represents a specific validator pair specification The Boolean value of the validation result. When the validator performs the validation correctly, . Note that the validation accuracy is at most a positive number of 1 or less. and Very important, this is and The core difference between . The higher, Almost all existing work aims to design a control plane validator so that .

[0077] Learning-based verification problem. In order to achieve generalized and scalable verification with high accuracy and efficiency, this embodiment proposes to relax the optimality criterion. Specifically, this embodiment expands the set of acceptable verifiers to include those that successfully verify a large number of specified requirements, even if they do not achieve optimal verification results. It is important to note that this relaxation is different from simply allowing The solution is different because maximizing validation accuracy does not necessarily reduce the complexity of the problem. Instead, this embodiment advocates finding a near-optimal solution and relies on validation accuracy as a measure of quality.

[0078] Approximate verification formulas relax the difficulty of the problem; however, they also lead to a difficult technical challenge of finding solutions with high practicality (e.g., high accuracy and high efficiency). To address this challenge, Figure 2 As shown in (c) in the example, this embodiment assumes that arrive There is a perfect mapping and a NAR-based learning method is proposed to train such a verification model . Can be obtained from arrive Under this assumption, Specifically, this embodiment learns a arrive A direct mapping of , trying to predict an approximate validation result with high validation accuracy , the following target guidance is obtained:

[0079]

[0080] This can be implemented as a learning-based validation model ,study The model is based only on , and Provide a solution and output the verification result and :

[0081]

[0082] 1.2 Relationship between Distributed Routing Algorithms and Graph Algorithms

[0083] In practice, by The defined routing protocols are implemented as distributed systems where multiple peers collaborate to determine the forwarding state of the network. Theoretical studies on routing algebras reveal that the underlying computations can be conceptualized as message passing graph algorithms. Therefore, many routing protocols can be formalized as propagation processes similar to the BF algorithm. Recent studies have extended this research direction to explore NAR and algorithm alignment. These works show that BF-style algorithms can be effectively simulated when neural networks are equipped with appropriate inductive biases. Based on the insights of NAR, this embodiment proposes to use iterative GNNs to implement a model for network configuration verification, thereby learning through BF-style inductive biases. .

[0084] The method of this embodiment is widely applicable to the control plane protocol configuration verification of various networks; however, this embodiment focuses on two widely used routing protocols: (1) Open Shortest Path First (OSPF), which is a link-state protocol that sets link weights to route traffic along the shortest path to the destination; and (2) Border Gateway Protocol (BGP), which is a path vector protocol mainly used to exchange reachability information between large backbone networks. In BGP, a route destination notifies other networks and routers of its availability by propagating BGP route advertisements. The receivers of these advertisements can choose to propagate them to other peers, redistribute them internally, or modify them according to a predefined set of decision rules. Initially, the receiver processes the incoming advertisements using ingress filters. Subsequently, the best route is determined based on the local BGP policy. The selected best route advertisement is then processed by egress filters before being passed to other peers. BGP advertisements are accompanied by various attributes, including local preference, AS path length, advertisement type, multi-exit discriminator (MED), interior gateway protocol (IGP) to egress cost, and BGP peer ID. These attributes play a key role in determining the best path among multiple routes. like Figure 3 As shown, the main decision framework for selecting the best BGP advertisement follows specific rules for the above properties.

[0085] BGP and OSPF are closely related; for example, BGP incorporates OSPF costs for internal destinations in its routing decisions. Therefore, an effective BGP & OSPF verification tool must implement cross-protocol reasoning to ensure that the two protocols can work seamlessly together. It is critical to jointly verify the BGP and OSPF protocol configurations to achieve the desired forwarding behavior within the network.

[0086] 1.3 Verify the settings

[0087] For verification purposes, this example defines the configuration set as follows: For OSPF, the main configuration includes link weights, while for BGP, this example focuses specifically on BGP's import policy. This approach emphasizes the parameters in the BGP advertisement that are relevant when entering the network. Based on previous research, this configuration setting is both practical and applicable to most real-world networks.

[0088] A simple example network, including physical topology, BGP and OSPF, and corresponding configuration and peering sessions. The demonstration network consists of network nodes and , Route Reflector , Gateway Router , External peers and internal peers composition. Regarding configuration, different peer nodes can establish various sessions, including iBGP, eBGP, and OSPF sessions, each of which can support different configurations. The impact of different protocols on these sessions varies depending on the specified configuration. For OSPF, the configuration corresponds to the link weight assigned to the connection between OSPF peers. In the context of BGP, this embodiment defines BGP route advertisements for external peers, whose structure is <Destination, LocalPref, ASPathLen, OriginalType, MED, IsEbgpLearned, SpeakerID, NextHop>. Based on these BGP route advertisements, the network can select the optimal BGP route to build its forwarding table, following the decision-making process established during the information propagation process. The goal of network verification is to evaluate forwarding-related specifications such as reachability, traffic isolation, and forwarding behavior, which are based on topology, protocols, and corresponding configurations. For example, a verification scenario involves determining the router Can it pass through its adjacent router? Successfully forwarded traffic to the destination network .

[0089] Inspired by the observation that routing protocols such as OSPF and BGP can be expressed as message passing algorithms, this embodiment relies heavily on GNN and NAR when designing the validator model, as described below.

[0090] 2. Neural Configuration Verification Model

[0091] 2.1 Architecture Overview

[0092] The focus of network verification is to evaluate whether the network can accurately forward traffic according to the specified requirements. For the learning-based configuration verification of this embodiment, this embodiment adopts a graph neural network (GNN) model. The input of the model includes the network topology, the masking satisfaction specification, and the corresponding configuration. Following the NAR paradigm, this embodiment first encodes the verifier input into a latent space representation. Then, this embodiment uses an iterative processor network that implements an inductive representation learning mechanism to improve this encoding. Finally, a decoder network predicts the Boolean value of the satisfaction of the specification, thereby realizing the verification of the configuration and specification. To ensure that it can be extended to a variety of network protocols, the model is designed to be universal to the input format and adopts the Fact Base intermediate representation based on the Datalog class.

[0093] 2.2 Fact Base Representation and Graph Construction Process

[0094] Inspired by the design concept of Fact Base-based graphs in NAR synthesis generation and the principles of knowledge graph construction, this embodiment adopts a protocol-independent Fact Base graph builder. This builder effectively converts network topology, configuration, and protocol into a series of Datalog-like Fact Bases. Subsequently, these Fact Bases are integrated into a comprehensive Fact Base graph through advanced graph embedding technology. This subsection details the overview of the graph construction process.

[0095] 1) Fact Base indicates

[0096] In order to convert topology, configuration and specification into graph, we first need to build a fact base , which contains a series of facts similar to Datalog These Fact Bases abstractly represent the configuration, topology, and protocol of the network. The satisfaction of each Fact Base in the current network state is represented by a Boolean value Decision. It is particularly important to note that in the context of network configuration verification, the Boolean value of the specification Fact Base library is particularly important. The Fact Base library consists of the following parts.

[0097] Topology: In network topology, nodes are divided into different roles, including routers, external BGP peers, route reflectors, and network prefixes. These roles are represented by , , and express.

[0098] Configuration: For OSPF protocol, source node and destination node The link weight between In Fact Base it is represented as In the context of the BGP protocol, different BGP sessions are designated as , and , to characterize different types of BGP relationships within and across ASs. Specifically, Indicates routers in the same AS and Internal BGP sessions between Indicates routers belonging to different ASs and External BGP sessions between. FactBase Used to encapsulate BGP route attributes, where Represents the source entity , Indicates the network prefix. Integer , , , and Together, they define various attributes of BGP routes, including local preference, AS path length, origin type (IGP, EGP, or incomplete), multi-exit discriminator (MED) value, and community tags. All of these attributes can be found in the network configuration.

[0099] Regulations: Indicates the router Through its neighbor router Forward traffic to the target network . Indicates that when the destination is a network When Flow to router . Specified from the router To destination Through its neighbors traffic, and from the router To the target network pass The traffic is isolated. In other words, and Only one of them is accurate at any time. For the network configuration verification problem, this embodiment only focuses on the Boolean value of the specification satisfaction. .

[0100] Therefore, this embodiment can frame the network configuration verification task as a completion problem, which is similar to the specification satisfaction comprehensive generation problem. The network topology, configuration, and specification are encapsulated in a single Fact Base library. In order to predict the unknown Boolean value related to the specification to be verified, this embodiment introduces an unknown symbol To represent Boolean values Following this input format, the verification task involves using the model of this embodiment to predict the unknown satisfaction value in a given fact base, expressed as .

[0101] 2) Graph construction process

[0102] In order to convert the Fact Base library into a graph with node features, this embodiment applies a structured embedding scheme. This embodiment embeds topology, protocol, and configuration into a unified graph structure. This approach places network routers, related protocols, and configuration elements in close locations, simplifying the verification process. In the framework of this embodiment, Fact Base and constants are represented as different nodes. The relationship between Fact Base and constants is encoded by node adjacency, which is a neighborhood function. Defined. Use multiple neighborhoods, corresponding to various types of edges, to represent the parameter positions of constants in Fact Base. In order to solve the unknown Boolean value problem of specification satisfaction, this embodiment uses a learned embedding To replace the corresponding embedding. In general, the embedding function Depends on a set of configuration parameters, including Used for For each Fact Base type in For Boolean values, For Fact Base type Each integer parameter of , and To represent the unknown degree of satisfaction of the specification. Represents the dimension of the latent space. Represents the number of supported integer values.

[0103] 2.3GraphSAGE Validator

[0104] The verification model in this example uses an encoding-processing-decoding architecture inspired by neural algorithm reasoning. It uses four main components to generate output distributions for unknown Boolean values ​​in the specification: Fact Base library embedding , Encoder ,processor and decoder .

[0105] In order to naturally generalize to unseen nodes, this example introduces a general inductive framework GraphSAGE, which is a variant of SageConv. GraphSAGE uses local node feature information to efficiently generate node embeddings for previously unseen data. SageConv's inductive approach enables embedding generation to adapt to unseen nodes, leveraging local node attribute information, which is different from conductive embeddings that rely on static graphs. Representation The recursive relation is defined as:

[0106]

[0107] Finally, use the verification result decoder To be a convention The unknown Boolean value of the output distribution , corresponding to the node To do this, the validation model only needs to provide a decoder network: , to decode the Boolean value of the reduced Fact Base. The decoder network is implemented as a simple multi-layer perceptron model.

[0108] 2.4 Training Dataset and Training Process

[0109] This embodiment constructs the learning-based verification model as a supervised learning problem. Training the verifier of this embodiment requires building a diverse dataset that contains various network topologies, configurations, and forwarding protocols, all of which require encoding in an appropriate format. Crucially, this embodiment also needs to provide a Boolean value indicating the satisfaction of the protocol as a supervision signal for the verifier. Given the scarcity of real-world data, this embodiment uses a generation process to obtain this training dataset. This process starts with configuring OSPF and BGP parameters in a selected network topology, and then simulates the OSPF and BGP protocols to calculate the resulting forwarding plane. The design of the simulator is guided by previous research. For OSPF, the simulator implements the shortest path calculation to determine the forwarding plane, while for BGP, it performs the full BGP decision process, except for the MED attribute. In addition, the simulator also adapts to eBGP and iBGP configurations including those using route reflection technology. From this simulation framework, this embodiment extracts forwarding protocols to evaluate the requirements of random subsets, specifically forwarding, reachability, and traffic isolation, and classifies them as satisfied or unsatisfied based on the resulting forwarding plane.

[0110] For example, as shown in FIG4(a), the present embodiment can generate a forwarding table for a router in the example network. Through this forwarding table, the present embodiment can obtain a specification with a realistic satisfiability Boolean value, as shown in FIG4(b). This value can be used as a supervision signal for the verifier.

[0111] During the training process, this embodiment masks the Boolean values ​​of the protocol satisfaction in the data set as unknown parameters. As a supervisory signal, this embodiment uses these masked values ​​as the true situation and applies a negative log-likelihood loss to the output distribution of the corresponding protocol satisfaction decoder, as shown in the following equation:

[0112]

[0113] Here, and The regulations are Synthetically generated Boolean values ​​and satisfaction values ​​of the specification The possible value set of . is a binary indicator function, Representation parameters The actual value is , otherwise 0. A Boolean value indicating the compliance of the validator output specification The value of The goal is to minimize the loss function and guide the verifier to improve the accuracy of synthetically generated satisfaction values.

[0114] 3. Experimental Evaluation

[0115] 3.1 Experimental Setup

[0116] Dataset settings. For the test dataset, this example uses the Topology Zoo dataset, which contains 243 real-world network topologies, excluding 19 topologies with less than 8 nodes. For each topology, this example generates a network that contains Route reflectors, 4 networks, and 2, 3, or 7 gateways, together with node-reflectors, are used. This embodiment generates satisfied and unsatisfied specifications from the generated forwarding plane to evaluate the effectiveness of the learned verifier.

[0117] like Figure 5 As shown, for most topologies in Topology Zoo, and The number of protocols exceeds 1000, and Conventions are usually less than 1000. To accommodate the limitations of the experimental platform of this embodiment, if the total number of conventions of a given type exceeds 1000, this embodiment samples 3×1000 conventions from the synthetically generated data set; otherwise, this embodiment uses the actual number of conventions.

[0118] According to the data sampling method described in Section 2.4, this embodiment randomly samples and constructs 10,240 instances as training data sets, which contain all elements of network topology, OSPF and BGP configuration, and forwarding protocols. The training data sets are based on randomly generated topologies that contain 16 to 24 routers, 4 to 8 networks, 3 gateways, and 2 route reflectors. The layout of these topologies is generated using triangulation of uniformly sampled points in two-dimensional space. In addition, this embodiment establishes the complexity of the verification task by randomly sampling 3×100 satisfied and unsatisfied protocols. This approach ensures that the model is exposed to positive and negative examples, allowing it to learn not only why the protocol is satisfied, but also the reasons behind the unsatisfied situations.

[0119] Experimental parameters and test platform. All experiments are conducted on a machine equipped with 8 Intel(R) Xeon(R) Platinum8163 CPUs with a CPU frequency of 2.50 GHz, 32 GB of RAM, and an NVIDIA Tesla V100 GPU with 16 GB of VRAM. When instantiating the verifier, the latent space dimension is set to 128. The validation model consists of three main components: encoder ,processor , and decoder For training, this example uses the Adam optimizer, using a The learning rate The training is terminated once the validation accuracy of the validation model on the validation dataset stops improving, which happens at around 2700 epochs.

[0120] Indicators and comparative experiments. This embodiment evaluates a learning verifier named SAGE from two main perspectives: verification quality and verification efficiency. Verification quality mainly evaluates the accuracy of the synthetically generated protocol satisfaction and the actual forwarding protocol satisfaction. Verification efficiency focuses on the time required for the verification process. For comparative analysis, this embodiment uses existing methods, including: (1) a learning method using GAT and GCN; (2) a learning method combining stacked GCN with Transformer (Trans) architecture; and (3) a simulation method (Simu) based on BGP and OSPF protocols. Although all of the above methods are designed for configuration synthesis generation problems, in order to compare with the proposed method, this embodiment adjusts these methods to achieve verification functions. The reason why this embodiment is not compared with traditional verifiers is that, on the one hand, the data set synthetically generated by this embodiment is not suitable for traditional verifiers; on the other hand, the verification time of existing verifiers exceeds that of this embodiment.

[0121] 3.2 Verification Accuracy

[0122] In order to evaluate the effectiveness of the verification process, this example performs reasoning on different topological scales and corresponding protocols to evaluate the verification accuracy. The results of this evaluation are Figure 6The simulation-based verifier achieved 100% accuracy for all types of protocols as it was able to generate accurate forwarding planes from the provided configuration. In contrast, for learning-based methods, this embodiment observed a slight decrease in verification accuracy as the network size increased. The GAT verifier performed best among the learning-based methods with an average accuracy of 0.9839. The proposed SAGE verifier performed slightly worse with an average accuracy of 0.9774. However, the SAGE verifier outperformed other learning-based methods including GCN (average accuracy of 0.9414) and Trans verifier (average accuracy of 0.9211).

[0123] 3.3 Verification Efficiency

[0124] To evaluate the efficiency of the configuration verifier, this example performs inference tasks on the CPU and GPU. Figure 6 The tasks presented in are consistent with each other to compare the time consumption of different methods. The results of performance indicators are given in Figure 7 . This example observes that verification time increases with increasing network size or a corresponding increase in the number of reductions; however, the learning-based verifier using GraphSAGE is relatively less sensitive to these factors. When performing inference on the CPU, the SAGE verifier performs best in most cases, with an average inference time of 1.1572 seconds. In contrast, the GAT verifier performs significantly slower, with an average time of 14.5736 seconds, even lower than the simulated average time of 10.2442 seconds. When performing inference on the GPU, the SAGE verifier (average 0.0912 seconds) performs slightly slower than the Trans verifier (average 0.0717 seconds), but is still about 2 times faster than the GAT verifier (average 0.1834 seconds).

[0125] 3.4 Validator Performance on the Example Network

[0126] The learned validator was not trained specifically for this example network with four internal routers, as it was not part of the training dataset. Among the evaluated methods, the SAGE validator demonstrated higher validation accuracy while maintaining comparable inference time, highlighting its effectiveness in this context.

[0127] This embodiment introduces a NAR-based learning framework for control plane verification, which leverages GNNs and NARs to improve versatility and scalability. By systematically transforming the relevant topology, specification, and configuration into a single fact base and graph representation, the learning-based verifier is able to learn knowledge directly from the mapping of perfect configuration to specification satisfaction. Through cases synthetically generated from Topology Zoo, this embodiment demonstrates that GraphSAGE takes less time to perform verification tasks than other models designed for network synthesis generation tasks. In addition, when using GraphSAGE, the increase in network size has little impact on verification time. Moreover, the verification accuracy can reach the same level as GraphGAT, which achieves the best accuracy among learning methods designed for network synthesis generation.

[0128] The main contributions of this embodiment can be summarized as follows:

[0129] (1) This example first formalizes the general configuration verification problem. By novelly defining verification accuracy and clearly discussing its fundamental difference from specification consistency, this example finds opportunities to overcome scalability and generality limitations. Inspired by these insights, this example further proposes learning-based verification to establish an optimal mapping from configuration to specification satisfaction.

[0130] (2) This example proposes a novel learning-based verification framework to overcome the inherent scalability and generalization limitations of traditional methods. In addition, this example introduces the GraphSAGE verifier, which enhances scalability and generalization through inductive learning capabilities.

[0131] (3) Comprehensive experiments on the Topology Zoo dataset and BGP&OSPF protocols demonstrate the effectiveness and efficiency of the proposed learning-based verification framework. The GraphSAGE verifier shows superior performance compared to other models adapted to the task of synthetic network generation.

[0132] Other introduction:

[0133] 1Neural Algorithm Reasoning

[0134] NAR refers to a neural network that can perform algorithmic computations. Luca et al. pointed out that routing protocols can often be expressed as BF-style graph algorithms. This type of algorithm has received attention in the field of neural algorithmic reasoning and algorithmic alignment, and studies have shown that neural networks can effectively imitate BF-style algorithms when provided with appropriate inductive biases. Based on this insight, NAR seeks to replace traditional algorithms with neural networks to learn improved algorithmic procedures or adapt existing algorithms for raw data processing. Specifically, NAR trains a graph-based neural model with strong inductive biases to learn to map back from algorithmic reductions to network configurations. Work such as NetRen and INCS follows this framework to obtain the inverse process knowledge of protocol configuration, expressed as Inspired by NAR, this example proposes an iterative GNN learning model for configuration verification, which uses BF-style inductive bias to obtain knowledge.

[0135] 2. Comprehensive Generation of Network Configuration

[0136] For traditional networks, network synthesis generation mainly focuses on the restrictive parameters inherent in traditional routing protocols such as BGP and OSPF. Distributed routing protocols in traditional networks are particularly relevant to this work. Given the inherent complexity of the configuration synthesis generation problem, early work turned to techniques such as SMT solvers and graph-based compilers. In order to address the scalability limitations of SMT-based methods and the generalization issues of non-SMT methods, NetGAT first relaxed the configuration synthesis generation problem, allowing approximate solutions while maintaining high protocol consistency. Building on the foundational work of NetGAT, NetRen and INCS aim to further expand the capabilities of previous methods. The learning-based verifier proposed in this embodiment is closely aligned with the methodology of NetGAT, INCS, and NetRen. Instead of synthetically generating network configuration parameters, this embodiment utilizes graph neural networks (GNNs) and neural algorithm reasoning (NAR) to obtain Boolean values ​​of the protocol. Following this framework, the learning-based model of this embodiment is able to obtain The knowledge required to act as an end-to-end network control plane validator, from Convert to .

[0137] 3. Network Configuration Verification

[0138] Network verification combines formal methods, simulation, and emulation techniques to ensure the correctness of large and complex computer networks. Research in this area has flourished over the past two decades, with increasing interest from academia and industry driving the development of more sophisticated verification tools and algorithms. This includes advances in control plane verification to verify network configurations, and data plane verification to evaluate forwarding state. This embodiment focuses on the scalability and generalization challenges associated with the control plane verification problem. In fact, the proposed learning-based configuration verifier is based on established methodologies as demonstrated in Batfish, Tiramisu, Minesweeper, and Plankton. These methods can be formulated as formulas , where the main goal is to extract forwarding state from the control plane configuration and perform verification on the forwarding state of the data plane. Unlike previous approaches, which involve converting configurations into graphs, encoding them into logical formulas, simulating network behaviors, or applying explicit state model checking, the learning-based verifier innovatively imitates these modeling and representation processes. By leveraging data-driven techniques, this verifier is able to generate an end-to-end configuration verification solution directly from the control plane protocol configuration and obtain approximate verification results. Another promising research area is modular verification. In this area, Kirigami, Timepiece, and LightYear have made significant contributions.

[0139] 4 Network Protocol Mining

[0140] Network specifications are a set of policies enforced by network configurations that define the operational behavior of network systems. These specifications help operators fully understand and manage their network environments. In addition, they are also a prerequisite for network verification, comprehensive generation, and modification. However, one of the biggest challenges facing network operators is how to accurately express specifications. Specification mining aims to automatically obtain high-level specifications from low-level execution of programs. For example, Config2Spec can automatically mine complete network specifications from network configurations and provided error models; NetMiner uses off-the-shelf network simulators to calculate routing and forwarding rules, and then verifies properties using a data plane verifier. In addition, Rela proposes a high-level relational specification language based on relational reasoning, with a special focus on flows and paths that change between different snapshots.

[0141] This example samples 3×100 specifications for each topology during training and generates the specifications that are satisfied and not satisfied from the forwarding plane derived from Topology Zoo. All specifications are represented as a set of facts similar to Datalog. ,in Indicates whether the specification is satisfied, used as a training validator for synthetically generated Boolean values.

[0142] In order to implement the method of an embodiment of the present invention, an embodiment of the present invention also provides a control plane verification method and system for a distributed routing protocol, including: a processor and a memory for storing a computer program that can be run on the processor; wherein the processor executes the steps of the above-mentioned method when running the computer program.

[0143] The above-mentioned system provided in this embodiment belongs to the same concept as the above-mentioned method embodiment. The specific implementation process thereof is detailed in the method embodiment and will not be repeated here.

[0144] In order to implement the method of the embodiment of the present invention, the embodiment of the present invention also provides a computer program product, which includes computer instructions, and the computer instructions are stored in a computer-readable storage medium. The processor of the computer device reads the computer instructions from the computer-readable storage medium, and the processor executes the computer instructions, so that the computer device performs the steps of the above method.

[0145] Based on the hardware implementation of the above program modules, and in order to implement the method of the embodiment of the present invention, the embodiment of the present invention further provides an electronic device (computer device). Specifically, in one embodiment, the computer device may be a terminal, and its internal structure diagram may be as follows: Figure 8 As shown. The computer device includes a processor A01, a network interface A02, a display screen A04, an input device A05 and a memory (not shown in the figure) connected through a system bus. Among them, the processor A01 of the computer device is used to provide computing and control capabilities. The memory of the computer device includes an internal memory A03 and a non-volatile storage medium A06. The non-volatile storage medium A06 stores an operating system B01 and a computer program B02. The internal memory A03 provides an environment for the operation of the operating system B01 and the computer program B02 in the non-volatile storage medium A06. The network interface A02 of the computer device is used to communicate with an external terminal through a network connection. When the computer program is executed by the processor A01, the method of any one of the above embodiments is implemented. The display screen A04 of the computer device can be a liquid crystal display screen or an electronic ink display screen, and the input device A05 of the computer device can be a touch layer covered on the display screen, or a key, trackball or touchpad set on the computer device housing, or an external keyboard, touchpad or mouse, etc.

[0146] Those skilled in the art will understand that Figure 8 The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.

[0147] The device provided by the embodiment of the present invention includes a processor, a memory, and a program stored in the memory and executable on the processor. When the processor executes the program, the method of any one of the above embodiments is implemented.

[0148] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Moreover, the present application may adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program codes.

[0149] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0150] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0151] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0152] In a typical configuration, a computing device includes one or more processors (CPU), input / output interfaces, network interfaces, and memory.

[0153] The memory may include non-permanent memory in a computer-readable medium, random access memory (RAM) and / or non-volatile memory in the form of read-only memory (ROM) or flash RAM. The memory is an example of a computer-readable medium.

[0154] Computer readable media include permanent and non-permanent, removable and non-removable media that can be implemented by any method or technology to store information. Information can be computer readable instructions, data structures, program modules or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technology, compact disk read-only memory (CD-ROM), digital versatile disk (DVD) or other optical storage, magnetic cassettes, magnetic tape disk storage or other magnetic storage devices or any other non-transmission media that can be used to store information that can be accessed by a computing device. As defined herein, computer readable media does not include temporary computer readable media (transitory media), such as modulated data signals and carrier waves.

[0155] It can be understood that the memory of the embodiment of the present invention can be a volatile memory or a non-volatile memory, and can also include both volatile and non-volatile memories. Among them, the non-volatile memory can be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), a magnetic random access memory (FRAM), a flash memory, a magnetic surface memory, an optical disc, or a compact disc read-only memory (CD-ROM); the magnetic surface memory can be a disk memory or a tape memory. The volatile memory can be a random access memory (RAM), which is used as an external cache. By way of example and not limitation, many forms of RAM are available, such as static random access memory (SRAM), synchronous static random access memory (SSRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDRSDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link dynamic random access memory (SLDRAM, SyncLink Dynamic Random Access Memory), and direct RAMbus random access memory (DRRAM, Direct Rambus Random Access Memory).The memories described in the embodiments of the present invention are intended to include, but are not limited to, these and any other suitable types of memories.

[0156] It should also be noted that the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, commodity or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, commodity or device. In the absence of more restrictions, the elements defined by the sentence "comprises a ..." do not exclude the existence of other identical elements in the process, method, commodity or device including the elements.

[0157] The above are only embodiments of the present application and are not intended to limit the present application. For those skilled in the art, the present application may have various changes and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included within the scope of the claims of the present application.

Claims

1. A control plane verification method for a distributed routing protocol, characterized in that: The method comprises: Obtain the network topology, configuration and specifications of the network to be verified; Using a graph builder, the network topology, configuration and specification are converted into a series of facts in a preset data query language format; the facts are abstract representations of the network topology, configuration and specification; Constructing a control plane verification model based on neural algorithm reasoning; the control plane verification model includes fact base embedding, encoder, processor and decoder; The facts are input into the control plane verification model so that the fact base in the control plane verification model is embedded to integrate the facts into a fact graph, and the encoder in the control plane verification model encodes the fact graph into a latent space representation; the processor in the control plane verification model improves the latent space representation using an inductive representation learning mechanism; the decoder in the control plane verification model outputs a Boolean value of satisfaction of the prediction specification based on the improved latent space representation; A control plane validation result is determined based on a Boolean value of the satisfaction of the prediction specification.

2. The control plane verification method for distributed routing protocols according to claim 1, characterized in that: The graph builder is used to convert the network topology into a series of facts in a pre-set data query language format, including: The nodes in the network topology are divided into routers, external BGP peers, route reflectors, and network prefixes according to their roles, and are used in turn. , , and express.

3. The control plane verification method for distributed routing protocols according to claim 1, characterized in that: The graph builder converts the configuration into a series of facts in a pre-set data query language format, including: For the OSPF protocol, the source node and destination node The link weight between use express; For the BGP protocol, routers in the same AS and Internal BGP sessions between Indicates routers belonging to different ASs and External BGP sessions between Indicates; encapsulates the attributes of BGP routes Indicates; among them, Represents the source entity , Indicates the network prefix, integer , , , and Represents various attributes of a BGP route, including local preference, AS path length, origin type, multi-exit discriminator value, and community tags.

4. The control plane verification method for distributed routing protocols according to claim 1, characterized in that: The graph builder is used to convert the specification into a series of facts in a pre-set data query language format, including: router Through its neighbor router Forward traffic to the target network use express; When the destination is a network When Flow to router use express; From the router To destination Through its neighbors traffic, and from the router To the target network pass The traffic is isolated, using express.

5. The control plane verification method for distributed routing protocols according to claim 1, characterized in that: The control plane verification model is expressed as: in, is an embedding function in fact base embedding, which is used to generate node embedding for unseen nodes using local node feature information in the fact graph; Depends on a set of configuration parameters, including Used to represent fact base For each fact type in Used to represent Boolean values. Used to represent fact types Each integer parameter of , and Used to indicate unknown specification satisfaction, represents the dimension of the latent space, Represents the number of supported integer values; and For each node in the fact graph The intermediate node of The encoder is a graph neural network consisting of a 2-layer SageConv module; It is a processor, modeled as an iterative process consisting of a 6-layer SageConv module; Decoder for the protocol The unknown Boolean value of the output distribution .

6. A control plane verification system for distributed routing protocols, characterized in that: include: A processor and a memory for storing a computer program that can be run on the processor; wherein the processor, when used to run the computer program, performs the following steps: Obtain the network topology, configuration and specifications of the network to be verified; Using a graph builder, the network topology, configuration and specification are converted into a series of facts in a preset data query language format; the facts are abstract representations of the network topology, configuration and specification; Constructing a control plane verification model based on neural algorithm reasoning; the control plane verification model includes fact base embedding, encoder, processor and decoder; The facts are input into the control plane verification model so that the fact base in the control plane verification model is embedded to integrate the facts into a fact graph, and the encoder in the control plane verification model encodes the fact graph into a latent space representation; the processor in the control plane verification model improves the latent space representation using an inductive representation learning mechanism; the decoder in the control plane verification model outputs a Boolean value of satisfaction of the prediction specification based on the improved latent space representation; A control plane validation result is determined based on a Boolean value of the satisfaction of the prediction specification.

7. The control plane verification system for distributed routing protocols according to claim 6, characterized in that: The graph builder is used to convert the network topology into a series of facts in a pre-set data query language format, including: The nodes in the network topology are divided into routers, external BGP peers, route reflectors, and network prefixes according to their roles, and are used in turn. , , and express.

8. The control plane verification system for distributed routing protocols according to claim 6, characterized in that: The graph builder converts the configuration into a series of facts in a pre-set data query language format, including: For the OSPF protocol, the source node and destination node The link weight between use express; For the BGP protocol, routers in the same AS and Internal BGP sessions between Indicates routers belonging to different ASs and External BGP sessions between Indicates; encapsulates the attributes of BGP routes Indicates; among them, Represents the source entity , Indicates the network prefix, integer , , , and Represents various attributes of a BGP route, including local preference, AS path length, origin type, multi-exit discriminator value, and community tags.

9. The control plane verification system for distributed routing protocols according to claim 6, characterized in that: The graph builder is used to convert the specification into a series of facts in a pre-set data query language format, including: router Through its neighbor router Forward traffic to the target network use express; When the destination is a network When Flow to router use express; From the router To destination Through its neighbors traffic, and from the router To the target network pass The traffic is isolated, using express.

10. The control plane verification system for distributed routing protocols according to claim 6, characterized in that: The control plane verification model is expressed as: in, is an embedding function in fact base embedding, which is used to generate node embedding for unseen nodes using local node feature information in the fact graph; Depends on a set of configuration parameters, including Used to represent fact base For each fact type in Used to represent Boolean values. Used to represent fact types Each integer parameter of , and Used to indicate unknown specification satisfaction, represents the dimension of the latent space, Represents the number of supported integer values; and For each node in the fact graph The intermediate node of The encoder is a graph neural network consisting of a 2-layer SageConv module; It is a processor, modeled as an iterative process consisting of a 6-layer SageConv module; Decoder for the protocol The unknown Boolean value of the output distribution .

Citation Information

Patent Citations

  • Control plane strategy verification method based on GNN fault model learning

    CN116346641A

  • Computer system security model verification method

    CN118536124A