N-plane GaN radio frequency devices based on multi-threshold coupling technology and their fabrication methods

Abstract

This invention relates to an N-plane GaN radio frequency device based on multi-threshold coupling technology and its fabrication method. The device includes, from bottom to top, a substrate layer, a buffer layer, a barrier layer, a channel layer, and a multi-threshold coupling gate structure, wherein the channel layer is made of N-plane GaN; a two-dimensional electron gas is formed at the interface between the channel layer and the barrier layer; the multi-threshold coupling gate structure is used to apply a threshold voltage that gradually varies along the gate width direction to the two-dimensional electron gas. By applying a threshold voltage that gradually varies along the gate width direction to the two-dimensional electron gas through the multi-threshold coupling gate structure, the device can gradually turn on along the gate width direction as the gate voltage gradually increases from negative to positive, thereby improving the transconductance flatness of the device. The gate length of the device provided in this embodiment is not limited by transconductance flatness, and the operating frequency can be increased by significantly shortening the gate length, resulting in a higher operating frequency, better linearity, and meeting the requirements of future 6GHz terahertz band communication.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor device technology, specifically relating to an N-plane GaN radio frequency device based on multi-threshold coupling technology and its fabrication method. Background Technology

[0002] Currently, 5G technology has achieved large-scale commercialization. However, given its limited development potential, new requirements have been put forward for sixth-generation mobile communication (6G). 6G technology will move into the higher terahertz frequency band, achieving significant improvements in peak data rates, mobility, and spectral efficiency. It will also integrate satellite communication into 6G mobile communication, fully meeting the needs of next-generation information and communication services.

[0003] With the development of 6G technology, modern wireless systems are increasingly demanding higher data transmission rates and spectral efficiency, making the linearity of power amplifiers an essential metric. This requires key components of 6G power amplifiers (GaN-based RF devices) to balance high frequency and high linearity.

[0004] Currently, research on GaN-based radio frequency devices mainly focuses on Ga-plane GaN. However, in the process of continuously shrinking the gate length to increase the operating frequency of Ga-plane devices, their transconductance flatness deteriorates and the device linearity worsens. Summary of the Invention

[0005] To address the aforementioned problems in the prior art, this invention provides an N-plane GaN radio frequency device based on multi-threshold coupling technology and its fabrication method. The technical problem to be solved by this invention is achieved through the following technical solution:

[0006] A first aspect of the present invention provides an N-plane GaN radio frequency device based on multi-threshold coupling technology, comprising: a substrate layer, a buffer layer, a barrier layer, a channel layer, and a multi-threshold coupling gate structure arranged sequentially from bottom to top, wherein...

[0007] The channel layer is made of N-plane GaN;

[0008] A two-dimensional electron gas is formed at the interface between the channel layer and the barrier layer;

[0009] The multi-threshold coupled gate structure is used to apply a threshold voltage that gradually varies along the gate width direction to the two-dimensional electron gas.

[0010] In one feasible approach, it also includes: source, drain, and isolation structure;

[0011] The source is located on the upper surface of the channel layer and on one side of the multi-threshold coupled gate structure along the gate length direction;

[0012] The drain is located on the upper surface of the channel layer and on the other side of the multi-threshold coupled gate structure along the gate length direction;

[0013] The isolation structure is located on one side of the source electrode along the gate length direction and on the other side of the drain electrode along the gate length direction, and extends from the upper surface of the channel layer into the interior of the buffer layer.

[0014] In one implementable manner, the multi-threshold coupled gate structure includes: a first gate and a plurality of first gate trenches spaced apart along the gate width direction, wherein,

[0015] Along the width direction of the grid, the length of several first grid slots increases sequentially, and the interval between every two adjacent first grid slots gradually decreases;

[0016] Each of the first gate slots extends from the upper surface of the channel layer into the interior of the barrier layer;

[0017] The first gate fills the plurality of first gate trenches and covers the gaps between the plurality of first gate trenches.

[0018] In one feasible manner, the length of the first gate gradually increases along the gate width direction.

[0019] In one implementable manner, the multi-threshold coupled gate structure includes: a plurality of gate metals and a plurality of second gate slots equally spaced along the gate width direction, wherein,

[0020] Each of the second gate slots extends from the upper surface of the channel layer into the interior of the barrier layer, and a boss is formed between every two adjacent second gate slots;

[0021] Each of the plurality of gate metals encloses one of the bosses, and every two adjacent gate metals are in contact with each other.

[0022] Along the gate width direction, the work function of each of the plurality of gate metals gradually increases.

[0023] In one feasible implementation, the plurality of gate metals includes: a first gate metal, a second gate metal, and a third gate metal arranged sequentially along the gate width direction;

[0024] The first gate metal comprises: a Ti / Au multilayer metal;

[0025] The second gate metal includes: Cr / Au multilayer metal or W / Cr multilayer metal;

[0026] The third gate metal includes: Ni / Au stacked metal.

[0027] In one implementable manner, the multi-threshold coupled gate structure includes: a second gate and a plurality of gate dielectrics, wherein,

[0028] The plurality of gate dielectrics are distributed along the gate width direction on the upper surface of the channel layer, and each pair of adjacent gate dielectrics are in contact with each other.

[0029] Along the gate width direction, the dielectric constant of each of the plurality of gate dielectrics gradually increases;

[0030] The second gate covers the upper surface of the plurality of gate dielectrics.

[0031] In one feasible implementation, the plurality of gate media includes: a first gate medium, a second gate medium, and a third gate medium arranged sequentially along the gate width direction;

[0032] The material of the first gate dielectric includes: SiO2;

[0033] The material of the second gate dielectric includes: Al2O3 or HfSiO4;

[0034] The material of the third gate dielectric includes one of HfO2, ZrO2, Ta2O5 and La2O3.

[0035] In one feasible approach, the substrate layer is made of sapphire or SiC.

[0036] The material of the buffer layer includes: GaN;

[0037] The material of the barrier layer includes one or more of AlGaN, AlN, and InAlN.

[0038] The second aspect of the present invention provides a method for fabricating an N-plane GaN radio frequency device based on multi-threshold coupling technology, used in the N-plane GaN radio frequency device based on multi-threshold coupling technology provided in the first aspect of the present invention, comprising the following steps:

[0039] S1: A buffer layer, a barrier layer, and a channel layer are grown sequentially from bottom to top on the upper surface of the substrate; the channel layer is made of N-plane GaN; a two-dimensional electron gas is formed at the interface between the channel layer and the barrier layer;

[0040] S2: A multi-threshold coupled gate structure is prepared on the upper surface of the channel layer; the multi-threshold coupled gate structure is used to apply a threshold voltage that gradually varies along the gate width direction to the two-dimensional electron gas.

[0041] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0042] The N-plane GaN RF device based on multi-threshold coupling technology provided by this invention applies a threshold voltage that gradually varies along the gate width to a two-dimensional electron gas through a multi-threshold coupled gate structure. This allows the device to gradually turn on along the gate width as the gate voltage gradually increases from negative to positive, thereby improving the transconductance flatness of the device. The gate length of the device provided in this embodiment is not limited by transconductance flatness, and the operating frequency can be increased by significantly shortening the gate length. This results in a higher operating frequency, better linearity, and meets the communication requirements of the future 6GHz terahertz band. Attached Figure Description

[0043] Figure 1 This is a schematic diagram of the structure of an N-plane GaN radio frequency device based on multi-threshold coupling technology provided in an embodiment of the present invention;

[0044] Figures 2a-2c This is a schematic diagram of a multi-threshold coupling gate structure provided in an embodiment of the present invention;

[0045] Figures 3a-3b This is a schematic diagram of the structure of the first grid groove provided in an embodiment of the present invention;

[0046] Figures 4a-4c This is a schematic diagram of another multi-threshold coupling gate structure provided in an embodiment of the present invention;

[0047] Figures 5a-5b This is a schematic diagram of the structure of the second grid groove provided in an embodiment of the present invention;

[0048] Figures 6a-6c This is a schematic diagram of another multi-threshold coupled gate structure provided in an embodiment of the present invention.

[0049] Figure label:

[0050] 1: Substrate layer; 2: Buffer layer; 3: Barrier layer; 4: Channel layer; 5: Source; 6: Drain; 7: Isolation structure; 8: Multi-threshold coupled gate structure; 811: First gate trench; 8111: First gradient sub-gate trench; 8112: Second gradient sub-gate trench; 8113: Third gradient sub-gate trench; 8114: Fourth gradient sub-gate trench; 812: First gate; 821: Second gate trench; 8211: First equidistant sub-gate trench; 8212: Second equidistant sub-gate trench; 8213: Third equidistant sub-gate trench; 8214: Fourth equidistant sub-gate trench; 822: Gate metal; 8221: First gate metal; 8222: Second gate metal; 8223: Third gate metal; 831: Gate dielectric; 8311: First gate dielectric; 8312: Second gate dielectric; 8313: Third gate dielectric; 832: Second gate. Detailed Implementation

[0051] The present invention will be further described in detail below with reference to specific embodiments, but the implementation of the present invention is not limited thereto.

[0052] Example 1

[0053] Please see Figure 1 , Figure 1 This is a schematic diagram of the structure of an N-plane GaN radio frequency device based on multi-threshold coupling technology provided in an embodiment of the present invention.

[0054] This embodiment provides an N-plane GaN RF device based on multi-threshold coupling technology, comprising: a substrate layer 1, a buffer layer 2, a barrier layer 3, a channel layer 4, a source 5, a drain 6, an isolation structure 7, and a multi-threshold coupling gate structure 8. The substrate layer 1, buffer layer 2, barrier layer 3, channel layer 4, and multi-threshold coupling gate structure 8 are arranged sequentially from bottom to top. The source 5 is located on the upper surface of the channel layer 4 and on one side of the multi-threshold coupling gate structure 8 along the gate length direction. The drain 6 is located on the upper surface of the channel layer 4 and on the other side of the multi-threshold coupling gate structure 8 along the gate length direction. The isolation structure 7 is located on one side of the source 5 along the gate length direction and on the other side of the drain 6 along the gate length direction, extending from the upper surface of the channel layer 4 into the interior of the buffer layer 2. The channel layer 4 is made of N-plane GaN. A two-dimensional electron gas (2DEG) is formed at the interface between the channel layer 4 and the barrier layer 3. The multi-threshold coupling gate structure 8 is used to apply a threshold voltage that gradually varies along the gate width direction to the two-dimensional electron gas.

[0055] In this embodiment, the multi-threshold coupled gate structure 8 is used to apply a threshold voltage that gradually increases or decreases along the gate width direction to the two-dimensional electron gas. The substrate layer 1 is made of sapphire or SiC. The buffer layer 2 is made of N-plane GaN. The barrier layer 3 is made of one or more of AlGaN, AlN, and InAlN. Further, the buffer layer 2 is Fe or C-doped GaN. The channel layer 4 is unintentionally doped N-plane GaN. The gate width direction is the direction perpendicular to the line connecting the source 5 and the drain 6 in the horizontal plane, and the gate length direction is the direction connecting the source 5 and the drain 6. The multi-threshold coupled gate structure 8 is located in the middle of the channel layer 4, and the source 5 and drain 6 are located on the left and right sides of the multi-threshold coupled gate structure 8, respectively, with a gap between the source 5 and drain 6 and the multi-threshold coupled gate structure 8. The materials of the source 5 and drain 6 are both Ti / Al / Ni / Au (20 / 100 / 10 / 50nm) stacked ohmic metals.

[0056] Specifically, the barrier layer 3 and the channel layer 4 form an N-plane GaN-based heterojunction. The two-dimensional electron gas is located at the interface between the channel layer 4 and the barrier layer 3. The N-plane GaN HEMT device has a natural back barrier, which can enhance the suppression of short-channel effects. Furthermore, by adjusting the thickness of the channel layer 4, the distance between the multi-threshold coupled gate structure 8 and the 2DEG channel can be adjusted. Without affecting the barrier, the distance between the multi-threshold coupled gate structure 8 and the two-dimensional electron gas channel is reduced by decreasing the thickness of the channel layer 4, thereby enhancing the control capability of the multi-threshold coupled gate structure 8 and suppressing short-channel effects. In addition, since the multi-threshold coupled gate structure 8 applies a threshold voltage that gradually changes along the gate width direction to the two-dimensional electron gas, when a gate voltage is applied to the device, as the gate voltage gradually increases from negative to positive, the device gradually turns on along the direction of increasing threshold voltage, thereby improving the transconductance flatness of the device. The device provided in this embodiment is not constrained by transconductance flatness, and the operating frequency can be increased by significantly shortening the gate length. The device provided in this embodiment has a higher operating frequency and better linearity, meeting the communication requirements of the future 6G terahertz band.

[0057] This embodiment also provides a method for fabricating an N-plane GaN RF device based on multi-threshold coupling technology, used to fabricate the N-plane GaN RF device based on multi-threshold coupling technology provided in this embodiment. The fabrication method includes the following steps:

[0058] S1: A buffer layer 2, a barrier layer 3, and a channel layer 4 are grown sequentially from bottom to top on the upper surface of the substrate layer 1. The channel layer 4 is made of N-plane GaN, and a two-dimensional electron gas is formed at the interface between the channel layer 4 and the barrier layer 3.

[0059] Specifically, staggered sapphire or C-SiC material is used as substrate layer 1, and a buffer layer 2, a barrier layer 3, and a channel layer 4 are grown on substrate layer 1 using metal-organic chemical vapor deposition (MOCVD). The barrier layer 3 and the channel layer 4 form a heterojunction.

[0060] In this embodiment, the step between S1 and S2 further includes:

[0061] A gate region, a source region, and a drain region are defined on the upper surface of the channel layer 4. The gate region is located in the middle of the upper surface of the channel layer 4, while the source and drain regions are located on either side of the gate region on the upper surface of the channel layer 4, with a gap between the source and drain regions and the gate region. Source and drain metals are fabricated at both ends of the upper surface of the channel layer 4 using an electron beam evaporation apparatus. Rapid thermal annealing is then performed in a nitrogen atmosphere at a temperature of 800–900 °C for 20–40 s, resulting in source 5 and drain 6. N-ion implantation is performed on the side of the source and drain regions furthest from the gate region using an ion implantation apparatus. The ion implantation depth is greater than the sum of the thicknesses of the buffer layer 2, barrier layer 3, and channel layer 4, forming an isolation structure 7 to isolate the active region of the device.

[0062] S2: A multi-threshold coupled gate structure 8 is fabricated on the upper surface of the channel layer 4; the multi-threshold coupled gate structure 8 is used to apply a threshold voltage that gradually varies along the gate width direction to the two-dimensional electron gas.

[0063] Specifically, a multi-threshold coupled gate structure 8 is fabricated in the gate region. The threshold coupled gate structure 8 is used to apply a threshold voltage that gradually varies along the gate width direction to the two-dimensional electron gas, so that when the gate voltage is applied to the device, as the gate voltage gradually increases from negative to positive, the device gradually turns on along the gate width direction, thereby improving the transconductance flatness of the device.

[0064] The N-plane GaN RF device based on multi-threshold coupling technology provided in this embodiment applies a threshold voltage that gradually varies along the gate width to the two-dimensional electron gas through a multi-threshold coupled gate structure 8. This allows the device to gradually turn on as the gate voltage gradually increases from negative to positive, along the direction of increasing threshold voltage, thereby improving the transconductance flatness of the device. The gate length of the device provided in this embodiment is not limited by transconductance flatness, and the operating frequency can be increased by significantly shortening the gate length. It exhibits higher operating frequency and better linearity, meeting the communication requirements of the future 6GHz terahertz band.

[0065] Example 2

[0066] Based on Embodiment 1, this embodiment provides an N-plane GaN RF device based on multi-threshold coupling technology, including: substrate layer 1, buffer layer 2, barrier layer 3, channel layer 4, source 5, drain 6, isolation structure 7 and multi-threshold coupling gate structure 8, whose relative positional relationship is the same as that in Embodiment 1, and will not be repeated here.

[0067] Please see Figures 2a-2c and Figures 3a-3b ,in, Figure 2a This is a front view of a multi-threshold coupled gate structure provided in an embodiment of the present invention. Figure 2b This is a top view of a multi-threshold coupled gate structure provided in an embodiment of the present invention. Figure 2cThis invention provides a multi-threshold coupled gate structure along... Figure 2b Cross-sectional view of plane A-A'. Figure 3a This is a top view of the first grid groove provided in an embodiment of the present invention. Figure 3b The first gate groove edge provided in the embodiment of the present invention Figure 3a A cross-sectional view of the B-B' plane. In this embodiment, the multi-threshold coupled gate structure 8 includes: a first gate 812 and a plurality of first gate trenches 811 spaced apart along the gate width direction. The lengths of the plurality of first gate trenches 811 increase sequentially along the gate width direction, and the spacing between any two adjacent first gate trenches 811 gradually decreases, while the length of the first gate 812 gradually increases. Each first gate trench 811 extends from the upper surface of the channel layer 4 into the interior of the barrier layer 3. The first gate 812 fills the plurality of first gate trenches 811 and covers the spacing between the plurality of first gate trenches 811.

[0068] Furthermore, please see Figures 3a-3b The plurality of first grid slots 811 include: a first gradient sub-grid slot 8111, a second gradient sub-grid slot 8112, a third gradient sub-grid slot 8113, and a fourth gradient sub-grid slot 8114, which are sequentially distributed along the grid width direction. The width and depth of the first gradient sub-grid slot 8111, the second gradient sub-grid slot 8112, the third gradient sub-grid slot 8113, and the fourth gradient sub-grid slot 8114 are all the same, and the interval between the first gradient sub-grid slot 8111 and the second gradient sub-grid slot 8112 is d. 11 The spacing between the second gradient sub-gate slot 8112 and the third gradient sub-gate slot 8113 is d. 12 The spacing between the third gradient sub-gate slot 8113 and the fourth gradient sub-gate slot 8114 is d. 13 d 13 Less than d 12 Less than d 11 Furthermore, the lengths of the first gradient sub-gate slot 8111, the second gradient sub-gate slot 8112, the third gradient sub-gate slot 8113, and the fourth gradient sub-gate slot 8114 increase sequentially. For example, as shown... Figure 3a As shown, the top view shapes of the first gradient sub-gate slot 8111, the second gradient sub-gate slot 8112, the third gradient sub-gate slot 8113, and the fourth gradient sub-gate slot 8114 are all isosceles trapezoids. For example... Figure 2a and 2b As shown, the first gate 812 is a T-shaped gate, extending along the gate length direction to the surface of the channel layer 4. The top view of the first gate 812 is an isosceles trapezoid. Along the gate width direction, the length of the first gate 812 increases synchronously with the number of first gate slots 811. In this embodiment, the length is always along the gate length direction, the width is always along the gate width direction, and the depth is in the vertical direction. Specifically, the interval between every two adjacent gate slots is the channel. Since d 13 Less than d12 Less than d 11 Therefore, the channel of the device provided in this embodiment gradually narrows along the gate width direction.

[0069] This embodiment provides a method for fabricating an N-plane GaN radio frequency device based on multi-threshold coupling technology, including:

[0070] Step 1: Buffer layer 2, barrier layer 3, and channel layer 4 are grown sequentially from bottom to top on the upper surface of substrate layer 1. The channel layer 4 is made of N-plane GaN, and a two-dimensional electron gas is formed at the interface between channel layer 4 and barrier layer 3.

[0071] Step 2: Define the gate region, source region, and drain region on the upper surface of channel layer 4. The gate region is located in the middle of the upper surface of channel layer 4, while the source and drain regions are located on either side of the gate region on the upper surface of channel layer 4, with a gap between the source and drain regions and the gate region. Source and drain metals are fabricated at both ends of the upper surface of channel layer 4 using electron beam evaporation. Rapid thermal annealing is then performed in a nitrogen atmosphere at a temperature of 800–900°C for 20–40 seconds, resulting in source 5 and drain 6. N-ion implantation is performed on the side of the source and drain regions furthest from the gate region using ion implantation. The ion implantation depth is greater than the sum of the thicknesses of buffer layer 2, barrier layer 3, and channel layer 4, forming an isolation structure 7 to isolate the active region of the device.

[0072] Step 3: Fabricate a multi-threshold coupled gate structure 8 on the upper surface of the channel layer 4.

[0073] Specifically, electron beam lithography is used to define a nanochannel array pattern with a gradually decreasing length along the gate width direction. A Cl-based etching apparatus is used to etch the arrayed trench structure, with the etching depth located below the heterojunction interface formed by the barrier layer 3 and the channel layer 4, forming a first graded sub-gate trench 8111, a second graded sub-gate trench 8112, a third graded sub-gate trench 8113, and a fourth graded sub-gate trench 8114. Using an electron beam evaporation apparatus, a Cr / Au (25 / 500nm) multilayer metal is evaporated in the gate region, and after lift-off, the first gate 812 is formed.

[0074] Specifically, in areas where the channel is narrower, the two-dimensional electron gas is more easily depleted. In this embodiment, the spacing between every two adjacent first gate slots 811 is gradually reduced along the gate width direction, forming a gradually narrowing channel. Furthermore, the length of several first gate slots 811 is sequentially increased along the gate width direction, resulting in a gradual increase in the length of the first gate 812 along the gate width direction, thus forming different threshold voltages. As the gate voltage gradually increases from negative to positive, the device gradually turns on along the gate width direction (the direction in which the channel gradually narrows), thereby improving the transconductance flatness of the device.

[0075] Example 3

[0076] Based on Embodiment 1, this embodiment provides an N-plane GaN RF device based on multi-threshold coupling technology, including: substrate layer 1, buffer layer 2, barrier layer 3, channel layer 4, source 5, drain 6, isolation structure 7 and multi-threshold coupling gate structure 8, whose relative positional relationship is the same as that in Embodiment 1, and will not be repeated here.

[0077] Please see Figures 4a-4c and Figures 5a-5b ,in, Figure 4a This is a front view of a multi-threshold coupled gate structure provided in an embodiment of the present invention. Figure 4b This is a top view of a multi-threshold coupled gate structure provided in an embodiment of the present invention. Figure 4c This invention provides a multi-threshold coupled gate structure along... Figure 4b Cross-sectional view of the C-C' plane. Figure 5a This is a top view of the second grid groove provided in an embodiment of the present invention. Figure 5b The second gate groove edge provided in the embodiment of the present invention Figure 5a A cross-sectional view of the D-D' plane. In this embodiment, the multi-threshold coupled gate structure 8 includes: a plurality of gate metals 822 and a plurality of second gate slots 821 equally spaced along the gate width direction. Each second gate slot 821 extends from the upper surface of the channel layer 4 into the interior of the barrier layer 3, and a boss is formed between every two adjacent second gate slots 821. Each of the plurality of gate metals 822 encloses a boss, and every two adjacent gate metals 822 are in contact with each other. Along the gate width direction, the work function of each of the plurality of gate metals 822 gradually increases.

[0078] Combination Figure 4b , Figure 4c , Figure 5a and Figure 5bIn this embodiment, the plurality of second gate slots 821 include: a first equidistant sub-gate slot 8211, a second equidistant sub-gate slot 8212, a third equidistant sub-gate slot 8213, and a fourth equidistant sub-gate slot 8214, which are equally spaced along the gate width direction. The plurality of gate metals 822 include: a first gate metal 8221, a second gate metal 8222, and a third gate metal 8223, which are sequentially arranged along the gate width direction. The first equidistant sub-gate slots 8211 and the fourth equidistant sub-gate slots 8214 are respectively disposed at both ends of the channel layer 4 along the gate width direction. The widths of the second equidistant sub-gate slots 8212 and the third equidistant sub-gate slots 8213 are equal, and the widths of the first equidistant sub-gate slots 8211 and the fourth equidistant sub-gate slots 8214 are both half the width of the third equidistant sub-gate slot 8213. The first equidistant sub-slot 8211, the second equidistant sub-slot 8212, the third equidistant sub-slot 8213, and the fourth equidistant sub-slot 8214 have equal depths and lengths. A first boss is formed between the first equidistant sub-slot 8211 and the second equidistant sub-slot 8212; a second boss is formed between the second equidistant sub-slot 8212 and the third equidistant sub-slot 8213; and a fourth boss is formed between the third equidistant sub-slot 8213 and the fourth equidistant sub-slot 8214. The first equidistant sub-slots 8211, the second equidistant sub-slot 8212, the third equidistant sub-slot 8213, and the fourth equidistant sub-slot 8214 are evenly spaced, i.e., the width d of the first boss is equal to... 21 The width d of the second boss 22 The width d of the third boss 23 The first gate metal 8221, the second gate metal 8222, and the third gate metal 8223 respectively enclose the first boss, the second boss, and the third boss, and each gate metal has the same width. Taking the first gate metal 8221 as an example, the first gate metal 8221 encloses the first boss, that is, the first gate metal 8221 surrounds both sides of the first boss and covers the top of the first boss. It should be understood that part of the first gate metal 8221 is in the first equidistant sub-gate groove 8211, part is in the second equidistant sub-gate groove 8212, and part is on the top of the first boss. Furthermore, the width of the portion of the first gate metal 8221 on both sides of the first boss is equal. The first equidistant sub-gate groove 8211 is filled only with the first gate metal 8221, and the fourth equidistant sub-gate groove 8214 is filled only with the third gate metal 8223. In the second equidistant sub-gate slot 8212, the side closest to the first equidistant sub-gate slot 8211 is the first gate metal 8221, and the side closest to the third equidistant sub-gate slot 8213 is the second gate metal 8222. In the third equidistant sub-gate slot 8213, the side closest to the second equidistant sub-gate slot 8212 is the second gate metal 8222, and the side closest to the fourth equidistant sub-gate slot 8214 is the third gate metal 8223.

[0079] In this embodiment, the first gate metal 8221 includes a Ti / Au multilayer metal. The second gate metal 8222 includes a Cr / Au multilayer metal or a W / Cr multilayer metal. The third gate metal 8223 includes a Ni / Au multilayer metal. Taking the first gate metal 8221 as a Ti / Au multilayer metal as an example, the portion of the first gate metal 8221 near the first boss is Ti metal, and the portion away from the first boss is Au metal.

[0080] like Figure 2a and 2b As shown, the first gate metal 8221, the second gate metal 8222 and the third gate metal 8223 form a complete gate, and the first gate metal 8221, the second gate metal 8222 and the third gate metal 8223 are all T-shaped gates. The first gate metal 8221, the second gate metal 8222 and the third gate metal 8223 have the same shape and structure, and their top view shape is rectangular.

[0081] This embodiment provides a method for fabricating an N-plane GaN radio frequency device based on multi-threshold coupling technology, including:

[0082] Step 1: Buffer layer 2, barrier layer 3, and channel layer 4 are grown sequentially from bottom to top on the upper surface of substrate layer 1. The channel layer 4 is made of N-plane GaN, and a two-dimensional electron gas is formed at the interface between channel layer 4 and barrier layer 3.

[0083] Step 2: Define the gate region, source region, and drain region on the upper surface of channel layer 4. The gate region is located in the middle of the upper surface of channel layer 4, while the source and drain regions are located on either side of the gate region on the upper surface of channel layer 4, with a gap between the source and drain regions and the gate region. Source and drain metals are fabricated at both ends of the upper surface of channel layer 4 using electron beam evaporation. Rapid thermal annealing is then performed in a nitrogen atmosphere at a temperature of 800–900°C for 20–40 seconds, resulting in source 5 and drain 6. N-ion implantation is performed on the side of the source and drain regions furthest from the gate region using ion implantation. The ion implantation depth is greater than the sum of the thicknesses of buffer layer 2, barrier layer 3, and channel layer 4, forming an isolation structure 7 to isolate the active region of the device.

[0084] Step 3: Fabricate a multi-threshold coupled gate structure 8 on the upper surface of the channel layer 4.

[0085] Specifically, electron beam lithography is used to define a nanochannel array pattern with a gradually decreasing length along the gate width direction. A Cl-based etching apparatus is used to etch the arrayed trench structure, with the etching depth located below the heterojunction interface formed by the barrier layer 3 and the channel layer 4, forming the first equidistant sub-gate trench 8211, the second equidistant sub-gate trench 8212, the third equidistant sub-gate trench 8213, and the fourth equidistant sub-gate trench 8214. Using an electron beam evaporation apparatus, Ti / Au (30 / 600nm), Cr / Au (25 / 500nm), and Ni / Au (30 / 300nm) are sequentially evaporated along the gate width direction in the gate region. After stripping, the first gate metal 8221, the second gate metal 8222, and the third gate metal 8223 are obtained.

[0086] Specifically, the larger the work function of the gate metal, the more positive the threshold voltage. In this embodiment, along the gate width direction, the work function of each of the several gate metals 822 gradually increases, and the threshold voltage gradually shifts to the positive. As the gate voltage gradually increases from negative to positive, the device gradually turns on along the gate width direction (the direction in which the work function increases), thereby improving the transconductance flatness of the device.

[0087] Example 4

[0088] Based on Embodiment 1, this embodiment provides an N-plane GaN RF device based on multi-threshold coupling technology, including: substrate layer 1, buffer layer 2, barrier layer 3, channel layer 4, source 5, drain 6, isolation structure 7 and multi-threshold coupling gate structure 8, whose relative positional relationship is the same as that in Embodiment 1, and will not be repeated here.

[0089] Please see Figures 6a-6c ,in, Figure 6a This is a front view of a multi-threshold coupled gate structure provided in an embodiment of the present invention. Figure 6b This is a top view of a multi-threshold coupled gate structure provided in an embodiment of the present invention. Figure 6c This invention provides a multi-threshold coupled gate structure along... Figure 6b A cross-sectional view of the E-E' plane. In this embodiment, the multi-threshold coupled gate structure 8 includes a second gate 832 and a plurality of gate dielectrics 831. The plurality of gate dielectrics 831 are distributed along the gate width direction on the upper surface of the channel layer 4, and every two adjacent gate dielectrics 831 are in contact with each other. Along the gate width direction, the dielectric constant of each of the plurality of gate dielectrics 831 gradually increases. The second gate 832 covers the upper surface of the plurality of gate dielectrics 831.

[0090] In this embodiment, the plurality of gate dielectrics 831 include: a first gate dielectric 8311, a second gate dielectric 8312, and a third gate dielectric 8313 sequentially disposed along the gate width direction. The material of the first gate dielectric 8311 includes SiO2. The material of the second gate dielectric 8312 includes Al2O3 or HfSiO4. The material of the third gate dielectric 8313 includes one of HfO2, ZrO2, Ta2O5, and La2O3. A second gate 832 covers the upper surfaces of the first gate dielectric 8311, the second gate dielectric 8312, and the third gate dielectric 8313. The material of the second gate 832 is a Cr / Au multilayer metal with a thickness of 25 / 500 nm.

[0091] This embodiment provides a method for fabricating an N-plane GaN radio frequency device based on multi-threshold coupling technology, including:

[0092] Step 1: Buffer layer 2, barrier layer 3, and channel layer 4 are grown sequentially from bottom to top on the upper surface of substrate layer 1. The channel layer 4 is made of N-plane GaN, and a two-dimensional electron gas is formed at the interface between channel layer 4 and barrier layer 3.

[0093] Step 2: Define the gate region, source region, and drain region on the upper surface of channel layer 4. The gate region is located in the middle of the upper surface of channel layer 4, while the source and drain regions are located on either side of the gate region on the upper surface of channel layer 4, with a gap between the source and drain regions and the gate region. Source and drain metals are fabricated at both ends of the upper surface of channel layer 4 using electron beam evaporation. Rapid thermal annealing is then performed in a nitrogen atmosphere at a temperature of 800–900°C for 20–40 seconds, resulting in source 5 and drain 6. N-ion implantation is performed on the side of the source and drain regions furthest from the gate region using ion implantation. The ion implantation depth is greater than the sum of the thicknesses of buffer layer 2, barrier layer 3, and channel layer 4, forming an isolation structure 7 to isolate the active region of the device.

[0094] Step 3: Fabricate a multi-threshold coupled gate structure 8 on the upper surface of the channel layer 4.

[0095] Specifically, selective epitaxial growth technology is then used to grow a first gate dielectric 8311, a second gate dielectric 8312, and a third gate dielectric 8313 along the gate width direction in the gate region. Using an electron beam evaporation apparatus, a Cr / Au multilayer metal is evaporated on the upper surfaces of the first gate dielectric 8311, the second gate dielectric 8312, and the third gate dielectric 8313 to obtain the second gate 832.

[0096] Specifically, the higher the dielectric constant of the gate dielectric, the more positive the threshold voltage. Therefore, in this embodiment, several gate dielectrics with progressively increasing dielectric constants are sequentially arranged along the gate width direction. The threshold voltage will gradually shift to the positive direction. As the gate voltage gradually increases from negative to positive, the device gradually turns on along the gate width direction (the direction of increasing dielectric constant), thereby improving the transconductance flatness of the device.

[0097] The above description, in conjunction with specific preferred embodiments, provides a further detailed explanation of the present invention. It should not be construed that the specific implementation of the present invention is limited to these descriptions. For those skilled in the art, various simple deductions or substitutions can be made without departing from the concept of the present invention, and all such modifications and substitutions should be considered within the scope of protection of the present invention.

Claims

1. An N-plane GaN radio frequency device based on multi-threshold coupling technology, characterized in that, include: The layers arranged from bottom to top are: substrate layer, buffer layer, barrier layer, channel layer, and multi-threshold coupling gate structure. The channel layer is made of N-plane GaN; A two-dimensional electron gas is formed at the interface between the channel layer and the barrier layer; The multi-threshold coupled gate structure is used to apply a threshold voltage that gradually varies along the gate width direction to the two-dimensional electron gas; The multi-threshold coupled gate structure includes: a first gate and a plurality of first gate trenches spaced apart along the gate width direction, wherein, Along the width direction of the grid, the length of several first grid slots increases sequentially, and the interval between every two adjacent first grid slots gradually decreases; Each of the first gate slots extends from the upper surface of the channel layer into the interior of the barrier layer; The first gate fills the plurality of first gate trenches and covers the gaps between the plurality of first gate trenches.

2. The N-plane GaN RF device based on multi-threshold coupling technology according to claim 1, characterized in that, Also includes: Source, drain, and isolation structure; The source is located on the upper surface of the channel layer and on one side of the multi-threshold coupled gate structure along the gate length direction; The drain is located on the upper surface of the channel layer and on the other side of the multi-threshold coupled gate structure along the gate length direction; The isolation structure is located on one side of the source electrode along the gate length direction and on the other side of the drain electrode along the gate length direction, and extends from the upper surface of the channel layer into the interior of the buffer layer.

3. The N-plane GaN RF device based on multi-threshold coupling technology according to claim 2, characterized in that, Along the gate width direction, the length of the first gate gradually increases.

4. An N-plane GaN radio frequency device based on multi-threshold coupling technology, characterized in that, include: The layers arranged from bottom to top are: substrate layer, buffer layer, barrier layer, channel layer, and multi-threshold coupling gate structure. The channel layer is made of N-plane GaN; A two-dimensional electron gas is formed at the interface between the channel layer and the barrier layer; The multi-threshold coupled gate structure is used to apply a threshold voltage that gradually varies along the gate width direction to the two-dimensional electron gas; The multi-threshold coupled gate structure includes: a second gate and a plurality of gate dielectrics, wherein, The plurality of gate dielectrics are distributed along the gate width direction on the upper surface of the channel layer, and each pair of adjacent gate dielectrics are in contact with each other. Along the gate width direction, the dielectric constant of each of the plurality of gate dielectrics gradually increases; The second gate covers the upper surface of the plurality of gate dielectrics; The plurality of gate media includes: a first gate medium, a second gate medium, and a third gate medium arranged sequentially along the gate width direction; The material of the first gate dielectric includes: SiO2; The material of the second gate dielectric includes: Al2O3 or HfSiO4; The material of the third gate dielectric includes one of HfO2, ZrO2, Ta2O5 and La2O3.

5. The N-plane GaN RF device based on multi-threshold coupling technology according to any one of claims 1 to 4, characterized in that, The substrate layer is made of sapphire or SiC. The material of the buffer layer includes: GaN; The material of the barrier layer includes one or more of AlGaN, AlN, and InAlN.

6. A method for fabricating an N-plane GaN radio frequency device based on multi-threshold coupling technology, characterized in that, The method for fabricating the N-plane GaN RF device based on multi-threshold coupling technology as described in any one of claims 1 to 4 includes the following steps: S1: A buffer layer, a barrier layer, and a channel layer are grown sequentially from bottom to top on the upper surface of the substrate; the channel layer is made of N-plane GaN; a two-dimensional electron gas is formed at the interface between the channel layer and the barrier layer; S2: A multi-threshold coupled gate structure is prepared on the upper surface of the channel layer; the multi-threshold coupled gate structure is used to apply a threshold voltage that gradually varies along the gate width direction to the two-dimensional electron gas.

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